draw: pass number of images to image soa create

This is stored for now but will be used as part of indirect
image support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

llvmpipe: enable ARB_gpu_shader5

This isn't fully free of bugs, but it's good to get CI working,
so fixing those bugs doesn't break anything.

The main buggy areas are missing indirect texture size,
and transform feedback geometry streams.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

gallivm/sample: handle size unit offset

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

llvmpipe/draw: wire up indirect offset

This bounds checks and adds to the llvm index.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

gallivm/sample: pass indirect offset into texture/image units

This isn't needed for the basic indirect code, but it is needed for
texture size/image size unfortunately. They could be done with a super
switch, but it seems simple to query them.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

gallivm/nir: handle non-uniform texture offsets

The way we construt vertex/geom shaders means these can
diverge, so we have to just hammer it out manually,
there are likely optimisation opportuniities in here

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

gallivm/nir: add texture unit indexing

This hooks up the index from NIR into the sampler code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

llvmpipe: add support for indirect texture access.

This hooks up the sampler switch statement generator
 to the llvmpipe sampler interface.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

draw: add support for indirect texture access

This hooks up the switch statement generator to the draw code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

gallivm: add indirect texture switch statement builder.

This adds the apis to add an indirect accessor for arrays
of textures, using an LLVM switch statement and per-texture
sampler functions.

It also adds the indexer to the sampler parameters

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

gallivm/sample: change texture function generator api

This passes some more paramters in directly and changes how
the returns are done in order to reuse this function for
indirect texture support later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

llvmpipe: pass number of samplers into llvm sampler code.

This is to be used later for indirect texture access

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

draw: pass nr_samplers into llvm sample state creation.

This will be used later to handle indirect texture support.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>

nir: add missing break to nir_opt_access()

Fixes: f2d0e48ddc74 ("glsl/nir: Add optimization pass for access flags")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

egl: move fallthrough comment so gcc can see it

Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

iris: add missing fallthrough comment

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

intel/compiler: add and fix up fallthrough comments for gcc warnings

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

anv: update fallthrough comment so gcc sees it

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

gallivm: add missing break

Fixes: 26c5ae80f0b5 ("llvmpipe: enable ARB_shader_group_vote")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

llvmpipe: add missing fallthrough comments

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

i965: add and fix fallthrough comments

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>

intel/compiler: Don't emit no-op cr0 changes

If mask is 0, we're asking for no changes to cr0.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>

intel/compiler: Add assert that set bits are within mask

We generate bitfields of bits that we want to retain (mask) and bits
that we want to set (brw_mode) in the cr0 register, so the bits we want
to set should be in the set of bits we want to retain.

Also, remove the initialization of mask from
fs_visitor::emit_shader_float_controls_execution_mode since
brw_rnd_mode_from_nir initializes the mask parameter unconditionally.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>

gallium,util: undef ALIGN on FreeBSD to prevent name clash

Some rare headers like ipc/shm and pthread_np cause
machine/param.h to be included which defines a macro called ALIGN.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>

i965: Explicitly cast value to uint64_t

In FreeBSD x86 and aarch64 __u64 is typedef to unsigned long and
is the same size as unsigned long long.
Since we are explicitly specifying the format, cast the value
to the proper type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>

iris: Explicitly cast value to uint64_t

In FreeBSD x86 and aarch64 __u64 is typedef to unsigned long and
is the same size as unsigned long long.
Since we are explicitly specifying the format, cast the value
to the proper type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>

meson: Do not enable USE_ELF_TLS for FreeBSD

Compiling with this option result in too much TLS usage and FreeBSD
cannot handle that.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>

gitlab-ci: Do not create the "success" job when the test-docs job exists

It's redundant in that case.

v2:
* Adapt to v2 of test-docs job rules.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

gitlab-ci: Extend .ci-run-policy template for docs jobs

Requires using rules: in the pages job as well, so it doesn't inherit
the rules from the template.

v2:
* Add comment explaining that cases not covered by explicit rules
  default to "when: never".

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

gitlab-ci: Use rules: instead of except:/only: for test-docs job

Only run the job automatically for Marge Bot, otherwise let it be
triggered manually.

v2:
* Never run this job for the main project, since it's only needed in
  pre-merge pipelines.
* Add comment explaining that cases not covered by explicit rules
  default to "when: never".

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

ci: move test-docs to container stage

While we're at it, rename it to reflect that we're now also testing docs
here.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

ci: move deploy-stage later in the pipeline

This makes it not clutter up the pipeline results page so much.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

ci: test docs for non-master builds

This ensures that we test on CI before merge-requests gets merged.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

ci: only build docs if any docs changed

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

ci: only build docs in the upstream-repo

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>

freedreno/ir3: add support for INTERP_MODE_NOPERSPECTIVE

Check the interp mode and use SYSTEM_VALUE_BARYCENTRIC_LINEAR_* instead
when it is INTERP_MODE_NOPERSPECTIVE.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

turnip: set missing bary sysvals

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

freedreno/a6xx: set missing bary sysvals

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

freedreno/a5xx: set missing bary sysvals

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

freedreno/ir3: add generic get_barycentric()

This will be useful to support the missing barycentric sysvals.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

freedreno/a4xx: fake LINEAR_PIXEL varying support for u_blitter

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

freedreno/a3xx: support LINEAR_PIXEL/PERSP_CENTROID/LINEAR_CENTROID sysvals

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

freedreno/registers: update varying-related registers

Note:

* a3xx change based on available register documentation
* a4xx guesses (RB_RENDER_CONTROL2 bits especially)
* a5xx change based on a6xx, these registers seem identical

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>

gitlab-ci: Automatically run pipelines for Marge Bot pre-merge only

Marge only merges an MR if the pipeline passed. Running the pipeline
again after merging is redundant.

v2:
* Add rule to ensure docker images are up to date in the main project
  registry (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5680>

v3d/compiler: fix image size for 1D arrays

Reviewed by: Alejandro Piñeiro <apinheiro@igalia.com>

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5692>

st/mesa: do not clear NewDriverState for inactive states

Fixes: 085aa7f91e8 ("st/mesa: don't update atomic, SSBO, UBO and TBO states that have no effect")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2951
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5660>

gallium/docs: remove unused imgmath extension

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

gallium/docs: remove non-existent static dir

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

gallium/docs: prefix exts dir with underscore

It's generally considered good practice to use underscore-prefixes for
directories that contains non-doumentation files, so let's do this for
our custom extensions as well.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

gallium/docs: use none for highlight_language

We have much more blocks that are of no particular language (mostly
custom ASM variants), so let's instead opt in if we want
syntax-highlighting.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

gallium/docs: remove reference to non-existent label

This label was removed a long time ago, let's also remove the reference
to it.

Fixes: 3acd7a34ab0 ("st/vega: Remove.")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

gallium/docs: fixup formatting of numbered lists

Fixes: 0caf74bbcdf ("gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS")
Fixes: 8632626c81a ("gallium: add pipe_resource::nr_storage_samples, and set it same as nr_samples")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

gallium/docs: update to recent sphinx

add_description_unit has been deprectated for a really long time, and was
finally removed (seemingly in Sphinx 2.0, but this doesn't seem to be
properly documented anywhere I can find), so we shouldn't be using this
any more.

Anyway, let's update the code.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>

draw/llvm: fix big-endian mask adjusting

This code was broken, but it worked by accident, as the
pad and the edgeflag were reversed, however when Roland
removed the cliptest field back in 2015, he stopped copying
the pad which actually stopped copy the edgeflag.

Fix the function to actually copy the edgeflag.

Fixes: 1b22815af624 ("draw: don't pretend have_clipdist is per-vertex")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>

mesa/get: fix enum16 big-endian getting.

These values were getting casted up to 32-bit, but then extracted
via 16-bit pointer later. Just store via 16-bit.

Fixes a lot of piglit on s390

Fixes: f96a69f916ae ("mesa: replace GLenum with GLenum16 in common structures (v4)");
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>

llvmpipe: fix occlusion queries on big-endian.

Casting to u8 arrays and picking the lowest byte is fairly LE specific
grab the other byte.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>

gallivm/nir: fix big-endian 64-bit splitting/merging.

The shuffles need to be swapped to do this properly on big-endian

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>

glsl: fix constant packing for 64-bit big endian.

In a piglit run on s390 a lot of double tests fail, explicitly
packing/shifting things rather than using memcpy seems to help

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>

docs: add a page explaining the GitLab CI and the Intel CI

This explains what they are, what they do and how to use them.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Clayton Craft <clayton.a.craft@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2250>

mesa/swrast: use logf2 instead of util_fast_log2

The fast version is apparently not accurate enough. I wrote a very
simply test program that called logf2 and the old LOG2 function 100000
times. Across that the two functions had very similar run times, neither
appeared meaningfully faster, so the optimization of bringing back yet
another way to calculate log2f seems pointless.

Fixes: bd4e769515345a6b20562310334bc828c0bb6605
       ("replace LOG2 with util_fast_log2")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2856
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5406>

anv: disable i915_perf warning on non-Linux

$ vkcube
INTEL-MESA: warning: Performance support disabled, consider sysctl dev.i915.perf_stream_paranoid=0

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5461>

meson: Revert commit overriding C++ standard with gnu++11 on ppc64el

Since a few versions, mesa now needs c++14 and compiling with gnu++11
on ppc64el fails.
Let's use the default standard and fix the collision of types between
c++ and altivec in a another patch.

Cc: mesa-stable
Signed-off-by: Frédéric Bonnard <frediz@debian.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4948>

clover: Fix types collision between c++ and altivec

For that, we undefine bool, vector, pixel as advised by altivec.h in the
specific case that defines them.

Cc: mesa-stable
Signed-off-by: Frédéric Bonnard <frediz@debian.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4948>

nir: Propagate *2*16 conversions into vectors

If we have code like:

   ('f2f16', ('vec2', ('f2f32', 'a@16'), '#b@32'))

We would like to eliminate the conversions, but the existing rules can't
see into the the (heterogenous) vector. So instead of trying to
eliminate in one pass, we add opts to propagate the f2f16 into the
vector. Even if nothing further happens, this is often a win since then
the created vector is smaller (half2 instead of float2). Hence the above
gets transformed to

   ('vec2', ('f2f16', ('f2f32', 'a@16')), ('f2f16', '#b@32'))

Then the existing f2f16(f2f32) rule will kick in for the first component
and constant folding will for the second and we'll be left with

   ('vec2', 'a@16', '#b@16')

...eliminating all conversions.

v2: Predicate on !options->vectorize_vec2_16bit. As discussed, this
optimization helps greatly on true vector architectures (like Midgard)
but wreaks havoc on more modern SIMD-within-a-register architectures
(like Bifrost and modern AMD). So let's predicate on that.

v3: Extend for integers as well and add a comment explaining the
transforms.

Results on Midgard (unfortunately a true SIMD architecture):

total instructions in shared programs: 51359 -> 50963 (-0.77%)
instructions in affected programs: 4523 -> 4127 (-8.76%)
helped: 53
HURT: 0
helped stats (abs) min: 1 max: 86 x̄: 7.47 x̃: 6
helped stats (rel) min: 1.71% max: 28.00% x̄: 9.66% x̃: 7.34%
95% mean confidence interval for instructions value: -10.58 -4.36
95% mean confidence interval for instructions %-change: -11.45% -7.88%
Instructions are helped.

total bundles in shared programs: 25825 -> 25670 (-0.60%)
bundles in affected programs: 2057 -> 1902 (-7.54%)
helped: 53
HURT: 0
helped stats (abs) min: 1 max: 26 x̄: 2.92 x̃: 2
helped stats (rel) min: 2.86% max: 30.00% x̄: 8.64% x̃: 8.33%
95% mean confidence interval for bundles value: -3.93 -1.92
95% mean confidence interval for bundles %-change: -10.69% -6.59%
Bundles are helped.

total quadwords in shared programs: 41359 -> 41055 (-0.74%)
quadwords in affected programs: 3801 -> 3497 (-8.00%)
helped: 57
HURT: 0
helped stats (abs) min: 1 max: 57 x̄: 5.33 x̃: 4
helped stats (rel) min: 1.92% max: 21.05% x̄: 8.22% x̃: 6.67%
95% mean confidence interval for quadwords value: -7.35 -3.32
95% mean confidence interval for quadwords %-change: -9.54% -6.90%
Quadwords are helped.

total registers in shared programs: 3849 -> 3807 (-1.09%)
registers in affected programs: 167 -> 125 (-25.15%)
helped: 32
HURT: 1
helped stats (abs) min: 1 max: 3 x̄: 1.34 x̃: 1
helped stats (rel) min: 20.00% max: 50.00% x̄: 26.35% x̃: 20.00%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 16.67% max: 16.67% x̄: 16.67% x̃: 16.67%
95% mean confidence interval for registers value: -1.54 -1.00
95% mean confidence interval for registers %-change: -29.41% -20.69%
Registers are helped.

total threads in shared programs: 2471 -> 2520 (1.98%)
threads in affected programs: 49 -> 98 (100.00%)
helped: 25
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.96 x̃: 2
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
95% mean confidence interval for threads value: 1.88 2.04
95% mean confidence interval for threads %-change: 100.00% 100.00%
Threads are [helped].

total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4999>

panfrost: Do fine-grained flushing for occlusion query results

This allows doing occlusion queries in one frame and getting the
results in the next frame without having to flush.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5676>

freedreno/a4xx: fix *_NONE enum conversion

Commit e369b8931c67 ("freedreno: Use explicit *_NONE enum for undefined
formats") only partially converts ~0 to *_NONE enum.  It breaks texture
support, and glmark2 texture scene gives a black screen.

Adding the missing conversion of ~0 to *_NONE enum fixes the issue.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5693>

CI: Re-enable Panfrost T860 jobs

The lab is back online.

This reverts commit 34db50558d9a6dca89218f74c4418cdf0b0acbcb.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5694>

radeonsi: add a debug option to enable NGG culling for tessellation

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>

radeonsi: don't try to enable NGG culling for GS

It doesn't do anything.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>

radeonsi: always use Wave64 for HS/GS/VS shader stages (except GS fast launch)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>

radeonsi: always use Wave32 for GS fast launch, because Wave64 hangs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>

radeonsi: fix NGG culling for Wave64

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>

ac/gpu_info: fix num_physical_sgprs_per_simd for gfx10

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>

radeonsi: don't flush in fence_server_sync

This reverts commit 50b06cbc10dbca1dfee89b529ba9b564cc4ea6f6 and fixes
an Android performance regression.

Fixes: 50b06cbc10dbca1dfee89b529ba9b564cc4ea6f6 "radeonsi: fix fence_server_sync() holding up extra work v2"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5602>

CI: Temporarily disable Panfrost T860 jobs

Phase two of our network reconfiguration is happening this afternoon, so
we need to drop our RK3399 out for a little while. (Part of this
reconfiguration is to shard our devices across networks and racks, so
losing one part of our infrastructure doesn't mean losing any particular
device type.)

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>

CI: Re-enable the Windows VS2019 build job

Let's try this and see how it goes.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>

CI: Correct build-directory path on Windows, and keep it

Build job artifacts capture Meson logs from _build, so we can analyse
what Meson did during configuration, as well as the full output of any
test jobs.

We were previously calling our build directory 'build', which meant it
wouldn't have been captured by the artifacts, and we were also deleting
it to make really sure there was no chance of logs getting captured
either.

Rename the build directory to '_build' to match the others, and don't
delete it either, so we can keep our configure/test logs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>

CI: Try shared libraries on Windows

This might make linking a bit less prone to OOM when trying to pull in
LLVM.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>

CI: Enable assertions on Windows

Getting assertion failures is helpful to have, even if we are doing a
release build.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>

radeonsi: bump SI_NUM_SHADER_BUFFERS to 32

Some app uses more than 8 SSBOs (https://gitlab.freedesktop.org/mesa/mesa/-/issues/2946),
so increase SI_NUM_SHADER_BUFFERS to 32 (which allows 16 SSBOs).

Since we're now using a 64 bits number to track buffers, we could bump
SI_NUM_SHADER_BUFFERS to 48 but that would conflict with Mesa's
MAX_COMBINED_ATOMIC_BUFFERS limit (= 90).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2122
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5632>

glsl: remove stale FIXME

This is no longer an issue, was likely fixed years ago.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5657>

st/glsl_to_nir: disable st_nir_lower_builtin() when packing supported

There is no need to lower builtins when uniform packing is
supported by the driver. Lowering is only required by other drivers
because we prepack builtin uniforms.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3140
CC: <stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>

glsl: define gl_LightSource members in ARB_vertex_program order

GLSL shares functionality with ARB_vertex_program but the GLSL
spec defines the gl_LightSource builtin with a member order that
is different from the packing expected in ARB_vertex_program.
This difference introduces a need for specialist lowering code
when handling builtin structs that is not required for normal
uniform structs due to member location mismatches.

Since gl_LightSource can't be redefined it shouldn't matter if
we add the members in the order listed in the spec, just so long
as we add them all. So here we rearrange the definition of the
glsl builtin to reflex our internal layout and that of
ARB_vertex_program. This required for the following patch.

CC: <stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>

mesa: add _mesa_program_state_value_size() helper

This allows us to query the uniform size required to store the
state value.

CC: <stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>

mesa: remove _mesa prefix from static function

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>

zink: set lower_uadd_carry in nir options

fixes a bunch of mulextended piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5685>

loader/dri3: Check for window destruction in dri3_wait_for_event_locked

If the underlying X11 window gets destroyed, the event we're waiting
for may never be delivered, in which case xcb_wait_for_special_event
would hang indefinitely.

Solution:

1. Use xcb_poll_for_special_event to check if an event has arrived yet.
2. If not, Wait up to ~1s for XCB's file descriptor to become readable;
   if it does, go back to step 1.
3. If the file descriptor didn't become readable, make a round-trip to
   the X server to check that the window still exists. Go back to step
   1 if it does, otherwise bail.

Also add an early bail-out when it's known that the window was
destroyed.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/116
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5368>

loader/dri3: Use dri3_wait_for_event_locked in loader_dri3_wait_for_msc

Before, if one thread ended up waiting in dri3_wait_for_event_locked
and another one in loader_dri3_wait_for_msc at the same time, one thread
could end up processing an event the other thread was waiting for, which
could result in the latter thread waiting longer than necessary
(possibly indefinitely).

Noticed by inspection.

v2:
* Drop xcb_flush call from loader_dri3_wait_for_msc in favour of the one
  in dri3_wait_for_event_locked (Kenneth Graunke)

Fixes: 7b0e8264dd21 "loader/dri3: Try to make sure we only process our
                     own NotifyMSC events"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5368>

loader/dri3: Add dri3_wait_for_event_locked full_sequence out parameter

Preparation for the next commit, no functional change intended.

Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5368>

v3d: Fix -Wmaybe-uninitialized compiler warning in the v33 code.

We weren't initializing the VCM bits in the !gs path, but v33 doesn't have
GS so we can just mark it unreachable.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>

v3d: Enable PIPE_CAP_TGSI_TEXCOORD.

Dave wants to drop the !TEXCOORD path from NIR, and it's easy enough to
do.  Untested.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>

vc4: Enable PIPE_CAP_TGSI_TEXCOORD.

Dave wants to drop the !TEXCOORD path from NIR, and it's easy enough to
do.  Untested.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>

gallium/util: Add a helper function for point sprite handling.

Many drivers will need to do the same thing here, so consolidate it.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>

turnip: enable depthBiasClamp

Passes at least dEQP-VK.dynamic_state.rs_state.depth_bias_clamp

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>

turnip: enable largePoints

Passes dEQP-VK.rasterization.primitive_size.points.point_size_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>

freedreno/regs: add extra bits for UBWC array pitch

This is not completely tested, but matches the max array pitch allowed by
A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH.

Note this still doesn't allow all image sizes, but it allows 16384x16384
cpp=4 images to work.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>

frontends/va: Handle dynamic resolution/SVC for VP9

VP9 allows frame to use another resolution frame as reference
frames so updating the resolution for decoder when there is a
resolution change.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5646>

v3d/compiler: fix spill offset

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Fixes: 97566efe5cac0ff11b ("v3d: Rematerialize MOVs of uniforms instead of spilling them.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5664>

radv: add support for MRTs compaction to avoid holes

SPI_SHADER_COL_FORMAT allocates export memory and CB_SHADER_MASK
map them to higher MRTs if necessary. The hardware allows to remap
MRTs to avoid holes somehow.

For example, if we have a scenario where MRT0 is unused and only
MRT1 and MRT2 are used, SPI_SHADER_COL_FORMAT is 0x77 and
CB_SHADER_MASK/CB_TARGET_MASK are 0x770 (this assumes
SPI_SHADER_UINT16_ABGR is set).

This allows us to remove one workaround that was added for fixing
GPU hangs with DXVK. I think this is because SPI_SHADER_COL_FORMAT
expects contiguous MRTs to be allocated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>

radv: use SPI_SHADER_ZERO for non-written color attachments

When colorWriteMask is 0 we can assume that this color attachment
is unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>