Alexander Ivchenko [Fri, 27 Dec 2013 14:22:35 +0000 (14:22 +0000)]
sse.md (<code><mode>3<mask_name>): Extend to support EVEX's SAE mode.
* config/i386/sse.md (<code><mode>3<mask_name>): Extend to support
EVEX's SAE mode.
(*<code><mode>3_finite<mask_name>): Ditto.
(*<code><mode>3<mask_name>): Ditto.
(avx512f_cmp<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_vmcmp<mode>3): Ditto.
(avx512f_vmcmp<mode>3_mask): Ditto.
(<sse>_comi): Ditto.
(<sse>_ucomi): Ditto.
(sse_cvttss2si): Ditto.
(sse_cvttss2siq): Ditto.
(<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto.
(avx512f_vcvttss2usi): Ditto.
(avx512f_vcvttss2usiq): Ditto.
(avx512f_vcvttsd2usi): Ditto.
(avx512f_vcvttsd2usiq): Ditto.
(sse2_cvttsd2si): Ditto.
(sse2_cvttsd2siq): Ditto.
(<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto.
(<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto.
(avx512f_getexp<mode><mask_name>): Ditto.
(avx512f_fixupimm<mode><sd_maskz_name>): Ditto.
(avx512f_fixupimm<mode>_mask): Ditto.
(avx512f_sfixupimm<mode><sd_maskz_name>): Ditto.
(avx512f_sfixupimm<mode>_mask): Ditto.
(avx512f_rndscale<mode><mask_name>): Ditto.
(<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto.
(avx512f_getmant<mode><mask_name>): Ditto.
* config/i386/subst.md (round_saeonly_name): New.
(round_saeonly_mask_operand2): Ditto.
(round_saeonly_mask_operand3): Ditto.
(round_saeonly_mask_scalar_operand3): Ditto.
(round_saeonly_mask_scalar_operand4): Ditto.
(round_saeonly_mask_scalar_merge_operand4): Ditto.
(round_saeonly_sd_mask_operand5): Ditto.
(round_saeonly_op2): Ditto.
(round_saeonly_op4): Ditto.
(round_saeonly_op5): Ditto.
(round_saeonly_op6): Ditto.
(round_saeonly_mask_op2): Ditto.
(round_saeonly_mask_op3): Ditto.
(round_saeonly_mask_scalar_op3): Ditto.
(round_saeonly_mask_scalar_op4): Ditto.
(round_saeonly_mask_scalar_merge_op4): Ditto.
(round_saeonly_sd_mask_op5): Ditto.
(round_saeonly_constraint): Ditto.
(round_saeonly_constraint2): Ditto.
(round_saeonly_nimm_predicate): Ditto.
(round_saeonly_mode512bit_condition): Ditto.
(round_saeonly): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r206221
Alexander Ivchenko [Fri, 27 Dec 2013 14:03:55 +0000 (14:03 +0000)]
i386.c (ix86_print_operand): Print EVEX's RC modifiers.
* config/i386/i386.c (ix86_print_operand): Print EVEX's RC modifiers.
* config/i386/i386.md (define_constants): Define EVEx's RC constants.
* gcc/config/i386/sse.md (<plusminus_insn><mode>3<mask_name>): Extend
to support EVEX's rounding control.
(*<plusminus_insn><mode>3<mask_name>): Ditto.
(mul<mode>3<mask_name>): Ditto.
(*mul<mode>3<mask_name>): Ditto.
(<sse>_div<mode>3<mask_name>): Ditto.
(<sse>_sqrt<mode>2<mask_name>): Ditto.
(<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>): Ditto.
(avx512f_fmadd_<mode>_mask): Ditto.
(avx512f_fmadd_<mode>_mask3): Ditto.
(<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>): Ditto.
(avx512f_fmsub_<mode>_mask): Ditto.
(avx512f_fmsub_<mode>_mask3): Ditto.
(<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>): Ditto.
(avx512f_fnmadd_<mode>_mask): Ditto.
(avx512f_fnmadd_<mode>_mask3): Ditto.
(<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>): Ditto.
(avx512f_fnmsub_<mode>_mask): Ditto.
(avx512f_fnmsub_<mode>_mask3): Ditto.
(<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name>): Ditto.
(avx512f_fmaddsub_<mode>_mask): Ditto.
(avx512f_fmaddsub_<mode>_mask3): Ditto.
(<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name>): Ditto.
(avx512f_fmsubadd_<mode>_mask): Ditto.
(avx512f_fmsubadd_<mode>_mask3): Ditto.
(fmai_vmfmadd_<mode>): Ditto.
(*fmai_fmadd_<mode>): Ditto.
(*fmai_fmsub_<mode>): Ditto.
(*fmai_fnmadd_<mode>): Ditto.
(*fmai_fnmsub_<mode>): Ditto.
(sse_cvtsi2ss): Ditto.
(sse_cvtsi2ssq): Ditto.
(sse_cvtss2si): Ditto.
(sse_cvtss2siq): Ditto.
(cvtusi2<ssescalarmodesuffix>32): Ditto.
(cvtusi2<ssescalarmodesuffix>64): Ditto.
(float<sseintvecmodelower><mode>2<mask_name>): Ditto.
(ufloatv16siv16sf2<mask_name>): Ditto.
(<mask_codefor>avx512f_fix_notruncv16sfv16si<mask_name>): Ditto.
(<mask_codefor>avx512f_ufix_notruncv16sfv16si<mask_name>): Ditto.
(sse2_cvtsi2sdq): Ditto.
(avx512f_vcvtss2usi): Ditto.
(avx512f_vcvtss2usiq): Ditto.
(avx512f_vcvtsd2usi): Ditto.
(avx512f_vcvtsd2usiq): Ditto.
(sse2_cvtsd2si): Ditto.
(sse2_cvtsd2siq): Ditto.
(<mask_codefor>avx512f_cvtpd2dq512<mask_name>): Ditto.
(avx512f_ufix_notruncv8dfv8si<mask_name>): Ditto.
(<mask_codefor>avx512f_cvtpd2ps512<mask_name>): Ditto.
(avx512f_scalef<mode><mask_name>): Ditto.
(<code><mode>3<mask_name>): Ditto.
(*avx2_<code><mode>3<mask_name>): Ditto.
(avx512er_exp2<mode><mask_name): Ditto.
(<mask_codefor>avx512er_rcp28<mode><mask_name>): Ditto.
(<mask_codefor>avx512er_rsqrt28<mode><mask_name>): Ditto.
(avx512f_fmadd_<mode>_maskz): New.
* config/i386/subst.md (SUBST_A): New.
(round_name): Ditto.
(round_mask_operand2): Ditto.
(round_mask_operand3): Ditto.
(round_mask_scalar_operand3): Ditto.
(round_sd_mask_operand4): Ditto.
(round_op2): Ditto.
(round_op3): Ditto.
(round_op4): Ditto.
(round_op5): Ditto.
(round_op6): Ditto.
(round_mask_op2): Ditto.
(round_mask_op3): Ditto.
(round_mask_scalar_op3): Ditto.
(round_sd_mask_op4): Ditto.
(round_constraint): Ditto.
(round_constraint2): Ditto.
(round_constraint3): Ditto.
(round_nimm_predicate): Ditto.
(round_mode512bit_condition): Ditto.
(round_modev4sf_condition): Ditto.
(round_codefor): Ditto.
(round_opnum): Ditto.
(round): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r206220
Yury Gribov [Fri, 27 Dec 2013 13:56:18 +0000 (13:56 +0000)]
re PR sanitizer/59585 (Tests failing due to trailing newline)
2013-12-27 Yury Gribov <y.gribov@samsung.com>
PR target/59585
* c-c++-common/ubsan/div-by-zero-1.c: Fixed pattern.
* c-c++-common/ubsan/div-by-zero-2.c: Likewise.
* c-c++-common/ubsan/div-by-zero-3.c: Likewise.
* c-c++-common/ubsan/load-bool-enum.c: Likewise.
* c-c++-common/ubsan/overflow-add-2.c: Likewise.
* c-c++-common/ubsan/overflow-mul-2.c: Likewise.
* c-c++-common/ubsan/overflow-mul-4.c: Likewise.
* c-c++-common/ubsan/overflow-negate-1.c: Likewise.
* c-c++-common/ubsan/overflow-sub-2.c: Likewise.
* c-c++-common/ubsan/pr59333.c: Likewise.
* c-c++-common/ubsan/shift-1.c: Likewise.
* c-c++-common/ubsan/shift-2.c: Likewise.
* c-c++-common/ubsan/shift-4.c: Likewise.
* c-c++-common/ubsan/vla-1.c: Likewise.
From-SVN: r206219
GCC Administrator [Fri, 27 Dec 2013 00:17:09 +0000 (00:17 +0000)]
Daily bump.
From-SVN: r206218
H.J. Lu [Thu, 26 Dec 2013 21:05:02 +0000 (21:05 +0000)]
Replace -mtune=i686 with -mtune=generic
* g++.old-deja/g++.other/store-expr1.C (dg-options): Replace
-mtune=i686 with -mtune=generic.
* g++.old-deja/g++.other/store-expr2.C (dg-options): Likewise.
From-SVN: r206215
H.J. Lu [Thu, 26 Dec 2013 19:13:41 +0000 (19:13 +0000)]
Replace -mtune=i686 with -mtune=generic
* gcc.target/i386/andor-2.c (dg-options): Replace -mtune=i686
with -mtune=generic.
From-SVN: r206214
H.J. Lu [Thu, 26 Dec 2013 16:10:55 +0000 (16:10 +0000)]
Don't check/change generic/i686 tuning
gcc/
PR target/59588
* config/i386/i386.c (ix86_option_override_internal): Don't
check generic tuning. Don't change i686 tuning.
gcc/testsuite/
PR target/59588
* gcc.target/i386/pr59588-1.c: New file.
* gcc.target/i386/pr59588-2.c: Likewise.
From-SVN: r206213
H.J. Lu [Thu, 26 Dec 2013 14:47:15 +0000 (06:47 -0800)]
Map "arch=corei7"/"arch=nehalem" to M_INTEL_COREI7
After Intel processor name cleanup,
__attribute__ ((target("arch=corei7"))) is translated to PROCESSOR_NEHALEM
and mapped to M_INTEL_COREI7_NEHALEM.
__attribute__ ((target("arch=corei7")))
used to cover M_INTEL_COREI7_XXXX. Now it only covers M_INTEL_COREI7_NEHALEM.
We have PROCESSOR_SANDYBRIDGE and PROCESSOR_HASWELL. But there is nothing
to mark Westmere and Ivy Bridge. Since function versioning doesn't support
extra ISAs in Westmere and Ivy Bridge, we don't lose anything. The solution
is to map
__attribute__ ((target("arch=corei7")))
and
__attribute__ ((target("arch=nehalem")))
to M_INTEL_COREI7.
gcc/
PR target/59601
* config/i386/i386.c (get_builtin_code_for_version): Map
PROCESSOR_NEHALEM to "corei7".
gcc/testsuite/
PR target/59601
* g++.dg/ext/mv14.C: New tests.
* g++.dg/ext/mv15.C: Likewise.
From-SVN: r206212
Uros Bizjak [Thu, 26 Dec 2013 14:12:20 +0000 (15:12 +0100)]
cpuinfo.c (enum vendor_signatures): Remove.
* config/i386/cpuinfo.c (enum vendor_signatures): Remove.
(__cpu_indicator_init): Use signature_INTEL_ebx and signature_AMD_ebx
from cpuid.h to check vendor signatures.
From-SVN: r206211
Ganesh Gopalasubramanian [Thu, 26 Dec 2013 08:54:49 +0000 (08:54 +0000)]
Change AMD cpu names
From-SVN: r206210
H.J. Lu [Thu, 26 Dec 2013 01:49:07 +0000 (17:49 -0800)]
Convert leading spaces to tab
From-SVN: r206209
H.J. Lu [Thu, 26 Dec 2013 01:48:24 +0000 (01:48 +0000)]
Remove model 0x3f from Haswell
* config/i386/cpuinfo.c (get_intel_cpu): Remove model 0x3f from
Haswell.
From-SVN: r206208
GCC Administrator [Thu, 26 Dec 2013 00:17:22 +0000 (00:17 +0000)]
Daily bump.
From-SVN: r206207
Uros Bizjak [Thu, 26 Dec 2013 00:05:44 +0000 (01:05 +0100)]
driver-i386.c (decode_caches_intel): Add missing entries.
* config/i386/driver-i386.c (decode_caches_intel): Add missing entries.
From-SVN: r206203
H.J. Lu [Wed, 25 Dec 2013 22:44:04 +0000 (22:44 +0000)]
Remove target_cpu_default/cpu_names
Add processor names to processor_target_table and use it instead of
target_cpu_default and cpu_names.
PR target/59587
* config/i386/i386.c (struct ptt): Add a field for processor
name.
(processor_target_table): Sync with processor_type. Add
processor names.
(cpu_names): Removed.
(ix86_option_override_internal): Default x_ix86_tune_string
to processor_target_table[TARGET_CPU_DEFAULT].name.
(ix86_function_specific_print): Assert arch and tune <
PROCESSOR_max. Use processor_target_table to print arch and
tune names.
* config/i386/i386.h (TARGET_CPU_DEFAULT): Default to
PROCESSOR_GENERIC.
(target_cpu_default): Removed.
(processor_type): Reordered.
From-SVN: r206202
Uros Bizjak [Wed, 25 Dec 2013 22:24:26 +0000 (23:24 +0100)]
Revert unwanted commit.
From-SVN: r206201
Allan Sandfeld Jensen [Wed, 25 Dec 2013 22:22:24 +0000 (23:22 +0100)]
re PR target/59422 (Support more targets for function multi versioning)
gcc/
2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org>
H.J. Lu <hongjiu.lu@intel.com>
PR target/59422
* config/i386/i386.c (get_builtin_code_for_version): Handle
PROCESSOR_HASWELL, PROCESSOR_SILVERMONT, PROCESSOR_BTVER1,
PROCESSOR_BTVER2, PROCESSOR_BDVER3 and PROCESSOR_BDVER4.
Change priority of PROCESSOR_BDVER1 to P_PROC_XOP.
(fold_builtin_cpu): Add "ivybridge", "haswell", "bonnell",
"silvermont", "bobcat" and "jaguar" CPU names. Add "sse4a",
"fma4", "xop" and "fma" ISA names.
libgcc/
2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org>
H.J. Lu <hongjiu.lu@intel.com>
PR target/59422
* config/i386/cpuinfo.c (enum processor_types): Add AMD_BOBCAT
and AMD_JAGUAR.
(enum processor_subtypes): Add AMDFAM15H_BDVER3, AMDFAM15H_BDVER4,
INTEL_COREI7_IVYBRIDGE and INTEL_COREI7_HASWELL.
(enum processor_features): Add FEATURE_SSE4_A, FEATURE_FMA4,
FEATURE_XOP and FEATURE_FMA.
(get_amd_cpu): Handle AMD_BOBCAT, AMD_JAGUAR, AMDFAM15H_BDVER2 and
AMDFAM15H_BDVER3.
(get_intel_cpu): Handle INTEL_COREI7 and INTEL_COREI7_HASWELL.
(get_available_features): Handle FEATURE_FMA, FEATURE_SSE4_A,
FEATURE_FMA4 and FEATURE_XOP.
testsuite/
2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org>
PR target/59422
* gcc.target/i386/funcspec-5.c (test_fma, test_xop, test_no_fma,
test_no_xop, test_arch_corei7, test_arch_corei7_avx,
test_arch_core_avx2, test_arch_bdver1, test_arch_bdver2,
test_arch_bdver3, test_tune_corei7, test_tune_corei7_avx,
test_tune_core_avx2, test_tune_bdver1, test_tune_bdver2 and
test_tune_bdver3): New function prototypes.
From-SVN: r206200
GCC Administrator [Wed, 25 Dec 2013 00:16:54 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206199
H.J. Lu [Tue, 24 Dec 2013 20:12:47 +0000 (20:12 +0000)]
Check opts->x_ix86_arch_string
* config/i386/i386.c (ix86_option_override_internal): Check
opts->x_ix86_arch_string instead of ix86_arch_string.
From-SVN: r206196
Renlin Li [Tue, 24 Dec 2013 15:34:30 +0000 (15:34 +0000)]
arm-protos.h (vfp_const_double_for_bits): Declare.
gcc/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
* config/arm/constraints.md (Dp): Define new constraint.
* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
new predicate.
* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
(vfp3_const_double_for_bits): New function.
* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.
gcc/testsuite/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* gcc.target/arm/fixed_float_conversion.c: New test case.
From-SVN: r206195
Jason Merrill [Tue, 24 Dec 2013 04:22:23 +0000 (23:22 -0500)]
re PR c++/59271 (a.C:16:21: internal compiler error: in strip_typedefs, at cp/tree.c:1315)
PR c++/59271
* lambda.c (build_capture_proxy): Use build_cplus_array_type.
From-SVN: r206193
Jason Merrill [Tue, 24 Dec 2013 04:22:15 +0000 (23:22 -0500)]
re PR c++/59349 (ICE on invalid: Segmentation fault toplev.c:336)
PR c++/59349
* parser.c (cp_parser_lambda_introducer): Handle empty init.
From-SVN: r206192
GCC Administrator [Tue, 24 Dec 2013 00:16:59 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206191
Hans-Peter Nilsson [Mon, 23 Dec 2013 23:12:09 +0000 (23:12 +0000)]
re PR target/59203 (config/cris/cris.c:2491: possible typo ?)
PR target/59203
* config/cris/cris.c (cris_pic_symbol_type_of): Fix typo,
checking t1 twice instead of t1 and t2 respectively.
From-SVN: r206188
Hans-Peter Nilsson [Mon, 23 Dec 2013 22:33:52 +0000 (22:33 +0000)]
re PR middle-end/59584 (regressions related to __builtin_stack_restore)
PR middle-end/59584
* config/cris/predicates.md (cris_nonsp_register_operand):
New define_predicate.
* config/cris/cris.md: Replace register_operand with
cris_nonsp_register_operand for destinations in all
define_splits where a register is set more than once.
From-SVN: r206187
Jason Merrill [Mon, 23 Dec 2013 17:51:03 +0000 (12:51 -0500)]
* gdbinit.in (input_line, input_filename): Define.
From-SVN: r206183
Jason Merrill [Mon, 23 Dec 2013 17:49:47 +0000 (12:49 -0500)]
re PR c++/41090 (Using static label reference in c++ class constructor produces wrong code)
PR c++/41090
Add -fdeclone-ctor-dtor.
gcc/cp/
* optimize.c (can_alias_cdtor, populate_clone_array): Split out
from maybe_clone_body.
(maybe_thunk_body): New function.
(maybe_clone_body): Call it.
* mangle.c (write_mangled_name): Remove code to suppress
writing of mangled name for cloned constructor or destructor.
(write_special_name_constructor): Handle decloned constructor.
(write_special_name_destructor): Handle decloned destructor.
* method.c (trivial_fn_p): Handle decloning.
* semantics.c (expand_or_defer_fn_1): Clone after setting linkage.
gcc/c-family/
* c.opt: Add -fdeclone-ctor-dtor.
* c-opts.c (c_common_post_options): Default to on iff -Os.
gcc/
* cgraph.h (struct cgraph_node): Add calls_comdat_local.
(symtab_comdat_local_p, symtab_in_same_comdat_p): New.
* cif-code.def: Add USES_COMDAT_LOCAL.
* symtab.c (verify_symtab_base): Make sure we don't refer to a
comdat-local symbol from outside its comdat.
* cgraph.c (verify_cgraph_node): Likewise.
* cgraphunit.c (mark_functions_to_output): Don't mark comdat-locals.
* ipa.c (symtab_remove_unreachable_nodes): Likewise.
(function_and_variable_visibility): Handle comdat-local fns.
* ipa-cp.c (determine_versionability): Don't clone comdat-locals.
* ipa-inline-analysis.c (compute_inline_parameters): Update
calls_comdat_local.
* ipa-inline-transform.c (inline_call): Likewise.
(save_inline_function_body): Don't clear DECL_COMDAT_GROUP.
* ipa-inline.c (can_inline_edge_p): Check calls_comdat_local.
* lto-cgraph.c (input_overwrite_node): Read calls_comdat_local.
(lto_output_node): Write it.
* symtab.c (symtab_dissolve_same_comdat_group_list): Clear
DECL_COMDAT_GROUP for comdat-locals.
include/
* demangle.h (enum gnu_v3_ctor_kinds):
Added literal gnu_v3_unified_ctor.
(enum gnu_v3_ctor_kinds):
Added literal gnu_v3_unified_dtor.
libiberty/
* cp-demangle.c (cplus_demangle_fill_ctor,cplus_demangle_fill_dtor):
Handle unified ctor/dtor.
(d_ctor_dtor_name): Handle unified ctor/dtor.
From-SVN: r206182
Bingfeng Mei [Mon, 23 Dec 2013 17:22:30 +0000 (17:22 +0000)]
vect-neg-store-1.c: New test.
2013-12-23 Bingfeng Mei <bmei@broadcom.com>
* gcc.dg/vect/vect-neg-store-1.c: New test.
* gcc.dg/vect/vect-neg-store-2.c: Ditto.
From-SVN: r206181
H.J. Lu [Mon, 23 Dec 2013 17:11:00 +0000 (17:11 +0000)]
Move Bonnell and Silvermont entries before generic
* config/i386/i386.c (processor_target_table): Move Bonnell and
Silvermont entries before generic.
From-SVN: r206180
Bingfeng Mei [Mon, 23 Dec 2013 15:07:58 +0000 (15:07 +0000)]
re PR middle-end/59569 (r206148 causes internal compiler error: in vect_create_destination_var, at tree-vect-data-refs.c:4294)
2013-12-23 Bingfeng Mei <bmei@broadcom.com>
PR middle-end/59569
* tree-vect-stmts.c (vectorizable_store): Skip permutation for
consant operand, and add a few missing \n.
* gcc.c-torture/compile/pr59569-1.c: New test.
* gcc.c-torture/compile/pr59569-2.c: Ditto.
From-SVN: r206179
H.J. Lu [Mon, 23 Dec 2013 13:05:09 +0000 (13:05 +0000)]
Use proper Intel processor names for -march=/-mtune=
gcc/
* config/i386/core2.md: Replace corei7 with nehalem.
* config/i386/driver-i386.c (host_detect_local_cpu): Use nehalem,
westmere, sandybridge, ivybridge, haswell, bonnell, silvermont
for cpu names.
* config/i386/i386-c.c (ix86_target_macros_internal): Replace
PROCESSOR_COREI7, PROCESSOR_COREI7_AVX, PROCESSOR_ATOM,
PROCESSOR_SLM with PROCESSOR_NEHALEM, PROCESSOR_SANDYBRIDGE,
PROCESSOR_BONNELL, PROCESSOR_SILVERMONT. Define
__nehalem/__nehalem__, __sandybridge/__sandybridge__,
__haswell/__haswell__, __tune_nehalem__, __tune_sandybridge__,
__tune_haswell__, __bonnell/__bonnell__,
__silvermont/__silvermont__, __tune_bonnell__,
__tune_silvermont__.
* config/i386/i386.c (m_COREI7): Renamed to ...
(m_NEHALEM): This.
(m_COREI7_AVX): Renamed to ...
(m_SANDYBRIDGE): This.
(m_ATOM): Renamed to ...
(m_BONNELL): This.
(m_SLM): Renamed to ...
(m_SILVERMONT): This.
(m_CORE_ALL): Updated.
(cpu_names): Add "nehalem", "westmere", "sandybridge",
"ivybridge", "haswell", "broadwell", "bonnell", "silvermont".
(PTA_CORE2): New.
(PTA_NEHALEM): Likewise.
(PTA_WESTMERE): Likewise.
(PTA_SANDYBRIDGE): Likewise.
(PTA_IVYBRIDGE): Likewise.
(PTA_HASWELL): Likewise.
(PTA_BROADWELL): Likewise.
(PTA_BONNELL): Likewise.
(PTA_SILVERMONT): Likewise.
(ix86_option_override_internal): Use new PTA_XXX. Add nehalem,
westmere, sandybridge, ivybridge, haswell, bonnell, silvermont.
(ix86_lea_outperforms): Updated.
(ix86_issue_rate): Likewise.
(ix86_adjust_cost): Likewise.
(ia32_multipass_dfa_lookahead): Likewise.
(do_reorder_for_imul): Likewise.
(swap_top_of_ready_list): Likewise.
(ix86_sched_reorder): Likewise.
(ix86_sched_init_global): Likewise.
(get_builtin_code_for_version): Likewise.
(processor_model): Replace M_INTEL_ATOM, M_INTEL_SLM with
M_INTEL_BONNELL, M_INTEL_SILVERMONT.
(arch_names_table): Updated.
* config/i386/i386.h (TARGET_COREI7): Removed.
(TARGET_COREI7_AVX): Likewise.
(TARGET_ATOM): Likewise.
(TARGET_SLM): Likewise.
(TARGET_NEHALEM): New.
(TARGET_SANDYBRIDGE): Likewise.
(TARGET_BONNELL): Likewise.
(TARGET_SILVERMONT): Likewise.
(target_cpu_default): Add TARGET_CPU_DEFAULT_core_avx2,
TARGET_CPU_DEFAULT_nehalem, TARGET_CPU_DEFAULT_westmere,
TARGET_CPU_DEFAULT_sandybridge, TARGET_CPU_DEFAULT_ivybridge,
TARGET_CPU_DEFAULT_broadwell, TARGET_CPU_DEFAULT_bonnell,
TARGET_CPU_DEFAULT_silvermont. Move TARGET_CPU_DEFAULT_haswell
before TARGET_CPU_DEFAULT_broadwell.
(processor_type): Replace PROCESSOR_COREI7, PROCESSOR_COREI7_AVX,
PROCESSOR_ATOM, PROCESSOR_SLM with PROCESSOR_NEHALEM,
PROCESSOR_SANDYBRIDGE, PROCESSOR_BONNELL, PROCESSOR_SILVERMONT.
* config/i386/i386.md (cpu): Replace corei7 with nehalem.
* config/i386/x86-tune.def: Updated.
* doc/invoke.texi: Replace corei7, corei7-avx, core-avx-i,
core-avx2, atom, slm with nehalem, sandybridge, ivybridge,
haswell, bonnel, silvermont. Add westmere.
libgcc/
* config/i386/cpuinfo.c (processor_subtypes): Replace INTEL_ATOM,
INTEL_SLM with INTEL_BONNELL, INTEL_SILVERMONT.
(get_intel_cpu): Updated.
Co-Authored-By: Tocar Ilya <ilya.tocar@intel.com>
From-SVN: r206178
Marek Polacek [Mon, 23 Dec 2013 12:14:56 +0000 (12:14 +0000)]
re PR c++/59111 ([c++11] ICE on invalid usage of auto in return type)
PR c++/59111
cp/
* search.c (lookup_conversions): Return NULL_TREE if !CLASS_TYPE_P.
testsuite/
* g++.dg/cpp0x/pr59111.C: New test.
* g++.dg/cpp1y/pr59110.C: New test.
From-SVN: r206177
Yury Gribov [Mon, 23 Dec 2013 07:17:52 +0000 (07:17 +0000)]
mklog: Automatically insert comments in trivial cases.
2013-12-23 Yury Gribov <y.gribov@samsung.com>
* mklog: Automatically insert comments in trivial cases.
From-SVN: r206175
Andrey Belevantsev [Mon, 23 Dec 2013 06:43:49 +0000 (10:43 +0400)]
re PR rtl-optimization/57422 (ICE: SIGSEGV in dominated_by_p with custom flags)
PR rtl-optimization/57422
* sel-sched.c (fill_vec_av_set): Assert that the fence insn
can always be scheduled in its current form.
From-SVN: r206174
Andrey Belevantsev [Mon, 23 Dec 2013 06:41:22 +0000 (10:41 +0400)]
re PR rtl-optimization/57422 (ICE: SIGSEGV in dominated_by_p with custom flags)
PR rtl-optimization/57422
* sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling
add_to_hard_reg_set.
From-SVN: r206173
GCC Administrator [Mon, 23 Dec 2013 00:16:53 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206171
Hans-Peter Nilsson [Sun, 22 Dec 2013 14:57:53 +0000 (14:57 +0000)]
chi2_quality.h: Break out from chi2_quality.cc.
* testsuite/20_util/hash/chi2_quality.h: Break out from
chi2_quality.cc.
* testsuite/20_util/hash/chi2_q_bit_flip_set.cc: Ditto.
* testsuite/20_util/hash/chi2_q_document_words.cc: Ditto.
* testsuite/20_util/hash/chi2_q_bit_string_set.cc: Ditto. Increase
SAMPLES to 35000 for simulator targets.
* testsuite/20_util/hash/chi2_q_numeric_pattern_set.cc: Ditto.
* testsuite/20_util/hash/chi2_q_uniform_random.cc: Ditto.
* testsuite/20_util/hash/chi2_quality.cc: Remove.
From-SVN: r206167
Uros Bizjak [Sun, 22 Dec 2013 12:28:24 +0000 (13:28 +0100)]
func-2a.c (dg-do): Remove target selector.
* gcc.target/x86_64/abi/callabi/func-2a.c (dg-do): Remove
target selector.
* gcc.target/x86_64/abi/callabi/func-indirect-2a.c (dg-do): Ditto.
* gcc.target/x86_64/abi/callabi/vaarg-4a.c (dg-do): Ditto.
* gcc.target/x86_64/abi/callabi/vaarg-5a.c (dg-do): Ditto.
From-SVN: r206166
GCC Administrator [Sun, 22 Dec 2013 00:16:56 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206165
Andreas Tobler [Sat, 21 Dec 2013 20:42:39 +0000 (21:42 +0100)]
gcconfig.h: Add FreeBSD powerpc64 defines.
2013-12-21 Andreas Tobler <andreast@gcc.gnu.org>
* include/private/gcconfig.h: Add FreeBSD powerpc64 defines.
From-SVN: r206162
Sharad Singhai [Sat, 21 Dec 2013 07:42:31 +0000 (07:42 +0000)]
Makefile.in: Add optinfo.texi.
2013-12-20 Sharad Singhai <singhai@google.com>
* Makefile.in: Add optinfo.texi.
* doc/invoke.texi: Fix typo.
* doc/optinfo.texi: New documentation for optimization info.
* doc/passes.texi: Add new node.
From-SVN: r206161
GCC Administrator [Sat, 21 Dec 2013 00:16:29 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206160
Trevor Saunders [Fri, 20 Dec 2013 20:34:33 +0000 (20:34 +0000)]
merge auto_vec and stack_vec
From-SVN: r206155
Eric Botcazou [Fri, 20 Dec 2013 16:46:37 +0000 (16:46 +0000)]
arm.c (arm_expand_prologue): In a nested APCS frame with arguments to push onto the stack and no varargs...
* config/arm/arm.c (arm_expand_prologue): In a nested APCS frame with
arguments to push onto the stack and no varargs, save ip into the last
stack slot if r3 isn't available on entry.
From-SVN: r206154
Jakub Jelinek [Fri, 20 Dec 2013 16:32:21 +0000 (17:32 +0100)]
re PR c++/59255 (Segmentation fault with std::function and -fprofile-use)
PR c++/59255
* g++.dg/tree-prof/pr59255.C: New test.
From-SVN: r206152
Kyrylo Tkachov [Fri, 20 Dec 2013 16:10:43 +0000 (16:10 +0000)]
neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64.
[gcc/]
2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64.
* config/arm/arm_neon.h: Regenerate.
* config/arm/neon-docgen.ml: Add vceq_p64 and vtst_p64.
* doc/arm-neon-intrinsics.texi: Regenerate.
[gcc/testsuite/]
2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/arm/neon-vceq_p64.c: New test.
* gcc.target/arm/neon-vtst_p64.c: Likewise.
From-SVN: r206151
Vladimir Makarov [Fri, 20 Dec 2013 14:37:53 +0000 (14:37 +0000)]
arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return NO_REGS for LRA.
2013-12-20 Vladimir Makarov <vmakarov@redhat.com>
* config/arm/arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return NO_REGS
for LRA.
From-SVN: r206150
Kyrylo Tkachov [Fri, 20 Dec 2013 13:55:41 +0000 (13:55 +0000)]
arm_acle.h: Add underscores before variables.
2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm_acle.h: Add underscores before variables.
From-SVN: r206149
Bingfeng Mei [Fri, 20 Dec 2013 13:46:01 +0000 (13:46 +0000)]
re PR tree-optimization/59544 (Vectorizing store with negative step)
2013-12-20 Bingfeng Mei <bmei@broadcom.com>
PR tree-optimization/59544
* tree-vect-stmts.c (perm_mask_for_reverse): Move before
vectorizable_store.
(vectorizable_store): Handle negative step.
* gcc.target/i386/pr59544.c: New test.
From-SVN: r206148
Jakub Jelinek [Fri, 20 Dec 2013 13:07:10 +0000 (14:07 +0100)]
re PR tree-optimization/59413 (wrong code at -Os on x86_64-linux-gnu in both 32-bit and 64-bit modes)
PR tree-optimization/59413
* gcc.c-torture/execute/pr59413.c: New test.
From-SVN: r206147
Bernhard Reutner-Fischer [Fri, 20 Dec 2013 12:07:52 +0000 (13:07 +0100)]
fixincludes: use $(FI) instead of fixincl@EXEEXT@
2013-12-20 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
Makefile.in: Use $(FI) instead of fixincl@EXEEXT@.
From-SVN: r206146
Tocar Ilya [Fri, 20 Dec 2013 09:11:48 +0000 (09:11 +0000)]
config.gcc: Support march=broadwell.
* config.gcc: Support march=broadwell.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell.
* config/i386/i386.c (ix86_option_override_internal): Add broadwell.
* doc/invoke.texi: Document march=broadwell.
From-SVN: r206144
Jakub Jelinek [Fri, 20 Dec 2013 09:05:04 +0000 (10:05 +0100)]
ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h.
* ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h.
(ubsan_type_descriptor): Handle BOOLEAN_TYPE and ENUMERAL_TYPE
like INTEGER_TYPE.
(instrument_bool_enum_load): New function.
(ubsan_pass): Call it.
(gate_ubsan): Also enable for SANITIZE_BOOL or SANITIZE_ENUM.
* asan.c (create_cond_insert_point): No longer static.
* asan.h (create_cond_insert_point): Declare.
* sanitizer.def (BUILT_IN_UBSAN_HANDLE_LOAD_INVALID_VALUE): New
built-in.
* opts.c (common_handle_option): Handle -fsanitize=bool and
-fsanitize=enum.
* builtins.c (fold_builtin_memory_op): When sanitizing bool
and enum loads, don't use enum or bool types for memcpy folding.
* flag-types.h (SANITIZE_BOOL, SANITIZE_ENUM): New.
(SANITIZE_UNDEFINED): Or these in.
* c-c++-common/ubsan/load-bool-enum.c: New test.
From-SVN: r206143
Chung-Ju Wu [Fri, 20 Dec 2013 09:02:58 +0000 (09:02 +0000)]
nds32.h (NDS32_MODE_TYPE_ALIGN): New macro.
2013-12-20 Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32.h (NDS32_MODE_TYPE_ALIGN): New macro.
(NDS32_AVAILABLE_REGNUM_FOR_ARG): Use more accurate alignment checking
to determine available register number.
* config/nds32/nds32.c (nds32_needs_double_word_align): Use new
macro NDS32_MODE_TYPE_ALIGN.
(nds32_function_arg): Refine code layout.
From-SVN: r206142
Jeff Law [Fri, 20 Dec 2013 04:33:34 +0000 (21:33 -0700)]
invoke.texi: (dump-rtl-ree): Fix typo and clarify ree handles both zero and sign extension.
* doc/invoke.texi: (dump-rtl-ree): Fix typo and clarify ree
handles both zero and sign extension.
From-SVN: r206139
GCC Administrator [Fri, 20 Dec 2013 00:16:43 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206138
Teresa Johnson [Thu, 19 Dec 2013 22:11:25 +0000 (22:11 +0000)]
re PR gcov-profile/59542 (ICE: verify_flow_info failed during Firefox build with 'gold')
2013-12-19 Teresa Johnson <tejohnson@google.com>
PR gcov-profile/59542
* bb-reorder.c (duplicate_computed_gotos): Invoke fixup_partitions
if we have made any changes.
From-SVN: r206135
Jakub Jelinek [Thu, 19 Dec 2013 21:27:51 +0000 (22:27 +0100)]
re PR other/59545 (Signed integer overflow issues)
PR other/59545
* genattrtab.c (struct attr_hash): Change hashcode type to unsigned.
(attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter
to unsigned.
(attr_rtx_1): Change hashcode variable to unsigned.
(attr_string): Likewise. Perform first multiplication in unsigned
type.
* ifcvt.c (noce_try_store_flag_constants): Avoid signed integer
overflows.
* double-int.c (neg_double): Likewise.
* stor-layout.c (set_min_and_max_values_for_integral_type): Likewise.
* combine.c (force_to_mode): Likewise.
* postreload.c (move2add_use_add2_insn, move2add_use_add3_insn,
reload_cse_move2add, move2add_note_store): Likewise.
* simplify-rtx.c (simplify_const_unary_operation,
simplify_const_binary_operation): Likewise.
* ipa-split.c (find_split_points): Initialize first.can_split
and first.non_ssa_vars.
* gengtype-state.c (read_state_files_list): Fix up check.
* genautomata.c (reserv_sets_hash_value): Use portable rotation
idiom.
java/
* class.c (hashUtf8String): Compute hash in unsigned type.
* javaop.h (WORD_TO_INT): Avoid signed integer overflow.
From-SVN: r206134
Kyrylo Tkachov [Thu, 19 Dec 2013 18:30:18 +0000 (18:30 +0000)]
neon-docgen.ml: Add crypto intrinsics documentation.
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/neon-docgen.ml: Add crypto intrinsics documentation.
* doc/arm-neon-intrinsics.texi: Regenerate.
From-SVN: r206132
Kyrylo Tkachov [Thu, 19 Dec 2013 18:29:09 +0000 (18:29 +0000)]
neon-testgen.ml (effective_target): Handle "CRYPTO".
[gcc/]
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO".
[gcc/testsuite]
2013-12-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* lib/target-supports.exp (check_effective_target_arm_crypto_ok):
New procedure.
(add_options_for_arm_crypto): Likewise.
* gcc.target/arm/crypto-vaesdq_u8.c: New test.
* gcc.target/arm/crypto-vaeseq_u8.c: Likewise.
* gcc.target/arm/crypto-vaesimcq_u8.c: Likewise.
* gcc.target/arm/crypto-vaesmcq_u8.c: Likewise.
* gcc.target/arm/crypto-vldrq_p128.c: Likewise.
* gcc.target/arm/crypto-vmull_high_p64.c: Likewise.
* gcc.target/arm/crypto-vmullp64.c: Likewise.
* gcc.target/arm/crypto-vsha1cq_u32.c: Likewise.
* gcc.target/arm/crypto-vsha1h_u32.c: Likewise.
* gcc.target/arm/crypto-vsha1mq_u32.c: Likewise.
* gcc.target/arm/crypto-vsha1pq_u32.c: Likewise.
* gcc.target/arm/crypto-vsha1su0q_u32.c: Likewise.
* gcc.target/arm/crypto-vsha1su1q_u32.c: Likewise.
* gcc.target/arm/crypto-vsha256h2q_u32.c: Likewise.
* gcc.target/arm/crypto-vsha256hq_u32.c: Likewise.
* gcc.target/arm/crypto-vsha256su0q_u32.c: Likewise.
* gcc.target/arm/crypto-vsha256su1q_u32.c: Likewise.
* gcc.target/arm/crypto-vstrq_p128.c: Likewise.
* gcc.target/arm/neon/vbslQp64: Generate.
* gcc.target/arm/neon/vbslp64: Likewise.
* gcc.target/arm/neon/vcombinep64: Likewise.
* gcc.target/arm/neon/vcreatep64: Likewise.
* gcc.target/arm/neon/vdupQ_lanep64: Likewise.
* gcc.target/arm/neon/vdupQ_np64: Likewise.
* gcc.target/arm/neon/vdup_lanep64: Likewise.
* gcc.target/arm/neon/vdup_np64: Likewise.
* gcc.target/arm/neon/vextQp64: Likewise.
* gcc.target/arm/neon/vextp64: Likewise.
* gcc.target/arm/neon/vget_highp64: Likewise.
* gcc.target/arm/neon/vget_lowp64: Likewise.
* gcc.target/arm/neon/vld1Q_dupp64: Likewise.
* gcc.target/arm/neon/vld1Q_lanep64: Likewise.
* gcc.target/arm/neon/vld1Qp64: Likewise.
* gcc.target/arm/neon/vld1_dupp64: Likewise.
* gcc.target/arm/neon/vld1_lanep64: Likewise.
* gcc.target/arm/neon/vld1p64: Likewise.
* gcc.target/arm/neon/vld2_dupp64: Likewise.
* gcc.target/arm/neon/vld2p64: Likewise.
* gcc.target/arm/neon/vld3_dupp64: Likewise.
* gcc.target/arm/neon/vld3p64: Likewise.
* gcc.target/arm/neon/vld4_dupp64: Likewise.
* gcc.target/arm/neon/vld4p64: Likewise.
* gcc.target/arm/neon/vreinterpretQf32_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQf32_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_f32: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_p16: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_p8: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_s16: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_s32: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_s64: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_s8: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_u16: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_u32: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_u64: Likewise.
* gcc.target/arm/neon/vreinterpretQp128_u8: Likewise.
* gcc.target/arm/neon/vreinterpretQp16_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQp16_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_f32: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_p16: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_p8: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_s16: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_s32: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_s64: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_s8: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_u16: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_u32: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_u64: Likewise.
* gcc.target/arm/neon/vreinterpretQp64_u8: Likewise.
* gcc.target/arm/neon/vreinterpretQp8_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQp8_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQs16_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQs16_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQs32_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQs32_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQs64_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQs64_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQs8_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQs8_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQu16_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQu16_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQu32_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQu32_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQu64_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQu64_p64: Likewise.
* gcc.target/arm/neon/vreinterpretQu8_p128: Likewise.
* gcc.target/arm/neon/vreinterpretQu8_p64: Likewise.
* gcc.target/arm/neon/vreinterpretf32_p64: Likewise.
* gcc.target/arm/neon/vreinterpretp16_p64: Likewise.
* gcc.target/arm/neon/vreinterpretp64_f32: Likewise.
* gcc.target/arm/neon/vreinterpretp64_p16: Likewise.
* gcc.target/arm/neon/vreinterpretp64_p8: Likewise.
* gcc.target/arm/neon/vreinterpretp64_s16: Likewise.
* gcc.target/arm/neon/vreinterpretp64_s32: Likewise.
* gcc.target/arm/neon/vreinterpretp64_s64: Likewise.
* gcc.target/arm/neon/vreinterpretp64_s8: Likewise.
* gcc.target/arm/neon/vreinterpretp64_u16: Likewise.
* gcc.target/arm/neon/vreinterpretp64_u32: Likewise.
* gcc.target/arm/neon/vreinterpretp64_u64: Likewise.
* gcc.target/arm/neon/vreinterpretp64_u8: Likewise.
* gcc.target/arm/neon/vreinterpretp8_p64: Likewise.
* gcc.target/arm/neon/vreinterprets16_p64: Likewise.
* gcc.target/arm/neon/vreinterprets32_p64: Likewise.
* gcc.target/arm/neon/vreinterprets64_p64: Likewise.
* gcc.target/arm/neon/vreinterprets8_p64: Likewise.
* gcc.target/arm/neon/vreinterpretu16_p64: Likewise.
* gcc.target/arm/neon/vreinterpretu32_p64: Likewise.
* gcc.target/arm/neon/vreinterpretu64_p64: Likewise.
* gcc.target/arm/neon/vreinterpretu8_p64: Likewise.
* gcc.target/arm/neon/vsliQ_np64: Likewise.
* gcc.target/arm/neon/vsli_np64: Likewise.
* gcc.target/arm/neon/vsriQ_np64: Likewise.
* gcc.target/arm/neon/vsri_np64: Likewise.
* gcc.target/arm/neon/vst1Q_lanep64: Likewise.
* gcc.target/arm/neon/vst1Qp64: Likewise.
* gcc.target/arm/neon/vst1_lanep64: Likewise.
* gcc.target/arm/neon/vst1p64: Likewise.
* gcc.target/arm/neon/vst2p64: Likewise.
* gcc.target/arm/neon/vst3p64: Likewise.
* gcc.target/arm/neon/vst4p64: Likewise.
From-SVN: r206131
Kyrylo Tkachov [Thu, 19 Dec 2013 18:21:10 +0000 (18:21 +0000)]
arm.c (enum arm_builtins): Add crypto builtins.
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (enum arm_builtins): Add crypto builtins.
(arm_init_neon_builtins): Handle crypto builtins.
(bdesc_2arg): Likewise.
(bdesc_1arg): Likewise.
(bdesc_3arg): New table.
(arm_expand_ternop_builtin): New function.
(arm_expand_unop_builtin): Handle sha1h explicitly.
(arm_expand_builtin): Handle ternary builtins.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS):
Define __ARM_FEATURE_CRYPTO.
* config/arm/arm.md: Include crypto.md.
(is_neon_type): Add crypto types.
* config/arm/arm_neon_builtins.def: Add TImode reinterprets.
* config/arm/crypto.def: New.
* config/arm/crypto.md: Likewise.
* config/arm/iterators.md (CRYPTO_UNARY): New int iterator.
(CRYPTO_BINARY): Likewise.
(CRYPTO_TERNARY): Likewise.
(CRYPTO_SELECTING): Likewise.
(crypto_pattern): New int attribute.
(crypto_size_sfx): Likewise.
(crypto_mode): Likewise.
(crypto_type): Likewise.
* config/arm/neon-gen.ml: Handle poly64_t and poly128_t types.
Handle crypto intrinsics.
* config/arm/neon.ml: Add support for poly64 and polt128 types
and intrinsics. Define crypto intrinsics.
* config/arm/neon.md (neon_vreinterpretti<mode>): New pattern.
(neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator.
(neon_vreinterpretv8hi<mode>): Likewise.
(neon_vreinterpretv4si<mode>): Likewise.
(neon_vreinterpretv4sf<mode>): Likewise.
(neon_vreinterpretv2di<mode>): Likewise.
* config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC,
UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H,
UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2,
UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define.
* config/arm/arm_neon.h: Regenerate.
From-SVN: r206130
H.J. Lu [Thu, 19 Dec 2013 18:11:42 +0000 (18:11 +0000)]
Improve -fuse-ld=[bfd|gold] check
PR driver/59321
* collect2.c (main): Check -fuse-ld=[bfd|gold] when
DEFAULT_LINKER is defined.
* common.opt (fuse-ld=bfd): Add Driver.
(fuse-ld=gold): Likewise.
* gcc.c (use_ld): New variable.
(driver_handle_option): Set use_ld for OPT_fuse_ld_bfd and
OPT_fuse_ld_gold.
(main): Check -fuse-ld=[bfd|gold] for -print-prog-name=ld.
From-SVN: r206129
Kyrylo Tkachov [Thu, 19 Dec 2013 17:55:38 +0000 (17:55 +0000)]
Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi.
[gcc/]
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi.
* config.gcc (extra_headers): Add arm_acle.h.
* config/arm/arm.c (FL_CRC32): Define.
(arm_have_crc): Likewise.
(arm_option_override): Set arm_have_crc.
(arm_builtins): Add CRC32 builtins.
(bdesc_2arg): Likewise.
(arm_init_crc32_builtins): New function.
(arm_init_builtins): Initialise CRC32 builtins.
(arm_file_start): Handle architecture extensions.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32.
Define __ARM_32BIT_STATE.
(TARGET_CRC32): Define.
* config/arm/arm-arches.def: Add armv8-a+crc.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.md (type): Add crc.
(<crc_variant>): New insn.
* config/arm/arm_acle.h: New file.
* config/arm/iterators.md (CRC): New int iterator.
(crc_variant, crc_mode): New int attributes.
* confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W,
UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs.
* doc/invoke.texi: Document -march=armv8-a+crc option.
* doc/extend.texi: Document ACLE intrinsics.
[gcc/testsuite/]
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* lib/target-supports.exp (add_options_for_arm_crc): New procedure.
(check_effective_target_arm_crc_ok_nocache): Likewise.
(check_effective_target_arm_crc_ok): Likewise.
* gcc.target/arm/acle/: New directory.
* gcc.target/arm/acle/acle.exp: New.
* gcc.target/arm/acle/crc32b.c: New test.
* gcc.target/arm/acle/crc32h.c: Likewise.
* gcc.target/arm/acle/crc32w.c: Likewise.
* gcc.target/arm/acle/crc32d.c: Likewise.
* gcc.target/arm/acle/crc32cb.c: Likewise.
* gcc.target/arm/acle/crc32ch.c: Likewise.
* gcc.target/arm/acle/crc32cw.c: Likewise.
* gcc.target/arm/acle/crc32cd.c: Likewise.
From-SVN: r206128
Kyrylo Tkachov [Thu, 19 Dec 2013 17:05:42 +0000 (17:05 +0000)]
ef_error.c: Use -fopen-simd.
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* c-c++-common/cilk-plus/SE/ef_error.c: Use -fopen-simd.
From-SVN: r206127
Christophe Lyon [Thu, 19 Dec 2013 16:55:40 +0000 (17:55 +0100)]
Fix comment in gcc/config/arm/predicates.md
From-SVN: r206126
Charles Baylis [Thu, 19 Dec 2013 16:54:16 +0000 (16:54 +0000)]
re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7)
2013-12-19 Charles Baylis <charles.baylis@linaro.org>
PR target/59142
gcc/
* config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb
patterns.
* config/arm/ldmstm.md: Regenerate.
From-SVN: r206125
Charles Baylis [Thu, 19 Dec 2013 16:51:35 +0000 (16:51 +0000)]
re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7)
2013-12-19 Charles Baylis <charles.baylis@linaro.org>
PR target/59142
gcc/
* arm/predicates.md (arm_hard_general_register_operand): New
predicate.
(arm_hard_register_operand): Remove.
* config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand
for all patterns.
* config/arm/ldmstm.md: Regenerate.
From-SVN: r206124
Christophe Lyon [Thu, 19 Dec 2013 16:32:04 +0000 (17:32 +0100)]
re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7)
2013-12-19 Charles Baylis <charles.baylis@linaro.org>
PR target/59142
* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
vfp_hard_register_operand.
From-SVN: r206123
Oleg Endo [Thu, 19 Dec 2013 15:59:17 +0000 (15:59 +0000)]
Remove gcc/testsuite/ prefixes.
From-SVN: r206122
Oleg Endo [Thu, 19 Dec 2013 15:45:35 +0000 (15:45 +0000)]
long-long-compare-1.c: Don't use deprecated -mcbranchdi option for target sh4-*-*.
* gcc.dg/long-long-compare-1.c: Don't use deprecated -mcbranchdi option
for target sh4-*-*.
From-SVN: r206121
Tejas Belagod [Thu, 19 Dec 2013 15:04:19 +0000 (15:04 +0000)]
Implement support for AArch64 Crypto PMULL.64.
gcc/
* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
Define builtin types for poly64_t poly128_t.
(TYPES_BINOPP, aarch64_types_binopp_qualifiers): New.
* aarch64/aarch64-simd-builtins.def: Update builtins table.
* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi,
aarch64_crypto_pmullv2di): New.
* config/aarch64/aarch64.c (aarch64_simd_mangle_map): Update table for
poly64x2_t mangler.
* config/aarch64/arm_neon.h (poly64x2_t, poly64_t, poly128_t): Define.
(vmull_p64, vmull_high_p64): New.
* config/aarch64/iterators.md (UNSPEC_PMULL<2>): New.
testsuite/
* gcc.target/aarch64/pmull_1.c: New.
From-SVN: r206120
Tejas Belagod [Thu, 19 Dec 2013 15:00:53 +0000 (15:00 +0000)]
Implement support for AArch64 Crypto SHA256.
gcc/
* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
* config/aarch64/aarch64-simd.md (aarch64_crypto_sha256h<sha256_op>v4si,
aarch64_crypto_sha256su0v4si, aarch64_crypto_sha256su1v4si): New.
* config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32,
vsha256su0q_u32, vsha256su1q_u32): New.
* config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>):
New.
(CRYPTO_SHA256): New int iterator.
(sha256_op): New int attribute.
testsuite/
* gcc.target/aarch64/sha256_1.c: New.
From-SVN: r206119
Tejas Belagod [Thu, 19 Dec 2013 14:55:47 +0000 (14:55 +0000)]
Implement support for AArch64 Crypto SHA1.
gcc/
* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
* config/aarch64/aarch64-builtins.c (aarch64_types_ternopu_qualifiers,
TYPES_TERNOPU): New.
* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hsi,
aarch64_crypto_sha1su1v4si, aarch64_crypto_sha1<sha1_op>v4si,
aarch64_crypto_sha1su0v4si): New.
* config/aarch64/arm_neon.h (vsha1cq_u32, sha1mq_u32, vsha1pq_u32,
vsha1h_u32, vsha1su0q_u32, vsha1su1q_u32): New.
* config/aarch64/iterators.md (UNSPEC_SHA1<CPMH>, UNSPEC_SHA1SU<01>):
New.
(CRYPTO_SHA1): New int iterator.
(sha1_op): New int attribute.
testsuite/
* gcc.target/aarch64/sha1_1.c: New.
From-SVN: r206118
Tejas Belagod [Thu, 19 Dec 2013 14:51:28 +0000 (14:51 +0000)]
Implement support for AArch64 Crypto AES.
gcc/
* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
* config/aarch64/aarch64-builtins.c (aarch64_types_binopu_qualifiers,
TYPES_BINOPU): New.
* config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aes_op>v16qi,
aarch64_crypto_aes<aesmc_op>v16qi): New.
* config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8,
vaesimcq_u8): New.
* config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC,
UNSPEC_AESIMC): New.
(CRYPTO_AES, CRYPTO_AESMC): New int iterators.
(aes_op, aesmc_op): New int attributes.
testsuite/
* gcc.target/aarch64/aes_1.c: New.
From-SVN: r206117
Yury Gribov [Thu, 19 Dec 2013 14:50:05 +0000 (14:50 +0000)]
mklog: Split generated message in parts.
2013-12-19 Yury Gribov <y.gribov@samsung.com>
* mklog: Split generated message in parts.
From-SVN: r206116
Tejas Belagod [Thu, 19 Dec 2013 14:44:55 +0000 (14:44 +0000)]
Introduce AArch64 Crypto instruction types.
* config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
crypto_sha256_slow): New.
From-SVN: r206115
Tejas Belagod [Thu, 19 Dec 2013 14:41:52 +0000 (14:41 +0000)]
Define TARGET_CRYPTO for AArch64.
* config/aarch64/aarch64.h (TARGET_CRYPTO): New.
(__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true.
From-SVN: r206114
Kostya Serebryany [Thu, 19 Dec 2013 12:54:11 +0000 (12:54 +0000)]
libsanitizer: fix build on Mac 10.6
From-SVN: r206113
Dominik Vogt [Thu, 19 Dec 2013 12:00:43 +0000 (12:00 +0000)]
s390.c (s390_hotpatch_trampoline_halfwords_default): New constant
2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New
constant
(s390_hotpatch_trampoline_halfwords_max): New constant
(s390_hotpatch_trampoline_halfwords): New static variable
(get_hotpatch_attribute): New function
(s390_handle_hotpatch_attribute): New function
(s390_attribute_table): New target specific attribute table to implement
the hotpatch attribute
(s390_option_override): Parse hotpatch options
(s390_function_num_hotpatch_trampoline_halfwords): New function
(s390_can_inline_p): Implement target hook to
suppress hotpatching for explicitly inlined functions
(s390_asm_output_function_label): Generate hotpatch prologue
(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table
(TARGET_CAN_INLINE_P): Define to implement target hook
* config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=
* config/s390/s390-protos.h (s390_asm_output_function_label): Add
prototype
* config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific
function label generation for hotpatching
(FUNCTION_BOUNDARY): Align functions to eight bytes
* doc/extend.texi: Document hotpatch attribute
* doc/invoke.texi: Document -mhotpatch option
2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc/testsuite/gcc.target/s390/hotpatch-1.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-2.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-3.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-4.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-5.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-6.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-7.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-8.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-9.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-10.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-11.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-12.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: New test
Co-Authored-By: Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
From-SVN: r206111
Ganesh Gopalasubramanian [Thu, 19 Dec 2013 11:04:43 +0000 (11:04 +0000)]
Enable TARGET_LOOP_UNROLL_ADJUST for bdver3/bdver4
From-SVN: r206110
Kyrylo Tkachov [Thu, 19 Dec 2013 10:33:15 +0000 (10:33 +0000)]
ef_error.c: Add fopenmp effective target check.
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* c-c++-common/cilk-plus/SE/ef_error.c: Add fopenmp effective
target check.
From-SVN: r206109
Marek Polacek [Thu, 19 Dec 2013 10:25:34 +0000 (10:25 +0000)]
i386.c (ix86_parse_stringop_strategy_string): Remove variable alg.
* config/i386/i386.c (ix86_parse_stringop_strategy_string): Remove
variable alg. Use index variable i directly.
From-SVN: r206108
Eric Botcazou [Thu, 19 Dec 2013 09:13:13 +0000 (09:13 +0000)]
print-tree.c (print_node): Print no_force_blk_flag for all types.
* print-tree.c (print_node) <case tcc_type>: Print no_force_blk_flag
for all types.
From-SVN: r206107
Monk Chiang [Thu, 19 Dec 2013 08:32:20 +0000 (08:32 +0000)]
nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Consider TARGET_CPU_DEFAULT settings.
2013-12-19 Monk Chiang <sh.chiang04@gmail.com>
gcc/
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
Consider TARGET_CPU_DEFAULT settings.
From-SVN: r206106
GCC Administrator [Thu, 19 Dec 2013 00:16:30 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r206105
Steven G. Kargl [Wed, 18 Dec 2013 23:41:50 +0000 (23:41 +0000)]
read.c (read_f): Convert assert to runtime error.
2013-12-18 Steven G. Kargl <kargl@gcc.gnu.org>
* io/read.c (read_f): Convert assert to runtime error.
2013-12-18 Steven G. Kargl <kargl@gcc.gnu.org>
* gfortran.dg/io_err_1.f90: New test.
From-SVN: r206102
Janus Weil [Wed, 18 Dec 2013 22:00:53 +0000 (23:00 +0100)]
re PR fortran/59493 ([OOP] ICE: Segfault on Class(*) pointer association)
2013-12-18 Janus Weil <janus@gcc.gnu.org>
PR fortran/59493
* gfortran.h (gfc_find_intrinsic_vtab): Removed prototype.
(gfc_find_vtab): New prototype.
* class.c (gfc_find_intrinsic_vtab): Rename to 'find_intrinsic_vtab' and
make static. Minor modifications.
(gfc_find_vtab): New function.
(gfc_class_initializer): Use new function 'gfc_find_vtab'.
* check.c (gfc_check_move_alloc): Ditto.
* expr.c (gfc_check_pointer_assign): Ditto.
* interface.c (compare_actual_formal): Ditto.
* resolve.c (resolve_allocate_expr, resolve_select_type): Ditto.
* trans-expr.c (gfc_conv_intrinsic_to_class, gfc_trans_class_assign):
Ditto.
* trans-intrinsic.c (conv_intrinsic_move_alloc): Ditto.
* trans-stmt.c (gfc_trans_allocate): Ditto.
From-SVN: r206101
James Greenhalgh [Wed, 18 Dec 2013 19:27:27 +0000 (19:27 +0000)]
[AArch64 3/3 big.LITTLE] Add support for -mcpu=cortex-a57.cortex-a53
gcc/
* config/aarch64/aarch64-cores.def: Add support for
-mcpu=cortex-a57.cortex-a53.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53.
From-SVN: r206100
James Greenhalgh [Wed, 18 Dec 2013 19:25:45 +0000 (19:25 +0000)]
[AArch64 2/3 big.LITTLE] Allow tuning parameters without unique tuning targets.
gcc/
* config/aarch64/aarch64-cores.def: Add new column for
SCHEDULER_IDENT.
* config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle
SCHEDULER_IDENT.
* config/aarch64/aarch64.c (AARCH64_CORE): Handle
SCHEDULER_IDENT.
(aarch64_parse_cpu): mcpu implies a default value for mtune.
* config/aarch64/aarch64.h (AARCH64_CORE): Handle
SCHEDULER_IDENT.
From-SVN: r206099
James Greenhalgh [Wed, 18 Dec 2013 19:21:45 +0000 (19:21 +0000)]
[AArch64 1/3 big.LITTLE] Driver rewriting of big.LITTLE names.
gcc/
* common/config/aarch64/aarch64-common.c
(aarch64_rewrite_selected_cpu): New.
(aarch64_rewrite_mcpu): New.
* config/aarch64/aarch64-protos.h
(aarch64_rewrite_selected_cpu): New.
* config/aarch64/aarch64.h (BIG_LITTLE_SPEC): New.
(BIG_LITTLE_SPEC_FUNCTIONS): Likewise.
(ASM_CPU_SPEC): Likewise.
(EXTRA_SPEC_FUNCTIONS): Likewise.
(EXTRA_SPECS): Likewise.
(ASM_SPEC): Likewise.
* config/aarch64/aarch64.c (aarch64_start_file): Rewrite target
CPU name.
From-SVN: r206098
Balaji V. Iyer [Wed, 18 Dec 2013 19:04:04 +0000 (11:04 -0800)]
Forgot to add a changelog entry for previous commit. Added here.
gcc/cp/ChangeLog.
2013-12-18 Balaji V. Iyer <balaji.v.iyer@intel.com>
* parser.c (cp_parser_cilk_simd_clause_name): Changed cilk_clause_name
to omp_clause_name.
From-SVN: r206096
Balaji V. Iyer [Wed, 18 Dec 2013 19:00:21 +0000 (19:00 +0000)]
Added support for Cilk Plus SIMD-enabled function for C.
+++ gcc/ChangeLog
+2013-12-18 Balaji V. Iyer <balaji.v.iyer@intel.com>
+
+ * omp-low.c (simd_clone_clauses_extract): Replaced the string
+ "cilk simd elemental" with "cilk simd function."
+ * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
+ Removed a carriage-return from a warning string.
+
+++ gcc/c-family/ChangeLog
+2013-12-18 Balaji V. Iyer <balaji.v.iyer@intel.com>
+
+ * c-common.c (c_common_attribute_table): Added "cilk simd function"
+ attribute.
+ * c-pragma.h (enum pragma_cilk_clause): Remove.
+ (enum pragma_omp_clause): Added the following fields:
+ PRAGMA_CILK_CLAUSE_NOMASK, PRAGMA_CILK_CLAUSE_MASK,
+ PRAGMA_CILK_CLAUSE_VECTORLENGTH, PRAGMA_CILK_CLAUSE_NONE,
+ PRAGMA_CILK_CLAUSE_LINEAR, PRAGMA_CILK_CLAUSE_PRIVATE,
+ PRAGMA_CILK_CLAUSE_FIRSTPRIVATE, PRAGMA_CILK_CLAUSE_LASTPRIVATE,
+ PRAGMA_CILK_CLAUSE_UNIFORM.
+
+
+++ gcc/c/ChangeLog
+2013-12-18 Balaji V. Iyer <balaji.v.iyer@intel.com>
+
+ * c-parser.c (struct c_parser::cilk_simd_fn_tokens): Added new field.
+ (c_parser_declaration_or_fndef): Added a check if cilk_simd_fn_tokens
+ field in parser is not empty. If not-empty, call the function
+ c_parser_finish_omp_declare_simd.
+ (c_parser_cilk_clause_vectorlength): Modified function to be shared
+ between SIMD-enabled functions and #pragma simd. Added new parameter.
+ (c_parser_cilk_all_clauses): Modified the usage of the function
+ c_parser_cilk_clause_vectorlength as mentioned above.
+ (c_parser_cilk_simd_fn_vector_attrs): New function.
+ (c_finish_cilk_simd_fn_tokens): Likewise.
+ (is_cilkplus_vector_p): Likewise.
+ (c_parser_omp_clause_name): Added checking for "vectorlength,"
+ "nomask," and "mask" strings in clause name.
+ (c_parser_omp_all_clauses): Added 3 new case statements:
+ PRAGMA_CILK_CLAUSE_VECTORLENGTH, PRAGMA_CILK_CLAUSE_MASK and
+ PRAGMA_CILK_CLAUSE_NOMASK.
+ (c_parser_attributes): Added a cilk_simd_fn_tokens parameter. Added a
+ check for vector attribute and if so call the function
+ c_parser_cilk_simd_fn_vector_attrs. Also, when Cilk plus is enabled,
+ called the function c_finish_cilk_simd_fn_tokens.
+ (c_finish_omp_declare_simd): Added a check if cilk_simd_fn_tokens
in
+ parser field is non-empty. If so, parse them as you would parse
+ the omp declare simd pragma.
+ (c_parser_omp_clause_linear): Added a new bool parm. is_cilk_simd_fn.
+ Added a check when step is a parameter and flag it as error.
+ (CILK_SIMD_FN_CLAUSE_MASK): New #define.
+ (c_parser_cilk_clause_name): Changed pragma_cilk_clause to
+ pragma_omp_clause.
+
+++ gcc/testsuite/ChangeLog
+2013-12-18 Balaji V. Iyer <balaji.v.iyer@intel.com>
+
+ * c-c++-common/cilk-plus/SE/ef_test.c: New test.
+ * c-c++-common/cilk-plus/SE/ef_test2.c: Likewise.
+ * c-c++-common/cilk-plus/SE/vlength_errors.c: Likewise.
+ * c-c++-common/cilk-plus/SE/ef_error.c: Likewise.
+ * c-c++-common/cilk-plus/SE/ef_error2.c: Likewise.
+ * c-c++-common/cilk-plus/SE/ef_error3.c: Likewise.
+ * gcc.dg/cilk-plus/cilk-plus.exp: Added calls for the above tests.
+
From-SVN: r206095
Joseph Myers [Wed, 18 Dec 2013 18:15:09 +0000 (18:15 +0000)]
* pt_BR.po: New.
From-SVN: r206093
Aldy Hernandez [Wed, 18 Dec 2013 17:38:07 +0000 (17:38 +0000)]
passes.c (execute_function_dump): Set graph_dump_initialized appropriately.
* passes.c (execute_function_dump): Set graph_dump_initialized
appropriately.
(pass_init_dump_file): Similarly.
(execute_one_pass): Pass new argument to do_per_function.
* tree-pass.h (class opt_pass): New field graph_dump_initialized.
From-SVN: r206092
Aldy Hernandez [Wed, 18 Dec 2013 17:32:07 +0000 (17:32 +0000)]
tree-ssa.texi (SSA Operands): Remove reference to SSA_OP_VMAYUSE.
* doc/tree-ssa.texi (SSA Operands): Remove reference to
SSA_OP_VMAYUSE.
Synchronize SSA_OP* definitions with source.
* ssa-iterators.h: Fix comment for FOR_EACH_IMM_USE_STMT.
Add not to SSA_OP* macro definitions.
From-SVN: r206091
Jakub Jelinek [Wed, 18 Dec 2013 16:50:06 +0000 (17:50 +0100)]
re PR target/59539 (Missed optimisation: VEX-prefixed operations don't need aligned data)
PR target/59539
* config/i386/sse.md
(<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
<sse2_avx_avx512f>_loaddqu<mode><mask_name>): New expanders,
prefix existing define_insn names with *.
* gcc.target/i386/pr59539-1.c: New test.
* gcc.target/i386/pr59539-2.c: New test.
From-SVN: r206090
Nick Clifton [Wed, 18 Dec 2013 15:29:47 +0000 (15:29 +0000)]
* gcc.dg/pr32912-2.c: Fix for 16-bit targets.
From-SVN: r206089
Eric Botcazou [Wed, 18 Dec 2013 15:15:03 +0000 (15:15 +0000)]
* config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko.
From-SVN: r206087
James Greenhalgh [Wed, 18 Dec 2013 13:25:58 +0000 (13:25 +0000)]
t-aprofile: Add cortex-a15.cortex-a7, cortex-a12, cortex-a57, cortex-a57.cortex-a53.
2013-12-18 James Greenhalgh <james.greenhalgh@arm.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/t-aprofile: Add cortex-a15.cortex-a7, cortex-a12,
cortex-a57, cortex-a57.cortex-a53.
Co-Authored-By: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
From-SVN: r206086
Eric Botcazou [Wed, 18 Dec 2013 10:34:00 +0000 (10:34 +0000)]
re PR debug/59418 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2221)
PR debug/59418
* dwarf2cfi.c (dwarf2out_frame_debug_cfa_offset): Fix comment and tidy.
(dwarf2out_frame_debug_cfa_restore): Handle TARGET_DWARF_REGISTER_SPAN.
(dwarf2out_frame_debug_expr): Tidy.
From-SVN: r206084