Eric Anholt [Fri, 19 Nov 2010 15:04:35 +0000 (23:04 +0800)]
i965: Don't upload line smooth params unless we're line smoothing.
Eric Anholt [Fri, 19 Nov 2010 15:02:07 +0000 (23:02 +0800)]
i965: Don't upload line stipple pattern unless we're stippling.
Eric Anholt [Fri, 19 Nov 2010 14:53:31 +0000 (22:53 +0800)]
i965: Don't upload polygon stipple unless required.
Eric Anholt [Fri, 19 Nov 2010 14:58:48 +0000 (22:58 +0800)]
i965: Move gen4 blend constant color to the gen4 blending file.
Tilman Sauerbeck [Fri, 19 Nov 2010 21:31:43 +0000 (22:31 +0100)]
r600g: Removed duplicated call to tgsi_split_literal_constant().
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Tom Stellard [Tue, 23 Nov 2010 07:48:47 +0000 (23:48 -0800)]
r300/compiler: Don't allow presubtract sources to be remapped twice
https://bugs.freedesktop.org/show_bug.cgi?id=31193
NOTE: This is a candidate for the 7.9 branch.
Mathias Fröhlich [Tue, 23 Nov 2010 07:39:30 +0000 (08:39 +0100)]
r600g: Only compare active vertex elements
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Vinson Lee [Tue, 23 Nov 2010 05:51:49 +0000 (21:51 -0800)]
mesa: Clean up header file inclusion in syncobj.h.
Vinson Lee [Tue, 23 Nov 2010 05:39:14 +0000 (21:39 -0800)]
llvmpipe: Remove unnecessary headers.
Xiang, Haihao [Tue, 23 Nov 2010 00:52:23 +0000 (08:52 +0800)]
mesa: fix regression from
b4bb6680200b5a898583392f4c831c02f41e63f7
Pending commands to the previous context aren't flushed since commit
b4bb668
Reported-by: Oleksiy Krivoshey <oleksiyk@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Alex Deucher [Tue, 23 Nov 2010 00:27:58 +0000 (19:27 -0500)]
r600c: fix VC flush on cedar and palm
Alex Deucher [Mon, 22 Nov 2010 22:47:24 +0000 (17:47 -0500)]
r600g: add support for ontario APUs
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Alex Deucher [Mon, 22 Nov 2010 18:25:42 +0000 (13:25 -0500)]
r600c: add Ontario Fusion APU support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Mathias Fröhlich [Mon, 22 Nov 2010 22:19:52 +0000 (23:19 +0100)]
r300g: Avoid returning values in a static array, fixing a potential race
(Marek: added the initializion of "vec" in the default statement)
NOTE: This is a candidate for the 7.9 branch.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Alex Deucher [Mon, 22 Nov 2010 22:39:54 +0000 (17:39 -0500)]
r600g: fix some winsys functions to deal properly with evergreen
Are these functions actually used anywhere?
Alex Deucher [Mon, 22 Nov 2010 22:39:16 +0000 (17:39 -0500)]
r600g: fix additional EVENT_WRITE packet
Add explicit EVENT_TYPE field
Marek Olšák [Sun, 21 Nov 2010 21:02:02 +0000 (22:02 +0100)]
st/mesa: set MaxUniformComponents
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Mon, 22 Nov 2010 16:04:13 +0000 (09:04 -0700)]
swrast: init alpha value to 1.0 in opt_sample_rgb_2d()
Marek Olšák [Sun, 14 Nov 2010 14:34:59 +0000 (15:34 +0100)]
gallium: add PIPE_SHADER_CAP_SUBROUTINES
This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers
which don't support RET (i915g, r300g, r600g, svga).
ir_to_mesa does not currently generate subroutines, but it's a matter of time
till it's added. It would then break all the drivers which don't implement
them, so this CAP makes sense.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Keith Whitwell [Mon, 22 Nov 2010 10:36:01 +0000 (10:36 +0000)]
Merge branch 'lp-offset-twoside'
Dave Airlie [Mon, 22 Nov 2010 06:03:00 +0000 (16:03 +1000)]
r600g: pick correct color swap for A8 fbos.
This fixes fdo bug 31810.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tom Stellard [Fri, 12 Nov 2010 08:59:13 +0000 (00:59 -0800)]
r300/compiler: Add a more efficient version of rc_find_free_temporary()
Tom Stellard [Thu, 11 Nov 2010 05:34:18 +0000 (21:34 -0800)]
r300/compiler: Enable rename_reg pass for r500 cards
In addition, the rename_reg pass has been rewritten to use
rc_get_readers().
Tom Stellard [Tue, 9 Nov 2010 02:49:44 +0000 (18:49 -0800)]
r300/compiler: Use presubtract operations as much as possible
Previously, presubtract operations where only being used by instructions
with less than three source source registers.
Tom Stellard [Thu, 30 Sep 2010 06:52:49 +0000 (23:52 -0700)]
r300/compiler: Convert RGB to alpha in the scheduler
Tom Stellard [Sat, 6 Nov 2010 18:30:27 +0000 (11:30 -0700)]
r300/compiler: Track readers through branches in rc_get_readers()
Tom Stellard [Sun, 14 Nov 2010 01:00:45 +0000 (17:00 -0800)]
r300/compiler: Handle BREAK and CONTINUE in rc_get_readers()
Tom Stellard [Sat, 30 Oct 2010 05:27:04 +0000 (22:27 -0700)]
r300/compiler: Add rc_get_readers()
Tom Stellard [Thu, 11 Nov 2010 09:13:01 +0000 (01:13 -0800)]
r300/compiler: Ignore alpha dest register when replicating the result
When the result of the alpha instruction is being replicated to the RGB
destination register, we do not need to use alpha's destination register.
This fixes an invalid "Too many hardware temporaries used" error in
the case where a transcendent operation writes to a temporary register
greater than max_temp_regs.
NOTE: This is a candidate for the 7.9 branch.
Tom Stellard [Thu, 11 Nov 2010 09:01:13 +0000 (01:01 -0800)]
r300/compiler: Use zero as the register index for unused sources
This fixes an invalid "Too many hardware temporaries used" error in the
case where a source reads from a temporary register with an index greater
than max_temp_regs and then the source is marked as unused before the
register allocation pass.
NOTE: This is a candidate for the 7.9 branch.
Tom Stellard [Sun, 14 Nov 2010 01:12:58 +0000 (17:12 -0800)]
r300/compiler: Fix instruction scheduling within IF blocks
Reads of registers that where not written to within the same block were
not being tracked. So in a situations like this:
0: IF
1: ADD t0, t1, t2
2: MOV t2, t1
Instruction 2 didn't know that instruction 1 read from t2, so
in some cases instruction 2 was being scheduled before instruction 1.
NOTE: This is a candidate for the 7.9 branch.
Tom Stellard [Sun, 14 Nov 2010 00:57:06 +0000 (16:57 -0800)]
r300/compiler: Fix register allocator's handling of loops
NOTE: This is a candidate for the 7.9 branch.
Tom Stellard [Thu, 11 Nov 2010 09:28:44 +0000 (01:28 -0800)]
r300/compiler: Make sure presubtract sources use supported swizzles
NOTE: This is a candidate for the 7.9 branch.
Vinson Lee [Sun, 21 Nov 2010 23:02:51 +0000 (15:02 -0800)]
r600: Remove unnecessary header.
Marek Olšák [Sun, 21 Nov 2010 21:54:33 +0000 (22:54 +0100)]
docs: add GL 4.1 status
Marek Olšák [Sun, 21 Nov 2010 00:53:05 +0000 (01:53 +0100)]
st/mesa: enable ARB_explicit_attrib_location and EXT_separate_shader_objects
Gallium drivers pass all piglit tests for the two (there are 12 tests
for separate_shader_objects and 5 tests for explicit_attrib_location),
and I was told the extensions don't need any driver-specific code.
I made them dependent on PIPE_CAP_GLSL.
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Sun, 21 Nov 2010 17:05:47 +0000 (10:05 -0700)]
mesa: fix get_texture_dimensions() for texture array targets
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31779
Brian Paul [Sun, 21 Nov 2010 16:31:19 +0000 (09:31 -0700)]
docs: update some GL 3.0 status
Brian Paul [Sun, 21 Nov 2010 16:19:23 +0000 (09:19 -0700)]
mesa: hook up GL 3.x entrypoints
Fix up some details in the xml files and regenerate dispatch files.
Brian Paul [Sun, 21 Nov 2010 16:13:59 +0000 (09:13 -0700)]
glapi: rename GL3.xml to GL3x.xml as it covers all GL 3.x versions
Brian Paul [Fri, 19 Nov 2010 21:34:07 +0000 (14:34 -0700)]
mesa: fix error msg typo
Daniel Vetter [Fri, 19 Nov 2010 22:38:23 +0000 (23:38 +0100)]
i915g: kill idws->pool
The drm winsys only ever handles one gem memory manager. Rip out
the unnecessary complication.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Daniel Vetter [Fri, 19 Nov 2010 22:38:22 +0000 (23:38 +0100)]
i915g: kill buf->map_gtt
Not using the gtt is considered harmful for performance. And for
partial uploads there's always drm_intel_bo_subdata.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Daniel Vetter [Fri, 19 Nov 2010 22:38:21 +0000 (23:38 +0100)]
i915g: kill RGBA/X formats
It's intel, so always little endian!
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Daniel Vetter [Fri, 19 Nov 2010 22:38:20 +0000 (23:38 +0100)]
i915g: add pineview pci ids
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Daniel Vetter [Fri, 19 Nov 2010 22:38:19 +0000 (23:38 +0100)]
i915g: s/hw_tiled/tiling
More in line with other intel drivers.
Change to use enum by Jakob Bornecrantz.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Daniel Vetter [Fri, 19 Nov 2010 22:38:18 +0000 (23:38 +0100)]
i915g: rip out ->sw_tiled
It looks like this was meant to facilitate unfenced access to textures/
color/renderbuffers. It's totally incomplete and fundamentally broken
on a few levels:
- broken: The kernel needs to about every tiled bo to fix up bit17
swizzling on swap-in.
- unflexible: fenced/unfenced relocs from execbuffer2 do the same, much
simpler.
- unneeded: with relaxed fencing tiled gem bos are as memory-efficient
as this trick.
Hence kill it.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Joakim Sindholt [Sun, 21 Nov 2010 12:24:03 +0000 (13:24 +0100)]
r300g: silence guard band cap errors
Somebody should find out what these are. It can be found on Windows
getting a D3DCAPS9 from IDirect3D9::GetCaps() and reading the
GuardBand* values.
Chia-I Wu [Sun, 21 Nov 2010 10:58:47 +0000 (18:58 +0800)]
st/vega: Fix vgReadPixels with a subrectangle.
Fix a crash when the subrectangle is not inside the fb. Fix wrong
pipe transfer when sx > 0 or sy + height != fb->height.
This fixes "readpixels" demo.
Chia-I Wu [Sun, 21 Nov 2010 10:46:57 +0000 (18:46 +0800)]
st/vega: Set wrap_r for mask and blend samplers.
These two samplers use non-normalized texture coordinates. wrap_r
cannot be PIPE_TEX_WRAP_REPEAT (the default).
This fixes
sp_tex_sample.c:1790:get_linear_unorm_wrap: Assertion `0' failed
assertion failure.
Chia-I Wu [Sun, 21 Nov 2010 10:44:21 +0000 (18:44 +0800)]
st/vega: vegaLookupSingle should validate the state.
Fix "lookup" demo crash.
Chia-I Wu [Sun, 21 Nov 2010 10:36:41 +0000 (18:36 +0800)]
tgsi: Add STENCIL to text parser.
Fix OpenVG "filter" demo
Program received signal SIGSEGV, Segmentation fault.
0xb7153dc9 in str_match_no_case (pcur=0xbfffe564, str=0x0) at
tgsi/tgsi_text.c:86
86 while (*str != '\0' && *str == uprcase( *cur )) {
Vinson Lee [Sun, 21 Nov 2010 06:44:33 +0000 (22:44 -0800)]
mesa: Clean up header file inclusion in stencil.h.
Vinson Lee [Sun, 21 Nov 2010 06:30:27 +0000 (22:30 -0800)]
mesa: Clean up header file inclusion in shared.h.
Vinson Lee [Sun, 21 Nov 2010 06:17:28 +0000 (22:17 -0800)]
mesa: Clean up header file inclusion in shaderapi.h.
Vinson Lee [Sun, 21 Nov 2010 06:01:30 +0000 (22:01 -0800)]
mesa: Clean up header file inclusion in scissor.h.
Vinson Lee [Sun, 21 Nov 2010 05:32:07 +0000 (21:32 -0800)]
mesa: Clean up header file inclusion in renderbuffer.h.
Vinson Lee [Sun, 21 Nov 2010 05:23:35 +0000 (21:23 -0800)]
mesa: Clean up header file inclusion in readpix.h.
Vinson Lee [Sun, 21 Nov 2010 05:14:06 +0000 (21:14 -0800)]
mesa: Clean up header file inclusion in rastpos.h.
Vinson Lee [Sun, 21 Nov 2010 05:06:09 +0000 (21:06 -0800)]
mesa: Clean up header file inclusion in polygon.h.
Vinson Lee [Sun, 21 Nov 2010 04:13:50 +0000 (20:13 -0800)]
intel: Remove unnecessary header.
Vinson Lee [Sun, 21 Nov 2010 03:04:30 +0000 (19:04 -0800)]
r600: Remove unnecesary header.
Vinson Lee [Sun, 21 Nov 2010 03:00:18 +0000 (19:00 -0800)]
swrast: Remove unnecessary header.
Vinson Lee [Sun, 21 Nov 2010 02:48:09 +0000 (18:48 -0800)]
st/mesa: Remove unnecessary headers.
Chia-I Wu [Sun, 21 Nov 2010 01:47:11 +0000 (17:47 -0800)]
scons: Define IN_DRI_DRIVER.
The define is required for DRI drivers. It is not needed for
libgl-xlib, but the overhead it introduces should be minor.
Xavier Chantry [Sat, 20 Nov 2010 21:51:12 +0000 (22:51 +0100)]
nvfx: only expose one rt on nv30
We do not know how to use more, GL_ARB_draw_buffers is not exposed on blob.
Owen W. Taylor [Sat, 20 Nov 2010 17:18:56 +0000 (12:18 -0500)]
r600g: Fix location for clip plane registers
The stride between the different clip plane registers was incorrect.
https://bugs.freedesktop.org/show_bug.cgi?id=31788
agd5f: fix evergreen as well.
Marek Olšák [Sun, 14 Nov 2010 17:57:14 +0000 (18:57 +0100)]
r300g: fix rendering with no vertex elements
Fixes glsl-vs-point-size, although I meant to fix glsl-novertexdata.
Since swrast fails glsl-novertexdata too, I guess it's a core issue.
Eric Anholt [Fri, 19 Nov 2010 07:57:05 +0000 (15:57 +0800)]
i965: Remove duplicate MRF writes in the FS backend.
This is quite common for multitexture sampling, and not only cuts down
on the second and later set of MOVs, but typically also allows
compute-to-MRF on the first set.
No statistically siginficant performance difference in nexuiz (n=3),
but it reduces instruction count in one of its shaders and seems like
a good idea.
Eric Anholt [Thu, 18 Nov 2010 07:03:50 +0000 (15:03 +0800)]
i965: Improve compute-to-mrf.
We were skipping it if the instruction producing the value we were
going to compute-to-mrf used its result reg as a source reg. This
meant that the typical "write interpolated color to fragment color" or
"texture from interpolated texcoord" shader didn't compute-to-MRF.
Just don't check for the interference cases until after we've checked
if this is the instruction we wanted to compute-to-MRF.
Improves nexuiz high-settings performance on my laptop 0.48% +- 0.08%
(n=3).
Eric Anholt [Fri, 19 Nov 2010 10:50:05 +0000 (18:50 +0800)]
ir_to_mesa: Detect and emit MOV_SATs for saturate constructs.
The goal here is to avoid regressing performance on ir_to_mesa drivers
for fixed function fragment shaders requiring saturates.
Eric Anholt [Fri, 19 Nov 2010 02:36:06 +0000 (10:36 +0800)]
i965: Recognize saturates and turn them into a saturated mov.
On pre-gen6, this turns 4 instructions into 1. We could still do
better by folding the saturate into the instruction generating the
value if nobody else uses it, but that should be a separate pass.
Eric Anholt [Fri, 19 Nov 2010 10:27:41 +0000 (18:27 +0800)]
glsl: Add a helper function for determining if an rvalue could be a saturate.
Hardware pretty commonly has saturate modifiers on instructions, and
this can be used in codegen to produce those, without everyone else
needing to understand clamping other than min and max.
Eric Anholt [Thu, 18 Nov 2010 03:34:54 +0000 (11:34 +0800)]
i965: Fold constants into the second arg of BRW_SEL as well.
This hits a common case with min/max operations.
Eric Anholt [Thu, 18 Nov 2010 03:48:47 +0000 (11:48 +0800)]
i965: Remove extra \n at the end of every instruction in INTEL_DEBUG=wm.
Eric Anholt [Fri, 19 Nov 2010 09:44:35 +0000 (17:44 +0800)]
i965: Just use memset() to clear most members in FS constructors.
This should make it a lot harder to forget to zero things.
Eric Anholt [Fri, 19 Nov 2010 05:53:28 +0000 (13:53 +0800)]
i965: Fix compute_to_mrf to not move a MRF write up into another live range.
Fixes glsl-fs-copy-propagation-texcoords-1.
Eric Anholt [Fri, 19 Nov 2010 09:19:38 +0000 (17:19 +0800)]
mesa: Include C++ files in the makedepend of DRI drivers.
Vinson Lee [Sat, 20 Nov 2010 01:28:22 +0000 (17:28 -0800)]
glsl: Fix type of label 'default' in switch statement.
Vinson Lee [Sat, 20 Nov 2010 01:22:23 +0000 (17:22 -0800)]
glsl: Add lower_vector.cpp to SConscript.
Ian Romanick [Sat, 20 Nov 2010 01:16:12 +0000 (17:16 -0800)]
glsl: Fix matrix constructors with vector parameters
When the semantics of write masks in assignments were changed, this
code was not correctly updated.
Fixes piglit test glsl-mat-from-vec-ctor-01.
Kenneth Graunke [Fri, 19 Nov 2010 01:54:07 +0000 (17:54 -0800)]
glsl: Combine many instruction lowering passes into one.
This should save on the overhead of tree-walking and provide a
convenient place to add more instruction lowering in the future.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 19 Nov 2010 01:15:13 +0000 (17:15 -0800)]
glsl: Simplify a type check by using type->is_integer().
Ian Romanick [Tue, 16 Nov 2010 20:01:42 +0000 (12:01 -0800)]
glsl: Add ir_quadop_vector expression
The vector operator collects 2, 3, or 4 scalar components into a
vector. Doing this has several advantages. First, it will make
ud-chain tracking for components of vectors much easier. Second, a
later optimization pass could collect scalars into vectors to allow
generation of SWZ instructions (or similar as operands to other
instructions on R200 and i915). It also enables an easy way to
generate IR for SWZ instructions in the ARB_vertex_program assembler.
Ian Romanick [Tue, 9 Nov 2010 22:19:10 +0000 (14:19 -0800)]
glsl: Add unary ir_expression constructor
Ian Romanick [Tue, 16 Nov 2010 19:59:22 +0000 (11:59 -0800)]
glsl: Add ir_rvalue::is_negative_one predicate
Ian Romanick [Thu, 11 Nov 2010 00:33:10 +0000 (16:33 -0800)]
glsl: Eliminate assumptions about size of ir_expression::operands
This may grow in the near future.
Ian Romanick [Thu, 18 Nov 2010 19:05:32 +0000 (11:05 -0800)]
glsl: Add ir_unop_sin_reduced and ir_unop_cos_reduced
The operate just like ir_unop_sin and ir_unop_cos except that they
expect their inputs to be limited to the range [-pi, pi]. Several
GPUs require this limited range for their sine and cosine
instructions, so having these as operations (along with a to-be-written
lowering pass) helps this architectures.
These new operations also matche the semantics of the
GL_ARB_fragment_program SCS instruction. Having these as operations
helps in generating GLSL IR directly from assembly fragment programs.
Alex Deucher [Fri, 19 Nov 2010 20:51:24 +0000 (15:51 -0500)]
r600g: use full range of VS resources for vertex samplers
Now that we have fetch shaders, the full range of VS resources
can be used for sampling.
Alex Deucher [Fri, 19 Nov 2010 20:32:02 +0000 (15:32 -0500)]
r600g: use meaningful defines for chiprev
Makes the code much clearer.
Alex Deucher [Fri, 19 Nov 2010 20:19:39 +0000 (15:19 -0500)]
r600g: translate ARR instruction for evergreen
evergreen variant of:
9f7ec103e26c67cb077fd7d94d2fb68562b86c40
Jerome Glisse [Thu, 18 Nov 2010 19:29:16 +0000 (14:29 -0500)]
r600g: add fetch shader capabilities
Use fetch shader instead of having fetch instruction in the vertex
shader. Allow to restrict shader update to a smaller part when
vertex buffer input layout changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Alex Deucher [Fri, 19 Nov 2010 18:34:22 +0000 (13:34 -0500)]
r600g: All EVENT_WRITE packets need the EVENT_INDEX field
6xx-evergreen
Viktor Novotný [Tue, 16 Nov 2010 22:22:33 +0000 (23:22 +0100)]
dri/nouveau: Clean up magic numbers in get_rt_format
Signed-off-by: Viktor Novotný <noviktor@seznam.cz>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Jerome Glisse [Fri, 19 Nov 2010 16:51:37 +0000 (11:51 -0500)]
r600g: fix occlusion query on evergreen (avoid lockup)
Occlusion query on evergreen need the event index field to be
set otherwise we endup locking up the GPU.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Keith Whitwell [Fri, 19 Nov 2010 16:17:36 +0000 (16:17 +0000)]
llvmpipe: twoside for specular color also
Keith Whitwell [Fri, 19 Nov 2010 16:16:30 +0000 (16:16 +0000)]
llvmpipe: fix up twoside after recent changes
Fix my slot/attr confusion.
Hui Qi Tay [Fri, 19 Nov 2010 12:53:51 +0000 (12:53 +0000)]
llvmpipe: fix such that offset/twoside function only does in-place modification
Ian Romanick [Fri, 19 Nov 2010 00:11:25 +0000 (16:11 -0800)]
ir_to_mesa: Generate smarter code for some conditional moves
Condiation moves with a condition of (a < 0), (a > 0), (a <= 0), or (a
>= 0) can be generated with "a" directly as an operand of the CMP
instruction. This doesn't help much now, but it will help with
assembly shaders that use the CMP instruction.
Ian Romanick [Fri, 19 Nov 2010 01:11:17 +0000 (17:11 -0800)]
glsl: Make is_zero and is_one virtual methods of ir_rvalue
This eliminates the need in some cames to validate that an rvalue is
an ir_constant before checking to see if it's 0 or 1.