Tom de Vries [Thu, 18 Nov 2021 18:22:51 +0000 (19:22 +0100)]
[gdb/doc] Fix negative repeat count examining memory example
The documentation for the examining memory command x contains an example:
...
You can also specify a negative repeat count to examine memory backward from
the given address. For example, 'x/-3uh 0x54320' prints three halfwords (h)
at 0x54314, 0x54328, and 0x5431c.
...
The 0x54328 looks like a typo, which was intended to be 0x54318.
But the series uses a 4-byte distance, while the halfword size used in the
command means a 2-byte distance, so the series should be:
...
0x5431a, 0x5431c, and 0x5431e.
...
Fix this by updating the addresses in the example accordingly.
Reported here ( https://sourceware.org/pipermail/gdb/2021-November/049784.html
).
Nick Clifton [Thu, 18 Nov 2021 16:48:19 +0000 (16:48 +0000)]
Add multibyte character warning option to the assembler.
* as.c (parse_args): Add support for --multibyte-handling.
* as.h (multibyte_handling): Declare.
* app.c (scan_for_multibyte_characters): New function.
(do_scrub_chars): Call the new function if multibyte warning is
enabled.
* input-scrub,c (input_scrub_next_buffer): Call the multibyte
scanning function if multibyte warnings are enabled.
* symbols.c (struct symbol_flags): Add multibyte_warned bit.
(symbol_init): Call the multibyte scanning function if multibyte
symbol warnings are enabled.
(S_SET_SEGMENT): Likewise.
* NEWS: Mention the new feature.
* doc/as.texi: Document the new feature.
* testsuite/gas/all/multibyte.s: New test source file.
* testsuite/gas/all/multibyte1.d: New test driver file.
* testsuite/gas/all/multibyte1.l: New test expected output.
* testsuite/gas/all/multibyte2.d: New test driver file.
* testsuite/gas/all/multibyte2.l: New test expected output.
* testsuite/gas/all/gas.exp: Run the new tests.
Simon Marchi [Wed, 17 Nov 2021 17:13:47 +0000 (12:13 -0500)]
gdb: include gdbarch.h in all files extending gdbarch_tdep
Commit
345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") made a bunch
of files define a *_gdbarch_tdep class that inherits from a gdbarch_tdep
base. But some of these files don't include gdbarch.h, where
gdbarch_tdep is defined. This may cause build errors if gdbarch.h isn't
already included by chance by some other header file. Avoid this by
making them include gdbarch.h.
Change-Id: If433d302007e274daa4f656cfc94f769cf1aa68a
Simon Marchi [Wed, 17 Nov 2021 18:44:01 +0000 (13:44 -0500)]
gdbsupport: make gdb_assert_not_reached accept a format string
Change gdb_assert_not_reached to accept a format string plus
corresponding arguments. This allows giving more precise messages.
Because the format string passed by the caller is prepended with a "%s:"
to add the function name, the callers can no longer pass a translated
string (`_(...)`). Make the gdb_assert_not_reached include the _(),
just like the gdb_assert_fail macro just above.
Change-Id: Id0cfda5a57979df6cdaacaba0d55dd91ae9efee7
Carl Love [Wed, 17 Nov 2021 22:29:33 +0000 (22:29 +0000)]
gdb fix for catch-syscall.exp
Remove check_continue "execve" from Proc test_catch_syscall_execve.
The check_continue proceedure checs that the command, execve, starts and
checks for the return from the command. The execve command starts a new
program and thus the return from the command causing the test to fail.
The call to proc check_continue "execve" is removed and replaced with
just the call to check_call_to_syscall "execve" to verify the command
executed. The next test in proc test_catch_syscall_execve verifies that
the new program started and hit the break point in main.
Update the check for the PowerPC architecture. Power Little Endian systems
include "le" in the name. The istarget "power64-*-linux*" check fails to
match LE sytems. The expected string is updated to capture both Big Endian
and Little Endian systems. Power 10 LE istarget prints as:
powerpc64le-unknown-linux-gnu.
This patch fixes three failures and the error:
ERROR: can't read "arch1": no such variable
Patch tested on Power 10 ppc64le GNU/Linux platform.
Carl Love [Mon, 15 Nov 2021 20:31:06 +0000 (20:31 +0000)]
gdb: PowerPC fix gdb.base/break-interp.exp
This patch fixes eight test failures on PowerPC for the test
gdb.base/break-interp.exp. The patch adds a funtion and registers it to
setup the displaced stepping for ppc-linux platform. The patch moves the
struct ppc_inferior_data to the ppc-tdep.h include file to make it visible
to the ppc-linux-tdep.c and rs6000-tdep.c files. Additionally the function
get_ppc_per_inferior is made external in ppc-tdep.h to make it visible in
both files.
Tested on Power 10 ppc64le-linux with no regressions.
Carl Love [Thu, 18 Nov 2021 00:08:18 +0000 (00:08 +0000)]
gdb fix PowerPC test gdb.arch/ppc-longdouble.exp
The test complains of duplicate tests.
DUPLICATE: gdb.arch/ppc-longdouble.exp: continue to breakpoint: return
The do_test calls gdb_continue_to_breakpoint "return". The duplicates
are the result of calling do_test three times with different arguments.
This patch fixes the duplicate tests by adding $name to the
gdb_continue_to_breakpoint argument.
Patch tested on Power 10 ppc64le GNU/Linux, no duplicate tests reported,
no new regression errors.
H.J. Lu [Thu, 18 Nov 2021 15:54:34 +0000 (07:54 -0800)]
elf/x86: Issue an error on discarded output .plt section
Issue an error, instead of crash, on discarded output .plt section.
bfd/
PR ld/28597
* elf32-i386.c (elf_i386_finish_dynamic_sections): Issue an error
on discarded output .plt section.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Likewise.
ld/
PR ld/28597
* testsuite/ld-elf/pr28597.d: New file.
* testsuite/ld-elf/pr28597.s: Likewise.
* testsuite/ld-elf/pr28597.t: Likewise.
Tom de Vries [Thu, 18 Nov 2021 14:52:07 +0000 (15:52 +0100)]
[gdb/testsuite] Add missing wait in gdb.base/signals-state-child.exp
On OBS I ran into:
...
(gdb) shell diff -s outputs/gdb.base/signals-state-child/standalone.txt \
outputs/gdb.base/signals-state-child/gdb.txt^M
diff: outputs/gdb.base/signals-state-child/standalone.txt: \
No such file or directory^M
(gdb) FAIL: gdb.base/signals-state-child.exp: signals states are identical
...
I managed to reproduce this by adding "sleep (5)" at the start of main in
signals-state-child.c.
Fix this by waiting on the result of the spawned command.
Tested on x86_64-linux.
Alan Modra [Thu, 18 Nov 2021 08:21:11 +0000 (18:51 +1030)]
Re: Don't compile some opcodes files when bfd is 32-bit only
Put bpf back in the 32-bit targets, even though bpf requires a 64-bit
bfd. bpf sim support apparently works without being 64-bit.
* Makefile.am (TARGET64_LIBOPCODES_CFILES): Move bpf files..
(TARGET32_LIBOPCODES_CFILES): ..to here.
* Makefile.in: Regenerate.
Alan Modra [Wed, 17 Nov 2021 04:40:04 +0000 (15:10 +1030)]
Pass DEBUGINFOD_CFLAGS when compiling dwarf.c
Pick up the elfutils/debuginfod.h install location -I flags from
a variable set by debuginfod.m4 (via pkg.m4 and pkg-config).
* Makefile.am (DEBUGINFOD_CFLAGS): Define.
(dwarf.@OBJECT@): New rule.
jiawei [Wed, 17 Nov 2021 12:10:08 +0000 (20:10 +0800)]
RISC-V: Add testcases for z[fdq]inx
Use gpr when the zfinx enable, the testcases contain float
instructions that reuse by z[fdq]inx.
gas/ChangeLog:
* testsuite/gas/riscv/zdinx.d: New test.
* testsuite/gas/riscv/zdinx.s: New test.
* testsuite/gas/riscv/zfinx.d: New test.
* testsuite/gas/riscv/zfinx.s: New test.
* testsuite/gas/riscv/zqinx.d: New test.
* testsuite/gas/riscv/zqinx.s: New test.
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
jiawei [Wed, 17 Nov 2021 12:10:07 +0000 (20:10 +0800)]
RISC-V: Add instructions and operand set for z[fdq]inx
Reuse float instructions in INSN_CLASS_F/D/Q, use riscv_subset_supports to
verify if z*inx enabled and use gpr instead of fpr when z*inx is enable.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Added support for
z*inx extension.
gas/ChangeLog:
* config/tc-riscv.c (riscv_ip): Added register choice for z*inx.
include/ChangeLog:
* opcode/riscv.h (enum riscv_insn_class): Reused INSN_CLASS_* for z*inx.
opcodes/ChangeLog:
* riscv-dis.c (riscv_disassemble_insn): Added disassemble check for
z*inx.
* riscv-opc.c: Reused INSN_CLASS_* for z*inx.
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
jiawei [Wed, 17 Nov 2021 12:10:06 +0000 (20:10 +0800)]
RISC-V: Add mininal support for z[fdq]inx
Minimal support for zfinx, zdinx, zqinx. Like f/d/q, the zqinx
imply zdinx and zdinx imply zfinx, where zfinx are not compatible
with f/d/q.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_implicit_subsets): Added implicit rules
for z*inx extensions.
(riscv_supported_std_z_ext): Added entries for z*inx.
(riscv_parse_check_conflicts): Added conflict check for z*inx.
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
GDB Administrator [Thu, 18 Nov 2021 00:00:05 +0000 (00:00 +0000)]
Automatic date update in version.in
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:26:53 +0000 (20:26 +0000)]
aarch64: [SME] SVE2 instructions added to support SME
This patch is adding new SVE2 instructions added to support SME extension.
The following SVE2 instructions are added by the SME architecture:
* PSEL,
* REVD, SCLAMP and UCLAMP.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_pred_reg_with_index):
New parser.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-9-illegal.d: New test.
* testsuite/gas/aarch64/sme-9-illegal.l: New test.
* testsuite/gas/aarch64/sme-9-illegal.s: New test.
* testsuite/gas/aarch64/sme-9.d: New test.
* testsuite/gas/aarch64/sme-9.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_PnT_Wm_imm.
opcodes/ChangeLog:
* aarch64-asm.c (aarch64_ins_sme_pred_reg_with_index):
New inserter.
* aarch64-dis.c (aarch64_ext_sme_pred_reg_with_index):
New extractor.
* aarch64-opc.c (aarch64_print_operand): Printout of
OPND_SME_PnT_Wm_imm.
* aarch64-opc.h (enum aarch64_field_kind): New bitfields
FLD_SME_Rm, FLD_SME_i1, FLD_SME_tszh, FLD_SME_tszl.
* aarch64-tbl.h (OP_SVE_NN_BHSD): New qualifier.
(OP_SVE_QMQ): New qualifier.
(struct aarch64_opcode): New instructions PSEL, REVD,
SCLAMP and UCLAMP.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:20:50 +0000 (20:20 +0000)]
aarch64: [SME] Add new SME system registers
This patch is adding miscellaneous SME related system registers.
gas/ChangeLog:
* testsuite/gas/aarch64/sme-sysreg.d: New test.
* testsuite/gas/aarch64/sme-sysreg.s: New test.
* testsuite/gas/aarch64/sme-sysreg-illegal.d: New test.
* testsuite/gas/aarch64/sme-sysreg-illegal.l: New test.
* testsuite/gas/aarch64/sme-sysreg-illegal.s: New test.
opcodes/ChangeLog:
* aarch64-opc.c: New system registers id_aa64smfr0_el1,
smcr_el1, smcr_el12, smcr_el2, smcr_el3, smpri_el1,
smprimap_el2, smidr_el1, tpidr2_el0 and mpamsm_el1.
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:15:13 +0000 (20:15 +0000)]
aarch64: [SME] Add SME mode selection and state access instructions
This patch is adding new SME mode selection and state access instructions:
* Add SMSTART and SMSTOP instructions.
* Add SVCR system register.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_sm_za): New parser.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-8-illegal.d: New test.
* testsuite/gas/aarch64/sme-8-illegal.l: New test.
* testsuite/gas/aarch64/sme-8-illegal.s: New test.
* testsuite/gas/aarch64/sme-8.d: New test.
* testsuite/gas/aarch64/sme-8.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_SM_ZA.
(enum aarch64_insn_class): New instruction classes
sme_start and sme_stop.
opcodes/ChangeLog:
* aarch64-asm.c (aarch64_ins_pstatefield): New inserter.
(aarch64_ins_sme_sm_za): New inserter.
* aarch64-dis.c (aarch64_ext_imm): New extractor.
(aarch64_ext_pstatefield): New extractor.
(aarch64_ext_sme_sm_za): New extractor.
* aarch64-opc.c (operand_general_constraint_met_p):
New pstatefield value for SME instructions.
(aarch64_print_operand): Printout for OPND_SME_SM_ZA.
(SR_SME): New register SVCR.
* aarch64-opc.h (F_REG_IN_CRM): New register endcoding.
* aarch64-opc.h (F_IMM_IN_CRM): New immediate endcoding.
(PSTATE_ENCODE_CRM): Encode CRm field.
(PSTATE_DECODE_CRM): Decode CRm field.
(PSTATE_ENCODE_CRM_IMM): Encode CRm immediate field.
(PSTATE_DECODE_CRM_IMM): Decode CRm immediate field.
(PSTATE_ENCODE_CRM_AND_IMM): Encode CRm and immediate
field.
* aarch64-tbl.h (struct aarch64_opcode): New SMSTART
and SMSTOP instructions.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:02:06 +0000 (20:02 +0000)]
aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions
This patch is adding new loads and stores defined by SME instructions.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_address): New parser.
(parse_sme_za_hv_tiles_operand_with_braces): New parser.
(parse_sme_za_array): New parser.
(output_operand_error_record): Print error details if
present.
(parse_operands): Support new operands.
* testsuite/gas/aarch64/sme-5-illegal.d: New test.
* testsuite/gas/aarch64/sme-5-illegal.l: New test.
* testsuite/gas/aarch64/sme-5-illegal.s: New test.
* testsuite/gas/aarch64/sme-5.d: New test.
* testsuite/gas/aarch64/sme-5.s: New test.
* testsuite/gas/aarch64/sme-6-illegal.d: New test.
* testsuite/gas/aarch64/sme-6-illegal.l: New test.
* testsuite/gas/aarch64/sme-6-illegal.s: New test.
* testsuite/gas/aarch64/sme-6.d: New test.
* testsuite/gas/aarch64/sme-6.s: New test.
* testsuite/gas/aarch64/sme-7-illegal.d: New test.
* testsuite/gas/aarch64/sme-7-illegal.l: New test.
* testsuite/gas/aarch64/sme-7-illegal.s: New test.
* testsuite/gas/aarch64/sme-7.d: New test.
* testsuite/gas/aarch64/sme-7.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operands.
(enum aarch64_insn_class): Added sme_ldr and sme_str.
(AARCH64_OPDE_UNTIED_IMMS): New operand error kind.
opcodes/ChangeLog:
* aarch64-asm.c (aarch64_ins_sme_za_hv_tiles): New inserter.
(aarch64_ins_sme_za_list): New inserter.
(aarch64_ins_sme_za_array): New inserter.
(aarch64_ins_sme_addr_ri_u4xvl): New inserter.
* aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): Added
ins_sme_za_list, ins_sme_za_array and ins_sme_addr_ri_u4xvl.
* aarch64-dis.c (aarch64_ext_sme_za_hv_tiles): New extractor.
(aarch64_ext_sme_za_list): New extractor.
(aarch64_ext_sme_za_array): New extractor.
(aarch64_ext_sme_addr_ri_u4xvl): New extractor.
* aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): Added
ext_sme_za_list, ext_sme_za_array and ext_sme_addr_ri_u4xvl.
* aarch64-opc.c (operand_general_constraint_met_p):
(aarch64_match_operands_constraint): Handle sme_ldr, sme_str
and sme_misc.
(aarch64_print_operand): New operands supported.
* aarch64-tbl.h (OP_SVE_QUU): New qualifier.
(OP_SVE_QZU): New qualifier.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:56:09 +0000 (19:56 +0000)]
aarch64: [SME] Add ZERO instruction
This patch is adding ZERO (a list of 64-bit element ZA tiles)
instruction.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_list_of_64bit_tiles):
New parser.
(parse_operands): Handle OPND_SME_list_of_64bit_tiles.
* testsuite/gas/aarch64/sme-4-illegal.d: New test.
* testsuite/gas/aarch64/sme-4-illegal.l: New test.
* testsuite/gas/aarch64/sme-4-illegal.s: New test.
* testsuite/gas/aarch64/sme-4.d: New test.
* testsuite/gas/aarch64/sme-4.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_list_of_64bit_tiles.
opcodes/ChangeLog:
* aarch64-opc.c (print_sme_za_list): New printing function.
(aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles.
* aarch64-opc.h (enum aarch64_field_kind): New bitfield
FLD_SME_zero_mask.
* aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:31:25 +0000 (19:31 +0000)]
aarch64: [SME] Add MOV and MOVA instructions
This patch is adding new MOV (alias) and MOVA SME instruction.
gas/ChangeLog:
* config/tc-aarch64.c (enum sme_hv_slice): new enum.
(struct reloc_entry): Added ZAH and ZAV registers.
(parse_sme_immediate): Immediate parser.
(parse_sme_za_hv_tiles_operand): ZA tile parser.
(parse_sme_za_hv_tiles_operand_index): Index parser.
(parse_operands): Added ZA tile parser calls.
(REGNUMS): New macro. Regs with suffix.
(REGSET16S): New macro. 16 regs with suffix.
* testsuite/gas/aarch64/sme-2-illegal.d: New test.
* testsuite/gas/aarch64/sme-2-illegal.l: New test.
* testsuite/gas/aarch64/sme-2-illegal.s: New test.
* testsuite/gas/aarch64/sme-2.d: New test.
* testsuite/gas/aarch64/sme-2.s: New test.
* testsuite/gas/aarch64/sme-2a.d: New test.
* testsuite/gas/aarch64/sme-2a.s: New test.
* testsuite/gas/aarch64/sme-3-illegal.d: New test.
* testsuite/gas/aarch64/sme-3-illegal.l: New test.
* testsuite/gas/aarch64/sme-3-illegal.s: New test.
* testsuite/gas/aarch64/sme-3.d: New test.
* testsuite/gas/aarch64/sme-3.s: New test.
* testsuite/gas/aarch64/sme-3a.d: New test.
* testsuite/gas/aarch64/sme-3a.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New enums
AARCH64_OPND_SME_ZA_HV_idx_src and
AARCH64_OPND_SME_ZA_HV_idx_dest.
(struct aarch64_opnd_info): New ZA tile vector struct.
opcodes/ChangeLog:
* aarch64-asm.c (aarch64_ins_sme_za_hv_tiles):
New inserter.
* aarch64-asm.h (AARCH64_DECL_OPD_INSERTER):
New inserter ins_sme_za_hv_tiles.
* aarch64-dis.c (aarch64_ext_sme_za_hv_tiles):
New extractor.
* aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR):
New extractor ext_sme_za_hv_tiles.
* aarch64-opc.c (aarch64_print_operand):
Handle SME_ZA_HV_idx_src and SME_ZA_HV_idx_dest.
* aarch64-opc.h (enum aarch64_field_kind): New enums
FLD_SME_size_10, FLD_SME_Q, FLD_SME_V and FLD_SME_Rv.
(struct aarch64_operand): Increase fields size to 5.
* aarch64-tbl.h (OP_SME_BHSDQ_PM_BHSDQ): New qualifiers
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:21:33 +0000 (19:21 +0000)]
aarch64: [SME] Add SME instructions
Patch is adding new SME matrix instructions. Please note additional
instructions will be added in following patches.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_zada_operand):
New parser.
* config/tc-aarch64.c (parse_reg_with_qual):
New reg parser.
* config/tc-aarch64.c (R_ZA): New egister type.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-illegal.d: New test.
* testsuite/gas/aarch64/sme-illegal.l: New test.
* testsuite/gas/aarch64/sme-illegal.s: New test.
* testsuite/gas/aarch64/sme.d: New test.
* testsuite/gas/aarch64/sme.s: New test.
* testsuite/gas/aarch64/sme-f64.d: New test.
* testsuite/gas/aarch64/sme-f64.s: New test.
* testsuite/gas/aarch64/sme-i64.d: New test.
* testsuite/gas/aarch64/sme-i64.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operands
AARCH64_OPND_SME_ZAda_2b, AARCH64_OPND_SME_ZAda_3b and
AARCH64_OPND_SME_Pm.
(enum aarch64_insn_class): New instruction class sme_misc.
opcodes/ChangeLog:
* aarch64-opc.c (aarch64_print_operand):
Print OPND_SME_ZAda_2b and OPND_SME_ZAda_3b operands.
(verify_constraints): Handle OPND_SME_Pm.
* aarch64-opc.h (enum aarch64_field_kind):
New bit fields FLD_SME_ZAda_2b, FLD_SME_ZAda_3b and FLD_SME_Pm.
* aarch64-tbl.h (OP_SME_ZADA_PN_PM_ZN_S): New qualifier set.
(OP_SME_ZADA_PN_PM_ZN_D): New qualifier.
(OP_SME_ZADA_PN_PM_ZN_ZM): New qualifier.
(OP_SME_ZADA_S_PM_PM_S_S): New qualifier.
(OP_SME_ZADA_D_PM_PM_D_D): New qualifier.
(OP_SME_ZADA_S_PM_PM_H_H): New qualifier.
(OP_SME_ZADA_S_PM_PM_B_B): New qualifier.
(OP_SME_ZADA_D_PM_PM_H_H): New qualifier.
(SME_INSN): New instruction macro.
(SME_F64_INSN): New instruction macro.
(SME_I64_INSN): New instruction macro.
(SME_INSNC): New instruction macro.
(struct aarch64_opcode): New SME instructions.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:02:54 +0000 (19:02 +0000)]
aarch64: [SME] Add +sme option to -march
This series of patches (tagged [SME]) add support for the Scalable
Matrix Extension. Patch introduces new command line options: +sme, +sme-f64 and
+sme-i64 to -march command line options.
gas/ChangeLog:
* NEWS: Updated docs.
* config/tc-aarch64.c: New SME command line options.
* doc/c-aarch64.texi: Update docs.
include/ChangeLog:
* opcode/aarch64.h (AARCH64_FEATURE_SME): New flag.
(AARCH64_FEATURE_SME_F64): New flag.
(AARCH64_FEATURE_SME_I64): New flag.
opcodes/ChangeLog:
* aarch64-tbl.h (SME): New feature object.
Jeremy Drake [Wed, 17 Nov 2021 16:24:53 +0000 (16:24 +0000)]
Set the default DLL chracteristics to 0 for Cygwin based targets.
* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Set to 0 for
Cygwin targets.
* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Likewise.
Nick Clifton [Wed, 17 Nov 2021 15:59:16 +0000 (15:59 +0000)]
Fix the linker script parser so that it will recognise the PT_GNU_RELRO segment type, and the linker itself so that it will gracefully handle being unable to assign any sections to such a segment.
PR 28452
bfd * elf.c (assign_file_positions_for_non_load_sections): Replace
assertion with a warning message.
ld * ldgram.y: Add support for PT_GNU_RELRO and PT_GNU_PROPERTY.
* ldgram.c: Regenerate.
Andreas Arnez [Wed, 17 Nov 2021 10:46:36 +0000 (11:46 +0100)]
[gdb/build, s390x] Fix build after gdbarch_tdep changes
Commit
345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") changes a
declaration in s390-tdep.h from
struct gdbarch_tdep { ... };
to
struct s390_gdbarch_tdep : gdbarch_tdep { ... };
and now requires that gdbarch_tdep has been declared before. Which is
usually the case, except when compiling s390-linux-nat.c, where
s390-tdep.h is included before gdbarch.h. Thus the s390x build errors out
with the compiler complaining about a missing class name after the colon.
Fix this in s390-linux-nat.c, by including gdbarch.h before s390-tdep.h.
Luis Machado [Wed, 17 Nov 2021 13:02:44 +0000 (10:02 -0300)]
Expose the BTI BTYPE more explicitly in the registers
Augment the register description XML to expose the BTI BTYPE field contained
in the CPSR register. It will be displayed like so:
cpsr 0x60001000 [ EL=0 BTYPE=0 SSBS C Z ]
H.J. Lu [Tue, 16 Nov 2021 22:14:56 +0000 (14:14 -0800)]
elfedit: Add --output-abiversion option to update ABIVERSION
* NEWS: Mention --output-abiversion.
* elfedit.c (input_elf_abiversion): New.
(output_elf_abiversion): Likewise.
(update_elf_header): Update EI_ABIVERSION.
(command_line_switch): Add OPTION_INPUT_ABIVERSION and
OPTION_OUTPUT_ABIVERSION.
(options): Add --input-abiversion and --output-abiversion.
(usage): Likewise.
(main): Handle --input-abiversion and --output-abiversion.
* doc/binutils.texi: Document --input-abiversion and
--output-abiversion.
* testsuite/binutils-all/elfedit.exp: Run elfedit-6.
* testsuite/binutils-all/elfedit-6.d: New file.
Nelson Chu [Wed, 17 Nov 2021 10:46:11 +0000 (18:46 +0800)]
RISC-V: Support rvv extension with released version 1.0.
2021-11-17 Jim Wilson <jimw@sifive.com>
Kito Cheng <kito.cheng@sifive.com>
Nelson Chu <nelson.chu@sifive.com>
This patch is porting from the following riscv github,
https://github.com/riscv/riscv-binutils-gdb/tree/rvv-1.0.x
And here is the vector spec,
https://github.com/riscv/riscv-v-spec
bfd/
* elfxx-riscv.c (riscv_implicit_subsets): Added imply rules
of v, zve and zvl extensions.
(riscv_supported_std_ext): Updated verison of v to 1.0.
(riscv_supported_std_z_ext): Added zve and zvl extensions.
(riscv_parse_check_conflicts): The zvl extensions need to
enable either v or zve extension.
(riscv_multi_subset_supports): Check the subset list to know
if the INSN_CLASS_V and INSN_CLASS_ZVEF instructions are supported.
gas/
* config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_V.
(enum reg_class): Added RCLASS_VECR and RCLASS_VECM.
(validate_riscv_insn): Check whether the rvv operands are valid.
(md_begin): Initialize register hash for rvv registers.
(macro_build): Added rvv operands when expanding rvv pseudoes.
(vector_macro): Expand rvv macros into one or more instructions.
(macro): Likewise.
(my_getVsetvliExpression): Similar to my_getVsetvliExpression,
but used for parsing vsetvli operands.
(riscv_ip): Parse and encode rvv operands. Besides, The rvv loads
and stores with EEW 64 cannot be used when zve32x is enabled.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated -march
to rv32ifv_zkr.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/priv-reg.s: Added rvv csr testcases.
* testsuite/gas/riscv/priv-reg-version-1p10.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/march-imply-v.d: New testcase.
* testsuite/gas/riscv/vector-insns-fail-zve32xf.d: Likewise.
* testsuite/gas/riscv/vector-insns-fail-zve32xf.l: Likewise.
* testsuite/gas/riscv/vector-insns-fail-zvl.d: Likewise.
* testsuite/gas/riscv/vector-insns-fail-zvl.l: Likewise.
* testsuite/gas/riscv/vector-insns-vmsgtvx.d: Likewise.
* testsuite/gas/riscv/vector-insns-vmsgtvx.s: Likewise.
* testsuite/gas/riscv/vector-insns-zero-imm.d: Likewise.
* testsuite/gas/riscv/vector-insns-zero-imm.s: Likewise.
* testsuite/gas/riscv/vector-insns.d: Likewise.
* testsuite/gas/riscv/vector-insns.s: Likewise.
include/
* opcode/riscv-opc.h: Defined mask/match encodings and csrs for rvv.
* opcode/riscv.h: Defined rvv immediate encodings and fields.
(enum riscv_insn_class): Added INSN_CLASS_V and INSN_CLASS_ZVEF.
(INSN_V_EEW64): Defined.
(M_VMSGE, M_VMSGEU): Added for the rvv pseudoes.
opcodes/
* riscv-dis.c (print_insn_args): Dump the rvv operands.
* riscv-opc.c (riscv_vecr_names_numeric): Defined rvv registers.
(riscv_vecm_names_numeric): Likewise.
(riscv_vsew): Likewise.
(riscv_vlmul): Likewise.
(riscv_vta): Likewise.
(riscv_vma): Likewise.
(match_vs1_eq_vs2): Added for rvv Vu operand.
(match_vd_eq_vs1_eq_vs2): Added for rvv Vv operand.
(riscv_opcodes): Added rvv v1.0 instructions.
Sergei Trofimovich [Sun, 14 Nov 2021 15:50:01 +0000 (15:50 +0000)]
gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow)
On gcc-12 build fails as:
../../gdbserver/../gdb/nat/linux-osdata.c: In function 'void linux_xfer_osdata_processes(buffer*)':
../../gdbserver/../gdb/nat/linux-osdata.c:330:39: error:
'__builtin___sprintf_chk' may write a terminating nul past the end of the destination [-Werror=format-overflow=]
330 | sprintf (core_str, "%d", i);
| ^
It's an off-by-one case in an infeasible scenario for negative
huge core count. The change switches to std::string for memory
handling.
Tested by running 'info os processes' and checking CPU cores column.
Aaron Merey [Tue, 9 Nov 2021 21:47:36 +0000 (16:47 -0500)]
gdb: Add aliases for read_core_file_mappings callbacks
Add aliases read_core_file_mappings_loop_ftype and
read_core_file_mappings_pre_loop_ftype. Intended for use with
read_core_file_mappings.
Also add build_id parameter to read_core_file_mappings_loop_ftype.
Mike Frysinger [Wed, 17 Nov 2021 01:21:59 +0000 (20:21 -0500)]
sim: testsuite: add support for $pwd replacements
Extend the common test framework to support $pwd replacements in
settings. This allows replacing the custom cris @exedir@ with it.
Mike Frysinger [Wed, 17 Nov 2021 01:16:18 +0000 (20:16 -0500)]
sim: cris: replace @srcdir@ test extension with $srcdir/$subdir
The common framework supports $srcdir & $subdir replacements already,
so replace the custom @srcdir@ logic with those. Since the replace
happens in slurp_options that cris already uses, we don't have any
logic to port over there. We have to duplicate that into the cris
slurp_rv helper though.
Mike Frysinger [Wed, 17 Nov 2021 00:40:00 +0000 (19:40 -0500)]
sim: cris: drop custom "dynamic" test field
This tag is used to force tests to be built dynamically (i.e. without
-static linking). This is because cris-sim.exp in dejagnu turns on
static linking in ldflags.
The default configs and runtest flags shouldn't load these boards.
If these settings are still needed, we should figure out a different
way of suppressing the stock settings wholesale. We want these to
all pass out of the box with little to no configuration so that they
can run in a multitarget build.
With dropping "dynamic", it'll be easier to merge the custom cris
test logic with the common sim test logic.
Mike Frysinger [Wed, 17 Nov 2021 00:23:58 +0000 (19:23 -0500)]
sim: testsuite: add more silent build rules
site.exp is still verbose, but that comes from automake, so have
to get it fixed upstream.
GDB Administrator [Wed, 17 Nov 2021 00:00:05 +0000 (00:00 +0000)]
Automatic date update in version.in
Sergei Trofimovich [Sun, 14 Nov 2021 17:39:35 +0000 (17:39 +0000)]
sim: cr16: fix build on gcc-12 (NULL comparison)
On gcc-12 build fails as:
sim/cr16/interp.c: In function 'lookup_hash':
sim/cr16/interp.c:89:25: error:
the comparison will always evaluate as 'true'
for the address of 'mnimonic' will never be NULL [-Werror=address]
89 | if ((h->ops->mnimonic != NULL) &&
| ^~
'mnimonic' is a sharr array within ops. It can never be NULL.
While at it renamed 'mnimonic' to 'mnemonic'.
Simon Marchi [Mon, 8 Nov 2021 21:06:06 +0000 (16:06 -0500)]
gdb: fix length of array view returned by some value_contents functions
In commit
50888e42dcd3 ("gdb: change functions returning value contents
to use gdb::array_view"), I believe I made a mistake with the length of
the array views returned by some functions. All functions return a view
of `TYPE_LENGTH (value_type (type))` length. This is not correct when
the value's enclosing type is larger than the value's type. In that
case, the value's contents buffer is of the size of the enclosing type,
and the value's actual contents is a slice of that (as returned by
value_contents). So, functions value_contents_all_raw,
value_contents_for_printing and value_contents_for_printing_const are
not correct. Since they are meant to return the value's contents buffer
as a whole, they should have the size of the enclosing type.
There is nothing that uses the returned array view size at the moment,
so this didn't cause a problem. But it became apparent when trying to
adjust some callers.
Change-Id: Ib4e8837e1069111d2b2784d3253d5f3002419e68
Fangrui Song [Tue, 16 Nov 2021 21:03:57 +0000 (13:03 -0800)]
readelf: Support SHT_RELR/DT_RELR for -r
The -r output for SHT_RELR looks like:
Relocation section '.relr.dyn' at offset 0x530 contains 4 entries:
7 offsets
00000000000028c0
00000000000028c8
0000000000003ad0
0000000000003ad8
0000000000003ae0
0000000000003ae8
0000000000003af0
For --use-dynamic, the header looks like
'RELR' relocation section at offset 0x530 contains 32 bytes:
include/
* elf/common.h (DT_ENCODING): Bump to 38.
* elf/external.h (Elf32_External_Relr): New.
(Elf64_External_Relr): New.
binutils/
* readelf.c (enum relocation_type): New.
(slurp_relr_relocs): New.
(dump_relocations): Change is_rela to rel_type.
Dump RELR.
(dynamic_relocations): Add DT_RELR.
(process_relocs): Check SHT_RELR and DT_RELR.
(process_dynamic_section): Store into dynamic_info for
DT_RELR/DT_RELRENT/DT_RELRSZ.
Simon Marchi [Sat, 13 Nov 2021 02:12:00 +0000 (21:12 -0500)]
gdbsupport: remove FUNCTION_NAME
__func__ is standard C++11:
https://en.cppreference.com/w/cpp/language/function
Also, in C++11, __func__ expands to the demangled function name, so the
mention in the comment above FUNCTION_NAME doesn't apply anymore.
Finally, in places where FUNCTION_NAME is used, I think it's enough to
print the function name, no need to print the whole signature.
Therefore, I propose to just remove FUNCTION_NAME and update users to
use the standard __func__.
Change-Id: I778f28155422b044402442dc18d42d0cded1017d
Andrew Burgess [Mon, 8 Nov 2021 14:58:46 +0000 (14:58 +0000)]
gdb/gdbsupport: make xstrprintf and xstrvprintf return a unique_ptr
The motivation is to reduce the number of places where unmanaged
pointers are returned from allocation type routines. All of the
callers are updated.
There should be no user visible changes after this commit.
Andrew Burgess [Mon, 8 Nov 2021 15:17:16 +0000 (15:17 +0000)]
gdbsupport: move xfree into its own file
In the next commit I'd like to reference gdb_unique_ptr within the
common-utils.h file. However, this requires that I include
gdb_unique_ptr.h, which requires that xfree be defined.
Interestingly, gdb_unique_ptr.h doesn't actually include anything that
defines xfree, but I was finding that when I added a gdb_unique_ptr.h
include to common-utils.h I was getting a dependency cycle; before my
change xfree was defined when gdb_unique_ptr.h was processed, while
after my change it was not, and this made g++ unhappy.
To break this cycle, I propose to move xfree into its own header file,
gdb-xfree.h, which I'll then include into gdb_unique_ptr.h and
common-utils.cc.
Andrew Burgess [Tue, 9 Nov 2021 13:22:05 +0000 (13:22 +0000)]
gdb: throw OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR
While reviewing this patch:
https://sourceware.org/pipermail/gdb-patches/2021-November/183227.html
I spotted that the patch could be improved if we threw
OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR in a few places.
This commit updates error_value_optimized_out and
require_not_optimized_out to throw OPTIMIZED_OUT_ERROR.
I ran the testsuite and saw no regressions. This doesn't really
surprise me, we don't usually write code like:
catch (const gdb_exception_error &ex)
{
(if ex.error == GENERIC_ERROR)
...
else
...
}
There are a three places where we write something like:
catch (const gdb_exception_error &ex)
{
(if ex.error == OPTIMIZED_OUT_ERROR)
...
}
In frame.c:unwind_pc, stack.c:info_frame_command_core, and
value.c:value_optimized_out, but if we are hitting these cases then
it's not significantly changing GDB's behaviour.
Tom Tromey [Tue, 16 Nov 2021 16:11:41 +0000 (09:11 -0700)]
Remove config.cache in gdbserver's "distclean"
PR gdb/28586 points out that "make distclean" fails to delete
config.cache from gdbserver/. This patch fixes the bug, and removes a
duplicate "Makefile" deletion that was also pointed out in the PR.
Tom de Vries [Tue, 16 Nov 2021 15:46:43 +0000 (16:46 +0100)]
[gdb/testsuite] Remove inferior output in gdb.base/foll-vfork.exp
Test-case gdb.base/foll-vfork.exp has inferior output that is not needed, but
which makes the regexp matching more difficult (see commit
1f28b70def1
"[gdb/testsuite] Fix regexp in gdb.base/foll-vfork.exp").
Remove the inferior output, and revert commit
1f28b70def1 to make the matching
more restrictive.
Tested on x86_64-linux.
H.J. Lu [Tue, 16 Nov 2021 15:21:11 +0000 (07:21 -0800)]
x86: Don't allow KMOV in TLS code sequences
Don't allow KMOV in TLS code sequences which require integer MOV
instructions.
PR target/28595
* config/tc-i386.c (match_template): Don't allow KMOV in TLS
code sequences.
* testsuite/gas/i386/i386.exp: Run inval-tls and x86-64-inval-tls
tests.
* testsuite/gas/i386/inval-tls.l: New file.
* testsuite/gas/i386/inval-tls.s: Likewise.
* testsuite/gas/i386/x86-64-inval-tls.l: Likewise.
* testsuite/gas/i386/x86-64-inval-tls.s: Likewise.
Mike Frysinger [Tue, 16 Nov 2021 08:16:09 +0000 (03:16 -0500)]
sim: run: support concise env var settings
Support the same syntax as other common utilities where env vars can
be specified before the program to be run without an explicit option.
This behavior can be suppressed by using the -- marker.
Mike Frysinger [Tue, 16 Nov 2021 07:54:44 +0000 (02:54 -0500)]
sim: nrun: add --env-{set,unset,clear} command line options
Provide explicit control over the program's environment with the
basic set/unset/clear options. These are a bit clunky to use,
but they're functional.
The env set operation is split out into a separate function as it'll
be used in the next commit.
With these in place, we can adjust the custom cris testsuite to use
the now standard options and not its one-off hack.
Mike Frysinger [Tue, 16 Nov 2021 06:26:47 +0000 (01:26 -0500)]
sim: syscall: hoist argc/argn/argnlen to common code
Now that the callback framework supports argv & envp, we can move
the Blackfin implementation of these syscalls to the common code.
Mike Frysinger [Tue, 16 Nov 2021 05:03:50 +0000 (00:03 -0500)]
sim: syscall: fix argvlen & argv implementation
Now that we have access to the argv & envp strings, finish implementing
these syscalls. Delete unused variables, fix tbuf by incrementing the
pointer instead of setting to the length, and make sure we don't write
more data than the bufsize says is available.
Mike Frysinger [Tue, 16 Nov 2021 04:04:10 +0000 (23:04 -0500)]
sim: callback: expose argv & environ
Pass the existing strings data to the callbacks so that common
libgloss syscalls can be implemented (which we'll do shortly).
Mike Frysinger [Tue, 16 Nov 2021 04:00:04 +0000 (23:00 -0500)]
sim: keep track of program environment strings
We've been passing the environment strings to sim_create_inferior,
but most ports don't do anything with them. A few will use ad-hoc
logic to stuff the stack for user-mode programs, but that's it.
Let's formalize this across the board by storing the strings in the
normal sim state. This will allow (in future commits) supporting
more functionality in the run interface, and to unify some of the
libgloss syscalls.
Mike Frysinger [Tue, 16 Nov 2021 05:44:35 +0000 (00:44 -0500)]
sim: iq2000: fix some missing prototypes warnings
Turns out some of these were hiding real bugs like not passing the
pc variable down.
jiawei [Mon, 15 Nov 2021 03:03:43 +0000 (11:03 +0800)]
RISC-V: Scalar crypto instruction and entropy source CSR testcases.
Add testcases for Scalar Crypto extension, with total testcase contain all
instructions in k-ext/k-ext-64 and sub-extension testcase for zbk* zk*. Also
add testcase for new CSR name 'seed' which is the Entropy Source in zkr.
In fact these whole testcases can be combined into one file, after we have
supported the .option arch +-= directives.
gas/
* testsuite/gas/riscv/k-ext-64.d: New testcase for crypto instructions.
* testsuite/gas/riscv/k-ext-64.s: Likewise.
* testsuite/gas/riscv/k-ext.d: Likewise.
* testsuite/gas/riscv/k-ext.s: Likewise.
* testsuite/gas/riscv/zbkb-32.d: Likewise.
* testsuite/gas/riscv/zbkb-32.s: Likewise.
* testsuite/gas/riscv/zbkb-64.d: Likewise.
* testsuite/gas/riscv/zbkb-64.s: Likewise.
* testsuite/gas/riscv/zbkc-32.d: Likewise.
* testsuite/gas/riscv/zbkc-64.d: Likewise.
* testsuite/gas/riscv/zbkc.s: Likewise.
* testsuite/gas/riscv/zbkx-32.d: Likewise.
* testsuite/gas/riscv/zbkx-64.d: Likewise.
* testsuite/gas/riscv/zbkx.s: Likewise.
* testsuite/gas/riscv/zknd-32.d: Likewise.
* testsuite/gas/riscv/zknd-32.s: Likewise.
* testsuite/gas/riscv/zknd-64.d: Likewise.
* testsuite/gas/riscv/zknd-64.s: Likewise.
* testsuite/gas/riscv/zkne-32.d: Likewise.
* testsuite/gas/riscv/zkne-32.s: Likewise.
* testsuite/gas/riscv/zkne-64.d: Likewise.
* testsuite/gas/riscv/zkne-64.s: Likewise.
* testsuite/gas/riscv/zknh-32.d: Likewise.
* testsuite/gas/riscv/zknh-32.s: Likewise.
* testsuite/gas/riscv/zknh-64.d: Likewise.
* testsuite/gas/riscv/zknh-64.s: Likewise.
* testsuite/gas/riscv/zksed-32.d: Likewise.
* testsuite/gas/riscv/zksed-64.d: Likewise.
* testsuite/gas/riscv/zksed.s: Likewise.
* testsuite/gas/riscv/zksh-32.d: Likewise.
* testsuite/gas/riscv/zksh-64.d: Likewise.
* testsuite/gas/riscv/zksh.s: Likewise.
* testsuite/gas/riscv/priv-reg-fail-zkr.d: New testcase for zkr
csr check.
* testsuite/gas/riscv/priv-reg-fail-zkr.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated march to
rv32if_zkr.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p10.d: Added Crypto seed csr.
* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/priv-reg.s: Likewise.
jiawei [Mon, 15 Nov 2021 03:03:42 +0000 (11:03 +0800)]
RISC-V: Scalar crypto instructions and operand set.
Add instructions in k-ext, some instruction in zbkb, zbkc is reuse from
zbb,zbc, we just change the class attribute to make them both support.
The 'aes64ks1i' and 'aes64ks2' instructions are present in both the Zknd
and Zkne extensions on rv64. Add new operand letter 'y' to present 'bs'
symbol and 'Y' to present 'rnum' symbolc for zkn instructions. Also add
a new Entropy Source CSR define 'seed' located at address 0x015.
bfd/
* elfxx-riscv.c (riscv_multi_subset_supports): Added support for
crypto extension.
gas/
*config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_ZKR.
(riscv_csr_address): Checked for CSR_CLASS_ZKR.
(validate_riscv_insn): Added y and Y for bs and rnum operands.
(riscv_ip): Handle y and Y operands.
include/
* opcode/riscv-opc.h: Added encodings of crypto instructions.
Also defined new csr seed, which address is 0x15.
* opcode/riscv.h: Defined OP_* and INSN_CLASS_* for crypto.
opcodes/
* riscv-dis.c (print_insn_args): Recognized new y and Y operands.
* riscv-opc.c (riscv_opcodes): Added crypto instructions.
jiawei [Mon, 15 Nov 2021 03:03:41 +0000 (11:03 +0800)]
RISC-V: Minimal support of scalar crypto extension.
Minimal support of scalar crypto extension, add "k" in the
riscv_supported_std_ext, to make the order check right with
"zk" behind "zb".
bfd/
* elfxx-riscv.c (riscv_implicit_subsets): Added implicit
rules for zk* extensions.
(riscv_supported_std_ext): Added entry for k.
(riscv_supported_std_z_ext): Added entries for zk*.
Simon Marchi [Tue, 2 Nov 2021 16:21:31 +0000 (12:21 -0400)]
gdb: rework "set debuginfod" commands
As discussed here [1], do some re-work in the "set debuginfod commands".
First, use "set debuginfod enabled on/off/ask" instead of "set
debuginfod on/off/ask". This is more MI-friendly, and it gives an
output that makes more sense in "info set", for example.
Then, make the show commands not call "error" when debuginfod support is
not compiled in. This makes the commands "show" and "show debuginfod"
stop early, breaking gdb.base/default.exp:
Running /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.base/default.exp ...
FAIL: gdb.base/default.exp: info set
FAIL: gdb.base/default.exp: show
- Make the "debuginfod enabled" setting default to "off" when debuginfod
support is not compiled in, and "ask" otherwise.
- Make the setter of "debuginfod enabled" error out when debuginfod
support is not compiled in, so that "debuginfod enabled" will always
remain "off" in that case.
- Make the setter of "debuginfod verbose" work in any case. I don't
see the harm in letting the user change that setting, since the user will
hit an error if they try to enable the use of debuginfod.
- I would do the same for the "debuginfod urls" setter, but because
this one needs to see the DEBUGINFOD_URLS_ENV_VAR macro, provided by
libdebuginfod, I made that one error out as well if debuginfod
support is not compiled it (otherwise, I would have left it like
"debuginfod verbose". Alternatively, we could hard-code
"DEBUGINFOD_URLS" in the code (in fact, it was prior to this patch,
but I think it was an oversight, as other spots use
DEBUGINFOD_URLS_ENV_VAR), or use a dummy string to store the setting,
but I don't really see the value in that.
Rename debuginfod_enable to debuginfod_enabled, just so it matches the
setting name.
[1] https://sourceware.org/pipermail/gdb-patches/2021-October/182937.html
Change-Id: I45fdb2993f668226a5639228951362b7800f09d5
Co-Authored-By: Aaron Merey <amerey@redhat.com>
Simon Marchi [Mon, 15 Nov 2021 20:22:34 +0000 (15:22 -0500)]
gdb: adjust gdbarch_tdep calls in nat files
Commit
345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") forgot to
update the gdbarch_tdep calls in the native files other than x86-64
Linux. This patch updates them all (to the best of my knowledge).
These are the files I was able to build-test:
aarch64-linux-nat.c
amd64-bsd-nat.c
arm-linux-nat.c
ppc-linux-nat.c
windows-nat.c
xtensa-linux-nat.c
And these are the ones I could not build-test:
aix-thread.c
arm-netbsd-nat.c
ppc-fbsd-nat.c
ppc-netbsd-nat.c
ia64-tdep.c (the part that needs libunwind)
ppc-obsd-nat.c
rs6000-nat.c
If there are still some build problems related to gdbarch_tdep in them,
they should be pretty obvious to fix.
Change-Id: Iaa3d791a850e4432973757598e634e3da6061428
Simon Marchi [Tue, 16 Nov 2021 02:38:44 +0000 (21:38 -0500)]
gdb: remove unused variables in xtensa-linux-nat.c
While build-testing this file, the compiler complained about these two
unused variables, remove them.
Change-Id: I3c54f779f12c16ef6184af58aca75eaad042ce4e
Simon Marchi [Tue, 16 Nov 2021 02:19:30 +0000 (21:19 -0500)]
gdb: add arc-newlib-tdep.c to ALL_TARGET_OBS
This file is currently not compiled in an --enable-targets=all build,
but it should be. Add it to ALL_TARGET_OBS.
Update the gdbarch_tdep call that commit
345bd07cce33 ("gdb: fix
gdbarch_tdep ODR violation") forgot to update.
Change-Id: I86248a01493eea5e70186e9c46a298ad3994b034
Jim Wilson [Tue, 16 Nov 2021 00:51:05 +0000 (16:51 -0800)]
Update my email address.
I've left SiFive and have a new gmail account because it is convenient
to use with git send-email. I'm planning to use this for my RISC-V
work. My tuliptree address still works, it just isn't as convenient.
binutils:
* MAINTAINERS (RISC-V): Update my address.
GDB Administrator [Tue, 16 Nov 2021 00:00:06 +0000 (00:00 +0000)]
Automatic date update in version.in
Tom de Vries [Mon, 15 Nov 2021 21:55:02 +0000 (22:55 +0100)]
[gdb] Don't use gdb_stdlog for inferior-events
The test-case gdb.base/foll-vfork.exp contains:
...
if [gdb_debug_enabled] {
untested "debug is enabled"
return 0
}
...
To understand what it does, I disabled this bit and ran with GDB_DEBUG=infrun,
like so:
...
$ cd $build/gdb/testsuite
$ make check GDB_DEBUG=infrun RUNTESTFLAGS=gdb.base/foll-vfork.exp
...
and ran into:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
vfork parent follow, through step: set follow-fork parent
next^M
33 if (pid == 0) {^M
(gdb) FAIL: gdb.base/foll-vfork.exp: exec: \
vfork parent follow, through step: step
...
The problem is that the test-case expects:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
vfork parent follow, through step: set follow-fork parent
next^M
[Detaching after vfork from child process 28169]^M
33 if (pid == 0) {^M
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
vfork parent follow, through step: step
...
but the "Detaching" line has been redirected to
$outputs/gdb.base/foll-vfork/gdb.debug.
I looked at the documentation of "set logging debugredirect [on|off]":
...
By default, GDB debug output will go to both the terminal and the logfile.
Set debugredirect if you want debug output to go only to the log file.
...
and my interpretation of it was that "debug output" did not match the
"messages" description of inferior-events:
...
The set print inferior-events command allows you to enable or disable printing
of messages when GDB notices that new inferiors have started or that inferiors
have exited or have been detached.
...
Fix the discrepancy by not using gdb_stdlog for inferior-events.
Update the gdb.base/foll-vfork.exp test-case to not require
gdb_debug_enabled == 0.
Tested on x86_64-linux.
Tested test-case gdb.base/foll-vfork.exp with and without GDB_DEBUG=infrun.
Roland McGrath [Mon, 15 Nov 2021 19:09:17 +0000 (11:09 -0800)]
ld: Fix testsuite failures under --enable-textrel-check=error
ld/
* testsuite/ld-aarch64/dt_textrel.d: Pass explicit -z notext in
case ld was configured with --enable-textrel-check=error.
* testsuite/ld-aarch64/pr22764.d: Likewise.
* testsuite/ld-aarch64/pr20402.d: Likewise.
Luis Machado [Thu, 11 Nov 2021 20:22:50 +0000 (17:22 -0300)]
Extend the prologue analyzer to handle the bti instruction
Handle the BTI instruction in the prologue analyzer. The patch handles all
the variations of the BTI instruction.
Simon Marchi [Mon, 15 Nov 2021 16:29:39 +0000 (11:29 -0500)]
gdb: fix gdbarch_tdep ODR violation
I would like to be able to use non-trivial types in gdbarch_tdep types.
This is not possible at the moment (in theory), because of the one
definition rule.
To allow it, rename all gdbarch_tdep types to <arch>_gdbarch_tdep, and
make them inherit from a gdbarch_tdep base class. The inheritance is
necessary to be able to pass pointers to all these <arch>_gdbarch_tdep
objects to gdbarch_alloc, which takes a pointer to gdbarch_tdep.
These objects are never deleted through a base class pointer, so I
didn't include a virtual destructor. In the future, if gdbarch objects
deletable, I could imagine that the gdbarch_tdep objects could become
owned by the gdbarch objects, and then it would become useful to have a
virtual destructor (so that the gdbarch object can delete the owned
gdbarch_tdep object). But that's not necessary right now.
It turns out that RISC-V already has a gdbarch_tdep that is
non-default-constructible, so that provides a good motivation for this
change.
Most changes are fairly straightforward, mostly needing to add some
casts all over the place. There is however the xtensa architecture,
doing its own little weird thing to define its gdbarch_tdep. I did my
best to adapt it, but I can't test those changes.
Change-Id: Ic001903f91ddd106bd6ca09a79dabe8df2d69f3b
Clément Chigot [Mon, 15 Nov 2021 09:37:36 +0000 (10:37 +0100)]
COFF: avoid modifications over C_FILE filename aux entries.
Commit
e86fc4a5bc37 ("PR 28447: implement multiple parameters for .file
on XCOFF") introduces C_FILE entries which can store additional
information.
However, some modifications are needed by them but not by the original
C_FILE entries, usually representing the filename.
This patch ensures that filename entries are kept as is, in order to
protect targets not supporting the additional entries.
* coffgen.c (coff_write_symbol): Protect filename entries
(coff_write_symbols): Likewise.
(coff_print_symbol): Likewise.
Eric Botcazou [Mon, 15 Nov 2021 11:50:51 +0000 (12:50 +0100)]
Deal with full path in .file 0 directive
Gas uses the directory part, if present, of the .file 0 directive to set
entry 0 of the directory table in DWARF 5, which represents the "current
directory".
Now Gas also uses the file part of the same directive to set entry 0 of the
file table, which represents the "current compilation file". But the latter
need not be located in the former so GCC will use a full path in the file
part when it is passed a full path:
gcc -c /full/path/test.c -save-temps
yields:
.file 0 "/current/directory" "/full/path/test.c"
in the assembly file and:
The Directory Table (offset 0x22, lines 2, columns 1):
Entry Name
0 (indirect line string, offset: 0x25): /current/directory
1 (indirect line string, offset: 0x38): /full/path
The File Name Table (offset 0x30, lines 2, columns 2):
Entry Dir Name
0 0 (indirect line string, offset: 0x43): /full/path/test.c
in the object file. Note the full path and the questionable Dir value in
the 0 entry of the file table.
Mike Frysinger [Mon, 15 Nov 2021 08:34:36 +0000 (03:34 -0500)]
sim: cris: make error message test a little more flexible
The point of this test is to just make sure the usage text is shown,
not the exact details of the usage text. So shorten the output test
to match the beginning. This fixes breakage when the output changed
slightly to include [--].
Mike Frysinger [Mon, 15 Nov 2021 08:32:26 +0000 (03:32 -0500)]
sim: run: fix crash in argc==0 error situation
The new argv processing code assumed that we were always passed a
command line. If we weren't, make sure we don't crash before we
get a chance to output an error message about incorrect usage.
Mike Frysinger [Mon, 15 Nov 2021 08:00:05 +0000 (03:00 -0500)]
sim: cris: touch up rvdummy handling
Add quiet build support and make sure it's removed with `make clean`.
Mike Frysinger [Mon, 15 Nov 2021 07:44:30 +0000 (02:44 -0500)]
sim: cris: replace custom "dest" test field with new --argv0
The #dest field used in the cris testsuite is a bit of hack to set the
argv[0] for the tests to read out later on. Now that the sim has an
option to set argv[0] explicitly, we don't need this custom field, so
let's drop it to harmonize the testsuites a little.
Mike Frysinger [Mon, 15 Nov 2021 07:36:29 +0000 (02:36 -0500)]
sim: run: add --argv0 option to control argv[0]
We default argv[0] to the program we run which is a standard *NIX
convention, but sometimes we want to be able to control the argv[0]
setting independently (especially for programs that inspect argv[0]
to change their behavior or output). Add an option to control it.
Mike Frysinger [Mon, 15 Nov 2021 07:32:06 +0000 (02:32 -0500)]
sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program. Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.
So let's split the path to the program to run out into a separate
field by itself. This simplifies the various sim_open funcs too.
By itself, this code is more of a logical cleanup than something that
is super useful. But it will open up customization of argv[0] in a
follow up commit. Split the changes to make it easier to review.
Mike Frysinger [Sun, 14 Nov 2021 18:43:46 +0000 (13:43 -0500)]
sim: bfin: fix mach/xfail usage in tests
Set the mach to the right value all the time, and update xfail to
say the test fails on all targets. WIth multitarget testing, the
idea of target here doesn't make much sense.
Alan Modra [Mon, 15 Nov 2021 02:32:26 +0000 (13:02 +1030)]
-Waddress fixes for gold testsuite
Current mainline gcc.
common_test_1.c: In function 'main':
common_test_1.c:56:14: error: comparison between two arrays [-Werror=array-compare]
56 | assert (c5 > c4);
| ^
common_test_1.c:56:14: note: use '&c5[0] > &c4[0]' to compare the addresses
* testsuite/common_test_1.c: Avoid -Waddress warnings.
* testsuite/common_test_1_v1.c: Likewise.
* testsuite/common_test_1_v2.c: Likewise.
* testsuite/script_test_2.cc: Likewise.
Alan Modra [Tue, 9 Nov 2021 22:19:05 +0000 (08:49 +1030)]
PowerPC64 @notoc in non-power10 code
R_PPC64_REL24_P9NOTOC is a variant of R_PPC64_REL24_NOTOC for use on
@notoc cals from non-power10 code in the rare case that using such a
construct is useful. R_PPC64_REL24_P9NOTOC will be emitted by gas
rather than R_PPC64_REL24_NOTOC when @notoc is used in a branch
instruction if power10 instructions are not enabled at that point.
The new relocation tells the linker to not use power10 instructions on
any stub emitted for that branch, unless overridden by
--power10-stubs=yes.
The current linker heuristic of only generating power10 instructions
for stubs if power10-only relocations are detected, continues to be
used.
include/
* elf/ppc64.h (R_PPC64_REL24_P9NOTOC): Define.
bfd/
* reloc.c (BFD_RELOC_PPC64_REL24_P9NOTOC): Define.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entry for new reloc.
(ppc64_elf_reloc_type_lookup): Handle it.
(enum ppc_stub_type): Delete.
(enum ppc_stub_main_type, ppc_stub_sub_type): New.
(struct ppc_stub_type): New.
(struct ppc_stub_hash_entry): Use the above new type.
(struct ppc_link_hash_table): Update stub_count.
(is_branch_reloc, ppc64_elf_check_relocs),
(toc_adjusting_stub_needed): Handle new reloc.
(stub_hash_newfunc, select_alt_stub, ppc_merge_stub),
(ppc_type_of_stub, plt_stub_size, build_plt_stub),
(build_tls_get_addr_head, build_tls_get_addr_tail),
(ppc_build_one_stub, ppc_size_one_stub, ppc64_elf_size_stubs),
(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Handle new
reloc. Modify stub handling to suit new scheme.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): When power10 is not enabled
return BFD_RELOC_PPC64_REL24_P9NOTOC for @notoc.
(fixup_size, ppc_force_relocation, ppc_fix_adjustable): Handle
BFD_RELOC_PPC64_REL24_P9NOTOC.
ld/
* testsuite/ld-powerpc/callstub-2.s: Add .machine power10.
Alan Modra [Sun, 14 Nov 2021 23:19:54 +0000 (09:49 +1030)]
Regenerate a couple of files
A couple of files changed on my latest --enable-maintainer-mode
build. ld/Makefile.in had a missing dependency but better sorting of
the loongson entries.
intl/
* configure: Regenerate.
ld/
* Makefile.am: Sort loongson entries.
* Makefile.in: Regenerate.
Pedro Alves [Tue, 9 Nov 2021 17:33:41 +0000 (17:33 +0000)]
Fix build with current GCC: EL_EXPLICIT(location) always non-NULL
Compiling GDB with current GCC (
1b4a63593b) runs into this:
src/gdb/location.c: In function 'int event_location_empty_p(const event_location*)':
src/gdb/location.c:963:38: error: the address of 'event_location::<unnamed union>::explicit_loc' will never be NULL [-Werror=address]
963 | return (EL_EXPLICIT (location) == NULL
| ^
src/gdb/location.c:57:30: note: 'event_location::<unnamed union>::explicit_loc' declared here
57 | struct explicit_location explicit_loc;
| ^~~~~~~~~~~~
GCC is right, EL_EXPLICIT is defined as returning the address of an
union field:
/* An explicit location. */
struct explicit_location explicit_loc;
#define EL_EXPLICIT(P) (&((P)->u.explicit_loc))
and thus must always be non-NULL.
Change-Id: Ie74fee7834495a93affcefce03c06e4d83ad8191
GDB Administrator [Mon, 15 Nov 2021 00:00:22 +0000 (00:00 +0000)]
Automatic date update in version.in
Lancelot SIX [Mon, 11 Oct 2021 22:42:33 +0000 (23:42 +0100)]
[PR gdb/16238] Add completer for the show user command
The 'show user' command (which shows the definition of non-python/scheme
user defined commands) is currently missing a completer. This is
mentioned in PR 16238. Having one can improve the user experience.
In this commit I propose an implementation for such completer as well as
the associated tests.
Tested on x86_64 GNU/Linux.
All feedbacks are welcome.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=16238
Alan Modra [Sun, 14 Nov 2021 07:37:50 +0000 (18:07 +1030)]
sync libbacktrace from gcc
GDB Administrator [Sun, 14 Nov 2021 00:00:13 +0000 (00:00 +0000)]
Automatic date update in version.in
H.J. Lu [Sat, 13 Nov 2021 16:51:02 +0000 (08:51 -0800)]
Sync Makefile.tpl with GCC
* Makefile.tpl: Sync with GCC.
* Makefile.in: Regenerate.
Mike Frysinger [Fri, 12 Nov 2021 00:36:28 +0000 (19:36 -0500)]
sim: sh: fix switch-bool warnings
This code triggers -Werror=switch-bool warnings with <=gcc-5 versions.
Rework it to use if statements instead as it also simplifies a bit.
Mike Frysinger [Fri, 12 Nov 2021 00:30:41 +0000 (19:30 -0500)]
sim: sh: rework carry checks to not rely on integer overflows
In <=gcc-7 versions, -fstrict-overflow is enabled by default, and that
triggers warnings in this code that relies on integer overflows to test
for carries. Change the logic to test against the limit directly.
GDB Administrator [Sat, 13 Nov 2021 00:00:24 +0000 (00:00 +0000)]
Automatic date update in version.in
Carl Love [Fri, 5 Nov 2021 20:25:28 +0000 (20:25 +0000)]
Fix gdb.base/sigstep.exp test for ppc
The test stops at <signal_handler called> which is the call to the handler
rather than in the handler as intended. This patch replaces the
gdb_test "$enter_cmd to handler" with a gdb_test_multiple test. The multiple
test looks for the stop at <signal_handler called>. If found, the command
is issued again. The test passes if gdb stops in the handler as expected.
(gdb) PASS: gdb.base/sigstep.exp: stepi to handler, nothing in handler, step
from handler: continue to signal
stepi
<signal handler called>
1: x/i $pc
=> 0x7ffff7f80440 <__kernel_start_sigtramp_rt64>: bctrl
(gdb) stepi
handler (sig=551) at sigstep.c:32
32 {
1: x/i $pc
=> 0x10000097c <handler>: addis r2,r12,2
(gdb) PASS: gdb.base/sigstep.exp: stepi to handler, nothing in handler,
step from handler: stepi to handler
Patch has been tested on x86_64-linux and ppc64le-linux with no test failures.
Tom de Vries [Fri, 12 Nov 2021 16:12:56 +0000 (17:12 +0100)]
[gdb/testsuite] Fix regexp in gdb.base/foll-vfork.exp
On OBS I ran into:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exit: \
vfork relations in info inferiors: continue to child exit
info inferiors^M
Num Description Connection Executable ^M
1 <null> foll-vfork-exit ^M
* 2 <null> foll-vfork-exit ^M
(gdb) I'm the proud parent of child #5044!^M
FAIL: gdb.base/foll-vfork.exp: exit: vfork relations in info inferiors: \
vfork relation no longer appears in info inferiors (timeout)
...
Fix this by removing the '$' anchor in the corresponding '$gdb_prompt $'
regexps.
Tested on x86_64-linux.
Alan Modra [Fri, 12 Nov 2021 08:25:45 +0000 (18:55 +1030)]
Don't compile some opcodes files when bfd is 32-bit only
* Makefile.am (TARGET_LIBOPCODES_CFILES): Split into..
(TARGET64_LIBOPCODES_CFILES): ..this and..
(TARGET32_LIBOPCODES_CFILES): ..this.
(ALL_MACHINES): Likewise split to
(ALL64_MACHINES, ALL32_MACHINES): ..this.
* disassemble.c: Define some ARCH_* when ARCH_all only if BFD64.
* configure.ac (BFD_MACHINES): Defined depending on BFD_ARCH_SIZE.
* Makefile.in: Regenerate.
* configure: Regenerate.
Alan Modra [Fri, 12 Nov 2021 08:08:23 +0000 (18:38 +1030)]
Import Makefile.def from gcc
* Makefile.def: Import from gcc.
* Makefile.in: Regenerate.
Alan Modra [Thu, 11 Nov 2021 09:51:32 +0000 (20:21 +1030)]
Fix demangle style usage info
Extract allowed styles from libiberty, so we don't have to worry about
our help messages getting out of date. The function probably belongs
in libiberty/cplus-dem.c but it can be here for a while to iron out
bugs.
PR 28581
* demanguse.c: New file.
* demanguse.h: New file.
* nm.c (usage): Break up output. Use display_demangler_styles.
* objdump.c (usage): Use display_demangler_styles.
* readelf.c (usage): Likewise.
* Makefile.am: Add demanguse.c and demanguse.h.
* Makefile.in: Regenerate.
* po/POTFILESin: Regenerate.
GDB Administrator [Fri, 12 Nov 2021 00:00:17 +0000 (00:00 +0000)]
Automatic date update in version.in
Simon Marchi [Mon, 8 Nov 2021 21:49:21 +0000 (16:49 -0500)]
gdb: fix "set scheduler-locking" thread exit hang
GDB hangs when doing this:
- launch inferior with multiple threads
- multiple threads hit some breakpoint(s)
- one breakpoint hit is presented as a stop, the rest are saved as
pending wait statuses
- "set scheduler-locking on"
- resume the currently selected thread (because of scheduler-locking,
it's the only one resumed), let it execute until exit
- GDB hangs, not showing the prompt, impossible to interrupt with ^C
When the resumed thread exits, we expect the target to return a
TARGET_WAITKIND_NO_RESUMED event, and that's what we see:
[infrun] fetch_inferior_event: enter
[infrun] scoped_disable_commit_resumed: reason=handling event
[infrun] random_pending_event_thread: None found.
[Thread 0x7ffff7d9c700 (LWP 309357) exited]
[infrun] print_target_wait_results: target_wait (-1.0.0 [process -1], status) =
[infrun] print_target_wait_results: -1.0.0 [process -1],
[infrun] print_target_wait_results: status->kind = no-resumed
[infrun] handle_inferior_event: status->kind = no-resumed
[infrun] handle_no_resumed: TARGET_WAITKIND_NO_RESUMED (ignoring: found resumed)
[infrun] prepare_to_wait: prepare_to_wait
[infrun] reset: reason=handling event
[infrun] maybe_set_commit_resumed_all_targets: not requesting commit-resumed for target native, no resumed threads
[infrun] fetch_inferior_event: exit
The problem is in handle_no_resumed: we check if some other thread is
actually resumed, to see if we should ignore that event (see comments in
that function for more info). If this condition is true:
(thread->executing () || thread->has_pending_waitstatus ())
... then we ignore the event. The problem is that there are some non-resumed
threads with a pending event, which makes us ignore the event. But these
threads are not resumed, so we end up waiting while nothing executes, hence
waiting for ever.
My first fix was to change the condition to:
(thread->executing ()
|| (thread->resumed () && thread->has_pending_waitstatus ()))
... but then it occured to me that we could simply check for:
(thread->resumed ())
Since "executing" implies "resumed", checking simply for "resumed"
covers threads that are resumed and executing, as well as threads that
are resumed with a pending status, which is what we want.
Change-Id: Ie796290f8ae7f34c026ca3a8fcef7397414f4780
Tom de Vries [Thu, 11 Nov 2021 10:22:39 +0000 (11:22 +0100)]
[gdb/build] Fix Wimplicit-exception-spec-mismatch in clang build
When building with clang 13 (and -std=gnu++17 to work around an issue in
string_view-selftests.c), we run into a few Wimplicit-exception-spec-mismatch
warnings:
...
src/gdbsupport/new-op.cc:102:1: error: function previously declared with an \
explicit exception specification redeclared with an implicit exception \
specification [-Werror,-Wimplicit-exception-spec-mismatch]
operator delete (void *p)
^
/usr/include/c++/11/new:130:6: note: previous declaration is here
void operator delete(void*) _GLIBCXX_USE_NOEXCEPT
^
...
These are due to recent commit
5fff6115fea "Fix
LD_PRELOAD=/usr/lib64/libasan.so.6 gdb".
Fix this by adding the missing noexcept.
Build on x86_64-linux, using gcc 7.5.0 and clang 13.0.0.
Tom de Vries [Thu, 11 Nov 2021 10:22:39 +0000 (11:22 +0100)]
[gdb/build] Fix build with -std=c++11
When building with -std=c++11, we run into two Werror=missing-declarations:
...
new-op.cc: In function 'void operator delete(void*, std::size_t)':
new-op.cc:114:1: error: no previous declaration for \
'void operator delete(void*, std::size_t)' [-Werror=missing-declarations]
operator delete (void *p, std::size_t) noexcept
^~~~~~~~
new-op.cc: In function 'void operator delete [](void*, std::size_t)':
new-op.cc:132:1: error: no previous declaration for \
'void operator delete [](void*, std::size_t)' [-Werror=missing-declarations]
operator delete[] (void *p, std::size_t) noexcept
^~~~~~~~
...
These are due to recent commit
5fff6115fea "Fix
LD_PRELOAD=/usr/lib64/libasan.so.6 gdb".
The declarations are provided by <new> (which is included) for c++14 onwards,
but they are missing for c++11.
Fix this by adding the missing declarations.
Tested on x86_64-linux, with gcc 7.5.0, both without (implying -std=gnu++14) and
with -std=c++11.
Tom de Vries [Thu, 11 Nov 2021 09:48:50 +0000 (10:48 +0100)]
[gdb/testsuite] Add gdb.arch/ppc64-break-on-_exit.exp
Add a regression test-case for commit
a50bdb99afe "[gdb/tdep, rs6000] Don't
skip system call in skip_prologue":
- set a breakpoint on a local copy of glibc's _exit, and
- verify that it triggers.
The test-case uses an assembly file by default, but also has the possibility
to use a C source file instead.
Tested on ppc64le-linux. Verified that the test-case fails without
aforementioned commit, and passes with the commit. Both with assembly
and C source.
Nelson Chu [Mon, 8 Nov 2021 08:35:25 +0000 (16:35 +0800)]
RISC-V: Dump objects according to the elf architecture attribute.
For now we should always generate the elf architecture attribute both for
elf and linux toolchains, so that we could dump the objects correctly
according to the generated architecture string. This patch resolves the
problem that we probably dump an object with c.nop instructions, but
in fact the c extension isn't allowed. Consider the following case,
nelson@LAPTOP-QFSGI1F2:~/test$ cat temp.s
.option norvc
.option norelax
.text
add a0, a0, a0
.byte 0x1
.balign 16
nelson@LAPTOP-QFSGI1F2:~/test$ ~/binutils-dev/build-elf32-upstream/build-install/bin/riscv32-unknown-elf-as temp.s -o temp.o
nelson@LAPTOP-QFSGI1F2:~/test$ ~/binutils-dev/build-elf32-upstream/build-install/bin/riscv32-unknown-elf-objdump -d temp.o
temp.o: file format elf32-littleriscv
Disassembly of section .text:
00000000 <.text>:
0:
00a50533 add a0,a0,a0
4: 01 .byte 0x01
5: 00 .byte 0x00
6: 0001 nop
8:
00000013 nop
c:
00000013 nop
nelson@LAPTOP-QFSGI1F2:~/test$ ~/binutils-dev/build-elf32-upstream/build-install/bin/riscv32-unknown-elf-readelf -A temp.o
Attribute Section: riscv
File Attributes
Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
The c.nop at address 0x6 is generated for alignment, but since the rvc isn't
allowed for this object, dump it as a c.nop instruction looks wrong. After
applying this patch, I get the following result,
nelson@LAPTOP-QFSGI1F2:~/test$ ~/binutils-dev/build-elf32-upstream/build-install/bin/riscv32-unknown-elf-objdump -d temp.o
temp.o: file format elf32-littleriscv
Disassembly of section .text:
00000000 <.text>:
0:
00a50533 add a0,a0,a0
4: 01 .byte 0x01
5: 00 .byte 0x00
6: 0001 .2byte 0x1
8:
00000013 nop
c:
00000013 nop
For the current objdump, we dump data to .byte/.short/.word/.dword, and
dump the unknown or unsupported instructions to .2byte/.4byte/.8byte, which
respectively are 2, 4 and 8 bytes instructions. Therefore, we shouldn't
dump the 0x0001 as a c.nop instruction in the above case, we should dump
it to .2byte 0x1 as a unknown instruction, since the rvc is disabled.
However, consider that some people may use the new objdump to dump the old
objects, which don't have any elf attributes. We usually set the default
architecture string to rv64g by bfd/elfxx-riscv.c:riscv_set_default_arch.
But this will cause rvc instructions to be unrecognized. Therefore, we
set the default architecture string to rv64gc for disassembler, to keep
the previous behavior.
This patch pass the riscv-gnu-toolchain gcc/binutils regressions for
rv32emc-elf, rv32gc-linux, rv32i-elf, rv64gc-elf and rv64gc-linux
toolchains. Also, tested by --enable-targets=all and can build
riscv-gdb successfully.
bfd/
* elfnn-riscv.c (riscv_merge_arch_attr_info): Tidy the
codes for riscv_parse_subset_t setting.
* elfxx-riscv.c (riscv_get_default_ext_version): Updated.
(riscv_subset_supports): Moved from gas/config/tc-riscv.c.
(riscv_multi_subset_supports): Likewise.
* elfxx-riscv.h: Added extern for riscv_subset_supports and
riscv_multi_subset_supports.
gas/
* config/tc-riscv.c (riscv_subset_supports): Moved to
bfd/elfxx-riscv.c.
(riscv_multi_subset_supports): Likewise.
(riscv_rps_as): Defined for architectrue parser.
(riscv_set_arch): Updated.
(riscv_set_abi_by_arch): Likewise.
(riscv_csr_address): Likewise.
(reg_lookup_internal): Likewise.
(riscv_ip): Likewise.
(s_riscv_option): Updated.
* testsuite/gas/riscv/mapping-04b.d: Updated.
* testsuite/gas/riscv/mapping-norelax-03b.d: Likewise.
* testsuite/gas/riscv/mapping-norelax-04b.d: Likewise.
opcodes/
* riscv-dis.c: Include elfxx-riscv.h since we need the
architecture parser. Also removed the cpu-riscv.h, it
is already included in elfxx-riscv.h.
(default_isa_spec): Defined since the parser need this
to set the default architecture string.
(xlen): Moved out from riscv_disassemble_insn as a global
variable, it is more convenient to initialize riscv_rps_dis.
(riscv_subsets): Defined to recoed the supported
extensions.
(riscv_rps_dis): Defined for architectrue parser.
(riscv_disassemble_insn): Call riscv_multi_subset_supports
to make sure if the instructions are valid or not.
(print_insn_riscv): Initialize the riscv_subsets by parsing
the elf architectrue attribute. Otherwise, set the default
architectrue string to rv64gc.
Mike Frysinger [Thu, 11 Nov 2021 06:23:10 +0000 (01:23 -0500)]
sim: testsuite: drop sim_compile cover function
Most code isn't using this, and the only call site (in one cris file)
can use target_compile directly. So switch it over to simplify.
Mike Frysinger [Thu, 11 Nov 2021 05:25:16 +0000 (00:25 -0500)]
sim: cris: stop testing a.out explicitly [ld/13900]
Since gcc dropped support for a.out starting with 4.4.0 in 2009, it's
been impossible to verify this code actually still works. Since it
crashes in ld, and it uses a config option that no other tests uses
and we want to remove, drop the test to avoid all the trouble.