Nicolai Hähnle [Tue, 22 Sep 2009 18:57:05 +0000 (20:57 +0200)]
r300: Fix crash reported in bug #24066
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Brian Paul [Mon, 21 Sep 2009 20:49:46 +0000 (14:49 -0600)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Brian Paul [Mon, 21 Sep 2009 20:23:07 +0000 (14:23 -0600)]
mesa: refine the error checking vbo_exec_DrawRangeElements()
If the 'end' index is out of bounds issue a warning as before. But instead
of just no-op'ing the draw call, examine the actual array indices to see
if they're OK. If the max array index is out of bounds, issue another
warning and no-op the draw call. Otherwise, draw normally. This is a
debug build-only feature since it could impact performance.
This "fixes" the missing torus in the OGL Distilled / Picking demo.
Brian Paul [Mon, 21 Sep 2009 20:07:35 +0000 (14:07 -0600)]
mesa: make max_buffer_index() a non-static function
Maciej Cencora [Sun, 20 Sep 2009 11:54:59 +0000 (13:54 +0200)]
Maciej Cencora [Sat, 19 Sep 2009 16:47:36 +0000 (18:47 +0200)]
mesa: add some debug info to teximage.c
Maciej Cencora [Sat, 19 Sep 2009 16:46:51 +0000 (18:46 +0200)]
r300: fix a typo
Eric Anholt [Wed, 20 May 2009 21:05:03 +0000 (14:05 -0700)]
intel: Mark the FBO as incomplete if there's no intel_renderbuffer for it.
This happens to rendering with textures with a border, which had resulted
in a segfault on dereferencing the irb.
(cherry-picked from commit
8bba183b9eeb162661a287bf2e118c6dd419dd24)
Brian Paul [Mon, 21 Sep 2009 14:34:00 +0000 (08:34 -0600)]
softpipe: Fix cube face selection.
If arx and ary are equal, we still want to choose from one of them,
and not arz.
(cherry picked from commit
de685b37a91bc95dd4093a44a49b7b47385b1f7c)
Brian Paul [Mon, 21 Sep 2009 14:32:43 +0000 (08:32 -0600)]
swrast: fix cube face selection
If arx and ary are equal, we still want to choose from one of them,
and not arz.
This is the same as Michal's softpipe fix.
Nicolai Hähnle [Mon, 21 Sep 2009 10:50:33 +0000 (12:50 +0200)]
r300: Zero-initialize register for NV_vertex_program
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Nicolai Hähnle [Wed, 9 Sep 2009 17:56:57 +0000 (19:56 +0200)]
r300: Fix handling of NV_vertex_program parameters
The handling is a bit inefficient, unfortunately, but I don't want to make
any intrusive changes for Mesa 7.6.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Michel Dänzer [Mon, 21 Sep 2009 08:39:20 +0000 (10:39 +0200)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Michel Dänzer [Mon, 21 Sep 2009 08:08:11 +0000 (10:08 +0200)]
intel: Fix crash in intel_flush().
Since commit
2921a2555d0a76fa649b23c31e3264bbc78b2ff5 ('intel: Deassociated
drawables from private context struct in intelUnbindContext'),
intel->driDrawable may be NULL in intel_flush().
Pauli Nieminen [Sun, 20 Sep 2009 19:24:35 +0000 (22:24 +0300)]
radeon: Fix legacy bo not to reuse dma buffers before refcount is 1.
This should help detecting possible memory leaks with dma buffers and prevent
possible visual corruption if data would be overwriten too early.
Nicolai Hähnle [Sun, 20 Sep 2009 18:40:03 +0000 (20:40 +0200)]
r300/compiler: Fix trig instructions in R300 fp
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Pauli Nieminen [Sun, 20 Sep 2009 18:08:42 +0000 (21:08 +0300)]
radeon: Fix typo in variable name.
Pauli Nieminen [Sun, 20 Sep 2009 17:07:35 +0000 (20:07 +0300)]
radeon: Improve WARN_ONCE macro to appear as single statement.
Do-while makes macro safe to be used with if and for constructions.
Also remove __LINE__ macro from variable name because scope is local to macro anyway.
Nicolai Hähnle [Sun, 20 Sep 2009 16:45:32 +0000 (18:45 +0200)]
radeon: Fix "verts" debugging enable
Copy'n'paste apparently prevented the RADEON_VERTS flag from being enabled.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Nicolai Hähnle [Sun, 20 Sep 2009 14:59:03 +0000 (16:59 +0200)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Nicolai Hähnle [Sat, 12 Sep 2009 14:49:31 +0000 (16:49 +0200)]
mesa/st: Create front renderbuffer on the fly when supplied with a surface
Normally, the mesa/st would create a fake front buffer out of a
client-allocated surface.
In the DRI setting, however, st/dri provides a front buffer surface which is
created and maintained by the X server. Prefer to use this surface instead,
so that front buffer rendering and reading works correctly.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Nicolai Hähnle [Sat, 12 Sep 2009 10:13:35 +0000 (12:13 +0200)]
mesa/st: Initialize format bits of framebuffer renderbuffers
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Nicolai Hähnle [Sun, 20 Sep 2009 14:46:58 +0000 (16:46 +0200)]
docs: Document new features in radeon/r200/r300 drivers
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Nicolai Hähnle [Sun, 20 Sep 2009 14:33:59 +0000 (16:33 +0200)]
r300/compiler: Fix R300 fragment program regression introduced by
0723cd1...
We obviously need to move the code addr register backwards because their may
be overlap.
This bug affected in particular the Compiz water plugin.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
Zou Nan hai [Fri, 18 Sep 2009 08:04:41 +0000 (16:04 +0800)]
[i965] add a missing header file
Zou Nan hai [Fri, 18 Sep 2009 05:29:28 +0000 (13:29 +0800)]
[i965] use intel_batchbuffer_flush to flush the clear
Brian Paul [Thu, 17 Sep 2009 03:21:42 +0000 (21:21 -0600)]
mesa: fix clip plane, fog issues
Ian Romanick [Wed, 16 Sep 2009 23:43:50 +0000 (16:43 -0700)]
glx: Use initstate_r / random_r instead of corrupting global random number state
Previously srandom and random were used. This cause the global random
number generator state to be modified. This caused problems for
applications that called srandom before calling into GLX. By using
local state the global state is left unmodified.
This should fix bug #23774.
Brian Paul [Wed, 16 Sep 2009 19:07:12 +0000 (13:07 -0600)]
st/mesa: fix some incorrect branching/clean-up code in TexImage functions
We need to be sure to call the _mesa_unmap_teximage_pbo() function if we
called _mesa_validate_pbo_teximage().
Brian Paul [Wed, 16 Sep 2009 18:57:26 +0000 (12:57 -0600)]
st/mesa: fix texture memory allocation bug
The following example caused an incorrect GL_OUT_OF_MEMORY error to be
raised in glTexSubImage2D:
glTexImage2D(level=0, width=32, height=32, pixels=NULL);
glTexImage2D(level=0, width=64, height=64, pixels=NULL);
glTexSubImage2D(level=0, pixels!=NULL);
The second glTexImage2D() call needs to cause the first image to be
deallocated then reallocated at the new size. This was not happening
because we were testing for pixels==NULL too early.
Ian Romanick [Wed, 16 Sep 2009 14:57:19 +0000 (07:57 -0700)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
src/mesa/main/dlist.c
Ian Romanick [Wed, 16 Sep 2009 14:39:58 +0000 (07:39 -0700)]
intel: Deassociated drawables from private context struct in intelUnbindContext
The generic DRI infrastructure makes sure that __DRIcontextRec::driDrawablePriv
and __DRIcontextRec::driReadablePriv are set to NULL after unbinding a
context. However, the intel_context structure keeps cached copies of
these pointers. If these cached pointers are not NULLed and the
drawable is actually destroyed after unbinding the context (typically
by way of glXDestroyWindow), freed memory will be dereferenced in
intelDestroyContext.
This should fix bug #23418.
Zou Nan hai [Wed, 16 Sep 2009 05:25:46 +0000 (13:25 +0800)]
i965: do a flush in clear, fix openarena render issue,
fd.o bug# 23857
Brian Paul [Tue, 15 Sep 2009 21:12:29 +0000 (15:12 -0600)]
docs: glUniform functions are now compiled into display lists
Brian Paul [Tue, 15 Sep 2009 21:10:29 +0000 (15:10 -0600)]
mesa: compile glUniformMatrix() functions into display lists
I believe this is the last of the shader-related functions that needed
display list treatment.
Brian Paul [Tue, 15 Sep 2009 20:56:55 +0000 (14:56 -0600)]
mesa: implement more glUniform display list functions
Brian Paul [Tue, 15 Sep 2009 20:38:52 +0000 (14:38 -0600)]
docs: document glUseProgram display list fix
Brian Paul [Tue, 15 Sep 2009 20:31:10 +0000 (14:31 -0600)]
mesa: compile glUniform4f() into display lists
Note: there are more glUniform functions to compile...
Brian Paul [Tue, 15 Sep 2009 20:25:44 +0000 (14:25 -0600)]
mesa: compile glUseProgram/glUseProgramObjectARB into display lists
Fixes bug 23746
Ian Romanick [Tue, 15 Sep 2009 20:13:35 +0000 (13:13 -0700)]
Merge commit 'origin/mesa_7_5_branch' into mesa_7_6_branch
Ian Romanick [Tue, 15 Sep 2009 20:12:22 +0000 (13:12 -0700)]
GLX: Complain when buggy applications call GLX 1.3 functions.
Brian Paul [Tue, 15 Sep 2009 15:45:18 +0000 (09:45 -0600)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Brian Paul [Tue, 15 Sep 2009 15:36:31 +0000 (09:36 -0600)]
gl: restore some PFNGL typedefs
Commit
d33c315d9e32584dea12cea683795b498a9f5eca removed a few too many
typedefs. We need the typedefs in glext.h which are protected by #ifdef
GL_VERSION_1_2 but we can exclude the ones protected by
GL_VERSION_1_2_DEPRECATED.
Brian Paul [Mon, 14 Sep 2009 23:48:17 +0000 (17:48 -0600)]
progs/vp: print program and error info when program does not compile
Brian Paul [Mon, 14 Sep 2009 23:32:03 +0000 (17:32 -0600)]
glsl: added some link debug code (disabled)
Brian Paul [Mon, 14 Sep 2009 23:27:47 +0000 (17:27 -0600)]
docs: document linker/preprocessor bug fix
Brian Paul [Mon, 14 Sep 2009 23:24:25 +0000 (17:24 -0600)]
glsl: remove extra #version directives from concatenated shader sources
When we concatenate shaders to do our form of poor-man linking, if there's
multiple #version directives, preprocessing fails. This change disables
the extra #version directives by changing the first two chars to //.
This should help with some Wine issues such as bug 23946.
Vinson Lee [Mon, 14 Sep 2009 17:50:48 +0000 (11:50 -0600)]
gallium: Add Mac OS to pipe/p_thread.h.
Mac OS also has POSIX threads.
Thierry Vignaud [Mon, 14 Sep 2009 17:48:51 +0000 (11:48 -0600)]
configure: fix comment
Dan Nicholson [Sat, 12 Sep 2009 16:27:01 +0000 (09:27 -0700)]
Use CFLAGS as HOST_CFLAGS by default
Unless we're cross compiling, the HOST_CFLAGS should be the same as the
normal CFLAGS. This allows the x86 and x86_64 asm to be built correctly
with a native compiler using -m32/-m64.
Signed-off-by: Dan Nicholson <dbn.lists@gmail.com>
Brian Paul [Fri, 11 Sep 2009 19:43:51 +0000 (13:43 -0600)]
docs: mention the new Gallium llvmpipe driver
Brian Paul [Fri, 11 Sep 2009 19:39:14 +0000 (13:39 -0600)]
llvmpipe: asst fixes for 'make linux-llvmpipe'
Vinson Lee [Fri, 11 Sep 2009 14:04:37 +0000 (08:04 -0600)]
mesa: raise GL_INVALID_ENUM not GL_INVALID_VALUE for glTexParamter errors
Signed-off-by: Brian Paul <brianp@vmware.com>
Pauli Nieminen [Thu, 10 Sep 2009 22:28:34 +0000 (01:28 +0300)]
radeon: Remove structure allocation from iterator variable.
dma_bo varaible is only used for iterating so allocating memory for it only
causes memory leaks.
Brian Paul [Thu, 10 Sep 2009 21:40:26 +0000 (15:40 -0600)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Brian Paul [Thu, 10 Sep 2009 21:34:34 +0000 (15:34 -0600)]
intel: disable intel_stencil_drawpixels() for now
It doesn't work reliably even when all the prerequisite checks are made.
Brian Paul [Thu, 10 Sep 2009 20:15:07 +0000 (14:15 -0600)]
docs: document Gallium glDrawPixels(GL_STENCIL_INDEX) fix
Brian Paul [Thu, 10 Sep 2009 20:14:18 +0000 (14:14 -0600)]
softpipe: minor indentation fix
Brian Paul [Thu, 10 Sep 2009 20:11:36 +0000 (14:11 -0600)]
softpipe: set dirty_render_cache in softpipe_clear()
This fixes a bug seen when doing a glDrawPixels(GL_STENCIL_INDEX) right
after a glClear(). The check-for-flush test was failing because we
didn't set the dirty_render_cache flag in softpipe_clear(). So we saw
stale data when we mapped the stencil buffer.
Brian Paul [Thu, 10 Sep 2009 18:50:08 +0000 (12:50 -0600)]
docs: initial 7.5.2 release notes page
Ian Romanick [Thu, 10 Sep 2009 18:44:53 +0000 (11:44 -0700)]
Fix merge fail
One of the conflicst from this merge was missed:
commit
0c309bb494b6ee1c403442d1207743f749f95b6e
Merge:
c6c44bf d27d659
Author: Brian Paul <brianp@vmware.com>
Date: Wed Sep 9 08:33:39 2009 -0600
Brian Paul [Thu, 10 Sep 2009 18:44:28 +0000 (12:44 -0600)]
tgsi: use new tgsi_call_record to handle execution mask stacks
This fixes some issues when "return"ing from nested loops/conditionals.
Brian Paul [Thu, 10 Sep 2009 16:17:07 +0000 (10:17 -0600)]
mesa: need to set all stencil bits to 0 before setting the 1 bits
Plus, check for pixel transfer stencil index/offset.
Ian Romanick [Thu, 10 Sep 2009 18:24:56 +0000 (11:24 -0700)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
src/mesa/drivers/dri/intel/intel_context.c
Eric Anholt [Wed, 9 Sep 2009 19:35:30 +0000 (12:35 -0700)]
i965: Fix relocation delta for WM surfaces.
This was a regression in
0f328c90dbc893e15005f2ab441d309c1c176245.
Bug #23688
Bug #23254
(cherry picked from commit
5604b27b9326ac542069a49ed9650c4b0d3e939a)
Zhenyu Wang [Mon, 7 Sep 2009 08:18:57 +0000 (16:18 +0800)]
intel: add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Hopefully this will be one of the last cherry-picks.
(cherry picked from commit
ca246dd186f9590f6d67038832faceb522138c20)
Brian Paul [Thu, 10 Sep 2009 14:41:12 +0000 (08:41 -0600)]
mesa: in texenvprogram code, only do saturation when really needed.
For some env modes (like modulate or replace) we don't have to clamp
because we know the results will be in [0,1].
Vinson Lee [Thu, 10 Sep 2009 14:39:26 +0000 (08:39 -0600)]
gallium: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.
Fixes typo from commit
c6c44bf48124dd5b4661014a8d58482c5a54557f.
Pauli Nieminen [Thu, 10 Sep 2009 13:41:59 +0000 (16:41 +0300)]
radeon: Change debugging code to use macros instead of inline functions.
Variadic functions can't be inlined which makes debugging to have quite large
function overead. Only aleternative method is to use variadic macros which are
inlined so compiler can optimize debugging to minimize overhead.
Brian Paul [Wed, 9 Sep 2009 18:01:28 +0000 (12:01 -0600)]
mesa: include new u_format.csv file in tarballs
Pauli Nieminen [Wed, 9 Sep 2009 15:31:52 +0000 (18:31 +0300)]
radeon: Add more verbose error message for failed command buffer.
Brian Paul [Wed, 9 Sep 2009 14:33:39 +0000 (08:33 -0600)]
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
Makefile
configs/default
progs/glsl/Makefile
src/gallium/auxiliary/util/u_simple_shaders.c
src/gallium/state_trackers/glx/xlib/xm_api.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/intel/intel_context.h
src/mesa/drivers/dri/intel/intel_pixel.c
src/mesa/drivers/dri/intel/intel_pixel_read.c
src/mesa/main/texenvprogram.c
src/mesa/main/version.h
aljen [Sat, 5 Sep 2009 21:06:53 +0000 (23:06 +0200)]
gallium: Added HaikuOS platform
Brian Paul [Wed, 9 Sep 2009 14:23:11 +0000 (08:23 -0600)]
mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels()
Works around a bug found on i965. See bug 23670.
Vinson Lee [Wed, 9 Sep 2009 14:21:05 +0000 (08:21 -0600)]
scons: Set default_dri to no for Mac OS.
Mac OS does not have libdrm.
Brian Paul [Tue, 8 Sep 2009 20:45:24 +0000 (14:45 -0600)]
mesa: bump version to 7.5.2
I'm not 100% sure there'll be a 7.5.2 release, but just in case.
Brian Paul [Tue, 8 Sep 2009 18:21:42 +0000 (12:21 -0600)]
i965: fix incorrect test for vertex position attribute
Brian Paul [Tue, 8 Sep 2009 15:20:39 +0000 (09:20 -0600)]
egl: also use X types for building on Apple/MacOS X
See bug 20413.
Peter Hutterer [Mon, 7 Sep 2009 00:49:31 +0000 (10:49 +1000)]
prog/glsl: fix Makefile for samplers_array.
The rule added in
488b3c4d1bc3d830477180759a42dbaf8f5801b0 does not use the
right INCDIR, breaking the build when GL isn't installed in the default include
paths.
7.5 branch only fix, already fixed in master by rewriting the Makefile
(
ceb9459ed5e63207defa5d715958c2757933272f)
Signed-off-by: Peter Hutterer <peter.hutterer@who-t.net>
Eric Anholt [Mon, 22 Jun 2009 15:52:52 +0000 (08:52 -0700)]
i965: Fix warnings in intel_pixel_read.c.
(cherry picked from commit
c80ce5ac90b1e0ac7a72cd41c314aa2000bfecf5)
Eric Anholt [Sat, 20 Jun 2009 05:12:52 +0000 (22:12 -0700)]
intel: Also get the DRI2 front buffer when doing front buffer reading.
(cherry picked from commit
df70d3049a396af3601d2a1747770635a74120bb)
Eric Anholt [Sat, 20 Jun 2009 05:03:37 +0000 (22:03 -0700)]
intel: Update Mesa state before span setup in glReadPixels.
We could have mapped the wrong set of draw buffers. Noticed while looking
into a DRI2 glean ReadPixels issue.
(cherry picked from commit
afc981ee46791838f3cb83e11eb33938aa3efc83)
Eric Anholt [Sat, 20 Jun 2009 04:43:22 +0000 (21:43 -0700)]
intel: Move intel_pixel_read.c to shared for use with i965.
(cherry picked from commit
dcfe0d66bfff9a55741aee298b7ffb051a48f0d3)
Eric Anholt [Thu, 16 Jul 2009 22:57:22 +0000 (15:57 -0700)]
i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.
(cherry picked from commit
99174e7630676307f618c252755a20ba61ad9158)
Eric Anholt [Wed, 19 Aug 2009 01:48:54 +0000 (18:48 -0700)]
intel: Align cubemap texture height to its padding requirements.
(cherry picked from commit
a70e1315846cd5e8d6f2b622821ff8262fe7179d)
(cherry picked from commit
29e51c3872531366570d032147abad50f8a3c1af)
Eric Anholt [Sat, 8 Aug 2009 01:09:31 +0000 (18:09 -0700)]
intel: Align untiled region height to 2 according to 965 docs.
This may or may not be required pre-965, but it doesn't seem unlikely, and
I'd rather be safe.
(cherry picked from commit
b053474378633249be0e9f24010650ffb816229a)
Eric Anholt [Thu, 6 Aug 2009 03:12:15 +0000 (20:12 -0700)]
i965: Fix source depth reg setting for FSes reading and writing to depth.
For some IZ setups, we'd forget to account for the source depth register
being present, so we'd both read the wrong reg, and write output depth to
the wrong reg.
Bug #22603.
(cherry picked from commit
f44916414ecd2b888c8a680d56b7467ccdff6886)
Eric Anholt [Wed, 5 Aug 2009 01:02:31 +0000 (18:02 -0700)]
i965: Respect CondSwizzle in OPCODE_IF.
Fixes piglit glsl-vs-if-bool and progs/glsl/twoside, and will likely be
useful for the looping code.
Bug #18992
(cherry picked from commit
78c022acd0b37bf8b32f04313d76255255e769c1)
(cherry picked from commit
63d7a2f53fb38e170f4e55f2b599e918edf2c512)
Brian Paul [Thu, 18 Jun 2009 15:23:58 +0000 (09:23 -0600)]
i965: asst clean-ups, etc in brw_vs_emit()
(cherry picked from commit
fd7d764514c540987549c3ea88a2d669b0f0ea58)
Eric Anholt [Tue, 4 Aug 2009 21:13:27 +0000 (14:13 -0700)]
i965: Emit conditional code updates as required for GLSL VS if statements.
Previously, we'd be branching based on whatever condition code happened to be
laying around.
(cherry picked from commit
7007f8b352763af89805f287153cb7972bff0523)
Eric Anholt [Tue, 4 Aug 2009 20:42:30 +0000 (13:42 -0700)]
i965: Spell "conditional" correctly.
Eric Anholt [Tue, 4 Aug 2009 19:39:22 +0000 (12:39 -0700)]
i965: Fix RECT shadow sampling by not losing the other texcoords.
Bug #20821
(cherry picked from commit
191e028de20b2f954621b652aa77b06d0e93652a)
Eric Anholt [Tue, 4 Aug 2009 00:55:14 +0000 (17:55 -0700)]
i965: Assert that the offset in the VBO is below the VBO size.
This avoids sending a bad buffer address to the GPU due to programmer error,
and is permitted by the ARB_vbo spec. Note that we still have the opportunity
to dereference past the end of the GPU, because we aren't clipping to a
correct _MaxElement, but that appears to be harder than it should be. This
gets us the 90% solution.
Bug #19911.
(cherry picked from commit
d7430d942f6c7950a92367aeb13b80cf76ccad78)
Eric Anholt [Tue, 4 Aug 2009 00:12:43 +0000 (17:12 -0700)]
i965: Even if no VS inputs are set, still load some amount of URB as required.
See comment on Vertex URB Entry Read Length for VS_STATE.
This, combined with the previous three commits, fixes #22945.
(cherry picked from commit
e340d4f9866db4bae391288e83a630a310b0dd2b)
Eric Anholt [Mon, 3 Aug 2009 22:24:02 +0000 (15:24 -0700)]
i965: Make sure the VS URB size is big enough to fit a VF VUE.
This fix is just from code and docs inspection, but it may fix hangs on
some applications.
(cherry picked from commit
e93848e595176ae0bad3bfe64e0ca63fd089bb72)
Eric Anholt [Thu, 30 Jul 2009 20:40:29 +0000 (13:40 -0700)]
i965: Don't emit bad packets when no VBs are referenced.
It appears that sometimes Mesa (and I suppose a VS could as well) emits
a program which references no vertex data, and thus we end up with
nr_enabled == 0 even though some VBs are enabled. We'd end up emitting
VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs.
Bug #22945 (wine with an uncompiled VS)
(cherry picked from commit
d1fbfd0f962347e4153db3852292d44de5aea863)
Eric Anholt [Mon, 3 Aug 2009 21:46:18 +0000 (14:46 -0700)]
i965: Calculate enabled[] and nr_enabled once and re-use the values.
The code duplication bothered me.
(cherry picked from commit
9b9cb30d128fc5f1ba77287696ecd508e640efde)
Eric Anholt [Wed, 24 Jun 2009 02:30:25 +0000 (19:30 -0700)]
i965: Set the max index buffer address correctly according to the docs.
It's the last addressable byte, not the byte after the end of the buffer.
(cherry picked from commit
b72dea5441e8e9226dabf1826fa3bc129c7bc281)
Brian Paul [Fri, 15 May 2009 15:14:24 +0000 (09:14 -0600)]
i965: rename var: s/tmp/vs_inputs/
(cherry picked from commit
840c09fc71542fdfc71edd2a2802925d467567bb)
José Fonseca [Fri, 4 Sep 2009 18:38:35 +0000 (19:38 +0100)]
scons: Used wrong exception class.