r600/sb: schedule LDS ops in appropriate places.

So LDS ops have to be SLOT_X,
and LDS OQ reads have read port restrictions so we try
and force those into only having one per slot and avoiding
bank swizzles.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: hit the scheduler with a big hammer to avoid lds splits.

This tries to avoid an lds queue read getting scheduled separately
from an lds ret read, the non-sb code uses the same style of hammer,
this isn't foolproof.

We can do better, but it's a bit tricky, as you have to scan ahead
and either schedule more lds oq moves and more lds reads and that
could lead to you running out of space anyways.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: adding lds oq tracking to the scheduler

This adds support for tracking the lds oq read/writes
so can avoid scheduling other things in between.

This patch just adds the tracking and assert to show
problems.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: add gcm support to avoid clause between lds read/queue read

You have to schedule LDS_READ_RET _, x and MOV reg, LDS_OQ_A_POP
in the same basic block/clause. This makes sure once we've issues
and MOV we don't add another block until we balance it with an
LDS read.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: handle lds special dest registers.

This adds lds to the geom emit handling

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: handle LDS operations in folding.

Don't try and fold LDS using expressions.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: add finalising for lds output queue special values.

We need to convert these to the hw special registers.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: add initial support for parsing lds operations.

This handles parsing the LDS ops and queue accessess.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: disable if conversion for hs

This fixes bad interactions with the LDS special values.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: lds ops have no dst register.

Although these are op3s they don't have a dst reg.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: introduce special register values for lds support.

For LDS read/write ordering we use the LDS_RW value, reads
will wait on previous writes.
For LDS read/read from LDS queue ordering we use the LDS_OQ
values, we define two for now, though initially we'll just
support OQA.

Also add the check for the lds oq values

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: update last_cf if alu is the last clause

It's rare to have a final alu clause on normal shaders (exports)
but tess shaders write to LDS as their output, so we see some
alu clauses, and the CF_END get put in the wrong place.

This makes sure to update last_cf correctly.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: start adding GDS support

This adds support for GDS ops to sb backend.

This seems to work for atomics and tess factor writes.

Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: add tess/compute initial state registers.

This stops them being optimised out.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/sb: fix a bug emitting ar load from a constant.

Some tess shaders were doing MOVA_INT _, c0.x on cayman, and then
hitting an assert in sb_bc_finalize.cpp:translate_kcache.

This makes sure the toplevel kcache tracker gets updated,
and the clause gets fixed up.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/shader: only emit add instruction if param has a value.

Just saves a pointless a = a + 0;

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600: emit 0 gds_op for tf write.

This field is ignored for tf writes so should be 0.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600: add support for ARB_shader_clock.

Reviewed-by: Gert Wollny <gw.fossedev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/ws: get rid of useless return value

This also used boolean, so nice to kill that.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: Initialize DCC on transition from preinitialized.

Looks like the decompress does not handle invalid encodings well,
which happens with random memory. Of course apps should not use it
with random memory, but they are allowed to ....

Fixes: 44fcf58744 "radv: Disable DCC for GENERAL layout and compute transfer dest."
Reviewed-by: Dave Airlie <airlied@redhat.com>

ac: fix buffer overflow bug in 64bit SSBO loads

Fixes: 441ee1e65b04 "radv/ac: Implement Float64 SSBO loads"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ac: fix nir_intrinsic_get_buffer_size for radeonsi

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

i965: Pass brw_growing_bo to grow_buffer().

Cleaner.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

i965: Make a helper for recreating growing buffers.

Now that we have two of these, we're duplicating a bunch of this logic.
The next commit will add more logic, which would make the duplication
seem worse.

This ends up setting EXEC_OBJECT_CAPTURE on the batch, which isn't
necessary (it's already captured), but it should be harmless.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

i965: Replace cpu_map pointers with a "use_shadow_copy" boolean.

Having a boolean for "we're using malloc'd shadow copies for all
buffers" is cleaner than having a cpu_map pointer for each.  It was
okay when we had one buffer, but this is more obvious.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

intel/fs: Optimize and simplify the copy propagation dataflow logic.

Previously the dataflow propagation algorithm would calculate the ACP
live-in and -out sets in a two-pass fixed-point algorithm.  The first
pass would update the live-out sets of all basic blocks of the program
based on their live-in sets, while the second pass would update the
live-in sets based on the live-out sets.  This is incredibly
inefficient in the typical case where the CFG of the program is
approximately acyclic, because it can take up to 2*n passes for an ACP
entry introduced at the top of the program to reach the bottom (where
n is the number of basic blocks in the program), until which point the
algorithm won't be able to reach a fixed point.

The same effect can be achieved in a single pass by computing the
live-in and -out sets in lock-step, because that makes sure that
processing of any basic block will pick up the updated live-out sets
of the lexically preceding blocks.  This gives the dataflow
propagation algorithm effectively O(n) run-time instead of O(n^2) in
the acyclic case.

The time spent in dataflow propagation is reduced by 30x in the
GLES31.functional.ssbo.layout.random.all_shared_buffer.5 dEQP
test-case on my CHV system (the improvement is likely to be of the
same order of magnitude on other platforms).  This more than reverses
an apparent run-time regression in this test-case from my previous
copy-propagation undefined-value handling patch, which was ultimately
caused by the additional work introduced in that commit to account for
undefined values being multiplied by a huge quadratic factor.

According to Chad this test was failing on CHV due to a 30s time-out
imposed by the Android CTS (this was the case regardless of my
undefined-value handling patch, even though my patch substantially
exacerbated the issue).  On my CHV system this patch reduces the
overall run-time of the test by approximately 12x, getting us to
around 13s, well below the time-out.

v2: Initialize live-out set to the universal set to avoid rather
    pessimistic dataflow estimation in shaders with cycles (Addresses
    performance regression reported by Eero in GpuTest Piano).
    Performance numbers given above still apply.  No shader-db changes
    with respect to master.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104271
Reported-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERS

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

st/mesa: assume that user constant buffers are always supported

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

nine: assume that user constant buffers are always supported

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

st/mesa: expose ARB_sync unconditionally

All drivers support it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

gallium: remove PIPE_CAP_TWO_SIDED_STENCIL

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

glsl: remove unneeded extern "C" {} bracketing around Mesa includes

The two headers already have the right extern "C" annotations.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: move gl_external_samplers() to program.[ch]

The function is only called from a couple places.  It doesn't make
sense to have it in mtypes.h

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: include util/bitscan.h in st_glsl_to_tgsi_temprename.cpp

And use "" instead of <> for including Mesa headers, as we do elsewhere.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: include util/bitscan.h in serialize.cpp

Instead of relying on indirect inclusion of the header.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

util: include string.h in u_dynarray.h

To get memset() prototype.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: remove unneeded #includes of main/compiler.h

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: remove unneeded #includes of main/compiler.h

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: include main/compiler.h in st_cb_queryobj.c

To get CPU_TO_LE32() macro.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: include util/macros.h in format_fallback.c

To get definition of unreachable() macro.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: include compiler.h in disk_cache.c

Instead of indirect inclusion to get CPU_TO_LE32() macro.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa/program: change validate_inputs() local var 'inputs' to GLbitfield64

Both state->prog->info.inputs_read and state->InputsBound are GLbitfield64
so it seems that the OR of those values should be of the same type.
I'm not sure this fixes any actual issues though.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

vbo: reindent vbo_attrib.h to use 3 spaces

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: whitespace, formatting fixes in vbo_exec_api.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: add assertions, comments in vbo_exec_api.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: whitespace, formatting fixes in vbo_exec_draw.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: use inputs_read var to simplify code

v2: add some const qualifiers, per Ian.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: whitespace, formatting fixes in vbo_split_copy.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: use a new local 'array' variable in bind_vertex_list() loop

Make the code a bit more concise.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: remove unneeded #includes in vbo_context.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: whitespace, formatting fixes in vbo_context.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: change vbo_context attribute map arrays to GLubyte

The values will never be larger than VBO_ATTRIB_MAX (currently 44).

v2: add STATIC_ASSERT to be sure VBO_ATTRIB_MAX can fit in ubyte,
per Emil.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: lift common code out of switch cases

Both switch cases began with the same code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

vbo: optimize some display list drawing (v2)

The vbo_save_vertex_list structure records one or more glBegin/End
primitives which all have the same vertex format.

To draw these primitives, we setup the vertex array state, then
issue the drawing command.  Before, the 'start' vertex was typically
zero and we used the vertex array pointer to indicate where the
vertex data starts.

This patch checks if the vertex buffer offset is an exact multiple of
the vertex size.  If so, that means we can use zero-based vertex array
pointers and use the draw's start value to indicate where the vertex
data starts.

This means a series of display list drawing commands may have
identical vertex array state.  This will get filtered out by the
Gallium CSO module so we can issue a tight series of drawing commands
without state changes to the device.

Note that this also works for a series of glCallList commands (not
just one list that contains multiple glBegin/End pairs).

No Piglit or conform changes.

v2: minor fixes suggested by Ian.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rewrite some code in playback_copy_to_current()

I think this is a little easier to understand.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: add some comments in vbo_save_api.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename some functions in vbo_save_api.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename some functions in vbo_save_draw.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: add comment that vbo_save_vertex_list::buffer_offset is in bytes

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: minor code simplification in _save_compile_vertex_list()

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename prim to prims

Using a plural name makes it easier to see that this is an array and
not a pointer to a single object.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: removed unused ctx parameter for alloc_prim_store()

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename vbo_save_context::buffer to buffer_map

And move the field and improve comments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: remove unused vbo_save_context::count field

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: s/GLuint/GLbitfield/ for vbo_save_context::replay_flags

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename vbo_save_vertex_list::count to vertex_count

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename vbo_save_vertex_store::buffer to buffer_map

To match other parts of the VBO code and make things easier to understand.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: rename vbo_save_primitive_store::buffer to prims

A little easier to understand.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: whitespace fixes in vbo_save.h

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: whitespace fixes in vbo_save_draw.c

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

svga: add num-commands-per-draw HUD query

This query shows the ratio of total commands vs. drawing commands sent
to the vgpu device.  This gives some idea of how many state changes
are sent per draw call.  The closer the ratio is to 1.0, the better.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>

gallium/hud: Fix support for PIPE_DRIVER_QUERY_TYPE_FLOAT

Evidently, nobody has used PIPE_DRIVER_QUERY_TYPE_FLOAT up to this
point.  Adding a driver query of this type which returns the query
value in pipe_query_result::f resulted in garbage output in the HUD.

The problem is the pipe_query_result::f field was being accessed as
through the u64 field and being added to the query_info::results_cumulative
field.  This patch checks for PIPE_DRIVER_QUERY_TYPE_FLOAT in a few
places and scales the float by 1000 before converting to uint64_t.

Also, add some comments to explain the query_info::result_index field.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/hud: remove uint64_t casts in sensor query_sti_load() function

The hud_graph_add_value() function takes a double value, so just pass
the current/critical values as-is since they're doubles.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/hud: compute cpu load, percent with doubles

The hud_graph_add_value() function takes a double precision value,
so compute it that way.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/hud: s/unsigned/enum pipe_query_type/

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

meson: Set with_dri from with_gallium when DRI glx is explicitly configured

Set with_dri from with_gallium when DRI GLX is explicitly configured, as
well as when DRI GLX is chosen automatically.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

meson: add llvm dependency for swr build

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

st/va: add break for MPEG4 data buffer handling case

Signed-off-by: Leo Liu <leo.liu@amd.com>

st/va: remove TODO line for JPEG data buffer handling

Nothing to do

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

i915: No longer rely on compatability define in intel_bufmgr.h

Symbol rename from dri_* to drm_intel_* introduced a number of compatability
defines within intel_bufmgr.h.

Replace the old function with the new function, consistent with the balance
of this file.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radeonsi: bump glsl version to 450 for nir backend

We still have more work to do but piglit results are looking
pretty good.

At GLSL 1.50 we have 30647/31118 piglit tests passing.
At GLSL 4.50 we have 37927/38551 piglit tests passing.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/nir: add some missing tcs bits to the nir scan pass

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: rework load_tcs_{inputs,outputs}

This shares more code and calls the new shared load_tess_varyings()
abi so that the radeonsi nir path now supports tcs output loads.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/radeonsi: add tcs load outputs support

The code to load outputs is essentially the same as load inputs
so we make the interface more generic to maximise code sharing.

We will make use of the new support in the following patch.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/glsl_to_tgsi: add ARB_get_program_binary support using TGSI

This resolves a game bug in Dead Island. The game doesn't properly
handle ARB_get_program_binary with 0 supported formats, and ends up
crashing.

This will enable ARB_get_program_binary binary support for any
driver that currently enables the on-disk shader cache.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85564

st/glsl_to_tgsi: add st_get_program_binary_driver_sha1() helper

This will be used by ARB_get_program_binary.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/glsl_to_tgsi: add (de)serialise program helpers

These will be shared between the on-disk shader cache and
ARB_get_program_binary.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/glsl_to_tgsi: stop passing pipe_shader_state to st_store_tgsi_in_disk_cache()

We can instead just get this from st_*_program.

V2: store tokens to to st_compute_program before attempting to
    write to cache (fixes crash).

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/glsl_to_tgsi: store num_tgsi_tokens in st_*_program

We will need this for ARB_get_program_binary binary support.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

loader/dri3: Try to make sure we only process our own NotifyMSC events

We were using a sequence counter value to wait for a specific NotifyMSC
event. However, we can receive events from other clients as well, which
may already be using higher sequence numbers than us. In that case, we
could stop processing after an event from another client, which could
have been received significantly earlier. This would have multiple
undesirable effects:

* The computed MSC and UST values would be lower than they should be
* We could leave a growing number of NotifyMSC events from ourselves and
  other clients in XCB's special event queue

I ran into this with Firefox and Thunderbird, whose VSync threads both
seem to use the same window. The result was sluggish screen updates and
growing memory consumption in one of them.

Fix this by checking the XCB sequence number and MSC value of NotifyMSC
events, instead of using our own sequence number.

v2:
* Use the Present event ID for the sequence parameter of the
  PresentNotifyMSC request, as another safeguard against processing
  events from other clients
* Rebase on drawable mutex changes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> # v1

radv: Implement VK_EXT_debug_report.

This is not hooked up to any messages yet, but useful for e.g.
renderdoc if you add some messages during development.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

vulkan: move anv VK_EXT_debug_report implementation to common code.

For also using it in radv. I moved the remaining stubs back to
anv_device.c as they were just trivial.

This does not move the vk_errorf/anv_perf_warn or the object
type macros, as those depend on anv types and logging.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

st/glsl_to_nir: disable io lowering to temps for tess

Lowering these to temps makes a big mess, and results in some
piglit test failures. Also the radeonsi backend (the only backend
to support tess) has support for indirects so there is no need to
lower them anyway.

Fixes the following piglit tests on radeonsi:

tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec3-index-rd.shader_test
tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec4-index-rd.shader_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

i965: Enable CCS_E sampling of sRGB textures as UNORM

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/draw: Do resolves properly for textures used by TXF

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/miptree: Refactor CCS_E and CCS_D cases in render_aux_usage

This commit unifies the CCS_E and CCS_D cases.  This should fix a couple
of subtle issues.  One is that when you use INTEL_DEBUG=norbc to disable
CCS_E, we don't get the sRGB blending workaround.  By unifying the code,
we give CCS_D that workaround as well.

The second issue fixed by this refactor is that the blending workaround
was appears to be enabled on all gens but really only applies on gen9.
Due to a happy accident in the way code was laid out, it was only
getting enabled on gen9: gen8 and earlier don't support non-zero-one
clear colors, and gen10 supports sRGB for CCS_E so it got caught in the
format_ccs_e_compat_with_miptree case.  This refactor moves it above the
format_ccs_e_compat_with_miptree case so it's an explicit early exit and
makes it explicitly only on gen9.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>

Re-enable regular fast-clears (CCS_D) on gen9+

This reverts commit ee57b15ec764736e2d5360beaef9fb2045ed0f68, "i965:
Disable regular fast-clears (CCS_D) on gen9+".  How taht we've fixed the
issue with too many different aux usages in the render cache, it should
be safe to re-enable CCS_D for sRGB.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104163
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>

i965: Track format and aux usage in the render cache

This lets us perform render cache flushes whenever a surface goes from
being used with one aux+format to a different aux+format.

This is the "proper" fix for https://bugs.freedesktop.org/102435.
ee57b15ec764736e2d5360beaef9fb2045ed0f68 which was really just a partial
revert of 3e57e9494c2279580ad6a83ab8c065d01e7e634e was just a hack to
get rid of a hang in a bunch of Valve games.  This solves the actual
problem responsible for the hang and lets us enable CCS_E once again.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>

i965: Call brw_cache_flush_for_render in predraw_resolve_framebuffer

This makes sure we flush things out of other caches prior to using a
surface through the render cache.  Currently, this is a no-op because GL
won't let you bind anything other than a color surface as color so it
should never end up in the depth cache.  However, this does complete the
flush/add_bo pair for regular drawing which will be required for the
next commit.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>