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libreriscv.git
4 years agomake sv_analysys python2 compatible
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 18:45:08 +0000 (19:45 +0100)]
make sv_analysys python2 compatible

4 years agoadd minor 59 csv FP
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:54:03 +0000 (18:54 +0100)]
add minor 59 csv FP

4 years agoidentify FR (FP) regs
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:51:34 +0000 (18:51 +0100)]
identify FR (FP) regs

4 years agoremove -- comment
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:48:22 +0000 (18:48 +0100)]
remove -- comment

4 years agoremove -- comment
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:48:14 +0000 (18:48 +0100)]
remove -- comment

4 years agoadd minor FP 63H csv
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:47:49 +0000 (18:47 +0100)]
add minor FP 63H csv

4 years agoadd minor 63L FP csv file
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:44:49 +0000 (18:44 +0100)]
add minor 63L FP csv file

4 years agorlwnm moved to different category
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:38:15 +0000 (18:38 +0100)]
rlwnm moved to different category

4 years agorlwnm in wrong category (missing CR0)
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:37:47 +0000 (18:37 +0100)]
rlwnm in wrong category (missing CR0)

4 years agoremove rc and lk columns
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:34:47 +0000 (18:34 +0100)]
remove rc and lk columns

4 years agoadd TODO comments
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 17:33:00 +0000 (18:33 +0100)]
add TODO comments

4 years agorow sorting
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 15:10:13 +0000 (16:10 +0100)]
row sorting

4 years agorlwimi/nm alter CR0
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 15:08:41 +0000 (16:08 +0100)]
rlwimi/nm alter CR0

4 years agoadd but skip SPR elimination
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:56:31 +0000 (15:56 +0100)]
add but skip SPR elimination

4 years agosort keys
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:49:05 +0000 (15:49 +0100)]
sort keys

4 years agoremove 1st col
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:47:44 +0000 (15:47 +0100)]
remove 1st col

4 years agoredo as tables
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:47:03 +0000 (15:47 +0100)]
redo as tables

4 years agoadd Form, ordered set
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:45:38 +0000 (15:45 +0100)]
add Form, ordered set

4 years agotable plugin
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:43:00 +0000 (15:43 +0100)]
table plugin

4 years agotable plugin
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:42:28 +0000 (15:42 +0100)]
table plugin

4 years agotable plugin
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:41:48 +0000 (15:41 +0100)]
table plugin

4 years agotable plugin
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:41:05 +0000 (15:41 +0100)]
table plugin

4 years agotable format of keys
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:39:13 +0000 (15:39 +0100)]
table format of keys

4 years agoauto-generated opcode groups for SV
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:35:26 +0000 (15:35 +0100)]
auto-generated opcode groups for SV

4 years agosv isatable prefix analyser
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Luke Kenneth Casson Leighton [Wed, 7 Oct 2020 14:34:06 +0000 (15:34 +0100)]
sv isatable prefix analyser

4 years ago(no commit message)
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lkcl [Wed, 7 Oct 2020 13:35:35 +0000 (14:35 +0100)]

4 years ago(no commit message)
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lkcl [Wed, 7 Oct 2020 13:18:56 +0000 (14:18 +0100)]

4 years agofix div spec
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Jacob Lifshay [Wed, 7 Oct 2020 03:58:20 +0000 (20:58 -0700)]
fix div spec

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 7 Oct 2020 01:27:34 +0000 (02:27 +0100)]

4 years agoupdate csv column order to have opcode at beginning instead of end
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Cole Poirier [Wed, 7 Oct 2020 01:18:32 +0000 (18:18 -0700)]
update csv column order to have opcode at beginning instead of end

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 7 Oct 2020 01:15:41 +0000 (02:15 +0100)]

4 years agonew deduped csv, should compare results with lkcl's
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Cole Poirier [Wed, 7 Oct 2020 01:14:05 +0000 (18:14 -0700)]
new deduped csv, should compare results with lkcl's

4 years agoremove carry columns
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:25:15 +0000 (00:25 +0100)]
remove carry columns

4 years agoremove carry columns
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:24:35 +0000 (00:24 +0100)]
remove carry columns

4 years agoremove carry columns
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:22:59 +0000 (00:22 +0100)]
remove carry columns

4 years agoremove carry columns
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:21:36 +0000 (00:21 +0100)]
remove carry columns

4 years agoremove SPR
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:19:39 +0000 (00:19 +0100)]
remove SPR

4 years agoremove SPR
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:18:06 +0000 (00:18 +0100)]
remove SPR

4 years agodedupe opcodes
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 23:17:29 +0000 (00:17 +0100)]
dedupe opcodes

4 years agouniquify opcodes
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 21:47:12 +0000 (22:47 +0100)]
uniquify opcodes

4 years agouniquify opcodes
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 21:41:47 +0000 (22:41 +0100)]
uniquify opcodes

4 years agouniquify opcodes
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 21:38:54 +0000 (22:38 +0100)]
uniquify opcodes

4 years agouniquify opcodes
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 21:23:39 +0000 (22:23 +0100)]
uniquify opcodes

4 years agouniquify opcodes
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 21:13:23 +0000 (22:13 +0100)]
uniquify opcodes

4 years agoadd dvi
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Luke Kenneth Casson Leighton [Tue, 6 Oct 2020 21:10:13 +0000 (22:10 +0100)]
add dvi

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 6 Oct 2020 20:36:52 +0000 (21:36 +0100)]

4 years agoadd csv of deduplicated opcodes/registers
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Cole Poirier [Tue, 6 Oct 2020 20:29:53 +0000 (13:29 -0700)]
add csv of deduplicated opcodes/registers

4 years agoworking on fixing divde
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Jacob Lifshay [Tue, 6 Oct 2020 02:51:40 +0000 (19:51 -0700)]
working on fixing divde

4 years agofix moduw spec
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Jacob Lifshay [Tue, 6 Oct 2020 02:12:55 +0000 (19:12 -0700)]
fix moduw spec

4 years agofix modsw spec
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Jacob Lifshay [Tue, 6 Oct 2020 01:54:13 +0000 (18:54 -0700)]
fix modsw spec

4 years agofix divweu bug
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Jacob Lifshay [Tue, 6 Oct 2020 01:00:50 +0000 (18:00 -0700)]
fix divweu bug

4 years ago(no commit message)
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lkcl [Mon, 5 Oct 2020 15:20:45 +0000 (16:20 +0100)]

4 years ago(no commit message)
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lkcl [Mon, 5 Oct 2020 11:58:57 +0000 (12:58 +0100)]

4 years ago(no commit message)
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lkcl [Mon, 5 Oct 2020 11:57:41 +0000 (12:57 +0100)]

4 years agoworking on fixing divwe. spec bugs
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Jacob Lifshay [Sat, 3 Oct 2020 01:01:56 +0000 (18:01 -0700)]
working on fixing divwe. spec bugs

4 years ago(no commit message)
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lkcl [Fri, 2 Oct 2020 21:43:33 +0000 (22:43 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Thu, 1 Oct 2020 22:01:08 +0000 (23:01 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Thu, 1 Oct 2020 21:59:14 +0000 (22:59 +0100)]

4 years agoadd openpower linkedin post
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Luke Kenneth Casson Leighton [Thu, 1 Oct 2020 21:49:26 +0000 (22:49 +0100)]
add openpower linkedin post

4 years agoadd I2C and rename SDRAM pins
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Luke Kenneth Casson Leighton [Wed, 30 Sep 2020 21:36:31 +0000 (22:36 +0100)]
add I2C and rename SDRAM pins

4 years agoadd large (nearly completed) 180nm layout
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Luke Kenneth Casson Leighton [Wed, 30 Sep 2020 18:14:47 +0000 (19:14 +0100)]
add large (nearly completed) 180nm layout

4 years agoadd 2nd ioring ls180 iteration
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Luke Kenneth Casson Leighton [Mon, 28 Sep 2020 14:03:09 +0000 (15:03 +0100)]
add 2nd ioring ls180 iteration

4 years ago(no commit message)
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lkcl [Mon, 28 Sep 2020 11:37:27 +0000 (12:37 +0100)]

4 years agoadd corona first version of ls180
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Luke Kenneth Casson Leighton [Sun, 27 Sep 2020 22:17:24 +0000 (23:17 +0100)]
add corona first version of ls180

4 years agoAdded the GitHub repo link to the page.
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mePy2 [Sun, 27 Sep 2020 21:41:11 +0000 (22:41 +0100)]
Added the GitHub repo link to the page.

4 years agorenamed to circuitverse.mdwn
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Luke Kenneth Casson Leighton [Sun, 27 Sep 2020 15:55:09 +0000 (16:55 +0100)]
renamed to circuitverse.mdwn

4 years agoRemoved the “blahblah" section created earlier.
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mePy2 [Sun, 27 Sep 2020 15:30:09 +0000 (16:30 +0100)]
Removed the “blahblah" section created earlier.

4 years ago(no commit message)
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mePy2 [Sun, 27 Sep 2020 15:23:07 +0000 (16:23 +0100)]

4 years ago(no commit message)
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mePy2 [Sun, 27 Sep 2020 15:19:58 +0000 (16:19 +0100)]

4 years ago(no commit message)
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mePy2 [Sun, 27 Sep 2020 15:18:25 +0000 (16:18 +0100)]

4 years ago(no commit message)
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mePy2 [Sun, 27 Sep 2020 15:15:52 +0000 (16:15 +0100)]

4 years ago(no commit message)
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lkcl [Sun, 27 Sep 2020 15:02:12 +0000 (16:02 +0100)]

4 years ago(no commit message)
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lkcl [Sat, 26 Sep 2020 21:07:54 +0000 (22:07 +0100)]

4 years ago(no commit message)
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lkcl [Sat, 26 Sep 2020 21:07:03 +0000 (22:07 +0100)]

4 years agoadd descriptions to ls180 pinouts
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Luke Kenneth Casson Leighton [Fri, 25 Sep 2020 12:48:37 +0000 (13:48 +0100)]
add descriptions to ls180 pinouts

4 years agoadd ls180.mdwn auto-generated
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Luke Kenneth Casson Leighton [Fri, 25 Sep 2020 12:25:06 +0000 (13:25 +0100)]
add ls180.mdwn auto-generated

4 years agoupdate UART page
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Luke Kenneth Casson Leighton [Fri, 25 Sep 2020 12:21:48 +0000 (13:21 +0100)]
update UART page

4 years agoadd XDC2020 and OpenPOWER NA 2020
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Luke Kenneth Casson Leighton [Fri, 25 Sep 2020 10:28:01 +0000 (11:28 +0100)]
add XDC2020 and OpenPOWER NA 2020

4 years agoadd rust users discussion
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Luke Kenneth Casson Leighton [Fri, 25 Sep 2020 10:26:59 +0000 (11:26 +0100)]
add rust users discussion

4 years agoadd i2c litex gateware link
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Luke Kenneth Casson Leighton [Thu, 24 Sep 2020 23:18:36 +0000 (00:18 +0100)]
add i2c litex gateware link

4 years agoadd phoronix article
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Luke Kenneth Casson Leighton [Wed, 23 Sep 2020 21:52:21 +0000 (22:52 +0100)]
add phoronix article

4 years agowhoops pseudocode for divwe / divde checking wrong half of result
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Luke Kenneth Casson Leighton [Tue, 22 Sep 2020 10:51:20 +0000 (11:51 +0100)]
whoops pseudocode for divwe / divde checking wrong half of result
must check the *upper* half which of course is inverted numbering
in PowerISA sigh

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 22 Sep 2020 01:28:03 +0000 (02:28 +0100)]

4 years ago(no commit message)
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lkcl [Mon, 21 Sep 2020 13:57:30 +0000 (14:57 +0100)]

4 years ago(no commit message)
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lkcl [Mon, 21 Sep 2020 13:57:09 +0000 (14:57 +0100)]

4 years agoUpdate my home page with the recent new tasks
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Cesar_Strauss [Mon, 21 Sep 2020 10:04:04 +0000 (11:04 +0100)]
Update my home page with the recent new tasks

4 years agoadd flexgripplus
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Luke Kenneth Casson Leighton [Sat, 19 Sep 2020 09:43:17 +0000 (10:43 +0100)]
add flexgripplus

4 years agotidyup nlnet page, add bug links
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Luke Kenneth Casson Leighton [Fri, 18 Sep 2020 11:01:37 +0000 (12:01 +0100)]
tidyup nlnet page, add bug links

4 years agoadd xdc2020 tex
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Luke Kenneth Casson Leighton [Wed, 16 Sep 2020 15:59:27 +0000 (16:59 +0100)]
add xdc2020 tex

4 years agomove openpowerna .tex to conferences directory
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Luke Kenneth Casson Leighton [Wed, 16 Sep 2020 14:12:56 +0000 (15:12 +0100)]
move openpowerna .tex to conferences directory

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 15 Sep 2020 18:40:25 +0000 (19:40 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 15 Sep 2020 18:39:49 +0000 (19:39 +0100)]

4 years agoadd slbia tlbie opcodes and move dcbz to new MMU FU
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Luke Kenneth Casson Leighton [Tue, 15 Sep 2020 10:04:10 +0000 (11:04 +0100)]
add slbia tlbie opcodes and move dcbz to new MMU FU

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 14 Sep 2020 19:53:20 +0000 (20:53 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 14 Sep 2020 19:51:59 +0000 (20:51 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 14 Sep 2020 19:51:28 +0000 (20:51 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 14 Sep 2020 19:50:55 +0000 (20:50 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 14 Sep 2020 19:38:31 +0000 (20:38 +0100)]

4 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 14 Sep 2020 19:36:15 +0000 (20:36 +0100)]

4 years ago(no commit message)
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programmerjake [Mon, 14 Sep 2020 16:33:01 +0000 (17:33 +0100)]

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