Clifford Wolf [Sat, 24 Jan 2015 10:49:34 +0000 (11:49 +0100)]
Added #ifdef NDEBUG for log_assert()
Clifford Wolf [Sat, 24 Jan 2015 10:03:22 +0000 (11:03 +0100)]
Fixed xilinx FDSE sim model
Clifford Wolf [Fri, 23 Jan 2015 23:16:17 +0000 (00:16 +0100)]
Various equiv_* improvements
Clifford Wolf [Fri, 23 Jan 2015 23:13:27 +0000 (00:13 +0100)]
Added dict/pool.sort()
Clifford Wolf [Thu, 22 Jan 2015 20:23:01 +0000 (21:23 +0100)]
Improvements in equiv_make, equiv_induct
Clifford Wolf [Thu, 22 Jan 2015 19:45:53 +0000 (20:45 +0100)]
Improved xdot calling
Clifford Wolf [Thu, 22 Jan 2015 13:03:18 +0000 (14:03 +0100)]
Added equiv_induct
Clifford Wolf [Thu, 22 Jan 2015 12:40:26 +0000 (13:40 +0100)]
Various equiv_simple improvements
Clifford Wolf [Thu, 22 Jan 2015 11:03:15 +0000 (12:03 +0100)]
Moved equiv stuff to passes/equiv/
Clifford Wolf [Wed, 21 Jan 2015 23:59:58 +0000 (23:59 +0000)]
Progress in equiv_simple
Clifford Wolf [Wed, 21 Jan 2015 15:44:07 +0000 (16:44 +0100)]
Fixed opt_muxtree performance bug
Clifford Wolf [Tue, 20 Jan 2015 23:17:53 +0000 (23:17 +0000)]
Faster "make clean-abc"
Clifford Wolf [Tue, 20 Jan 2015 20:59:50 +0000 (20:59 +0000)]
README stuff
Clifford Wolf [Mon, 19 Jan 2015 14:08:44 +0000 (15:08 +0100)]
Added equiv_simple
Clifford Wolf [Mon, 19 Jan 2015 13:20:04 +0000 (14:20 +0100)]
Added equiv_status
Clifford Wolf [Mon, 19 Jan 2015 12:59:08 +0000 (13:59 +0100)]
Added equiv_make command
Clifford Wolf [Mon, 19 Jan 2015 10:55:05 +0000 (11:55 +0100)]
Added $equiv cell type
Clifford Wolf [Sun, 18 Jan 2015 18:47:06 +0000 (19:47 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Sun, 18 Jan 2015 18:43:54 +0000 (19:43 +0100)]
Various cleanups in xilinx techlib
Clifford Wolf [Sun, 18 Jan 2015 18:05:29 +0000 (19:05 +0100)]
Refactoring of memory_bram and xilinx brams
Clifford Wolf [Sun, 18 Jan 2015 15:39:55 +0000 (16:39 +0100)]
Merge pull request #47 from mschmoelzer/master
Add "echo-yosys-ver" and "echo-git-rev" Makefile targets.
Martin Schmölzer [Sun, 18 Jan 2015 15:09:42 +0000 (16:09 +0100)]
Add "echo-yosys-ver" and "echo-git-rev" Makefile targets.
These Makefile targets simply echo the corresponding Makefile variable,
simplifying package build scripts.
Signed-off-by: Martin Schmölzer <mschmoelzer@gmail.com>
Clifford Wolf [Sun, 18 Jan 2015 12:24:01 +0000 (13:24 +0100)]
improvements in muxtree/select_leaves test
Clifford Wolf [Sun, 18 Jan 2015 11:57:36 +0000 (12:57 +0100)]
Improvements in opt_muxtree
Clifford Wolf [Sun, 18 Jan 2015 11:13:18 +0000 (12:13 +0100)]
More opt_muxtree cleanups
Clifford Wolf [Sun, 18 Jan 2015 11:12:33 +0000 (12:12 +0100)]
Added hashlib::idict<>
Clifford Wolf [Sun, 18 Jan 2015 10:17:56 +0000 (11:17 +0100)]
Various cleanups and improvements in opt_muxtree
Clifford Wolf [Sat, 17 Jan 2015 19:47:18 +0000 (20:47 +0100)]
Added synth_xilinx -retime -flatten
Clifford Wolf [Sat, 17 Jan 2015 19:46:52 +0000 (20:46 +0100)]
Added support for memories to flatten (techmap)
Clifford Wolf [Sat, 17 Jan 2015 14:39:54 +0000 (15:39 +0100)]
Added MUXCY and XORCY support to synth_xilinx
Clifford Wolf [Sat, 17 Jan 2015 12:56:53 +0000 (13:56 +0100)]
Fixed a bug in opt_muxtree for "mux forests"
Clifford Wolf [Sat, 17 Jan 2015 11:05:19 +0000 (12:05 +0100)]
Improved opt_muxtree
Clifford Wolf [Sat, 17 Jan 2015 11:04:40 +0000 (12:04 +0100)]
Optimizing no-op cell->setPort()
Clifford Wolf [Fri, 16 Jan 2015 16:51:17 +0000 (17:51 +0100)]
Clifford Wolf [Fri, 16 Jan 2015 14:50:42 +0000 (15:50 +0100)]
Added cells.lib
Clifford Wolf [Fri, 16 Jan 2015 14:49:15 +0000 (15:49 +0100)]
Added
dff2dffe to synth_xilinx
Clifford Wolf [Fri, 16 Jan 2015 14:24:54 +0000 (15:24 +0100)]
Added more FF types to xilinx/cells.v
Clifford Wolf [Fri, 16 Jan 2015 14:11:56 +0000 (15:11 +0100)]
Fixed xilinx bram clock inverted config
Clifford Wolf [Fri, 16 Jan 2015 13:59:40 +0000 (14:59 +0100)]
Added FF cells to xilinx/cells_sim.v
Clifford Wolf [Thu, 15 Jan 2015 12:50:04 +0000 (13:50 +0100)]
Added Xilinx MUXF7 and MUXF8 support
Clifford Wolf [Thu, 15 Jan 2015 12:37:48 +0000 (13:37 +0100)]
Added "abc -lut w1:w2"
Clifford Wolf [Thu, 15 Jan 2015 12:36:57 +0000 (13:36 +0100)]
Fixed handling of foo.__TECHMAP_...
Clifford Wolf [Thu, 15 Jan 2015 12:08:19 +0000 (13:08 +0100)]
Ignoring more system task and functions
Clifford Wolf [Thu, 15 Jan 2015 11:53:12 +0000 (12:53 +0100)]
Fixed handling of "input foo; reg [0:0] foo;"
Clifford Wolf [Thu, 15 Jan 2015 11:41:52 +0000 (12:41 +0100)]
Consolidate "Blocking assignment to memory.." msgs for the same line
Clifford Wolf [Tue, 13 Jan 2015 12:20:32 +0000 (13:20 +0100)]
Various cleanups in synth_xilinx command
Clifford Wolf [Tue, 13 Jan 2015 12:20:09 +0000 (13:20 +0100)]
Re-enabled mux->and/or transform (and fixed lm32 in yosys-bigsim)
Clifford Wolf [Tue, 13 Jan 2015 11:59:29 +0000 (12:59 +0100)]
Tiny fix in vcdcd.pl
Clifford Wolf [Tue, 13 Jan 2015 11:21:27 +0000 (12:21 +0100)]
Small Makefile typo fix
Clifford Wolf [Fri, 9 Jan 2015 16:32:53 +0000 (17:32 +0100)]
Only enable code coverage counters on linux
Clifford Wolf [Thu, 8 Jan 2015 15:06:03 +0000 (16:06 +0100)]
Merge pull request #46 from utzig/master
Fixes building on a Mac using Homebrew as package manager
Fabio Utzig [Thu, 8 Jan 2015 11:58:24 +0000 (09:58 -0200)]
Enable use of homebrew's provided bison if available
Fabio Utzig [Thu, 8 Jan 2015 11:56:20 +0000 (09:56 -0200)]
Enable bison to be customized
Fabio Utzig [Thu, 8 Jan 2015 11:54:28 +0000 (09:54 -0200)]
Add homebrew's libffi paths
Fabio Utzig [Thu, 8 Jan 2015 11:52:30 +0000 (09:52 -0200)]
Add homebrew's readline paths
Clifford Wolf [Wed, 7 Jan 2015 23:23:18 +0000 (00:23 +0100)]
Added add_share_file Makefile macro
Clifford Wolf [Wed, 7 Jan 2015 23:05:11 +0000 (00:05 +0100)]
added minimalistic xilinx sim models
Clifford Wolf [Wed, 7 Jan 2015 22:25:51 +0000 (23:25 +0100)]
disabled problematic mux -> and/or transform
Clifford Wolf [Wed, 7 Jan 2015 00:59:36 +0000 (01:59 +0100)]
More Xilinx bram cleanups
Clifford Wolf [Wed, 7 Jan 2015 00:28:18 +0000 (01:28 +0100)]
Cleanups in xilinx bram descriptions
Clifford Wolf [Tue, 6 Jan 2015 22:59:53 +0000 (23:59 +0100)]
memory_bram hotfix for memories with width 1
Clifford Wolf [Tue, 6 Jan 2015 22:54:33 +0000 (23:54 +0100)]
Xilinx RAMB36/RAMB18 memory_bram support complete
Clifford Wolf [Tue, 6 Jan 2015 22:21:52 +0000 (23:21 +0100)]
Towards Xilinx bram support
Clifford Wolf [Tue, 6 Jan 2015 16:21:18 +0000 (17:21 +0100)]
small fix in xilinx/brams.v
Clifford Wolf [Tue, 6 Jan 2015 15:12:43 +0000 (16:12 +0100)]
fixed compiler warning on non-linux archs
Clifford Wolf [Tue, 6 Jan 2015 15:08:04 +0000 (16:08 +0100)]
removed old debug code
Clifford Wolf [Tue, 6 Jan 2015 15:05:00 +0000 (16:05 +0100)]
hashlib iterator fix
Clifford Wolf [Tue, 6 Jan 2015 14:46:58 +0000 (15:46 +0100)]
build fix for mxe
Clifford Wolf [Tue, 6 Jan 2015 14:26:33 +0000 (15:26 +0100)]
Towards Xilinx bram support
Clifford Wolf [Tue, 6 Jan 2015 13:37:50 +0000 (14:37 +0100)]
Various small improvements to synth_xilinx
Clifford Wolf [Tue, 6 Jan 2015 13:26:51 +0000 (14:26 +0100)]
Towards Xilinx bram support
Clifford Wolf [Tue, 6 Jan 2015 12:33:51 +0000 (13:33 +0100)]
Towards Xilinx bram support
Clifford Wolf [Mon, 5 Jan 2015 23:16:44 +0000 (00:16 +0100)]
dict<> ref vs insert bugfix
Clifford Wolf [Mon, 5 Jan 2015 12:59:04 +0000 (13:59 +0100)]
Towards Xilinx bram support
Clifford Wolf [Sun, 4 Jan 2015 13:23:30 +0000 (14:23 +0100)]
Towards Xilinx bram support
Clifford Wolf [Sun, 4 Jan 2015 12:14:30 +0000 (13:14 +0100)]
Added memory_bram "shuffle_enable" feature
Clifford Wolf [Sun, 4 Jan 2015 10:46:04 +0000 (11:46 +0100)]
Removed left over debug code from memory_bram
Clifford Wolf [Sun, 4 Jan 2015 10:45:39 +0000 (11:45 +0100)]
Fixed pattern matching in "hierarchy -generate"
Clifford Wolf [Sat, 3 Jan 2015 21:10:33 +0000 (22:10 +0100)]
Print non-errors to stdout
Clifford Wolf [Sat, 3 Jan 2015 16:40:20 +0000 (17:40 +0100)]
Added "memory -bram"
Clifford Wolf [Sat, 3 Jan 2015 16:34:05 +0000 (17:34 +0100)]
Added memory_bram 'or_next_if_better' feature
Clifford Wolf [Sat, 3 Jan 2015 11:41:46 +0000 (12:41 +0100)]
memory_bram transp support
Clifford Wolf [Sat, 3 Jan 2015 09:57:01 +0000 (10:57 +0100)]
Progress in memory_bram
Clifford Wolf [Fri, 2 Jan 2015 21:46:20 +0000 (22:46 +0100)]
Cosmetic changes in verilog output format
Clifford Wolf [Fri, 2 Jan 2015 21:45:26 +0000 (22:45 +0100)]
Added proper clkpol support to memory_bram
Clifford Wolf [Fri, 2 Jan 2015 17:54:22 +0000 (18:54 +0100)]
Fixes and improvements in bram test
Clifford Wolf [Fri, 2 Jan 2015 16:50:15 +0000 (17:50 +0100)]
Progress in bram testbench
Clifford Wolf [Fri, 2 Jan 2015 16:11:54 +0000 (17:11 +0100)]
Define YOSYS and SYNTHESIS in preproc
Clifford Wolf [Fri, 2 Jan 2015 16:11:31 +0000 (17:11 +0100)]
New $mem simlib model
Clifford Wolf [Fri, 2 Jan 2015 12:59:47 +0000 (13:59 +0100)]
Progress in memory_bram
Clifford Wolf [Thu, 1 Jan 2015 23:07:44 +0000 (00:07 +0100)]
Progress in memory_bram
Clifford Wolf [Thu, 1 Jan 2015 18:42:39 +0000 (19:42 +0100)]
Progress in bram testbench
Clifford Wolf [Thu, 1 Jan 2015 16:01:17 +0000 (17:01 +0100)]
Bram testbench (incomplete)
Clifford Wolf [Thu, 1 Jan 2015 14:32:37 +0000 (15:32 +0100)]
Progress in memory_bram
Clifford Wolf [Thu, 1 Jan 2015 11:56:01 +0000 (12:56 +0100)]
Fixed memory->start_offset handling
Clifford Wolf [Thu, 1 Jan 2015 11:17:19 +0000 (12:17 +0100)]
Progress in memory_bram
Clifford Wolf [Thu, 1 Jan 2015 10:41:52 +0000 (11:41 +0100)]
Removed SigSpec::extend_xx() api
Clifford Wolf [Wed, 31 Dec 2014 21:50:08 +0000 (22:50 +0100)]
Progress in memory_bram
Clifford Wolf [Wed, 31 Dec 2014 15:53:53 +0000 (16:53 +0100)]
Added memory_bram (not functional yet)
Clifford Wolf [Wed, 31 Dec 2014 13:52:46 +0000 (14:52 +0100)]
Added hashlib .count(key, iterator) and it1 < it2
projects / yosys.git / log