poly_int: vector_alignment_reachable_p

This patch makes vector_alignment_reachable_p cope with variable-length
vectors.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
number of units as polynomial.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256132

poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZES

This patch changes the type of current_vector_size to poly_uint64.
It also changes TARGET_AUTOVECTORIZE_VECTOR_SIZES so that it fills
in a vector of possible sizes (as poly_uint64s) instead of returning
a bitmask.  The documentation claimed that the hook didn't need to
include the default vector size (returned by preferred_simd_mode),
but that wasn't consistent with the omp-low.c usage.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.h (vector_sizes, auto_vector_sizes): New typedefs.
* target.def (autovectorize_vector_sizes): Return the vector sizes
by pointer, using vector_sizes rather than a bitmask.
* targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
* targhooks.c (default_autovectorize_vector_sizes): Likewise.
* config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
Likewise.
* config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
* config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
* config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
* config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
* omp-general.c (omp_max_vf): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (can_vec_mask_load_store_p): Likewise.
* tree-vect-loop.c (vect_analyze_loop): Likewise.
* tree-vect-slp.c (vect_slp_bb): Likewise.
* doc/tm.texi: Regenerate.
* tree-vectorizer.h (current_vector_size): Change from an unsigned int
to a poly_uint64.
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
the vector size as a poly_uint64 rather than an unsigned int.
(current_vector_size): Change from an unsigned int to a poly_uint64.
(get_vectype_for_scalar_type): Update accordingly.
* tree.h (build_truth_vector_type): Take the size and number of
units as a poly_uint64 rather than an unsigned int.
(build_vector_type): Add a temporary overload that takes
the number of units as a poly_uint64 rather than an unsigned int.
* tree.c (make_vector_type): Likewise.
(build_truth_vector_type): Take the number of units as a poly_uint64
rather than an unsigned int.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256131

poly_int: get_mask_mode

This patch makes TARGET_GET_MASK_MODE take polynomial nunits and
vector_size arguments.  The gcc_assert in default_get_mask_mode
is now handled by the exact_div call in vector_element_size.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.def (get_mask_mode): Take the number of units and length
as poly_uint64s rather than unsigned ints.
* targhooks.h (default_get_mask_mode): Update accordingly.
* targhooks.c (default_get_mask_mode): Likewise.
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
* doc/tm.texi: Regenerate.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256130

poly_int: omp_max_vf

This patch makes omp_max_vf return a polynomial vectorization factor.
We then need to be able to stash a polynomial value in
OMP_CLAUSE_SAFELEN_EXPR too:

   /* If max_vf is non-zero, then we can use only a vectorization factor
      up to the max_vf we chose.  So stick it into the safelen clause.  */

For now the cfgloop safelen is still constant though.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
* omp-general.c (omp_max_vf): Likewise.
* omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
(expand_omp_simd): Handle polynomial safelen.
* omp-low.c (omplow_simd_context): Add a default constructor.
(omplow_simd_context::max_vf): Change from int to poly_uint64.
(lower_rec_simd_input_clauses): Update accordingly.
(lower_rec_input_clauses): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256129

poly_int: vect_nunits_for_cost

This patch adds a function for getting the number of elements in
a vector for cost purposes, which is always constant.  It makes
it possible for a later patch to change GET_MODE_NUNITS and
TYPE_VECTOR_SUBPARTS to a poly_int.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* tree-vectorizer.h (vect_nunits_for_cost): New function.
* tree-vect-loop.c (vect_model_reduction_cost): Use it.
* tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
(vect_analyze_slp_cost): Likewise.
* tree-vect-stmts.c (vect_model_store_cost): Likewise.
(vect_model_load_cost): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256128

poly_int: SLP max_units

This match makes tree-vect-slp.c track the maximum number of vector
units as a poly_uint64 rather than an unsigned int.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
(vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
from an unsigned int * to a poly_uint64_pod *.
(calculate_unrolling_factor): New function.
(vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256127

poly_int: vectoriser vf and uf

This patch changes the type of the vectorisation factor and SLP
unrolling factor to poly_uint64.  This in turn required some knock-on
changes in signedness elsewhere.

Cost decisions are generally based on estimated_poly_value,
which for VF is wrapped up as vect_vf_for_cost.

The patch doesn't on its own enable variable-length vectorisation.
It just makes the minimum changes necessary for the code to build
with the new VF and UF types.  Later patches also make the
vectoriser cope with variable TYPE_VECTOR_SUBPARTS and variable
GET_MODE_NUNITS, at which point the code really does handle
variable-length vectors.

The patch also changes MAX_VECTORIZATION_FACTOR to INT_MAX,
to avoid hard-coding a particular architectural limit.

The patch includes a new test because a development version of the patch
accidentally used file print routines instead of dump_*, which would
fail with -fopt-info.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* tree-vectorizer.h (_slp_instance::unrolling_factor): Change
from an unsigned int to a poly_uint64.
(_loop_vec_info::slp_unrolling_factor): Likewise.
(_loop_vec_info::vectorization_factor): Change from an int
to a poly_uint64.
(MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
(vect_get_num_vectors): New function.
(vect_update_max_nunits, vect_vf_for_cost): Likewise.
(vect_get_num_copies): Use vect_get_num_vectors.
(vect_analyze_data_ref_dependences): Change max_vf from an int *
to an unsigned int *.
(vect_analyze_data_refs): Change min_vf from an int * to a
poly_uint64 *.
(vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
than an unsigned HOST_WIDE_INT.
* tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
(vect_analyze_data_ref_dependence): Change max_vf from an int *
to an unsigned int *.
(vect_analyze_data_ref_dependences): Likewise.
(vect_compute_data_ref_alignment): Handle polynomial vf.
(vect_enhance_data_refs_alignment): Likewise.
(vect_prune_runtime_alias_test_list): Likewise.
(vect_shift_permute_load_chain): Likewise.
(vect_supportable_dr_alignment): Likewise.
(dependence_distance_ge_vf): Take the vectorization factor as a
poly_uint64 rather than an unsigned HOST_WIDE_INT.
(vect_analyze_data_refs): Change min_vf from an int * to a
poly_uint64 *.
* tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
vfm1 as a poly_uint64 rather than an int.  Make the same change
for the returned bound_scalar.
(vect_gen_vector_loop_niters): Handle polynomial vf.
(vect_do_peeling): Likewise.  Update call to
vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
(vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
be constant.
* tree-vect-loop.c (vect_determine_vectorization_factor)
(vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
(vect_get_known_peeling_cost): Likewise.
(vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
(vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
(vect_transform_loop): Likewise.  Use the lowest possible VF when
updating the upper bounds of the loop.
(vect_min_worthwhile_factor): Make static.  Return an unsigned int
rather than an int.
* tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
polynomial unroll factors.
(vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
(vect_make_slp_decision): Likewise.
(vect_supported_load_permutation_p): Likewise, and polynomial
vf too.
(vect_analyze_slp_cost): Handle polynomial vf.
(vect_slp_analyze_node_operations): Likewise.
(vect_slp_analyze_bb_1): Likewise.
(vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
than an unsigned HOST_WIDE_INT.
* tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
(vectorizable_load): Handle polynomial vf.
* tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
a poly_uint64.
(adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.

gcc/testsuite/
* gcc.dg/vect-opt-info-1.c: New test.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256126

match.pd handling of three-constant bitops

natch.pd tries to reassociate two bit operations if both of them have
constant operands.  However, with the polynomial integers added later,
there's no guarantee that a bit operation on two integers can be folded
at compile time.  This means that the pattern can trigger for operations
on three constants, and as things stood could endlessly oscillate
between the two associations.

This patch keeps the existing pattern for the normal case of a
non-constant first operand.  When all three operands are constant it
tries to find a pair of constants that do fold.  If none do, it keeps
the original expression as-was.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* match.pd: Handle bit operations involving three constants
and try to fold one pair.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256125

Add an alternative vector loop iv mechanism

Normally we adjust the vector loop so that it iterates:

   (original number of scalar iterations - number of peels) / VF

times, enforcing this using an IV that starts at zero and increments
by one each iteration.  However, dividing by VF would be expensive
for variable VF, so this patch adds an alternative in which the IV
increments by VF each iteration instead.  We then need to take care
to handle possible overflow in the IV.

The new mechanism isn't used yet; a later patch replaces the
"if (1)" with a check for variable VF.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* tree-vect-loop-manip.c: Include gimple-fold.h.
(slpeel_make_loop_iterate_ntimes): Add step, final_iv and
niters_maybe_zero parameters.  Handle other cases besides a step of 1.
(vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
Add a path that uses a step of VF instead of 1, but disable it
for now.
(vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
and niters_no_overflow parameters.  Update calls to
slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
Create a new SSA name if the latter choses to use a ste other
than zero, and return it via niters_vector_mult_vf_var.
* tree-vect-loop.c (vect_transform_loop): Update calls to
vect_do_peeling, vect_gen_vector_loop_niters and
slpeel_make_loop_iterate_ntimes.
* tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
(vect_gen_vector_loop_niters): Update declarations after above changes.

From-SVN: r256124

Summary: Replace a few instances of 8 leading spaces with horizontal tabs.

From-SVN: r256123

config.guess: Import latest version.

* config.guess: Import latest version.
* config.sub: Likewise.

From-SVN: r256122

rs6000.md (floor<mode>2): Add support for IEEE 128-bit round to integer instructions.

[gcc]
2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
128-bit round to integer instructions.
(ceil<mode>2): Likewise.
(btrunc<mode>2): Likewise.
(round<mode>2): Likewise.

[gcc/testsuite]
2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/float128-hw2.c: Add tests for ceilf128,
floorf128, truncf128, and roundf128.
* gcc.target/powerpc/float128-hw5.c: New tests for _Float128
optimizations added in match.pd.
* gcc.target/powerpc/float128-hw6.c: Likewise.
* gcc.target/powerpc/float128-hw7.c: Likewise.
* gcc.target/powerpc/float128-hw8.c: Likewise.
* gcc.target/powerpc/float128-hw9.c: Likewise.
* gcc.target/powerpc/float128-hw10.c: Likewise.
* gcc.target/powerpc/float128-hw11.c: Likewise.

From-SVN: r256118

Daily bump.

From-SVN: r256116

rs6000-string.c (expand_block_move): Allow the use of unaligned VSX load/store on P8/P9.

2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

        * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
        unaligned VSX load/store on P8/P9.
        (expand_block_clear): Allow the use of unaligned VSX
load/store on P8/P9.

From-SVN: r256112

rs6000-p8swap.c (swap_feeds_both_load_and_store): New function.

2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
New function.
(rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
swap associated with both a load and a store.

From-SVN: r256111

RISC-V: Fix for icache flush issue on multicore processors.

gcc/
* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
* config/riscv/riscv.md (clear_cache): Use it.

From-SVN: r256109

* web.c: Remove out-of-date comment.

From-SVN: r256106

Fix REG_ARGS_SIZE handling when pushing TLS addresses

The new assert in add_args_size_note triggered for gcc.dg/tls/opt-3.c
and others on m68k.  This looks like a pre-existing bug: if we pushed
a value that needs a call to something like __tls_get_addr, we ended
up with two different REG_ARGS_SIZE notes on the same instruction.

It seems to be OK for emit_single_push_insn to push something that
needs a call to __tls_get_addr:

      /* We have to allow non-call_pop patterns for the case
 of emit_single_push_insn of a TLS address.  */
      if (GET_CODE (pat) != PARALLEL)
return 0;

so I think the bug is in the way this is handled rather than the fact
that it occurs at all.

If we're pushing a value X that needs a call C to calculate, we'll
add REG_ARGS_SIZE notes to the pushes and pops for C as part of the
call sequence.  Then emit_single_push_insn calls fixup_args_size_notes
on the whole push sequence (the calculation of X, including C,
and the push of X itself).  This is where the double notes came from.
But emit_single_push_insn_1 adjusted stack_pointer_delta *before* the
push, so the notes added for C were relative to the situation after
the future push of X rather than before it.

Presumably this didn't matter in practice because the note added
second tended to trump the note added first.  But code is allowed to
walk REG_NOTES without having to disregard secondary notes.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* expr.c (fixup_args_size_notes): Check that any existing
REG_ARGS_SIZE notes are correct, and don't try to re-add them.
(emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
(emit_single_push_insn): ...here.

From-SVN: r256105

Make CONST_VECTOR_ELT handle implicitly-encoded elements

This patch makes CONST_VECTOR_ELT handle implicitly-encoded elements,
in a similar way to VECTOR_CST_ELT.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
(const_vector_encoded_nelts): New function.
(CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
(const_vector_int_elt, const_vector_elt): Declare.
* emit-rtl.c (const_vector_int_elt_1): New function.
(const_vector_elt): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
of CONST_VECTOR_ELT.

From-SVN: r256104

Make more use of rtx_vector_builder

This patch makes various bits of CONST_VECTOR-building code use
rtx_vector_builder, operating directly on a specific encoding.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* expr.c: Include rtx-vector-builder.h.
(const_vector_mask_from_tree): Use rtx_vector_builder and operate
directly on the tree encoding.
(const_vector_from_tree): Likewise.
* optabs.c: Include rtx-vector-builder.h.
(expand_vec_perm_var): Use rtx_vector_builder and create a repeating
sequence of "u" values.
* vec-perm-indices.c: Include rtx-vector-builder.h.
(vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
directly on the vec_perm_indices encoding.

From-SVN: r256103

New CONST_VECTOR layout

This patch makes CONST_VECTOR use the same encoding as VECTOR_CST.

One problem that occurs in RTL but not at the tree level is that a fair
amount of code uses XVEC and XVECEXP directly on CONST_VECTORs (which is
valid, just with looser checking).  This is complicated by the fact that
vectors are also represented as PARALLELs in some target interfaces,
so using XVECEXP is a good polymorphic way of handling both forms.

Rather than try to untangle all that, the best approach seemed to be to
continue to encode every element in a fixed-length vector.  That way only
target-independent and AArch64 code need to be precise about using
CONST_VECTOR_ELT over XVECEXP.

After this change is no longer valid to modify CONST_VECTORs in-place.
This needed some fix-up in the powerpc backends.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* doc/rtl.texi (const_vector): Describe new encoding scheme.
* Makefile.in (OBJS): Add rtx-vector-builder.o.
* rtx-vector-builder.h: New file.
* rtx-vector-builder.c: Likewise.
* rtl.h (rtx_def::u2): Add a const_vector field.
(CONST_VECTOR_NPATTERNS): New macro.
(CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
(CONST_VECTOR_DUPLICATE_P): Likewise.
(CONST_VECTOR_STEPPED_P): Likewise.
(CONST_VECTOR_ENCODED_ELT): Likewise.
(const_vec_duplicate_p): Check for a duplicated vector encoding.
(unwrap_const_vec_duplicate): Likewise.
(const_vec_series_p): Check for a non-duplicated vector encoding.
Say that the function only returns true for integer vectors.
* emit-rtl.c: Include rtx-vector-builder.h.
(gen_const_vec_duplicate_1): Delete.
(gen_const_vector): Call gen_const_vec_duplicate instead of
gen_const_vec_duplicate_1.
(const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
(gen_const_vec_duplicate): Use rtx_vector_builder.
(gen_const_vec_series): Likewise.
(gen_rtx_CONST_VECTOR): Likewise.
* config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
(swap_const_vector_halves): Take an rtx pointer rather than rtx.
Build a new vector rather than modifying a CONST_VECTOR in-place.
(handle_special_swappables): Update call accordingly.
* config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
(swap_const_vector_halves): Take an rtx pointer rather than rtx.
Build a new vector rather than modifying a CONST_VECTOR in-place.
(handle_special_swappables): Update call accordingly.

From-SVN: r256102

Use CONST_VECTOR_ELT instead of XVECEXP

This patch replaces target-independent uses of XVECEXP with uses
of CONST_VECTOR_ELT.  This kind of replacement isn't necessary
for code specific to targets other than AArch64.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* simplify-rtx.c (simplify_const_binary_operation): Use
CONST_VECTOR_ELT instead of XVECEXP.

From-SVN: r256101

Use ssizetype selectors for autovectorised VEC_PERM_EXPRs

The previous patches mean that there's no reason that constant
VEC_PERM_EXPRs need to have the same shape as the data inputs.
This patch makes the autovectoriser use sizetype elements instead,
so that indices don't get truncated for large or variable-length
vectors.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
the selector elements to be different from the data elements
if the selector is a VECTOR_CST.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
ssizetype for the selector.

From-SVN: r256100

Use vec_perm_builder::series_p in shift_amt_for_vec_perm_mask

This patch makes shift_amt_for_vec_perm_mask use series_p to check
for the simple case of a natural linear series before falling back
to testing each element individually.  The series_p test works with
variable-length vectors but testing every individual element doesn't.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
before testing each element individually.
* tree-vect-generic.c (lower_vec_perm): Likewise.

From-SVN: r256099

Rework VEC_PERM_EXPR folding

This patch reworks the VEC_PERM_EXPR folding so that more of it
works for variable-length vectors.  E.g. it means that we can
now recognise variable-length permutes that reduce to a single
vector, or cases in which a variable-length permute only needs
one input.  There should be no functional change for fixed-length
vectors.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* selftest.h (selftest::vec_perm_indices_c_tests): Declare.
* selftest-run-tests.c (selftest::run_tests): Call it.
* vector-builder.h (vector_builder::operator ==): New function.
(vector_builder::operator !=): Likewise.
* vec-perm-indices.h (vec_perm_indices::series_p): Declare.
(vec_perm_indices::all_from_input_p): New function.
* vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
(test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
* fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
instead of reading the VECTOR_CST directly.  Detect whether both
vector inputs are the same before constructing the vec_perm_indices,
and update the number of inputs argument accordingly.  Use the
utility functions added above.  Only construct sel2 if we need to.

From-SVN: r256098

Use explicit encodings for simple permutes

This patch makes users of vec_perm_builders use the compressed encoding
where possible.  This means that they work with variable-length vectors.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs.c (expand_vec_perm_var): Use an explicit encoding for
the broadcast of the low byte.
(expand_mult_highpart): Use an explicit encoding for the permutes.
* optabs-query.c (can_mult_highpart_p): Likewise.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(vectorizable_bswap): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Use an
explicit encoding for the power-of-2 permutes.
(vect_permute_store_chain): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_permute_load_chain): Likewise.

From-SVN: r256097

Add a vec_perm_indices_to_tree helper function

This patch adds a function for creating a VECTOR_CST from a
vec_perm_indices, operating directly on the encoding.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
* vec-perm-indices.c (vec_perm_indices_to_tree): New function.
* tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (vectorizable_bswap): Likewise.
(vect_gen_perm_mask_any): Likewise.

From-SVN: r256096

Make vec_perm_indices use new vector encoding

This patch changes vec_perm_indices from a plain vec<> to a class
that stores a canonicalized permutation, using the same encoding
as for VECTOR_CSTs.  This means that vec_perm_indices now carries
information about the number of vectors being permuted (currently
always 1 or 2) and the number of elements in each input vector.

A new vec_perm_builder class is used to actually build up the vector,
like tree_vector_builder does for trees.  vec_perm_indices is the
completed representation, a bit like VECTOR_CST is for trees.

The patch just does a mechanical conversion of the code to
vec_perm_builder: a later patch uses explicit encodings where possible.

The point of all this is that it makes the representation suitable
for variable-length vectors.  It's no longer necessary for the
underlying vec<>s to store every element explicitly.

In int-vector-builder.h, "using the same encoding as tree and rtx constants"
describes the endpoint -- adding the rtx encoding comes later.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* int-vector-builder.h: New file.
* vec-perm-indices.h: Include int-vector-builder.h.
(vec_perm_indices): Redefine as an int_vector_builder.
(auto_vec_perm_indices): Delete.
(vec_perm_builder): Redefine as a stand-alone class.
(vec_perm_indices::vec_perm_indices): New function.
(vec_perm_indices::clamp): Likewise.
* vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
(vec_perm_indices::new_vector): New function.
(vec_perm_indices::new_expanded_vector): Update for new
vec_perm_indices class.
(vec_perm_indices::rotate_inputs): New function.
(vec_perm_indices::all_in_range_p): Operate directly on the
encoded form, without computing elided elements.
(tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
encoding.  Update for new vec_perm_indices class.
* optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
the given vec_perm_builder.
(expand_vec_perm_var): Update vec_perm_builder constructor.
(expand_mult_highpart): Use vec_perm_builder instead of
auto_vec_perm_indices.
* optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices.  Use a single
or double series encoding as appropriate.
* fold-const.c (fold_ternary_loc): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_permute_store_chain): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_permute_load_chain): Likewise.
(vect_shift_permute_load_chain): Likewise.
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(vectorizable_mask_load_store): Likewise.
(vectorizable_bswap): Likewise.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
* tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices.  Use
tree_to_vec_perm_builder to read the vector from a tree.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
vec_perm_builder instead of a vec_perm_indices.
(have_whole_vector_shift): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices.  Leave the
truncation to calc_vec_perm_mask_for_shift.
(vect_create_epilog_for_reduction): Likewise.
* config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
from auto_vec_perm_indices to vec_perm_indices.
(aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
instead of changing individual elements.
(aarch64_vectorize_vec_perm_const): Use new_vector to install
the vector in d.perm.
* config/arm/arm.c (expand_vec_perm_d::perm): Change
from auto_vec_perm_indices to vec_perm_indices.
(arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
instead of changing individual elements.
(arm_vectorize_vec_perm_const): Use new_vector to install
the vector in d.perm.
* config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
Update vec_perm_builder constructor.
(rs6000_expand_interleave): Likewise.
* config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
(rs6000_expand_interleave): Likewise.

From-SVN: r256095

Check whether a vector of QIs can store all indices

The patch to remove the vec_perm_const optab checked whether replacing
a constant permute with a variable permute is safe, or whether it might
truncate the indices.  This patch adds a corresponding check for whether
variable permutes can be lowered to QImode-based permutes.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs-query.c (can_vec_perm_var_p): Check whether lowering
to qimode could truncate the indices.
* optabs.c (expand_vec_perm_var): Likewise.

From-SVN: r256094

Remove vec_perm_const optab

One of the changes needed for variable-length VEC_PERM_EXPRs -- and for
long fixed-length VEC_PERM_EXPRs -- is the ability to use constant
selectors that wouldn't fit in the vectors being permuted.  E.g. a
permute on two V256QIs can't be done using a V256QI selector.

At the moment constant permutes use two interfaces:
targetm.vectorizer.vec_perm_const_ok for testing whether a permute is
valid and the vec_perm_const optab for actually emitting the permute.
The former gets passed a vec<> selector and the latter an rtx selector.
Most ports share a lot of code between the hook and the optab, with a
wrapper function for each interface.

We could try to keep that interface and require ports to define wider
vector modes that could be attached to the CONST_VECTOR (e.g. V256HI or
V256SI in the example above).  But building a CONST_VECTOR rtx seems a bit
pointless here, since the expand code only creates the CONST_VECTOR in
order to call the optab, and the first thing the target does is take
the CONST_VECTOR apart again.

The easiest approach therefore seemed to be to remove the optab and
reuse the target hook to emit the code.  One potential drawback is that
it's no longer possible to use match_operand predicates to force
operands into the required form, but in practice all targets want
register operands anyway.

The patch also changes vec_perm_indices into a class that provides
some simple routines for handling permutations.  A later patch will
flesh this out and get rid of auto_vec_perm_indices, but I didn't
want to do all that in this patch and make it more complicated than
it already is.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* Makefile.in (OBJS): Add vec-perm-indices.o.
* vec-perm-indices.h: New file.
* vec-perm-indices.c: Likewise.
* target.h (vec_perm_indices): Replace with a forward class
declaration.
(auto_vec_perm_indices): Move to vec-perm-indices.h.
* optabs.h: Include vec-perm-indices.h.
(expand_vec_perm): Delete.
(selector_fits_mode_p, expand_vec_perm_var): Declare.
(expand_vec_perm_const): Declare.
* target.def (vec_perm_const_ok): Replace with...
(vec_perm_const): ...this new hook.
* doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
(TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
* doc/tm.texi: Regenerate.
* optabs.def (vec_perm_const): Delete.
* doc/md.texi (vec_perm_const): Likewise.
(vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
* expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
expand_vec_perm for constant permutation vectors.  Assert that
the mode of variable permutation vectors is the integer equivalent
of the mode that is being permuted.
* optabs-query.h (selector_fits_mode_p): Declare.
* optabs-query.c: Include vec-perm-indices.h.
(selector_fits_mode_p): New function.
(can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
is defined, instead of checking whether the vec_perm_const_optab
exists.  Use targetm.vectorize.vec_perm_const instead of
targetm.vectorize.vec_perm_const_ok.  Check whether the indices
fit in the vector mode before using a variable permute.
* optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
vec_perm_indices instead of an rtx.
(expand_vec_perm): Replace with...
(expand_vec_perm_const): ...this new function.  Take the selector
as a vec_perm_indices rather than an rtx.  Also take the mode of
the selector.  Update call to shift_amt_for_vec_perm_mask.
Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
Use vec_perm_indices::new_expanded_vector to expand the original
selector into bytes.  Check whether the indices fit in the vector
mode before using a variable permute.
(expand_vec_perm_var): Make global.
(expand_mult_highpart): Use expand_vec_perm_const.
* fold-const.c: Includes vec-perm-indices.h.
* tree-ssa-forwprop.c: Likewise.
* tree-vect-data-refs.c: Likewise.
* tree-vect-generic.c: Likewise.
* tree-vect-loop.c: Likewise.
* tree-vect-slp.c: Likewise.
* tree-vect-stmts.c: Likewise.
* config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
Delete.
* config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
* config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
(aarch64_vectorize_vec_perm_const_ok): Fuse into...
(aarch64_vectorize_vec_perm_const): ...this new function.
(TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
* config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
* config/arm/vec-common.md (vec_perm_const<mode>): Delete.
* config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
(arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
into...
(arm_vectorize_vec_perm_const): ...this new function.  Explicitly
check for NEON modes.
* config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
* config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
* config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
(ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
into...
(ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
the old VEC_PERM_CONST conditions.
* config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
* config/ia64/vect.md (vec_perm_const<mode>): Delete.
* config/ia64/ia64.c (ia64_expand_vec_perm_const)
(ia64_vectorize_vec_perm_const_ok): Merge into...
(ia64_vectorize_vec_perm_const): ...this new function.
* config/mips/loongson.md (vec_perm_const<mode>): Delete.
* config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
* config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
* config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
* config/mips/mips.c (mips_expand_vec_perm_const)
(mips_vectorize_vec_perm_const_ok): Merge into...
(mips_vectorize_vec_perm_const): ...this new function.
* config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
* config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
* config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
* config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
* config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
(rs6000_expand_vec_perm_const): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
(altivec_expand_vec_perm_const_le): Take each operand individually.
Operate on constant selectors rather than rtxes.
(altivec_expand_vec_perm_const): Likewise.  Update call to
altivec_expand_vec_perm_const_le.
(rs6000_expand_vec_perm_const): Delete.
(rs6000_vectorize_vec_perm_const_ok): Delete.
(rs6000_vectorize_vec_perm_const): New function.
(rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
an element count and rtx array.
(rs6000_expand_extract_even): Update call accordingly.
(rs6000_expand_interleave): Likewise.
* config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
* config/rs6000/paired.md (vec_perm_constv2sf): Delete.
* config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
* config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
(rs6000_expand_vec_perm_const): Delete.
* config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
(altivec_expand_vec_perm_const_le): Take each operand individually.
Operate on constant selectors rather than rtxes.
(altivec_expand_vec_perm_const): Likewise.  Update call to
altivec_expand_vec_perm_const_le.
(rs6000_expand_vec_perm_const): Delete.
(rs6000_vectorize_vec_perm_const_ok): Delete.
(rs6000_vectorize_vec_perm_const): New function.  Remove stray
reference to the SPE evmerge intructions.
(rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
an element count and rtx array.
(rs6000_expand_extract_even): Update call accordingly.
(rs6000_expand_interleave): Likewise.
* config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
new function.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.

From-SVN: r256093

Refactor expand_vec_perm

This patch splits the variable handling out of expand_vec_perm into
a subroutine, so that the next patch can use a different interface
for expanding constant permutes.  expand_vec_perm now does all the
CONST_VECTOR handling directly and defers to expand_vec_perm_var
for other rtx codes.  Handling CONST_VECTORs includes handling the
fallback to variable permutes.

The patch also adds an assert for valid optab modes to expand_vec_perm_1,
so that we get it when using optabs for CONST_VECTORs.  The MODE_VECTOR_INT
part was previously in expand_vec_perm and the mode_for_int_vector part
is new.

Most of the patch is just reindentation.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs.c (expand_vec_perm_1): Assert that SEL has an integer
vector mode and that that mode matches the mode of the data
being permuted.
(expand_vec_perm): Split handling of non-CONST_VECTOR selectors
out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
directly using expand_vec_perm_1 when forcing selectors into
registers.
(expand_vec_perm_var): New function, split out from expand_vec_perm.

From-SVN: r256092

Split can_vec_perm_p into can_vec_perm_{var,const}_p

This patch splits can_vec_perm_p into two functions: can_vec_perm_var_p
for testing permute operations with variable selection vectors, and
can_vec_perm_const_p for testing permute operations with specific
constant selection vectors.  This means that we can pass the constant
selection vector by reference.

Constant permutes can still use a variable permute as a fallback.
A later patch adds a check to makre sure that we don't truncate the
vector indices when doing this.

However, have_whole_vector_shift checked:

  if (direct_optab_handler (vec_perm_const_optab, mode) == CODE_FOR_nothing)
    return false;

which had the effect of disallowing the fallback to variable permutes.
I'm not sure whether that was the intention or whether it was just
supposed to short-cut the loop on targets that don't support permutes.
(But then why bother?  The first check in the loop would fail and
we'd bail out straightaway.)

The patch adds a parameter for disallowing the fallback.  I think it
makes sense to do this for the following code in the VEC_PERM_EXPR
folder:

  /* Some targets are deficient and fail to expand a single
     argument permutation while still allowing an equivalent
     2-argument version.  */
  if (need_mask_canon && arg2 == op2
      && !can_vec_perm_p (TYPE_MODE (type), false, &sel)
      && can_vec_perm_p (TYPE_MODE (type), false, &sel2))

since it's really testing whether the expand_vec_perm_const code expects
a particular form.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs-query.h (can_vec_perm_p): Delete.
(can_vec_perm_var_p, can_vec_perm_const_p): Declare.
* optabs-query.c (can_vec_perm_p): Split into...
(can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
(can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
particular selector is valid.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_shift_permute_load_chain): Likewise.
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
(vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(vectorizable_bswap): Likewise.
(vect_gen_perm_mask_checked): Likewise.
* fold-const.c (fold_ternary_loc): Likewise.  Don't take
implementations of variable permutation vectors into account
when deciding which selector to use.
* tree-vect-loop.c (have_whole_vector_shift): Don't check whether
vec_perm_const_optab is supported; instead use can_vec_perm_const_p
with a false third argument.
* tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
to test whether the constant selector is valid and can_vec_perm_var_p
to test whether a variable selector is valid.

From-SVN: r256091

Pass vec_perm_indices by reference

This patch makes functions take vec_perm_indices by reference rather
than value, since a later patch will turn vec_perm_indices into a class
that would be more expensive to copy.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
* optabs-query.c (can_vec_perm_p): Likewise.
* fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
instead of vec_perm_indices.
* tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
(vect_gen_perm_mask_checked): Likewise,
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
(vect_gen_perm_mask_checked): Likewise,

From-SVN: r256090

The vec_perm code falls back to doing byte-level permutes if element-level permutes aren't supported.

qimode_for_vec_perm

The vec_perm code falls back to doing byte-level permutes if
element-level permutes aren't supported.  There were two copies
of the code to calculate the mode, and later patches add another,
so this patch splits it out into a helper function.

2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* optabs-query.h (qimode_for_vec_perm): Declare.
* optabs-query.c (can_vec_perm_p): Split out qimode search to...
(qimode_for_vec_perm): ...this new function.
* optabs.c (expand_vec_perm): Use qimode_for_vec_perm.

From-SVN: r256089

re PR fortran/45689 ([F03] Missing transformational intrinsic in the trans_func_f2003 list)

2017-01-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/45689
* intrinsic.c (add_function): Add gfc_simplify_maxloc and
gfc_simplify_minloc to maxloc and minloc, respectively.
* intrinsic.h: Add prototypes for gfc_simplify_minloc
and gfc_simplify_maxloc.
* simplify.c (min_max_chose): Adjust prototype.  Modify function
to have a return value which indicates if the extremum was found.
(is_constant_array_expr): Fix typo in comment.
(simplify_minmaxloc_to_scalar): New function.
(simplify_minmaxloc_nodim): New function.
(new_array): New function.
(simplify_minmaxloc_to_array): New function.
(gfc_simplify_minmaxloc): New function.
(simplify_minloc): New function.
(simplify_maxloc): New function.

2017-01-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/45689
* gfortran.dg/minloc_4.f90: New test case.
* gfortran.dg/maxloc_4.f90: New test case.

From-SVN: r256088

re PR c++/83556 (ICE in gimplify_expr, at gimplify.c:12004)

PR c++/83556
* tree.c (replace_placeholders_r): Pass NULL as last argument to
cp_walk_tree instead of d->pset.  If non-TREE_CONSTANT and
non-PLACEHOLDER_EXPR tree has been seen already, set *walk_subtrees
to false and return.
(replace_placeholders): Pass NULL instead of &pset as last argument
to cp_walk_tree.

* g++.dg/cpp0x/pr83556.C: New test.

From-SVN: r256086

re PR fortran/45689 ([F03] Missing transformational intrinsic in the trans_func_f2003 list)

2018-01-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/45689
PR fortran/83650
* simplify.c (gfc_simplify_cshift): Re-implement to allow full
range of arguments.

2018-01-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/45689
PR fortran/83650
* gfortran.dg/simplify_cshift_1.f90: Correct erroneous case.
* gfortran.dg/simplify_cshift_4.f90: New test.

From-SVN: r256084

Add missing changelog entry:

2017-12-12  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

        PR target/82190
        * config/rs6000/rs6000-string.c (expand_block_compare,
        expand_strn_compare): Fix set_mem_size() calls.

From-SVN: r256083

re PR c++/83644 (ICE using type alias from recursive decltype in noexcept or return type)

PR c++/83644
* g++.dg/cpp1z/pr83644.C: New test.

From-SVN: r256082

rtlanal.c (canonicalize_condition): Return 0 if final rtx does not have a conditional at the top.

2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

        * rtlanal.c (canonicalize_condition): Return 0 if final rtx
        does not have a conditional at the top.

Forgot this changelog entry.

From-SVN: r256081

rtlanal.c (canonicalize_condition): Return 0 if final rtx does not have a conditional at the top.

        * rtlanal.c (canonicalize_condition): Return 0 if final rtx
        does not have a conditional at the top.

From-SVN: r256079

re PR c++/81860 (Call to undefined inline function involving inheriting constructors)

PR c++/81860
* g++.dg/cpp0x/inh-ctor30.C: New test.

From-SVN: r256076

[C++ PATCH] tiny code cleanup

https://gcc.gnu.org/ml/gcc-patches/2018-01/msg00041.html
* constexpr.c (cxx_bind_parameters_in_call): Remove unneeded local
lval var.

From-SVN: r256075

PR libgfortran/83649 Chunk large reads and writes

It turns out that Linux never reads or writes more than 2147479552
bytes in a single syscall. For writes this is not a problem as
libgfortran already contains a loop around write() to handle short
writes. But for reads we cannot do this, since then read will hang if
we have a short read when reading from the terminal.  Also, there are
reports that macOS fails I/O's larger than 2 GB.  Thus, to work around
these issues do large reads/writes in chunks.

The testcase from the PR

program largewr
  integer(kind=1) :: a(2_8**31+1)
  a = 0
  a(size(a, kind=8)) = 1
  open(10, file="largewr.dat", access="stream", form="unformatted")
  write (10) a
  close(10)
  a(size(a, kind=8)) = 2
  open(10, file="largewr.dat", access="stream", form="unformatted")
  read (10) a
  if (a(size(a, kind=8)) == 1) then
    print *, "All is well"
  else
    print *, "Oh no"
  end if
end program largewr

fails on trunk but works with the patch.

Regtested on x86_64-pc-linux-gnu, committed to trunk.

libgfortran/ChangeLog:

2018-01-02  Janne Blomqvist  <jb@gcc.gnu.org>

PR libgfortran/83649
* io/unix.c (MAX_CHUNK): New define.
(raw_read): For reads larger than MAX_CHUNK, loop.
(raw_write): Write no more than MAX_CHUNK bytes per iteration.

From-SVN: r256074

re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors)

PR target/81616
* config/i386/x86-tune-costs.h: Increase cost of integer load costs
for generic 4->6.

From-SVN: r256073

ipa-inline.c (big_speedup_p): Fix expression.

2018-01-02  Richard Biener  <rguenther@suse.de>

* ipa-inline.c (big_speedup_p): Fix expression.

From-SVN: r256072

add comment about why valid

From-SVN: r256071

re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors)

PR target/81616
* x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
cond_taken_branch_cost 3->4.

From-SVN: r256070

re PR lto/83452 (FAIL: gfortran.dg/save_6.f90   -O0  (test for excess errors))

2017-01-02  Richard Biener  <rguenther@suse.de>

PR lto/83452
* simple-object-elf.c (simple_object_elf_copy_lto_debug_section):
Do not use UNDEF locals for removed symbols but instead just
define them in the first prevailing section and with no name.
Use the same gnu_lto_v1 name for all removed globals we promote to
WEAK UNDEFs so hpux can use a stub to provide this symbol.  Clear
sh_info and sh_link in removed sections.

From-SVN: r256069

Daily bump.

From-SVN: r256068

re PR fortran/83076 (ICE in gfc_deallocate_scalar_with_status, at fortran/trans.c:1598)

2018-01-01  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/83076
* resolve.c (resolve_fl_derived0): Add caf_token fields for
allocatable and pointer scalars, when -fcoarray selected.
* trans-types.c (gfc_copy_dt_decls_ifequal): Copy the token
field as well as the backend_decl.
(gfc_get_derived_type): Flag GFC_FCOARRAY_LIB for module
derived types that are not vtypes. Components with caf_token
attribute are pvoid types. For a component requiring it, find
the caf_token field and have the component token field point to
its backend_decl.

PR fortran/83319
*trans-types.c (gfc_get_array_descriptor_base): Add the token
field to the descriptor even when codimen not set.

2018-01-01  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/83076
* gfortran.dg/coarray_45.f90 : New test.

PR fortran/83319
* gfortran.dg/coarray_46.f90 : New test.

From-SVN: r256065

* es.po: Update.

From-SVN: r256059

Daily bump.

From-SVN: r256058

re PR tree-optimization/83581 (ICE in expand_LOOP_VECTORIZED, at internal-fn.c:2397)

PR tree-optimization/83581
* tree-loop-distribution.c (pass_loop_distribution::execute): Return
TODO_cleanup_cfg if any changes have been made.

* gcc.dg/pr83581.c: New test.

From-SVN: r256055

re PR c/83595 (ICE: in linemap_macro_map_lookup, at libcpp/line-map.c:1008 on invalid code)

PR c/83595
* c-parser.c (c_parser_braced_init, c_parser_initelt,
c_parser_conditional_expression, c_parser_cast_expression,
c_parser_sizeof_expression, c_parser_alignof_expression,
c_parser_postfix_expression, c_parser_omp_declare_reduction,
c_parser_transaction_expression): Use set_error () method instead
of setting value member to error_mark_node.

* gcc.dg/pr83595.c: New test.

From-SVN: r256054

re PR rtl-optimization/83608 (ICE in convert_move, at expr.c:229 in GIMPLE store merging pass)

PR middle-end/83608
* expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
convert_modes if target mode has the right side, but different mode
class.

* g++.dg/opt/pr83608.C: New test.

From-SVN: r256053

re PR tree-optimization/83609 (ICE in read_complex_part at gcc/expr.c:3202)

PR middle-end/83609
* expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
last argument when extracting from CONCAT.  If either from_real or
from_imag is NULL, use expansion through memory.  If result is not
a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
the parts directly to inner mode, if even that fails, use expansion
through memory.

* gcc.dg/pr83609.c: New test.
* g++.dg/opt/pr83609.C: New test.

From-SVN: r256052

re PR middle-end/83623 (ICE: in convert_move, at expr.c:248 with -march=knl and 16bit vector bswap/rotate)

PR middle-end/83623
* expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
check for bswap in mode rather than HImode and use that in expand_unop
too.

* gcc.dg/pr83623.c: New test.

From-SVN: r256051

* gcc.target/i386/i386.exp
(check_effective_target_avx512vpopcntdqvl): New proc.
* gcc.target/i386/avx512vpopcntdqvl-vpopcntd-1.c: Use
avx512vpopcntdqvl effective target rather than avx512vpopcntdq.
* gcc.target/i386/avx512vpopcntdqvl-vpopcntq-1.c: Likewise.

From-SVN: r256050

re PR target/83536 (One 'false' too much in r255699 for mingw target (in config/i386/i386.c))

PR target/83536
* config/i386/i386.c (ix86_attribute_table): Remove excess
initializer for "shared" attribute.

From-SVN: r256049

Daily bump.

From-SVN: r256048

Prune removed funcs from offload table

2017-12-30  Tom de Vries  <tom@codesourcery.com>

PR libgomp/83046
* omp-expand.c (expand_omp_target): If in_lto_p, mark offload_funcs with
DECL_PRESERVE_P.
* lto-streamer-out.c (prune_offload_funcs): New function.  Remove
offload_funcs entries that no longer have a corresponding cgraph_node.
Mark the remaining ones as DECL_PRESERVE_P.
(output_lto): Call prune_offload_funcs.

* testsuite/libgomp.oacc-c-c++-common/pr83046.c: New test.
* testsuite/libgomp.c-c++-common/pr83046.c: New test.

From-SVN: r256045

sse.md (vgf2p8affineinvqb_<mode><mask_name>, [...]): Formatting fixes.

* config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>,
vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1, vpdpbusd_<mode>,
vpdpbusd_<mode>_mask, vpdpbusd_<mode>_maskz, vpdpbusd_<mode>_maskz_1,
vpdpbusds_<mode>, vpdpbusds_<mode>_mask, vpdpbusds_<mode>_maskz,
vpdpbusds_<mode>_maskz_1, vpdpwssd_<mode>, vpdpwssd_<mode>_mask,
vpdpwssd_<mode>_maskz, vpdpwssd_<mode>_maskz_1, vpdpwssds_<mode>,
vpdpwssds_<mode>_mask, vpdpwssds_<mode>_maskz,
vpdpwssds_<mode>_maskz_1, vaesdec_<mode>, vaesdeclast_<mode>,
vaesenc_<mode>, vpclmulqdq_<mode>,
avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Formatting fixes.

From-SVN: r256044

Fix filename in ChangeLog entry for r256042

From-SVN: r256043

Fix 'memory cannot be printed' in c-c++-common/ubsan/object-size-9.c

2017-12-30  Tom de Vries  <tom@codesourcery.com>

PR testsuite/83612
* c-c++-common/ubsan/object-size-9.c (t): Add alignment attribute.

From-SVN: r256042

Daily bump.

From-SVN: r256039

re PR libfortran/83613 (Executing gfortran.dg/inquire_internal.f90 hangs on darwin after r255621)

2017-12-29  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

        PR libgfortran/83613
        * io/unit.c (init_units): Don't forget to unlock the unit locks
        after being inserted.

From-SVN: r256035

re PR fortran/83560 (list-directed formatting of INTEGER is missing plus on output when output open with SIGN='PLUS')

2017-12-29  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

        PR libgfortran/83560
        * io/write.c (write_integer): Modify to use write_decimal.
        For namelist mode, suppress leading blanks and emit them as
        trailing blanks. Change parameter from len to kind for better
        readability. (nml_write_obj): Fix comment style.

From-SVN: r256034

re PR fortran/83567 (Parametrized derived types: Segmentation fault when assigning a function return value)

2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/83567
* trans-expr.c (gfc_trans_assignment_1): Free parameterized
components of the lhs if dealloc is set.
*trans-decl.c (gfc_trans_deferred_vars): Do not free the
parameterized components of function results on leaving scope.

2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/83567
* gfortran.dg/pdt_26.f90 : New test.

From-SVN: r256033

namedret2.C (f): Return a value.

* g++.old-deja/g++.ext/namedret2.C (f): Return a value.

From-SVN: r256032

namedret1.C (f): Return a value.

* g++.old-deja/g++.ext/namedret1.C (f): Return a value.

From-SVN: r256031

Daily bump.

From-SVN: r256030

builtins.def: (_Float<N> and _Float<N>X BUILT_IN_CEIL): Add _Float<N> and _Float<N>X variants...

[gcc]
2017-12-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

* builtins.def: (_Float<N> and _Float<N>X BUILT_IN_CEIL): Add
_Float<N> and _Float<N>X variants for rounding built-in
functions.
(_Float<N> and _Float<N>X BUILT_IN_FLOOR): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_NEARBYINT): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_RINT): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_ROUND): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_TRUNC): Likewise.
* builtins.c (mathfn_built_in_2): Likewise.
* internal-fn.def (CEIL): Likewise.
(FLOOR): Likewise.
(NEARBYINT): Likewise.
(RINT): Likewise.
(ROUND): Likewise.
(TRUNC): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
(integer_valued_real_call_p): Likewise.
* fold-const-call.c (fold_const_call_ss): Likewise.
* gencfn-macros.c (print_case_cfn): Change CFN and operator
printers to take a const char * suffix instead of a bool.
(print_define_operator_list): Likewise.
(fltall_suffixes): New list of suffixes, that include the
traditional suffixes as well as all of the _Float<N> and
_Float<N>X suffixes.
(main): For _Float<N> and _Float<N>X functions, emit both
<name>_FN and <name>_ALL variants.  The <macro>_FN variant only
has the _Float<N> and _Float<N>X case names or operators.  The
<name>_ALL variant has both the traditional and the
_Float<N>/_Float<N>X case names or operators.
* match.pd (COPYSIGN optimizations): Provide optimizations for
_Float<N> and _Float<N>X types where possible.
(MIN/MAX optimizations): Likewise.
(sqrt optimizations): Likewise.
(rounding optimizations): Likewise.

[gcc/c]
2017-12-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

* c-decl.c (header_for_builtin_fn): Add integer rounding _Float<N>
and _Float<N>X built-in functions.

From-SVN: r256026

[rs6000] Use gen_int_mode in ieee_128bit_negative_zero

Previously we'd generate a non-canonical zero-extended CONST_INT
instead of a sign-extended one, which tripped the assert for
canonical CONST_INTs after a later patch.

2017-12-28  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
gen_int_mode rather than GEN_INT.
* config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.

From-SVN: r256024

Use valid_for_const_vector_p instead of CONSTANT_P

This patch makes the VEC_SERIES code use valid_for_const_vector_p
instead of CONSTANT_P, to match what we already do for VEC_DUPLICATE.
This showed up as a failure in gcc.c-torture/execute/pr28982b.c for -m32
on x86_64-linux-gnu after later patches.

2017-12-28  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* emit-rtl.c (gen_const_vec_series): Use valid_for_const_vector_p
instead of CONSTANT_P.
(gen_vec_series): Likewise.
* simplify-rtx.c (simplify_binary_operation_1): Likewise.

From-SVN: r256023

re PR fortran/83548 (Compilation Error using logical function in parameter)

2017-12-28  Steven G. Kargl  <kargl@gcc.gnu.org>

PR Fortran/83548
* match.c (gfc_match_type_spec): Check for LOGICAL conflict in
type-spec versus LOGICAL intrinsic subprogram.

2017-12-28  Steven G. Kargl  <kargl@gcc.gnu.org>

PR Fortran/83548
* gfortran.dg/array_constructor_type_22.f03: New test.

From-SVN: r256022

PR fortran/83344 Don't set bogus constant value

This patch does not fix PR 83344, but merely fixes an error where we
used to set a constant character length value from a non-constant
expression, and thus set it to some bogus value.

As a result of this, I have commented out part of the associate_22.f90
test which otherwise generates a warning message.

Regtested on x86_64-pc-linux-gnu.

gcc/fortran/ChangeLog:

2017-12-28  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/83344
* resolve.c (resolve_assoc_var): Don't set the constant value
unless the target is a constant expression.

gcc/testsuite/ChangeLog:

2017-12-28  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/83344
* gfortran.dg/associate_22.f90: Comment out part of test.

From-SVN: r256021

m68k.md (ashrdi3_const1, [...]): Add CC_STATUS_INIT.

* config/m68k/m68k.md (ashrdi3_const1, lshrdi3_const1): Add
CC_STATUS_INIT.

From-SVN: r256020

re PR fortran/83567 (Parametrized derived types: Segmentation fault when assigning a function return value)

2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/83567
* trans-expr.c (gfc_trans_assignment_1): Free parameterized
components of the lhs if dealloc is set.
*trans-decl.c (gfc_trans_deferred_vars): Do not free the
parameterized components of function results on leaving scope.

2017-12-28  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/83567
* gfortran.dg/pdt_26.f90 : New test.

From-SVN: r256019

Daily bump.

From-SVN: r256017

PR libstdc++/83600 fix end iterator for unready std::match_results

PR libstdc++/83600
* include/bits/regex.h (match_results::end()): Return valid iterator
when not ready.
* testsuite/28_regex/match_results/ctors/char/default.cc: Check that
unready objects are empty and have equal begin and end iterators.
* testsuite/28_regex/match_results/ctors/wchar_t/default.cc: Likewise.

From-SVN: r256014

PR libstdc++/83598 don't modify flags passed to std::basic_regex constructors

PR libstdc++/83598
* include/bits/regex.h (basic_regex): Don't modify flags passed to
constructors.
* testsuite/28_regex/basic_regex/ctors/83598.cc: New test.

From-SVN: r256013

PR libstdc++/83538 fix std::match_results<T>::reference (LWG 2306)

PR libstdc++/83538
* doc/xml/manual/intro.xml: Document LWG 2306 change.
* include/bits/regex.h (match_results::reference): Change to
non-const reference.
* testsuite/28_regex/match_results/typedefs.cc: Check types are
correct.

From-SVN: r256012

2017_12_27  Louis Krupp  <louis.krupp@zoho.com>

PR fortran/83092
* expr.c (gfc_apply_init): Check that typespec has character type
before using character length field.

2017_12_27  Louis Krupp  <louis.krupp@zoho.com>

PR fortran/83092
* gfortran.dg/init_char_with_nonchar_ctr.f90: New test.

From-SVN: r256011

aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.

gcc/ChangeLog:

2017-12-27  Kugan Vivekanandarajah  <kuganv@linaro.org>

* config/aarch64/aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.
(aarch64_ld1x2<VDC:mode>): Likewise.
(aarch64_simd_ld1<mode>_x2): Likewise.
(aarch64_simd_ld1<mode>_x2): Likewise.
* config/aarch64/arm_neon.h (vld1_u8_x2): New.
(vld1_s8_x2): Likewise.
(vld1_u16_x2): Likewise.
(vld1_s16_x2): Likewise.
(vld1_u32_x2): Likewise.
(vld1_s32_x2): Likewise.
(vld1_u64_x2): Likewise.
(vld1_s64_x2): Likewise.
(vld1_f16_x2): Likewise.
(vld1_f32_x2): Likewise.
(vld1_f64_x2): Likewise.
(vld1_p8_x2): Likewise.
(vld1_p16_x2): Likewise.
(vld1_p64_x2): Likewise.
(vld1q_u8_x2): Likewise.
(vld1q_s8_x2): Likewise.
(vld1q_u16_x2): Likewise.
(vld1q_s16_x2): Likewise.
(vld1q_u32_x2): Likewise.
(vld1q_s32_x2): Likewise.
(vld1q_u64_x2): Likewise.
(vld1q_s64_x2): Likewise.
(vld1q_f16_x2): Likewise.
(vld1q_f32_x2): Likewise.
(vld1q_f64_x2): Likewise.
(vld1q_p8_x2): Likewise.
(vld1q_p16_x2): Likewise.
(vld1q_p64_x2): Likewise.

gcc/testsuite/ChangeLog:

2017-12-27  Kugan Vivekanandarajah  <kuganv@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: New test.

From-SVN: r256010

Assign result of get_string_lenth to a SSA_NAME (PR tree-optimization/83552).

2017-12-27  Martin Liska  <mliska@suse.cz>

PR tree-optimization/83552
* tree-ssa-strlen.c (fold_strstr_to_strncmp): Assign result
of get_string_lenth to a SSA_NAME if not a GIMPLE value.
2017-12-27  Martin Liska  <mliska@suse.cz>

PR tree-optimization/83552
* gcc.dg/pr83552.c: New test.

From-SVN: r256009

Workaround PR83046 in gang-static-2.c

2017-12-27  Tom de Vries  <tom@codesourcery.com>

PR c++/83046
* testsuite/libgomp.oacc-c-c++-common/gang-static-2.c (test_static)
(test_nonstatic): Fix return type to workaround PR83046.

From-SVN: r256008

Disable -gstatement-frontiers for nvptx

2017-12-27  Tom de Vries  <tom@codesourcery.com>

* config/nvptx/nvptx.c (nvptx_option_override): Disable
-gstatement-frontiers.

From-SVN: r256007

Daily bump.

From-SVN: r256006

re PR fortran/83540 (Invalid code with MATMUL, -fno-realloc-lhs -ffrontend-optimize)

2017-12-26  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/83540
* frontend-passes.c (create_var): If an array to be created
has unknown size and -fno-realloc-lhs is in effect,
return NULL.

2017-12-26  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/83540
* gfortran.dg/inline_matmul_20.f90: New test.

From-SVN: r256003

Use relative line number in unroll-5.c

2017-12-26  Tom de Vries  <tom@codesourcery.com>

* c-c++-common/unroll-5.c: Use relative line number.

From-SVN: r256002

sel-sched: fix zero-usefulness case in sel_rank_for_schedule (PR 83513)

PR rtl-optimization/83513
* sel-sched.c (sel_rank_for_schedule): Order by non-zero usefulness
before priority comparison.

From-SVN: r256001

Daily bump.

From-SVN: r256000

re PR target/83488 (ICE on a CET test-case)

PR target/83488
* config/i386/i386.opt (-mavx512vpopcntdq, -mmavx512bitalg): Move from
ix86_isa_flags2 to ix86_isa_flags.
* config/i386/i386-c.c (ix86_target_macros_internal): Test
OPTION_MASK_ISA_AVX512BITALG and OPTION_MASK_ISA_AVX512VPOPCNTDQ in
isa_flags rather than isa_flags2.
* config/i386/i386.c (ix86_target_string): Move -mavx512vpopcntdq
and -mavx512bitalg from isa2_opts to isa_opts.
(ix86_option_override_internal): Test OPTION_MASK_ISA_AVX512VPOPCNTDQ
in x_ix86_isa_flags_explicit rather than x_ix86_isa_flags2_explicit
and set it in x_ix86_isa_flags rather than x_ix86_isa_flags2.
Formatting fixes.
(def_builtin): Treat OPTION_MASK_ISA_AVX512BW or
OPTION_MASK_ISA_AVX512F ored with another option similarly to
OPTION_MASK_ISA_AVX512VL.  Even for OPTION_MASK_ISA_AVX512VL don't
clear it if mask is just OPTION_MASK_ISA_AVX512VL itself.
(ix86_expand_builtin): Don't handle OPTION_MASK_ISA_GFNI and
OPTION_MASK_ISA_VPCLMULQDQ specially, instead handle
OPTION_MASK_ISA_AVX512BW and OPTION_MASK_ISA_AVX512F that way.
* config/i386/i386-builtin.def: Move AVX512VPOPCNTDQ and AVX512BITALG
builtins from bdesc_args2 to bdesc_args section.
(__builtin_ia32_compressstoreuqi512_mask,
__builtin_ia32_compressstoreuhi512_mask,
__builtin_ia32_compressstoreuqi256_mask,
__builtin_ia32_expandloadqi512_mask,
__builtin_ia32_expandloadqi512_maskz,
__builtin_ia32_expandloadhi512_mask,
__builtin_ia32_expandloadhi512_maskz,
__builtin_ia32_compressqi512_mask, __builtin_ia32_compresshi512_mask,
__builtin_ia32_compressqi256_mask, __builtin_ia32_expandqi512_mask,
__builtin_ia32_expandqi512_maskz, __builtin_ia32_expandhi512_mask,
__builtin_ia32_expandhi512_maskz, __builtin_ia32_expandqi256_mask,
__builtin_ia32_expandqi256_maskz, __builtin_ia32_vpshrd_v32hi_mask,
__builtin_ia32_vpshld_v32hi_mask, __builtin_ia32_vpshrdv_v32hi_mask,
__builtin_ia32_vpshrdv_v32hi_maskz, __builtin_ia32_vpshldv_v32hi_mask,
__builtin_ia32_vpshldv_v32hi_maskz,
__builtin_ia32_vpopcountb_v64qi_mask,
__builtin_ia32_vpopcountw_v32hi_mask,
__builtin_ia32_vpshufbitqmb512_mask,
__builtin_ia32_vpshufbitqmb256_mask): Add
" | OPTION_MASK_ISA_AVX512BW".
(__builtin_ia32_expandloadqi256_mask,
__builtin_ia32_expandloadqi256_maskz,
__builtin_ia32_vpopcountb_v32qi_mask): Add
" | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW".
(__builtin_ia32_expandloadhi256_mask,
__builtin_ia32_expandloadhi256_maskz,
__builtin_ia32_expandloadqi128_mask,
__builtin_ia32_expandloadqi128_maskz,
__builtin_ia32_expandloadhi128_mask,
__builtin_ia32_expandloadhi128_maskz,
__builtin_ia32_vpshrd_v16hi, __builtin_ia32_vpshrd_v16hi_mask,
__builtin_ia32_vpshrd_v8hi, __builtin_ia32_vpshrd_v8hi_mask,
__builtin_ia32_vpshrd_v8si, __builtin_ia32_vpshrd_v8si_mask,
__builtin_ia32_vpshrd_v4si, __builtin_ia32_vpshrd_v4si_mask,
__builtin_ia32_vpshrd_v4di, __builtin_ia32_vpshrd_v4di_mask,
__builtin_ia32_vpshrd_v2di, __builtin_ia32_vpshrd_v2di_mask,
__builtin_ia32_vpshld_v16hi, __builtin_ia32_vpshld_v16hi_mask,
__builtin_ia32_vpshld_v8hi, __builtin_ia32_vpshld_v8hi_mask,
__builtin_ia32_vpshld_v8si, __builtin_ia32_vpshld_v8si_mask,
__builtin_ia32_vpshld_v4si, __builtin_ia32_vpshld_v4si_mask,
__builtin_ia32_vpshld_v4di, __builtin_ia32_vpshld_v4di_mask,
__builtin_ia32_vpshld_v2di, __builtin_ia32_vpshld_v2di_mask,
__builtin_ia32_vpshrdv_v16hi, __builtin_ia32_vpshrdv_v16hi_mask,
__builtin_ia32_vpshrdv_v16hi_maskz, __builtin_ia32_vpshrdv_v8hi,
__builtin_ia32_vpshrdv_v8hi_mask, __builtin_ia32_vpshrdv_v8hi_maskz,
__builtin_ia32_vpshrdv_v8si, __builtin_ia32_vpshrdv_v8si_mask,
__builtin_ia32_vpshrdv_v8si_maskz, __builtin_ia32_vpshrdv_v4si,
__builtin_ia32_vpshrdv_v4si_mask, __builtin_ia32_vpshrdv_v4si_maskz,
__builtin_ia32_vpshrdv_v4di, __builtin_ia32_vpshrdv_v4di_mask,
__builtin_ia32_vpshrdv_v4di_maskz, __builtin_ia32_vpshrdv_v2di,
__builtin_ia32_vpshrdv_v2di_mask, __builtin_ia32_vpshrdv_v2di_maskz,
__builtin_ia32_vpshldv_v16hi, __builtin_ia32_vpshldv_v16hi_mask,
__builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi,
__builtin_ia32_vpshldv_v8hi_mask, __builtin_ia32_vpshldv_v8hi_maskz,
__builtin_ia32_vpshldv_v8si, __builtin_ia32_vpshldv_v8si_mask,
__builtin_ia32_vpshldv_v8si_maskz, __builtin_ia32_vpshldv_v4si,
__builtin_ia32_vpshldv_v4si_mask, __builtin_ia32_vpshldv_v4si_maskz,
__builtin_ia32_vpshldv_v4di, __builtin_ia32_vpshldv_v4di_mask,
__builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di,
__builtin_ia32_vpshldv_v2di_mask, __builtin_ia32_vpshldv_v2di_maskz,
__builtin_ia32_vpopcountb_v32qi, __builtin_ia32_vpopcountb_v16qi,
__builtin_ia32_vpopcountb_v16qi_mask, __builtin_ia32_vpopcountw_v16hi,
__builtin_ia32_vpopcountw_v16hi_mask, __builtin_ia32_vpopcountw_v8hi,
__builtin_ia32_vpopcountw_v8hi_mask): Add
" | OPTION_MASK_ISA_AVX512VL".
* config/i386/avx512vbmi2intrin.h (_mm512_shrdi_epi16,
_mm512_shrdi_epi32, _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
_mm512_shrdi_epi64, _mm512_mask_shrdi_epi64, _mm512_maskz_shrdi_epi64,
_mm512_shldi_epi16, _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
_mm512_maskz_shldi_epi32, _mm512_shldi_epi64, _mm512_mask_shldi_epi64,
_mm512_maskz_shldi_epi64, _mm512_shrdv_epi16, _mm512_shrdv_epi32,
_mm512_mask_shrdv_epi32, _mm512_maskz_shrdv_epi32, _mm512_shrdv_epi64,
_mm512_mask_shrdv_epi64, _mm512_maskz_shrdv_epi64, _mm512_shldv_epi16,
_mm512_shldv_epi32, _mm512_mask_shldv_epi32, _mm512_maskz_shldv_epi32,
_mm512_shldv_epi64, _mm512_mask_shldv_epi64,
_mm512_maskz_shldv_epi64): Don't require avx512bw for these intrinsics.
* config/i386/avx512bitalgintrin.h (_mm_bitshuffle_epi64_mask,
_mm_mask_bitshuffle_epi64_mask): Likewise.
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET,
OPTION_MASK_ISA_AVX512BITALG_SET): Or in OPTION_MASK_ISA_AVX512F_SET.
(OPTION_MASK_ISA_AVX512F_UNSET): Or in
OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET and
OPTION_MASK_ISA_AVX512BITALG_UNSET.
(OPTION_MASK_ISA2_AVX512F_UNSET,
OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Define.
(ix86_handle_option): For -mno-general-regs-only, clear from
ix86_isa_flags2 OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET rather than
just OPTION_MASK_ISA_MPX.  For -mno-sse{,2,3,4,4.1,4.2,avx,avx2} and
-mno-ssse3 clear OPTION_MASK_ISA2_AVX512F_UNSET bits from
ix86_isa_flags2.  For -mno-avx512f likewise, instead of masking
individually listed ISAs.  For -m{,no-}avx512{vpopcntdq,bitalg} adjust
for moving from ix86_isa_flags2 to ix86_isa_flags.

From-SVN: r255997

Daily bump.

From-SVN: r255996

re PR libstdc++/83237 (Values returned by std::poisson_distribution are not distributed correctly)

2017-12-24  Michele Pezzutti <mpezz@tiscali.it>

PR libstdc++/83237
* include/bits/random.tcc (poisson_distribution<>::operator()):
Fix __x = 1 case - see updated Errata of Devroye's treatise.
* testsuite/26_numerics/random/poisson_distribution/operators/
values.cc: Add test.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
line number.

From-SVN: r255993

PR libstdc++/83450 avoid -Wreturn-type warning in test

PR libstdc++/83450
* testsuite/21_strings/basic_string/pthread18185.cc: Add return
statement.

From-SVN: r255992

Daily bump.

From-SVN: r255991

re PR c++/83553 (compiler removes body of the for-loop, although there is a case label inside)

PR c++/83553
* fold-const.c (struct contains_label_data): New type.
(contains_label_1): Return non-NULL even for CASE_LABEL_EXPR, unless
inside of a SWITCH_BODY seen during the walk.
(contains_label_p): Use walk_tree instead of
walk_tree_without_duplicates, prepare data for contains_label_1 and
provide own pset.

* c-c++-common/torture/pr83553.c: New test.

From-SVN: r255987

Daily bump.

From-SVN: r255986