Florian Weimer [Tue, 29 Sep 2020 15:28:22 +0000 (17:28 +0200)]
i386: Define __LAHF_SAHF__ and __MOVBE__ macros, based on ISA flags
gcc/
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__LAHF_SAHF__ and __MOVBE__ based on ISA flags.
Jakub Jelinek [Wed, 30 Sep 2020 11:21:04 +0000 (13:21 +0200)]
testsuite: Fix up amx* dg-do run tests with older binutils
These tests were missing dg-requires-effective-targets to ensure they
are UNSUPPORTED if the assembler doesn't have AMX support.
2020-09-30 Jakub Jelinek <jakub@redhat.com>
* gcc.target/i386/amxint8-dpbssd-2.c: Require effective targets
amx_tile and amx_int8.
* gcc.target/i386/amxint8-dpbsud-2.c: Likewise.
* gcc.target/i386/amxint8-dpbusd-2.c: Likewise.
* gcc.target/i386/amxint8-dpbuud-2.c: Likewise.
* gcc.target/i386/amxbf16-dpbf16ps-2.c: Require effective targets
amx_tile and amx_bf16.
* gcc.target/i386/amxtile-2.c: Require effective target amx_tile.
Kyrylo Tkachov [Wed, 30 Sep 2020 11:01:23 +0000 (12:01 +0100)]
PR target/97150 AArch64: 2nd parameter of unsigned Neon scalar shift intrinsics should be signed
In this PR the second argument to the intrinsics should be signed but we
use an unsigned one erroneously.
The corresponding builtins are already using the correct types so it's
just a matter of correcting the signatures in arm_neon.h
gcc/
PR target/97150
* config/aarch64/arm_neon.h (vqrshlb_u8): Make second argument
signed.
(vqrshlh_u16): Likewise.
(vqrshls_u32): Likewise.
(vqrshld_u64): Likewise.
(vqshlb_u8): Likewise.
(vqshlh_u16): Likewise.
(vqshls_u32): Likewise.
(vqshld_u64): Likewise.
(vshld_u64): Likewise.
gcc/testsuite/
PR target/97150
* gcc.target/aarch64/pr97150.c: New test.
Kyrylo Tkachov [Wed, 30 Sep 2020 11:00:20 +0000 (12:00 +0100)]
PR target/96313 AArch64: vqmovun* return types should be unsigned
In this PR we have the wrong return type for some intrinsics. It should
be unsigned, but we implement it as signed.
Fix this by adjusting the type qualifiers used when creating the
builtins and fixing the type in the arm_neon.h intrinsic.
With the adjustment in qualifiers we now don't need to cast the result
when returning.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
PR target/96313
* config/aarch64/aarch64-simd-builtins.def (sqmovun): Use UNOPUS
qualifiers.
* config/aarch64/arm_neon.h (vqmovun_s16): Adjust builtin call.
Remove unnecessary result cast.
(vqmovun_s32): Likewise.
(vqmovun_s64): Likewise.
(vqmovunh_s16): Likewise. Fix return type.
(vqmovuns_s32): Likewise.
(vqmovund_s64): Likewise.
gcc/testsuite/
PR target/96313
* gcc.target/aarch64/pr96313.c: New test.
* gcc.target/aarch64/scalar_intrinsics.c (test_vqmovunh_s16):
Adjust return type.
(test_vqmovuns_s32): Likewise.
(test_vqmovund_s64): Likewise.
Richard Sandiford [Wed, 30 Sep 2020 10:52:06 +0000 (11:52 +0100)]
aarch64: Tweak movti and movtf patterns
movti lacked an way of zeroing an FPR, meaning that we'd do:
mov x0, 0
mov x1, 0
fmov d0, x0
fmov v0.d[1], x1
instead of just:
movi v0.2d, #0
movtf had the opposite problem for GPRs: we'd generate:
movi v0.2d, #0
fmov x0, d0
fmov x1, v0.d[1]
instead of just:
mov x0, 0
mov x1, 0
Also, there was an unnecessary earlyclobber on the GPR<-GPR movtf
alternative (but not the movti one). The splitter handles overlap
correctly.
The TF splitter used aarch64_reg_or_imm, but the _imm part only
accepts integer constants, not floating-point ones. The patch
changes it to nonmemory_operand instead.
gcc/
* config/aarch64/aarch64.c (aarch64_split_128bit_move_p): Add a
function comment. Tighten check for FP moves.
* config/aarch64/aarch64.md (*movti_aarch64): Add a w<-Z alternative.
(*movtf_aarch64): Handle r<-Y like r<-r. Remove unnecessary
earlyclobber. Change splitter predicate from aarch64_reg_or_imm
to nonmemory_operand.
gcc/testsuite/
* gcc.target/aarch64/movtf_1.c: New test.
* gcc.target/aarch64/movti_1.c: Likewise.
Alex Coplan [Wed, 30 Sep 2020 08:02:47 +0000 (09:02 +0100)]
arm: Fix ICEs in no-literal-pool.c on MVE [PR97251]
This patch fixes ICEs when compiling
gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool.c with
-mfp16-format=ieee -mfloat-abi=hard -march=armv8.1-m.main+mve
-mpure-code.
The existing conditions in the movsf/movdf expanders (as well as the
no_literal_pool patterns) were too restrictive, requiring
TARGET_HARD_FLOAT instead of TARGET_VFP_BASE, which caused unrecognised
insns when compiling this testcase with integer MVE and -mpure-code.
gcc/ChangeLog:
PR target/97251
* config/arm/arm.md (movsf): Relax TARGET_HARD_FLOAT to
TARGET_VFP_BASE.
(movdf): Likewise.
* config/arm/vfp.md (no_literal_pool_df_immediate): Likewise.
(no_literal_pool_sf_immediate): Likewise.
Alan Modra [Mon, 28 Sep 2020 05:30:35 +0000 (15:00 +0930)]
gcc/configure typo fix
* configure.ac (--with-long-double-format): Typo fix.
* configure: Regenerate.
Alan Modra [Wed, 30 Sep 2020 03:04:20 +0000 (12:34 +0930)]
Re: rs6000: Use parameterized names for tablejump
* config/rs6000/rs6000.md (@tablejump<mode>_normal): Don't use
non-existent operands[].
(@tablejump<mode>_nospec): Likewise.
GCC Administrator [Wed, 30 Sep 2020 00:16:29 +0000 (00:16 +0000)]
Daily bump.
Segher Boessenkool [Mon, 28 Sep 2020 23:57:52 +0000 (23:57 +0000)]
rs6000: Use parameterized names for tablejump
We have too many tablejump patterns. Using parameterized names
simplifies the code a bit.
2020-09-29 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (tablejump): Simplify.
(tablejumpsi): Merge this ...
(tablejumpdi): ... and this ...
(@tablejump<mode>_normal): ... into this.
(tablejumpsi_nospec): Merge this ...
(tablejumpdi_nospec): ... and this ...
(@tablejump<mode>_nospec): ... into this.
(*tablejump<mode>_internal1): Delete, rename to ...
(@tablejump<mode>_insn_normal): ... this.
(*tablejump<mode>_internal1_nospec): Delete, rename to ...
(@tablejump<mode>_insn_nospec): ... this.
Martin Sebor [Tue, 29 Sep 2020 23:10:54 +0000 (17:10 -0600)]
Correct and improve -Wnonnull for calls to functions with VLA arguments (PR middle-end/97188).
Resolves:
PR middle-end/97188 - ICE passing a null VLA to a function expecting at least one element
gcc/ChangeLog:
PR middle-end/97188
* calls.c (maybe_warn_rdwr_sizes): Simplify warning messages.
Correct handling of VLA argumments.
gcc/testsuite/ChangeLog:
PR middle-end/97188
* gcc.dg/Wstringop-overflow-23.c: Adjust text of expected warnings.
* gcc.dg/Wnonnull-4.c: New test.
Marek Polacek [Thu, 24 Sep 2020 18:30:50 +0000 (14:30 -0400)]
c++: Implement -Wrange-loop-construct [PR94695]
This new warning can be used to prevent expensive copies inside range-based
for-loops, for instance:
struct S { char arr[128]; };
void fn () {
S arr[5];
for (const auto x : arr) { }
}
where auto deduces to S and then we copy the big S in every iteration.
Using "const auto &x" would not incur such a copy. With this patch the
compiler will warn:
q.C:4:19: warning: loop variable 'x' creates a copy from type 'const S' [-Wrange-loop-construct]
4 | for (const auto x : arr) { }
| ^
q.C:4:19: note: use reference type 'const S&' to prevent copying
4 | for (const auto x : arr) { }
| ^
| &
As per Clang, this warning is suppressed for trivially copyable types
whose size does not exceed 64B. The tricky part of the patch was how
to figure out if using a reference would have prevented a copy. To
that point, I'm using the new function called ref_conv_binds_directly_p.
This warning is enabled by -Wall. Further warnings of similar nature
should follow soon.
gcc/c-family/ChangeLog:
PR c++/94695
* c.opt (Wrange-loop-construct): New option.
gcc/cp/ChangeLog:
PR c++/94695
* call.c (ref_conv_binds_directly_p): New function.
* cp-tree.h (ref_conv_binds_directly_p): Declare.
* parser.c (warn_for_range_copy): New function.
(cp_convert_range_for): Call it.
gcc/ChangeLog:
PR c++/94695
* doc/invoke.texi: Document -Wrange-loop-construct.
gcc/testsuite/ChangeLog:
PR c++/94695
* g++.dg/warn/Wrange-loop-construct.C: New test.
David Edelsohn [Sun, 9 Aug 2020 18:26:44 +0000 (14:26 -0400)]
testsuite: Remove unnecessary DWARF2 xfails on AIX
A number of DWARF2 testsuite xfails no longer trigger on AIX. This patch
removes the unnecessary XFAIL decorations that cause extraneous notices
that clutter the testsuite output.
gcc/testsuite/ChangeLog:
2020-09-29 David Edelsohn <dje.gcc@gmail.com>
* g++.dg/debug/dwarf2/align-1.C: Remove AIX XFAIL.
* g++.dg/debug/dwarf2/align-2.C: Same.
* g++.dg/debug/dwarf2/align-3.C: Same.
* g++.dg/debug/dwarf2/align-4.C: Same.
* g++.dg/debug/dwarf2/align-5.C: Same.
* g++.dg/debug/dwarf2/align-6.C: Same.
* g++.dg/debug/dwarf2/defaulted-member-function-1.C: Same.
* g++.dg/debug/dwarf2/defaulted-member-function-2.C: Same.
* g++.dg/debug/dwarf2/defaulted-member-function-3.C: Same.
* g++.dg/debug/dwarf2/inline-var-1.C: Same.
* g++.dg/debug/dwarf2/inline-var-2.C: Same.
* g++.dg/debug/dwarf2/inline-var-3.C: Same.
* g++.dg/debug/dwarf2/noreturn-function.C: Same.
* g++.dg/debug/dwarf2/ptrdmem-1.C: Same.
* g++.dg/debug/dwarf2/ref-2.C: Same.
* g++.dg/debug/dwarf2/ref-3.C: Same.
* g++.dg/debug/dwarf2/ref-4.C: Same.
* g++.dg/debug/dwarf2/refqual-1.C: Same.
* g++.dg/debug/dwarf2/refqual-2.C: Same.
* gcc.dg/debug/dwarf2/align-1.c: Same.
* gcc.dg/debug/dwarf2/align-2.c: Same.
* gcc.dg/debug/dwarf2/align-3.c: Same.
* gcc.dg/debug/dwarf2/align-4.c: Same.
* gcc.dg/debug/dwarf2/align-5.c: Same.
* gcc.dg/debug/dwarf2/align-6.c: Same.
* gcc.dg/debug/dwarf2/align-as-1.c: Same.
* gcc.dg/debug/dwarf2/dwarf2-macro.c: Same.
* gcc.dg/debug/dwarf2/dwarf2-macro2.c: Same.
* gcc.dg/debug/dwarf2/lang-c89.c: Same.
* gcc.dg/debug/dwarf2/noreturn-function-attribute.c: Same.
* gcc.dg/debug/dwarf2/noreturn-function-keyword.c: Same.
* gcc.dg/debug/dwarf2/pr71855.c: Same.
* gcc.dg/debug/dwarf2/inline5.c: Add XFAIL on AIX.
David Malcolm [Tue, 29 Sep 2020 19:55:33 +0000 (15:55 -0400)]
analyzer: fix signal-handler registration location [PR95188]
PR analyzer/95188 reports that diagnostics from
-Wanalyzer-unsafe-call-within-signal-handler use the wrong
source location when reporting the signal-handler registration
event in the diagnostic_path. The diagnostics erroneously use the
location of the first stmt in the basic block containing the call
to "signal", rather than that of the call itself.
Fixed thusly.
gcc/analyzer/ChangeLog:
PR analyzer/95188
* engine.cc (stmt_requires_new_enode_p): Split enodes before
"signal" calls.
gcc/testsuite/ChangeLog:
PR analyzer/95188
* gcc.dg/analyzer/signal-registration-loc.c: New test.
Jim Wilson [Tue, 29 Sep 2020 00:13:40 +0000 (17:13 -0700)]
Fix GCC 10+ build failure with zstd version 1.2.0 or older.
Extends the configure check for zstd.h to also verify the zstd version,
since gcc requires features that only exist in 1.3.0 and newer. Without
this patch we get a build error for lto-compress.c when using an old zstd
version.
gcc/
PR bootstrap/97183
* configure.ac (gcc_cv_header_zstd_h): Check ZSTD_VERISON_NUMBER.
* configure: Regenerated.
Przemyslaw Wirkus [Tue, 29 Sep 2020 21:22:44 +0000 (22:22 +0100)]
arm: add support for Cortex-X1
This adds support for the Arm Cortex-X1 CPU. For more information about this
processor, see [0].
[0] : https://www.arm.com/products/cortex-x
gcc/ChangeLog:
* config/arm/arm-cpus.in: Add Cortex-X1 core.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Update docs.
Przemyslaw Wirkus [Tue, 29 Sep 2020 21:13:05 +0000 (22:13 +0100)]
aarch64: add support for Cortex-X1
This adds support for the Arm Cortex-X1 CPU in AArch64 GCC. For more
information about this processor, see [0].
[0] : https://www.arm.com/products/cortex-x
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def: Add Cortex-X1 Arm core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Add -mtune=cortex-x1 docs.
David Malcolm [Tue, 29 Sep 2020 15:25:13 +0000 (11:25 -0400)]
analyzer: silence -Wsign-compare warnings
gcc/analyzer/ChangeLog:
* constraint-manager.cc
(constraint_manager::add_constraint_internal): Whitespace fixes.
Silence -Wsign-compare warning.
* engine.cc (maybe_process_run_of_before_supernode_enodes):
Silence -Wsign-compare warning.
Nathan Sidwell [Tue, 29 Sep 2020 19:03:27 +0000 (12:03 -0700)]
c++: Hiddenness is a property of the symbol table
This patch moves the handling of decl-hiddenness entirely into the
name lookup machinery, where it belongs. We need a few new flags,
because pressing the existing OVL_HIDDEN_P into play for non-function
decls doesn't work well. For a local binding we only need one marker,
as there cannot be both a hidden implicit typedef and a hidden
function. That's not true for namespace-scope, where they could both
be hidden.
The name-lookup machinery maintains the existing decl_hidden and co
flags, and asserts have been sprinkled around to make sure they are
consistent. The next series of patches will remove those old markers.
(we'll need to keep one, as there are some special restrictions on
redeclaring friend functions with in-class definitions or default args.)
gcc/cp/
* cp-tree.h (ovl_insert): Change final parm to hidden-or-using
indicator.
* name-lookup.h (HIDDEN_TYPE_BINDING_P): New.
(struct cxx_binding): Add type_is_hidden flag.
* tree.c (ovl_insert): Change using_p parm to using_or_hidden,
adjust.
(ovl_skip_hidden): Assert we never see a naked hidden decl.
* decl.c (xref_tag_1): Delete unhiding friend from here (moved to
lookup_elaborated_type_1).
* name-lookup.c (STAT_TYPE_HIDDEN_P, STAT_DECL_HIDDEN_P): New.
(name_lookup::search_namespace_only): Check new hidden markers.
(cxx_binding_make): Clear HIDDEN_TYPE_BINDING_P.
(update_binding): Update new hidden markers.
(lookup_name_1): Check HIDDEN_TYPE_BINDING_P and simplify friend
ignoring.
(lookup_elaborated_type_1): Use new hidden markers. Reveal the
decl here.
H.J. Lu [Tue, 29 Sep 2020 18:40:46 +0000 (11:40 -0700)]
x86: Replace <enqcmdntrin.h> with <enqcmdintrin.h>
Fix 2 typos in config/i386/enqcmdintrin.h by replacing <enqcmdntrin.h>
with <enqcmdintrin.h>:
[hjl@gnu-cfl-2 x86-gcc]$ echo "#include <enqcmdintrin.h>" | gcc -S -o /dev/null -x c -
In file included from <stdin>:1:
/usr/lib/gcc/x86_64-redhat-linux/10/include/enqcmdintrin.h:25:3: error: #error "Never use <enqcmdntrin.h> directly; include <x86intrin.h> instead."
25 | # error "Never use <enqcmdntrin.h> directly; include <x86intrin.h> instead."
| ^~~~~
[hjl@gnu-cfl-2 x86-gcc]$
and _ENQCMDINTRIN_H_INCLUDED with _ENQCMDINTRIN_H_INCLUDED.
gcc/
PR target/97247
* config/i386/enqcmdintrin.h: Replace <enqcmdntrin.h> with
<enqcmdintrin.h>. Replace _ENQCMDNTRIN_H_INCLUDED with
_ENQCMDINTRIN_H_INCLUDED.
Nathan Sidwell [Tue, 29 Sep 2020 16:38:34 +0000 (09:38 -0700)]
c++: Name lookup simplifications
Here are a few cleanups, prior to landing the hidden decl changes.
1) Clear cxx_binding flags in the allocator, not at each user of the allocator.
2) Refactor update_binding. The logic was getting too convoluted.
3) Set friendliness and anticipatedness before pushing a template decl (not after).
gcc/cp/
* name-lookup.c (create_local_binding): Do not clear
INHERITED_VALUE_BINDING_P here.
(name_lookup::process_binding): Move done hidden-decl triage to ...
(name_lookup::search_namespace_only): ... here, its only caller.
(cxx_binding_make): Clear flags here.
(push_binding): Not here.
(pop_local_binding): RAII.
(update_binding): Refactor.
(do_pushdecl): Assert we're never revealing a local binding.
(do_pushdecl_with_scope): Directly call do_pushdecl.
(get_class_binding): Do not clear LOCAL_BINDING_P here.
* pt.c (push_template_decl): Set friend & anticipated before
pushing.
David Edelsohn [Sun, 27 Sep 2020 15:47:25 +0000 (11:47 -0400)]
testsuite: Prevent spellcheck-inttypes failures on AIX.
AIX stdio.h implicitly includes sys/types.h, which implicitly includes
inttypes.h. With a recent AIX header fixincludes change to unilaterally
define STDC Macros, the GCC testsuite uses of inttypes now fails.
This patch explicitly defines the _STD_TYPES_T macro when the test is
run on AIX so that the inttypes.h header behaves as the testcase requires.
gcc/testsuite/ChangeLog:
2020-09-29 David Edelsohn <dje.gcc@gmail.com>
* g++.dg/spellcheck-inttypes.C: Define _STD_TYPES_T on AIX.
* gcc.dg/spellcheck-inttypes.c: Same.
Nathan Sidwell [Tue, 29 Sep 2020 14:38:48 +0000 (07:38 -0700)]
c++: Identifier type value should not update binding
This simplification removes some unneeded behaviour in
set_identifier_type_value_with_scope, which was updating the namespace
binding. And causing update_binding to have to deal with meeting two
implicit typedefs. But the typedef is already there, and there's no
other way to have two such typedef's collide (we'll already have dealt
with that in lookup_elaborated_type).
So, let's kill this crufty code.
gcc/cp/
* name-lookup.c (update_binding): We never meet two implicit
typedefs.
(do_pushdecl): Adjust set_identifier_type_value_with_scope calls.
(set_identifier_type_value_with_scope): Do not update binding in
the namespace-case. Assert it is already there.
Richard Biener [Tue, 29 Sep 2020 13:02:47 +0000 (15:02 +0200)]
tree-optimization/97241 - fix ICE in reduction vectorization
The following moves an ad-hoc attempt at discovering the SLP node
for a stmt to the place where we can find it in lock-step when
we find the stmt itself.
2020-09-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/97241
* tree-vect-loop.c (vectorizable_reduction): Move finding
the SLP node for the reduction stmt to a better place.
* gcc.dg/vect/pr97241.c: New testcase.
Richard Biener [Tue, 29 Sep 2020 10:01:26 +0000 (12:01 +0200)]
move permute optimization to optimize-slp
This moves optimizing permutes of SLP reductions to vect_optimize_slp,
eliding the global slp_loads array.
2020-09-29 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_analyze_slp): Move SLP reduction
re-arrangement and SLP graph load gathering...
(vect_optimize_slp): ... here.
* tree-vectorizer.h (vec_info::slp_loads): Remove.
Hongyu Wang [Mon, 28 Sep 2020 22:22:28 +0000 (22:22 +0000)]
Add missing FSF copyright notes for x86 intrinsic headers.
gcc/ChangeLog:
PR target/97231
* config/i386/amxbf16intrin.h: Add FSF copyright notes.
* config/i386/amxint8intrin.h: Ditto.
* config/i386/amxtileintrin.h: Ditto.
* config/i386/avx512vp2intersectintrin.h: Ditto.
* config/i386/avx512vp2intersectvlintrin.h: Ditto.
* config/i386/pconfigintrin.h: Ditto.
* config/i386/tsxldtrkintrin.h: Ditto.
* config/i386/wbnoinvdintrin.h: Ditto.
Richard Biener [Tue, 29 Sep 2020 12:38:06 +0000 (14:38 +0200)]
tree-optimization/97238 - fix typo causing ICE
This fixes a typo causing a NULL dereference.
2020-09-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/97238
* tree-ssa-reassoc.c (ovce_extract_ops): Fix typo.
* gcc.dg/pr97238.c: New testcase.
Andrew Stubbs [Thu, 17 Sep 2020 11:53:39 +0000 (12:53 +0100)]
libgomp: disable barriers in nested teams
Both GCN and NVPTX allow nested parallel regions, but the barrier
implementation did not allow the nested teams to run independently of each
other (due to hardware limitations). This patch fixes that, under the
assumption that each thread will create a new subteam of one thread, by
simply not using barriers when there's no other thread to synchronise.
libgomp/ChangeLog:
* config/gcn/bar.c (gomp_barrier_wait_end): Skip the barrier if the
total number of threads is one.
(gomp_team_barrier_wake): Likewise.
(gomp_team_barrier_wait_end): Likewise.
(gomp_team_barrier_wait_cancel_end): Likewise.
* config/nvptx/bar.c (gomp_barrier_wait_end): Likewise.
(gomp_team_barrier_wake): Likewise.
(gomp_team_barrier_wait_end): Likewise.
(gomp_team_barrier_wait_cancel_end): Likewise.
* testsuite/libgomp.c-c++-common/nested-parallel-unbalanced.c: New test.
Richard Sandiford [Tue, 29 Sep 2020 10:41:26 +0000 (11:41 +0100)]
arm: Add new vector mode macros
The AArch32 port now has three vector extensions: iwMMXt, Neon
and MVE. We already have some named expanders that are shared
by all three, and soon we'll need more.
One way of handling this would be to use define_mode_iterators
that specify the condition for each mode. For example,
(V16QI "TARGET_NEON || TARGET_HAVE_MVE")
(V8QI "TARGET_NEON || TARGET_REALLY_IWMXXT")
...
(V2SF "TARGET_NEON && flag_unsafe_math_optimizations")
etc. However, we'll need several mode iterators, and it would
be repetitive to specify the mode condition every time.
This patch therefore introduces per-mode macros that say whether
we can perform general arithmetic on the mode. Initially there are
two sets of macros:
ARM_HAVE_NEON_<MODE>_ARITH
true if Neon can handle general arithmetic on <MODE>
ARM_HAVE_<MODE>_ARITH
true if any vector extension can handle general arithmetic on <MODE>
The macro definitions themselves are undeniably ugly, but hopefully
they're justified by the simplifications they allow.
The patch converts the addition patterns to use this scheme.
Previously there were three copies of the V8HF and V4HF addition
patterns for Neon:
(1) *add<VDQ:mode>3_neon, which provided plus:VnHF even without
TARGET_NEON_FP16INST. This was probably harmless since all the
named patterns had an appropriate guard, but it is possible that
something could have tried to generate the plus directly, such as
by using a REG_EQUAL note to generate a new pattern.
(2) addv8hf3_neon and addv4hf3, which had the correct
TARGET_NEON_FP16INST target condition, but unnecessarily required
flag_unsafe_math_optimizations. Unlike VnSF operations, VnHF
operations do not force flush to zero.
(3) add<VH:mode>3_fp16, which provided plus:VnHF with the
correct conditions (TARGET_NEON_FP16INST, with no
flag_unsafe_math_optimizations test).
The patch in essence renames add<VH:mode>3_fp16 to *add<VH:mode>3_neon
(part of *add<VDQ:mode>3_neon) and removes the other two patterns.
gcc/
* config/arm/arm.h (ARM_HAVE_NEON_V8QI_ARITH, ARM_HAVE_NEON_V4HI_ARITH)
(ARM_HAVE_NEON_V2SI_ARITH, ARM_HAVE_NEON_V16QI_ARITH): New macros.
(ARM_HAVE_NEON_V8HI_ARITH, ARM_HAVE_NEON_V4SI_ARITH): Likewise.
(ARM_HAVE_NEON_V2DI_ARITH, ARM_HAVE_NEON_V4HF_ARITH): Likewise.
(ARM_HAVE_NEON_V8HF_ARITH, ARM_HAVE_NEON_V2SF_ARITH): Likewise.
(ARM_HAVE_NEON_V4SF_ARITH, ARM_HAVE_V8QI_ARITH, ARM_HAVE_V4HI_ARITH)
(ARM_HAVE_V2SI_ARITH, ARM_HAVE_V16QI_ARITH, ARM_HAVE_V8HI_ARITH)
(ARM_HAVE_V4SI_ARITH, ARM_HAVE_V2DI_ARITH, ARM_HAVE_V4HF_ARITH)
(ARM_HAVE_V2SF_ARITH, ARM_HAVE_V8HF_ARITH, ARM_HAVE_V4SF_ARITH):
Likewise.
* config/arm/iterators.md (VNIM, VNINOTM): Delete.
* config/arm/vec-common.md (add<VNIM:mode>3, addv8hf3)
(add<VNINOTM:mode>3): Replace with...
(add<VDQ:mode>3): ...this new expander.
* config/arm/neon.md (*add<VDQ:mode>3_neon): Use the new
ARM_HAVE_NEON_<MODE>_ARITH macros as the C condition.
(addv8hf3_neon, addv4hf3, add<VFH:mode>3_fp16): Delete in
favor of the above.
(neon_vadd<VH:mode>): Use gen_add<mode>3 instead of
gen_add<mode>3_fp16.
gcc/testsuite/
* gcc.target/arm/armv8_2-fp16-arith-2.c: Expect FP16 vectorization
even without -ffast-math.
Kito Cheng [Fri, 25 Sep 2020 02:57:16 +0000 (10:57 +0800)]
RISC-V: Define __riscv_cmodel_medany for PIC mode.
- According the conclusion in RISC-V C API document, we decide to deprecat
the __riscv_cmodel_pic marco
- __riscv_cmodel_pic is deprecated and will removed in next GCC
release.
[1] https://github.com/riscv/riscv-c-api-doc/pull/11
gcc/ChangeLog:
* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
__riscv_cmodel_medany when PIC mode.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-3.c: Update testcase.
* gcc.target/riscv/predef-6.c: Ditto.
Alex Coplan [Mon, 28 Sep 2020 16:58:34 +0000 (17:58 +0100)]
aarch64: Fix ordering of aarch64-cores.def
This patch moves the entry for Neoverse N2 (an Armv8.5-A CPU) after
Saphira (an Armv8.4-A CPU) to preserve the overall ordering in the file.
Committing as obvious.
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def: Move neoverse-n2 after saphira.
* config/aarch64/aarch64-tune.md: Regenerate.
Martin Liska [Thu, 24 Sep 2020 11:34:13 +0000 (13:34 +0200)]
switch conversion: make a rapid speed up
gcc/ChangeLog:
PR tree-optimization/96979
* tree-switch-conversion.c (jump_table_cluster::can_be_handled):
Make a fast bail out.
(bit_test_cluster::can_be_handled): Likewise here.
* tree-switch-conversion.h (get_range): Use wi::to_wide instead
of a folding.
gcc/testsuite/ChangeLog:
PR tree-optimization/96979
* g++.dg/tree-ssa/pr96979.C: New test.
Martin Liska [Thu, 24 Sep 2020 11:34:58 +0000 (13:34 +0200)]
Revert "switch lowering: limit number of cluster attemps"
This reverts commit
c6df6039e9180c580945266302ec14047d358364.
David Edelsohn [Tue, 29 Sep 2020 00:39:36 +0000 (20:39 -0400)]
testsuite: Skip symver1 on AIX.
symver1.c only is valid on ELF targets. Add AIX to the skip list.
gcc/testsuite/ChangeLog
2020-09-28 David Edelsohn <dje.gcc@gmail.com>
* gcc.dg/ipa/symver1.c: Skip on AIX.
Maciej W. Rozycki [Tue, 29 Sep 2020 00:20:01 +0000 (01:20 +0100)]
RISC-V/libgcc: Use `-fasynchronous-unwind-tables' for LIB2_DIVMOD_FUNCS
Use `-fasynchronous-unwind-tables' rather than `-fexceptions
-fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to
provide unwind tables for the affected functions while not pulling the
unwinder proper, which is not required here.
Beyond saving program space it fixes a RISC-V glibc build error due to
unsatisfied `malloc' and `free' references from the unwinder causing
link errors with `ld.so' where libgcc has been built at -O0.
libgcc/
* config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New
variable.
GCC Administrator [Tue, 29 Sep 2020 00:16:30 +0000 (00:16 +0000)]
Daily bump.
David Malcolm [Mon, 28 Sep 2020 20:59:15 +0000 (16:59 -0400)]
analyzer: add some missing FINAL OVERRIDEs
Spotted by cppcheck.
gcc/analyzer/ChangeLog:
* region-model.h (binop_svalue::dyn_cast_binop_svalue): Remove
redundant "virtual". Add FINAL OVERRIDE.
(widening_svalue::dyn_cast_widening_svalue): Add FINAL OVERRIDE.
(compound_svalue::dyn_cast_compound_svalue): Likewise.
(conjured_svalue::dyn_cast_conjured_svalue): Likewise.
David Malcolm [Mon, 28 Sep 2020 20:53:53 +0000 (16:53 -0400)]
analyzer: remove unused field
I added this field (and the struct itself) in the rewrite of region and
value-handling (
808f4dfeb3a95f50f15e71148e5c1067f90a126d), but the field
was never used.
Found by cppcheck.
gcc/analyzer/ChangeLog:
* diagnostic-manager.cc (null_assignment_sm_context::m_visitor):
Remove unused field.
David Malcolm [Mon, 28 Sep 2020 19:42:31 +0000 (15:42 -0400)]
analyzer: fix ICE on non-pointer longjmp [PR97233]
gcc/analyzer/ChangeLog:
PR analyzer/97233
* analyzer.cc (is_longjmp_call_p): Require the initial argument
to be a pointer.
* engine.cc (exploded_node::on_longjmp): Likewise.
gcc/testsuite/ChangeLog:
PR analyzer/97233
* gcc.dg/analyzer/pr97233.c: New test.
David Malcolm [Fri, 18 Sep 2020 21:15:50 +0000 (17:15 -0400)]
analyzer: fix sm_state_map::print
In
10fc42a8396072912e9d9d940fba25950b3fdfc5 I converted state_t from
unsigned to const state *, but missed this comparison against 0.
gcc/analyzer/ChangeLog:
* program-state.cc (sm_state_map::print): Update check
for m_global_state being the start state.
Ian Lance Taylor [Sat, 26 Sep 2020 19:11:51 +0000 (12:11 -0700)]
net: add hurd build tag
Patch from Svante Signell.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/257857
Aldy Hernandez [Fri, 11 Sep 2020 08:15:12 +0000 (10:15 +0200)]
irange_allocator class
This is the irange storage class. It is used to allocate the
minimum amount of storage needed for a given irange. Storage is
automatically freed at destruction of the storage class.
It is meant for long term storage, as opposed to int_range_max
which is meant for intermediate temporary results on the stack.
The general gist is:
irange_allocator alloc;
// Allocate an irange of 5 sub-ranges.
irange *p = alloc.allocate (5);
// Allocate an irange of 3 sub-ranges.
irange *q = alloc.allocate (3);
// Allocate an irange with as many sub-ranges as are currently
// used in "some_other_range".
irange *r = alloc.allocate (some_other_range);
gcc/ChangeLog:
* value-range.h (class irange): Add irange_allocator friend.
(class irange_allocator): New.
Tobias Burnus [Mon, 28 Sep 2020 21:10:31 +0000 (23:10 +0200)]
libgfortran/m4/unpack.m4: Silence -Wmaybe-uninitialized
libgfortran/ChangeLog:
* m4/unpack.m4 (unpack0_'rtype_code`,
unpack1_'rtype_code`): Move 'rstride[0]' initialization outside
conditional branch to silence -Wmaybe-uninitialized.
* generated/unpack_c10.c: Regenerate.
* generated/unpack_c16.c: Regenerate.
* generated/unpack_c4.c: Regenerate.
* generated/unpack_c8.c: Regenerate.
* generated/unpack_i1.c: Regenerate.
* generated/unpack_i16.c: Regenerate.
* generated/unpack_i2.c: Regenerate.
* generated/unpack_i4.c: Regenerate.
* generated/unpack_i8.c: Regenerate.
* generated/unpack_r10.c: Regenerate.
* generated/unpack_r16.c: Regenerate.
* generated/unpack_r4.c: Regenerate.
* generated/unpack_r8.c: Regenerate.
Ian Lance Taylor [Mon, 28 Sep 2020 20:54:57 +0000 (13:54 -0700)]
libbacktrace: build mtest.dSYM if using dsymutil
libbacktrace/ChangeLog:
PR libbacktrace/97082
* Makefile.am (check_DATA): Add mtest.dSYM if USE_DSYMUTIL.
* Makefile.in: Regenerate.
Ian Lance Taylor [Mon, 28 Sep 2020 20:47:25 +0000 (13:47 -0700)]
libbacktrace: only run dsymutil with Mach-O
libbacktrace/ChangeLog:
PR libbacktrace/97227
* configure.ac (USE_DSYMUTIL): Define instead of HAVE_DSYMUTIL.
* Makefile.am: Change all uses of HAVE_DSYMUTIL to USE_DSYMUTIL.
* configure: Regenerate.
* Makefile.in: Regenerate.
Tobias Burnus [Mon, 28 Sep 2020 16:08:05 +0000 (18:08 +0200)]
OpenMP: Handle cpp_implicit_alias in declare-target discovery (PR96390)
gcc/ChangeLog:
PR middle-end/96390
* omp-offload.c (omp_discover_declare_target_tgt_fn_r): Handle
alias nodes.
libgomp/ChangeLog:
PR middle-end/96390
* testsuite/libgomp.c++/pr96390.C: New test.
* testsuite/libgomp.c-c++-common/pr96390.c: New test.
Patrick Palka [Mon, 28 Sep 2020 16:05:32 +0000 (12:05 -0400)]
libstdc++: Rearrange some range adaptors' data members
Since the standard range adaptors are specified to derive from the empty
class view_base, having their first data member store the underlying
view is suboptimal, for if the underlying view also derives from
view_base then the two view_base subobjects will be adjacent; this
prevents the compiler from applying the empty base optimization to elide
away the storage for these two empty bases.
This patch improves the situation by declaring the _M_base data member
last instead of first in each range adaptor that has more than one data
member, so that the empty base optimization can apply in more cases.
libstdc++-v3/ChangeLog:
* include/std/ranges (filter_view): Declare the data member
_M_base last instead of first, and adjust constructors' member
initializer lists accordingly.
(transform_view): Likewise.
(take_view): Likewise.
(take_while_view): Likewise.
(drop_view): Likewise.
(drop_while_view): Likewise.
(join_view): Likewise.
(split_view): Likewise (and tweak nearby formatting).
(reverse_view): Likewise.
* testsuite/std/ranges/adaptors/sizeof.cc: Update expected
sizes.
Patrick Palka [Mon, 28 Sep 2020 15:55:21 +0000 (11:55 -0400)]
libstdc++: Add test that tracks range adaptors' sizes
libstdc++-v3/ChangeLog:
* testsuite/std/ranges/adaptors/sizeof.cc: New test.
Patrick Palka [Mon, 28 Sep 2020 15:55:04 +0000 (11:55 -0400)]
libstdc++: Reduce the size of a subrange with empty sentinel type
libstdc++-v3/ChangeLog:
* include/bits/ranges_util.h (subrange::_M_end): Give it
[[no_unique_address]].
* testsuite/std/ranges/subrange/sizeof.cc: New test.
Patrick Palka [Mon, 28 Sep 2020 15:54:57 +0000 (11:54 -0400)]
libstdc++: Reduce the size of an unbounded iota_view
libstdc++-v3/ChangeLog:
* include/std/ranges (iota_view::_M_bound): Give it
[[no_unique_address]].
* testsuite/std/ranges/iota/iota_view.cc: Check that an
unbounded iota_view has minimal size.
Paul A. Clarke [Wed, 23 Sep 2020 21:48:21 +0000 (16:48 -0500)]
rs6000: Add tests for _mm_insert_epi{8,32,64}
Copied from gcc.target/i386.
2020-09-23 Paul A. Clarke <pc@us.ibm.com>
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/sse4_1-pinsrb.c: New test.
* gcc.target/powerpc/sse4_1-pinsrd.c: New test.
* gcc.target/powerpc/sse4_1-pinsrq.c: New test.
Paul A. Clarke [Wed, 23 Sep 2020 19:10:19 +0000 (14:10 -0500)]
rs6000: Support _mm_insert_epi{8,32,64}
Add compatibility implementations for SSE4.1 intrinsics
_mm_insert_epi8, _mm_insert_epi32, _mm_insert_epi64.
2020-09-23 Paul A. Clarke <pc@us.ibm.com>
gcc/
* config/rs6000/smmintrin.h (_mm_insert_epi8): New.
(_mm_insert_epi32): New.
(_mm_insert_epi64): New.
liuhongt [Thu, 25 Jul 2019 08:49:36 +0000 (16:49 +0800)]
Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16.
AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease
AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud
AMX-BF16:tdpbf16ps
gcc/ChangeLog
* common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET,
OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET,
OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET,
OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET):
New marcos.
(ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16.
* common/config/i386/i386-cpuinfo.h (processor_types): Add
FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16.
* common/config/i386/cpuinfo.h (XSTATE_TILECFG,
XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro.
(get_available_features): Enable AMX features only if
their states are suoorited by OSXSAVE.
* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY
for amx-tile, amx-int8, amx-bf16.
* config.gcc: Add amxtileintrin.h, amxint8intrin.h,
amxbf16intrin.h to extra headers.
* config/i386/amxbf16intrin.h: New file.
* config/i386/amxint8intrin.h: Ditto.
* config/i386/amxtileintrin.h: Ditto.
* config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8):
New macro.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AMX_TILE__, __AMX_INT8__, AMX_BF16__.
* config/i386/i386-options.c (ix86_target_string): Add
-mamx-tile, -mamx-int8, -mamx-bf16.
(ix86_option_override_internal): Handle AMX-TILE,
AMX-INT8, AMX-BF16.
* config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P,
TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P,
PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros.
* config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16.
* config/i386/immintrin.h: Include amxtileintrin.h,
amxint8intrin.h, amxbf16intrin.h.
* doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16.
* doc/extend.texi: Document amx-tile, amx-int8, amx-bf16.
* doc/sourcebuild.texi ((Effective-Target Keywords, Other
hardware attributes): Document amx_int8, amx_tile, amx_bf16.
gcc/testsuite/ChangeLog
* lib/target-supports.exp (check_effective_target_amx_tile,
check_effective_target_amx_int8,
check_effective_target_amx_bf16): New proc.
* g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/funcspec-56.inc: Add new target attribute.
* gcc.target/i386/amx-check.h: New header file.
* gcc.target/i386/amxbf16-asmatt-1.c: New test.
* gcc.target/i386/amxint8-asmatt-1.c: New test.
* gcc.target/i386/amxtile-asmatt-1.c: Ditto.
* gcc.target/i386/amxbf16-asmintel-1.c: Ditto.
* gcc.target/i386/amxint8-asmintel-1.c: Ditto.
* gcc.target/i386/amxtile-asmintel-1.c: Ditto.
* gcc.target/i386/amxbf16-dpbf16ps-2.c: Ditto.
* gcc.target/i386/amxint8-dpbssd-2.c: Ditto.
* gcc.target/i386/amxint8-dpbsud-2.c: Ditto.
* gcc.target/i386/amxint8-dpbusd-2.c: Ditto.
* gcc.target/i386/amxint8-dpbuud-2.c: Ditto.
* gcc.target/i386/amxtile-2.c: Ditto.
Andrea Corallo [Mon, 21 Sep 2020 12:52:45 +0000 (13:52 +0100)]
aarch64: Do not alter force_reg returned rtx expanding pauth builtins
2020-09-21 Andrea Corallo <andrea.corallo@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_general_expand_builtin): Do not alter value on a
force_reg returned rtx.
Richard Sandiford [Mon, 28 Sep 2020 10:26:53 +0000 (11:26 +0100)]
aarch64: Add HF routines to libgcc_s.so
The libgcc HF support routines were being linked into libgcc_s.so,
but weren't being exported.
libgcc/
* config/aarch64/libgcc-softfp.ver: New file.
* config/aarch64/t-softfp (SHLIB_MAPFILES): Add it.
Mark Eggleston [Mon, 28 Sep 2020 10:01:40 +0000 (11:01 +0100)]
Revert "Fortran : ICE in build_field PR95614"
This reverts commit
e5a76af3a2f3324efc60b4b2778ffb29d5c377bc.
Eric Botcazou [Mon, 28 Sep 2020 07:09:41 +0000 (09:09 +0200)]
Add missing end location information
In some cases we would fail to put the end location information on the
outermost BIND_EXPR of a function, which is problematic when there is
a dynamic stack allocation.
gcc/ada/ChangeLog:
* gcc-interface/trans.c (Subprogram_Body_to_gnu): Set the end locus
of body and declaration earlier.
Eric Botcazou [Mon, 28 Sep 2020 07:00:46 +0000 (09:00 +0200)]
Fix bogus alignment warning on address clause
The compiler gives a bogus alignment warning on an address clause and
a discriminated record type with variable size.
gcc/ada/ChangeLog:
* gcc-interface/decl.c (maybe_saturate_size): Add ALIGN parameter
and round down the result to ALIGN.
(gnat_to_gnu_entity): Adjust calls to maybe_saturate_size.
gcc/testsuite/ChangeLog:
* gnat.dg/addr16.adb: New test.
* gnat.dg/addr16_pkg.ads: New helper.
Eric Botcazou [Mon, 28 Sep 2020 06:39:25 +0000 (08:39 +0200)]
Revert recent changes to lower_try_finally_dup_block
This reverts the recent changes made to lower_try_finally_dup_block and
aimed at tweaking the souce location info for __builtin_stack_restore.
gcc/ChangeLog:
* tree-eh.c (lower_try_finally_dup_block): Revert latest change.
GCC Administrator [Mon, 28 Sep 2020 00:16:21 +0000 (00:16 +0000)]
Daily bump.
Jan Hubicka [Sun, 27 Sep 2020 21:44:15 +0000 (23:44 +0200)]
Fix handling of stores in modref_summary::useful_p
* ipa-modref.c (modref_summary::useful_p): Fix testing of stores.
Jakub Jelinek [Sun, 27 Sep 2020 21:18:26 +0000 (23:18 +0200)]
optabs: Don't reuse target for multi-word expansions if it overlaps operand(s) [PR97073]
The following testcase is miscompiled on i686-linux, because
we try to expand a double-word bitwise logic operation with op0
being a (mem:DI u) and target (mem:DI u+4), i.e. partial overlap, and
thus end up with:
movl 4(%esp), %eax
andl u, %eax
movl %eax, u+4
! movl u+4, %eax optimized out
andl 8(%esp), %eax
movl %eax, u+8
rather than with the desired:
movl 4(%esp), %edx
movl 8(%esp), %eax
andl u, %edx
andl u+4, %eax
movl %eax, u+8
movl %edx, u+4
because the store of the first word to target overwrites the second word of
the operand.
expand_binop for this (and several similar places) already check for target
== op0 or target == op1, this patch just adds reg_overlap_mentioned_p calls
next to it.
Pedantically, at least for some of these it might be sufficient to force
a different target if there is overlap but target is not rtx_equal_p to
the operand (e.g. in this bitwise logical case, but e.g. not in the shift
cases where there is reordering), though that would go against the
preexisting target == op? checks and the rationale that REG_EQUAL notes in
that case isn't correct.
2020-09-27 Jakub Jelinek <jakub@redhat.com>
PR middle-end/97073
* optabs.c (expand_binop, expand_absneg_bit, expand_unop,
expand_copysign_bit): Check reg_overlap_mentioned_p between target
and operand(s) and if it returns true, force a pseudo as target.
* gcc.c-torture/execute/pr97073.c: New test.
Clément Chigot [Tue, 18 Aug 2020 12:05:33 +0000 (14:05 +0200)]
aix: Use $(AR) without -X32_64 to build FAT libraries.
AIX FAT libraries should be built with the version of AR chosen by configure.
The GNU Make $(AR) variable includes the AIX -X32_64 option needed
by the default Makefile rules to accept both 32 bit and 64 bit object files.
The -X32_64 option conflicts with ar archiving objects of the same name
used to build FAT libraries.
This patch changes the Makefile fragments for AIX FAT libraries to use $(AR),
but strips the -X32_64 option from the Make variable.
libgcc/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64.
libatomic/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/t-aix: Use $(AR) without -X32_64.
libgomp/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/t-aix: Use $(AR) without -X32_64.
libstdc++-v3/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/os/aix/t-aix: Use $(AR) without -X32_64.
libgfortran/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/t-aix: Use $(AR) without -X32_64.
Mark Eggleston [Thu, 11 Jun 2020 13:33:51 +0000 (14:33 +0100)]
Fortran : ICE in build_field PR95614
Local identifiers can not be the same as a module name. Original
patch by Steve Kargl resulted in name clashes between common block
names and local identifiers. A local identifier can be the same as
a global identier if that identifier represents a common. The patch
was modified to allow global identifiers that represent a common
block.
2020-09-27 Steven G. Kargl <kargl@gcc.gnu.org>
Mark Eggleston <markeggleston@gcc.gnu.org>
gcc/fortran/
PR fortran/95614
* decl.c (gfc_get_common): Use gfc_match_common_name instead
of match_common_name.
* decl.c (gfc_bind_idents): Use gfc_match_common_name instead
of match_common_name.
* match.c : Rename match_common_name to gfc_match_common_name.
* match.c (gfc_match_common): Use gfc_match_common_name instead
of match_common_name.
* match.h : Rename match_common_name to gfc_match_common_name.
* resolve.c (resolve_common_vars): Check each symbol in a
common block has a global symbol. If there is a global symbol
issue an error if the symbol type is known as is not a common
block name.
2020-09-27 Mark Eggleston <markeggleston@gcc.gnu.org>
gcc/testsuite/
PR fortran/95614
* gfortran.dg/pr95614_1.f90: New test.
* gfortran.dg/pr95614_2.f90: New test.
Xionghu Luo [Sun, 27 Sep 2020 05:27:32 +0000 (00:27 -0500)]
IFN: Implement IFN_VEC_SET for ARRAY_REF with VIEW_CONVERT_EXPR
This patch enables transformation from ARRAY_REF(VIEW_CONVERT_EXPR) to
VEC_SET internal function in gimple-isel pass if target supports
vec_set with variable index by checking can_vec_set_var_idx_p.
gcc/ChangeLog:
2020-09-27 Xionghu Luo <luoxhu@linux.ibm.com>
* gimple-isel.cc (gimple_expand_vec_set_expr): New function.
(gimple_expand_vec_cond_exprs): Rename to ...
(gimple_expand_vec_exprs): ... this and call
gimple_expand_vec_set_expr.
* internal-fn.c (vec_set_direct): New define.
(expand_vec_set_optab_fn): New function.
(direct_vec_set_optab_supported_p): New define.
* internal-fn.def (VEC_SET): New DEF_INTERNAL_OPTAB_FN.
* optabs.c (can_vec_set_var_idx_p): New function.
* optabs.h (can_vec_set_var_idx_p): New declaration.
GCC Administrator [Sun, 27 Sep 2020 00:16:24 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Sat, 26 Sep 2020 19:32:36 +0000 (20:32 +0100)]
libstdc++: Use __libc_single_threaded to optimise atomics [PR 96817]
Glibc 2.32 adds a global variable that says whether the process is
single-threaded. We can use this to decide whether to elide atomic
operations, as a more precise and reliable indicator than
__gthread_active_p.
This means that guard variables for statics and reference counting in
shared_ptr can use less expensive, non-atomic ops even in processes that
are linked to libpthread, as long as no threads have been created yet.
It also means that we switch to using atomics if libpthread gets loaded
later via dlopen (this still isn't supported in general, for other
reasons).
We can't use __libc_single_threaded to replace __gthread_active_p
everywhere. If we replaced the uses of __gthread_active_p in std::mutex
then we would elide the pthread_mutex_lock in the code below, but not
the pthread_mutex_unlock:
std::mutex m;
m.lock(); // pthread_mutex_lock
std::thread t([]{}); // __libc_single_threaded = false
t.join();
m.unlock(); // pthread_mutex_unlock
We need the lock and unlock to use the same "is threading enabled"
predicate, and similarly for init/destroy pairs for mutexes and
condition variables, so that we don't try to release resources that were
never acquired.
There are other places that could use __libc_single_threaded, such as
_Sp_locker in src/c++11/shared_ptr.cc and locale init functions, but
they can be changed later.
libstdc++-v3/ChangeLog:
PR libstdc++/96817
* include/ext/atomicity.h (__gnu_cxx::__is_single_threaded()):
New function wrapping __libc_single_threaded if available.
(__exchange_and_add_dispatch, __atomic_add_dispatch): Use it.
* libsupc++/guard.cc (__cxa_guard_acquire, __cxa_guard_abort)
(__cxa_guard_release): Likewise.
* testsuite/18_support/96817.cc: New test.
Jan Hubicka [Sat, 26 Sep 2020 16:40:50 +0000 (18:40 +0200)]
Fix handling of clobbers in ipa-modref.c
* ipa-modref.c (analyze_stmt): Do not skip clobbers in early pass.
* ipa-pure-const.c (analyze_stmt): Update comment.
David Edelsohn [Thu, 17 Sep 2020 15:18:48 +0000 (15:18 +0000)]
aix: Fix _STDC_FORMAT_MACROS in inttypes.h [PR97044]
AIX protects the STDC Format Macros in a manner that can prevent the
definition of the macros depending on the order of header inclusion.
The protection of the macros was referenced in C99, removed in C11, and
never specified in any C++ standard. Also, the macros are in the namespace
reserved to the implementation (compiler) so the compiler is permitted to
choose to inject those names.
fixincludes/ChangeLog:
2020-09-17 David Edelsohn <dje.gcc@gmail.com>
PR target/97044
* inclhack.def (aix_inttypes): New fix.
* fixincl.x: Regenerate.
* tests/base/sys/inttypes.h: New file.
David Edelsohn [Wed, 23 Sep 2020 20:52:15 +0000 (16:52 -0400)]
aix: collect2 visibility
The code that collect2 generates, compiles and links into applications
and shared libraries to initialize constructors and register DWARF tables
is built with the compiler options used to invoke the linker. If the
compiler options change the visibility from default, the library
initialization routines will not be visible and this can prevent
initialization.
This patch checks if the command line sets visibiliity and then adds
GCC pragmas to the initialization code generated by collect2 if
necessary to define the visibility on global, exported functions as default.
gcc/ChangeLog:
2020-09-26 David Edelsohn <dje.gcc@gmail.com>
Clement Chigot <clement.chigot@atos.com>
* collect2.c (visibility_flag): New.
(main): Detect -fvisibility.
(write_c_file_stat): Push and pop default visibility.
Paul Thomas [Sat, 26 Sep 2020 11:32:35 +0000 (12:32 +0100)]
Correct overwrite of alloc_comp_result_2.f90 in fix of PR96495.
2020-26-09 Paul Thomas <pault@gcc.gnu.org>
gcc/testsuite/
PR fortran/96495
* gfortran.dg/alloc_comp_result_2.f90 : Restore original.
* gfortran.dg/alloc_comp_result_3.f90 : New test.
Jan Hubicka [Sat, 26 Sep 2020 08:44:53 +0000 (10:44 +0200)]
Add modref testcases
gcc/testsuite/
* gcc.dg/lto/modref-1_0.c: New test.
* gcc.dg/lto/modref-1_1.c: New test.
* gcc.dg/tree-ssa/modref-2.c: New test.
Jan Hubicka [Sat, 26 Sep 2020 08:43:57 +0000 (10:43 +0200)]
Implement iterative dataflow in mod-ref
cc1plus stats are now:
Alias oracle query stats:
refs_may_alias_p:
62971744 disambiguations,
73160711 queries
ref_maybe_used_by_call_p: 141176 disambiguations,
63867883 queries
call_may_clobber_ref_p: 23573 disambiguations, 29322 queries
nonoverlapping_component_refs_p: 0 disambiguations, 37720 queries
nonoverlapping_refs_since_match_p: 19432 disambiguations, 55659 must overlaps, 75860 queries
aliasing_component_refs_p: 54724 disambiguations, 753570 queries
TBAA oracle:
24124230 disambiguations
56228428 queries
16058141 are in alias set 0
10338303 queries asked about the same object
125 queries asked about the same alias set
0 access volatile
3919230 are dependent in the DAG
1788399 are aritificially in conflict with void *
Modref stats:
modref use: 10408 disambiguations, 46993 queries
modref clobber:
1418549 disambiguations,
1951251 queries
4898707 tbaa queries (2.510547 per modref query)
396878 base compares (0.203397 per modref query)
PTA query stats:
pt_solution_includes: 975364 disambiguations,
13604284 queries
pt_solutions_intersect:
1026606 disambiguations,
13181198 queries
So compared to
https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554692.html we get 25%
use disambiguations and 91% more clobber disambiguations.
Tramp3d is
Alias oracle query stats:
refs_may_alias_p:
2056905 disambiguations,
2317461 queries
ref_maybe_used_by_call_p: 7137 disambiguations,
2093762 queries
call_may_clobber_ref_p: 234 disambiguations, 234 queries
nonoverlapping_component_refs_p: 0 disambiguations, 4313 queries
nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries
aliasing_component_refs_p: 858 disambiguations, 34600 queries
TBAA oracle: 894996 disambiguations
1695991 queries
138346 are in alias set 0
470668 queries asked about the same object
0 queries asked about the same alias set
0 access volatile
191666 are dependent in the DAG
315 are aritificially in conflict with void *
Modref stats:
modref use: 842 disambiguations, 2265 queries
modref clobber: 14833 disambiguations, 28900 queries
34884 tbaa queries (1.207059 per modref query)
5041 base compares (0.174429 per modref query)
PTA query stats:
pt_solution_includes: 313372 disambiguations, 525724 queries
pt_solutions_intersect: 130374 disambiguations, 415138 queries
So about twice many use and 40% clobber disambiguations.
Bootstrapped/regtested x86_64-linux, I plan to commit it later today after
more testing.
2020-09-26 Jan Hubicka <hubicka@ucw.cz>
* ipa-inline-transform.c: Include ipa-modref-tree.h and ipa-modref.h.
(inline_call): Call ipa_merge_modref_summary_after_inlining.
* ipa-inline.c (ipa_inline): Do not free summaries.
* ipa-modref.c (dump_records): Fix formating.
(merge_call_side_effects): Break out from ...
(analyze_call): ... here; record recursive calls.
(analyze_stmt): Add new parameter RECURSIVE_CALLS.
(analyze_function): Do iterative dataflow on recursive calls.
(compute_parm_map): New function.
(ipa_merge_modref_summary_after_inlining): New function.
(collapse_loads): New function.
(modref_propagate_in_scc): Break out from ...
(pass_ipa_modref::execute): ... here; Do iterative dataflow.
* ipa-modref.h (ipa_merge_modref_summary_after_inlining): Declare.
Jakub Jelinek [Sat, 26 Sep 2020 08:10:09 +0000 (10:10 +0200)]
openmp: Improve #pragma omp simd vectorization
As mentioned earlier, the vectorizer punts on vectorization of loops with non-constant
steps. As for OpenMP loops it is by the language restriction always possible to compute
the number of loop iterations before the loop, this change helps those cases
by computing it and using an alternate IV that iterates from 0 to < niterations with
step of 1 next to the normal IV which will be just linear in that.
List of functions where we compared to current trunk vectorize some loops where we
previously didn't (for c-c++-common only listing the C function names, both C and C++
are affected though):
gcc/testsuite/gcc.dg/vect/vect-simd-17.c doit
gcc/testsuite/gcc.dg/vect/vect-simd-18.c foo
gcc/testsuite/gcc.dg/vect/vect-simd-19.c foo
gcc/testsuite/gcc.dg/vect/vect-simd-20.c foo
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_auto
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_guided32
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_runtime
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_static
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_static32
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_simd_normal
libgomp/testsuite/libgomp.c-c++-common/for-2.c f5_simd_normal
libgomp/testsuite/libgomp.c-c++-common/for-2.c f6_simd_normal
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_ds_ds128_normal
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_ds_normal
libgomp/testsuite/libgomp.c-c++-common/for-4.c f3_taskloop_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttds_ds128_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttds_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f5_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f6_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tds_ds128_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tds_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_ds_ds128_normal
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_ds_normal
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tds_ds128_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tds_normal._omp_fn.0
2020-09-26 Jakub Jelinek <jakub@redhat.com>
* omp-expand.c (expand_omp_simd): Help vectorizer for the collapse == 1
and non-composite collapse > 1 case with non-constant innermost loop
step by precomputing number of iterations before loop and using an
alternate IV from 0 to number of iterations - 1 with step of 1.
* gcc.dg/vect/vect-simd-17.c: Expect 11 or more vectorized loops.
* gcc.dg/vect/vect-simd-18.c: New test.
* gcc.dg/vect/vect-simd-19.c: New test.
* gcc.dg/vect/vect-simd-20.c: New test.
Jakub Jelinek [Sat, 26 Sep 2020 08:07:41 +0000 (10:07 +0200)]
powerpc, libcpp: Fix gcc build with clang on power8 [PR97163]
libcpp has two specialized altivec implementations of search_line_fast,
one for power8+ and the other one otherwise.
Both use __attribute__((altivec(vector))) and the GCC builtins rather than
altivec.h and the APIs from there, which is fine, but should be restricted
to when libcpp is built with GCC, so that it can be relied on.
The second elif is
and thus e.g. when built with clang it isn't picked, but the first one was
just guarded with
and so according to the bugreporter clang fails miserably on that.
The following patch fixes that by adding the same GCC_VERSION requirement
as the second version. I don't know where the 4.5 in there comes from and
the exact version doesn't matter that much, as long as it is above 4.2 that
clang pretends to be and smaller or equal to 4.8 as the oldest gcc we
support as bootstrap compiler ATM.
Furthermore, the patch fixes the comment, the version it is talking about is
not pre-GCC 5, but actually the GCC 5+ one.
2020-09-26 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/97163
* lex.c (search_line_fast): Only use _ARCH_PWR8 Altivec version
for GCC >= 4.5.
Jan Hubicka [Sat, 26 Sep 2020 06:13:52 +0000 (08:13 +0200)]
Disable modref for ipa-pta-13.c
* gcc.dg/ipa/ipa-pta-13.c: Disable modref.
Jan Hubicka [Sat, 26 Sep 2020 06:12:44 +0000 (08:12 +0200)]
Track arguments pointing to local or readonly memory in ipa-fnsummary
this patch implement tracking wehther argument points to readonly memory. This
is is useful for ipa-modref as well as for inline heuristics. It is desirable
to inline functions that dereference pointers to local variables in order
to support SRA. We always did the oposite heuristics (guessing that the
dereferences will be optimized out with 50% probability) but here we could
increase the probability for cases where we can track that argument is indeed
a local memory (or readonly which is also good)
* ipa-fnsummary.c (dump_ipa_call_summary): Dump
points_to_local_or_readonly_memory flag.
(analyze_function_body): Compute points_to_local_or_readonly_memory
flag.
(remap_edge_change_prob): Rename to ...
(remap_edge_params): ... this one; update
points_to_local_or_readonly_memory.
(remap_edge_summaries): Update.
(read_ipa_call_summary): Stream the new flag.
(write_ipa_call_summary): Likewise.
* ipa-predicate.h (struct inline_param_summary): Add
points_to_local_or_readonly_memory.
(inline_param_summary::equal_to): Update.
(inline_param_summary::useless_p): Update.
Jan Hubicka [Sat, 26 Sep 2020 06:09:53 +0000 (08:09 +0200)]
Add support for iterative dataflow to ipa-modref-tree.h
Track if insert and merge operations changed anything in the summary.
gcc/ChangeLog:
2020-09-26 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref-tree.h (modref_ref_node::insert_access): Track if something
changed.
(modref_base_node::insert_ref): Likewise (and add a new optional
argument)
(modref_tree::insert): Likewise.
(modref_tree::merge): Rewrite
David Malcolm [Fri, 25 Sep 2020 18:31:46 +0000 (14:31 -0400)]
analyzer: add test for placement new
gcc/testsuite/ChangeLog:
PR analyzer/94355
* g++.dg/analyzer/placement-new.C: New test.
David Malcolm [Fri, 25 Sep 2020 21:15:42 +0000 (17:15 -0400)]
analyzer: fix ICEs treeifying offset_region [PR96646, PR96841]
gcc/analyzer/ChangeLog:
PR analyzer/96646
PR analyzer/96841
* region-model.cc (region_model::get_representative_path_var):
When handling offset_region, wrap the MEM_REF's first argument in
an ADDR_EXPR of pointer type, rather than simply using the tree
for the parent region. Require the MEM_REF's second argument to
be an integer constant.
gcc/testsuite/ChangeLog:
PR analyzer/96646
PR analyzer/96841
* gcc.dg/analyzer/pr96646.c: New test.
* gcc.dg/analyzer/pr96841.c: New test.
GCC Administrator [Sat, 26 Sep 2020 00:16:25 +0000 (00:16 +0000)]
Daily bump.
Jan Hubicka [Fri, 25 Sep 2020 22:05:53 +0000 (00:05 +0200)]
Disable ipa-modref with live patching
2020-09-26 Jan Hubicka <hubicka@ucw.cz>
* doc/invoke.texi: Add -fno-ipa-modref to flags disabled by
-flive-patching.
* opts.c (control_options_for_live_patching): Disable ipa-modref.
Jan Hubicka [Fri, 25 Sep 2020 22:01:57 +0000 (00:01 +0200)]
Fix gimple_clobber handling in ipa-modref
2020-09-25 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref.c (analyze_stmt): Fix return value for gimple_clobber.
Nathan Sidwell [Fri, 25 Sep 2020 18:58:26 +0000 (11:58 -0700)]
c++: Adjust pushdecl/duplicate_decls API
The decl pushing APIs and duplicate_decls take an 'is_friend' parm,
when what they actually mean is 'hide this from name lookup'. That
conflation has gotten more anachronistic as time moved on. We now
have anticipated builtins, and I plan to have injected extern decls
soon. So this patch is mainly a renaming excercise. is_friend ->
hiding. duplicate_decls gets an additional 'was_hidden' parm. As
I've already said, hiddenness is a property of the symbol table, not
the decl. Builtins are now pushed requesting hiding, and pushdecl
asserts that we don't attempt to push a thing that should be hidden
without asking for it to be hidden.
This is the final piece of groundwork to get rid of a bunch of 'this
is hidden' markers on decls and move the hiding management entirely
into name lookup.
gcc/cp/
* cp-tree.h (duplicate_decls): Replace 'is_friend' with 'hiding'
and add 'was_hidden'.
* name-lookup.h (pushdecl_namespace_level): Replace 'is_friend'
with 'hiding'.
(pushdecl): Likewise.
(pushdecl_top_level): Drop is_friend parm.
* decl.c (check_no_redeclaration_friend_default_args): Rename parm
olddelc_hidden_p.
(duplicate_decls): Replace 'is_friend' with 'hiding'
and 'was_hidden'. Do minimal adjustments in body.
(cxx_builtin_function): Pass 'hiding' to pushdecl.
* friend.c (do_friend): Pass 'hiding' to pushdecl.
* name-lookup.c (supplement_binding_1): Drop defaulted arg to
duplicate_decls.
(update_binding): Replace 'is_friend' with 'hiding'. Drop
defaulted arg to duplicate_decls.
(do_pushdecl): Replace 'is_friend' with 'hiding'. Assert no
surprise hidhing. Adjust duplicate_decls calls to inform of old
decl's hiddennes.
(pushdecl): Replace 'is_friend' with 'hiding'.
(set_identifier_type_value_with_scope): Adjust update_binding
call.
(do_pushdecl_with_scope): Replace 'is_friend' with 'hiding'.
(pushdecl_outermost_localscope): Drop default arg to
do_pushdecl_with_scope.
(pushdecl_namespace_level): Replace 'is_friend' with 'hiding'.
(pushdecl_top_level): Drop is_friend parm.
* pt.c (register_specialization): Comment duplicate_decls call
args.
(push_template_decl): Commont pushdecl_namespace_level.
(tsubst_friend_function, tsubst_friend_class): Likewise.
Nathan Sidwell [Fri, 25 Sep 2020 17:24:09 +0000 (10:24 -0700)]
c++: Replace tag_scope with TAG_how
I always found tag_scope confusing, as it is not a scope, but a
direction of how to lookup or insert an elaborated type tag. This
replaces it with a enum class TAG_how. I also add a new value,
HIDDEN_FRIEND, to distinguish the two cases of innermost-non-class
insertion that we currently conflate. Also renamed
'lookup_type_scope' to 'lookup_elaborated_type', because again, we're
not providing a scope to lookup in.
gcc/cp/
* name-lookup.h (enum tag_scope): Replace with ...
(enum class TAG_how): ... this. Add HIDDEN_FRIEND value.
(lookup_type_scope): Replace with ...
(lookup_elaborated_type): ... this.
(pushtag): Use TAG_how, not tag_scope.
* cp-tree.h (xref_tag): Parameter is TAG_how, not tag_scope.
* decl.c (lookup_and_check_tag): Likewise. Adjust.
(xref_tag_1, xref_tag): Likewise. adjust.
(start_enum): Adjust lookup_and_check_tag call.
* name-lookup.c (lookup_type_scope_1): Rename to ...
(lookup_elaborated_type_1) ... here. Use TAG_how, not tag_scope.
(lookup_type_scope): Rename to ...
(lookup_elaborated_type): ... here. Use TAG_how, not tag_scope.
(do_pushtag): Use TAG_how, not tag_scope. Adjust.
(pushtag): Likewise.
* parser.c (cp_parser_elaborated_type_specifier): Adjust.
(cp_parser_class_head): Likewise.
gcc/objcp/
* objcp-decl.c (objcp_start_struct): Use TAG_how not tag_scope.
(objcp_xref_tag): Likewise.
Kyrylo Tkachov [Fri, 25 Sep 2020 16:32:43 +0000 (17:32 +0100)]
AArch64: Add Linux cpuinfo string for rng feature
The Linux kernel has defined the cpuinfo string for the +rng feature, so
this patch adds that to GCC so that -march=native can pick it up.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
* config/aarch64/aarch64-option-extensions.def (rng): Add
cpuinfo string.
Alex Coplan [Fri, 25 Sep 2020 16:16:34 +0000 (17:16 +0100)]
arm: Add missing Neoverse V1 feature
This adds a missing feature (FP16) to the Neoverse V1 description in
AArch32 GCC.
gcc/ChangeLog:
* config/arm/arm-cpus.in (neoverse-v1): Add FP16.
Martin Liska [Fri, 25 Sep 2020 14:21:34 +0000 (16:21 +0200)]
gcov: fix streaming of HIST_TYPE_IOR histogram type.
gcc/ChangeLog:
PR gcov-profile/64636
* value-prof.c (stream_out_histogram_value): Allow negative
values for HIST_TYPE_IOR.
Nathan Sidwell [Fri, 25 Sep 2020 13:53:06 +0000 (06:53 -0700)]
c++: DECL_BUILTIN_P for builtins
We currently detect builtin decls via DECL_ARTIFICIAL &&
!DECL_HIDDEN_FUNCTION_P, which, besides being clunky, is a problem as
hiddenness is a property of the symbol table -- not the decl being
hidden. This adds DECL_BUILTIN_P, which just looks at the
SOURCE_LOCATION -- we have a magic one for builtins.
One of the consequential changes is to make function-scope omp udrs
have function context (needed because otherwise duplicate-decls thinks
the types don't match at the point we check). This is also morally
better, because that's what they are -- nested functions, stop lying.
(That's actually my plan for all DECL_LOCAL_DECL_P decls, as they are
distinct decls to the namespace-scope decl they alias.)
gcc/cp/
* cp-tree.h (DECL_BUILTIN_P): New.
* decl.c (duplicate_decls): Use it. Do not treat omp-udr as a
builtin.
* name-lookup.c (anticipated_builtin): Use it.
(set_decl_context_in_fn): Function-scope OMP UDRs have function context.
(do_nonmember_using_decl): Use DECL_BUILTIN_P.
* parser.c (cp_parser_omp_declare_reduction): Function-scope OMP
UDRs have function context. Assert we never find a valid duplicate.
* pt.c (tsubst_expr): Function-scope OMP UDRs have function context.
libcc1/
* libcp1plugin.cc (supplement_binding): Use DECL_BULTIN_P.
Tom de Vries [Fri, 25 Sep 2020 13:23:49 +0000 (15:23 +0200)]
[nvptx] Fix Wimplicit-fallthrough in nvptx.c with -save-temps
When compiling nvptx.c using -save-temps, I ran into Wimplicit-fallthrough
warnings.
The fallthrough locations have been marked with a fallthrough comment, but
that doesn't work with -save-temps, something that has been filed as
PR78497.
Work around this by using gcc_fallthrough () in addition to the comment.
Tested by building target nvptx, copying nvptx.c compile line and adding
-save-temps.
gcc/ChangeLog:
2020-09-25 Tom de Vries <tdevries@suse.de>
* config/nvptx/nvptx.c (nvptx_assemble_integer, nvptx_print_operand):
Use gcc_fallthrough ().
Richard Biener [Fri, 25 Sep 2020 09:13:13 +0000 (11:13 +0200)]
middle-end/96814 - fix VECTOR_BOOLEAN_TYPE_P CTOR RTL expansion
The RTL expansion code for CTORs doesn't handle VECTOR_BOOLEAN_TYPE_P
with bit-precision elements correctly as the testcase shows before
the PR97085 fix. The following makes it do the correct thing
(not 100% sure for CTOR of sub-vectors due to the lack of a testcase).
The alternative would be to assert such CTORs do not happen (and also
add IL verification for this).
The GIMPLE FE needs a way to declare the VECTOR_BOOLEAN_TYPE_P vectors
(thus the C FE needs that).
2020-09-25 Richard Biener <rguenther@suse.de>
PR middle-end/96814
* expr.c (store_constructor): Handle VECTOR_BOOLEAN_TYPE_P
CTORs correctly.
* gcc.target/i386/pr96814.c: New testcase.
Richard Biener [Fri, 25 Sep 2020 11:59:15 +0000 (13:59 +0200)]
middle-end/97207 - implement move assign for auto_vec<>
This implements the missing move assignment to make std::swap work
on auto_vec<>
2020-09-25 Richard Biener <rguenther@suse.de>
PR middle-end/97207
* vec.h (auto_vec<T>::operator=(auto_vec<T>&&)): Implement.
Jonathan Wakely [Fri, 25 Sep 2020 11:50:17 +0000 (12:50 +0100)]
libstdc++: Remove redundant -std=gnu++1z flags from makefile
Now that G++ defaults to gnu++17 we don't need special rules for
compiling the C++17 allocation and deallocation functions.
libstdc++-v3/ChangeLog:
* libsupc++/Makefile.am: Remove redundant -std=gnu++1z flags.
* libsupc++/Makefile.in: Regenerate.
Richard Sandiford [Fri, 25 Sep 2020 11:45:25 +0000 (12:45 +0100)]
arm: Fix fp16 move patterns for base MVE
This patch fixes ICEs in gcc.dg/torture/float16-basic.c for
-march=armv8.1-m.main+mve -mfloat-abi=hard. The problem was
that an fp16 argument was (rightly) being passed in FPRs,
but the fp16 move patterns only handled GPRs. LRA then cycled
trying to look for a way of handling the FPR.
It looks like there are three related problems here:
(1) We're using the wrong fp16 move pattern for base MVE.
*mov<mode>_vfp_<mode>16 (the pattern we use for +mve.fp)
works for base MVE too.
(2) The fp16 MVE load and store patterns are separate from the
main move patterns. The loads and stores should instead be
alternatives of the main move patterns, so that LRA knows
what to do with pseudo registers that become stack slots.
(3) The range restrictions for the loads and stores were wrong
for fp16: we were enforcing a multiple of 4 in [-255*4, 255*4]
instead of a multiple of 2 in [-255*2, 255*2].
(2) came from a patch to prevent writeback being used for MVE.
That patch also added a Uj constraint to enforce the correct
memory types for MVE. I think the simplest fix is therefore to merge
the loads and stores back into the main pattern and extend the Uj
constraint so that it acts like Um for non-MVE.
The testcase for that patch was mve-vldstr16-no-writeback.c, whose
main function is:
void
fn1 (__fp16 *pSrc)
{
__fp16 high;
__fp16 *pDst = 0;
unsigned i;
for (i = 0;; i++)
if (pSrc[i])
pDst[i] = high;
}
Fixing (2) causes the store part to fail, not because we're using
writeback, but because we decide to use GPRs to store high (which is
uninitialised, and so gets replaced with zero). This patch therefore
adds some scan-assembler-nots instead. (I wondered about changing the
testcase to initialise high, but that seemed like a bad idea for
a regression test.)
For (3): MVE seems to be the only thing to use arm_coproc_mem_operand_wb
(and its various interfaces) for 16-bit scalars: the Neon patterns only
use it for 32-bit scalars.
I've added new tests to try the various FPR alternatives of the
move patterns. The range of offsets that GCC uses for FPR loads
and stores is the intersection of the range allowed for GPRs and
FPRs, so the tests include GPR<->memory tests as well.
The fp32 and fp64 tests already pass, they're just there for
completeness.
gcc/
* config/arm/arm-protos.h (arm_mve_mode_and_operands_type_check):
Delete.
* config/arm/arm.c (arm_coproc_mem_operand_wb): Use a scale factor
of 2 rather than 4 for 16-bit modes.
(arm_mve_mode_and_operands_type_check): Delete.
* config/arm/constraints.md (Uj): Allow writeback for Neon,
but continue to disallow it for MVE.
* config/arm/arm.md (*arm32_mov<HFBF:mode>): Add !TARGET_HAVE_MVE.
* config/arm/vfp.md (*mov_load_vfp_hf16, *mov_store_vfp_hf16): Fold
back into...
(*mov<mode>_vfp_<mode>16): ...here but use Uj for the FPR memory
constraints. Use for base MVE too.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/mve-vldstr16-no-writeback.c: Allow
the store to use GPRs instead of FPRs. Add scan-assembler-nots
for writeback.
* gcc.target/arm/armv8_1m-fp16-move-1.c: New test.
* gcc.target/arm/armv8_1m-fp32-move-1.c: Likewise.
* gcc.target/arm/armv8_1m-fp64-move-1.c: Likewise.
Richard Biener [Fri, 25 Sep 2020 11:08:48 +0000 (13:08 +0200)]
tree-optimization/97199 - fix virtual operand update in if-conversion
This fixes a corner case with virtual operand update in if-conversion
by re-organizing the code to remove edges only after the last point
we need virtual PHI operands to be available.
2020-09-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/97199
* tree-if-conv.c (combine_blocks): Remove edges only
after looking at virtual PHI args.
Christophe Lyon [Fri, 25 Sep 2020 10:40:18 +0000 (10:40 +0000)]
testsuite: [aarch64] Fix aarch64/advsimd-intrinsics/v{trn,uzp,zip}_half.c
Since r11-3402 (g:
65c9878641cbe0ed898aa7047b7b994e9d4a5bb1), the
vtrn_half, vuzp_half and vzip_half started failing with
vtrn_half.c:76:17: error: redeclaration of 'vector_float64x2' with no linkage
vtrn_half.c:77:17: error: redeclaration of 'vector2_float64x2' with no linkage
vtrn_half.c:80:17: error: redeclaration of 'vector_res_float64x2' with no linkage
This is because r11-3402 now always declares float64x2 variables for
aarch64, leading to a duplicate declaration in these testcases.
The fix is simply to remove these now useless declarations.
These tests are skipped on arm*, so there is no impact on that target.
2020-09-25 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Remove
declarations of vector, vector2, vector_res for float64x2 type.
* gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.
Richard Biener [Fri, 25 Sep 2020 09:43:43 +0000 (11:43 +0200)]
testsuite/97204 - fix gcc.target/i386/sse2-mmx-pinsrw.c
This fixes the testcase writing to adjacent stack vars, exposed
my IPA modref.
2020-09-25 Richard Biener <rguenther@suse.de>
PR testsuite/97204
* gcc.target/i386/sse2-mmx-pinsrw.c: Fix.
Jakub Jelinek [Fri, 25 Sep 2020 08:43:37 +0000 (10:43 +0200)]
openmp: Add support for non-rect simd and improve collapsed simd support
The following change adds support for non-rectangular simd loops.
While working on that, I've noticed we actually don't vectorize collapsed
simd loops at all, because the code that I thought would be vectorizable
actually is not vectorized. While in theory for the constant lower/upper
bounds and constant step of all but the outermost loop we could in theory
vectorize by computing the seprate iterators using vectorized division
and modulo for each of them from the single iterator that increments
by 1 from 0 to total iteration count in the loop nest, I think that would
be fairly expensive and the chances of the loop body being vectorizable
would be low e.g. because of array indices unlikely to be linear and would
need scatters/gathers.
This patch changes the generated code to vectorize only the innermost
loop which has higher chance of being vectorized. Below is the list of
tests and function names in which the patch resulted in vectorizing something
that hasn't been vectorized before (ok, the first line is a new test).
I've also found that the vectorizer will not vectorize loops with non-constant
steps, I plan to do something about those incrementally on the omp-expand.c
side (basically, compute number of iterations before the loop and use a 0 to
number_of_iterations step 1 IV as the main one).
I have problem with the composite simd vectorization though.
The point is that each thread (or task etc.) is given only a range of
consecutive iterations, so somewhere earlier it computes total number of iterations
and splits the work between the workers and then the intent is to try to vectorize it.
So, each thread is then given a begin ... end-1 range that it would handle.
This means that from the single begin value I need to compute the individual iteration
vars I should start at and then goto into the loop nest to begin iterating there
(and actually compute how many iterations the innermost loop should do each time
so that it stops before end).
Very roughly the IL I emit is something like:
int t[100][100][100];
void
foo (int a, int b, int c, int d, int e, int f, int g, int h, int u, int v, int w, int x)
{
int i, j, k;
int cnt;
if (x)
{
i = u; j = v; k = w; goto doit;
}
for (i = a; i < b; i += c)
for (j = d; j < e; j += f)
{
k = g;
doit:
for (; k < h; k++)
t[i][j][k] += i + j + k;
}
}
Unfortunately, some pass then turns the innermost loop to have more than 2 basic blocks
and it isn't vectorized because of that.
Also, I have disabled (for now) SIMTization of collapsed simd loops, because for SIMT
it would be using a single thread anyway and I didn't want to bother with checking
SIMT on all places I've been changing. If SIMT support is added for some or all
collapsed loops, that omp-low.c change needs to be reverted.
Here is that list of what hasn't been vectorized before and is now:
gcc/testsuite/gcc.dg/vect/vect-simd-17.c doit
gcc/testsuite/gfortran.dg/gomp/openmp-simd-6.f90 bar
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-10.c f28_taskloop_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-10.c _Z24f28_taskloop_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f25_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f26_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f27_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f28_tpf_simd_guided32._omp_fn.1
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f28_tpf_simd_runtime._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z17f25_t_simd_normaliiiiiii._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z17f26_t_simd_normaliiiixxi._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z17f27_t_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z20f28_tpf_simd_runtimev._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z21f28_tpf_simd_guided32v._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c f7_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f7_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c f8_f_simd_guided32
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_f_simd_guided32
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c f8_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_pf_simd_guided32._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_pf_simd_runtime._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c _Z18f8_pf_simd_runtimev._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c _Z19f8_pf_simd_guided32v._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-4.c f8_taskloop_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-4.c _Z23f8_taskloop_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-5.c f7_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-5.c f8_tpf_simd_guided32._omp_fn.1
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-5.c f8_tpf_simd_runtime._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-5.c _Z16f7_t_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-5.c _Z19f8_tpf_simd_runtimev._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-5.c _Z20f8_tpf_simd_guided32v._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f25_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f25_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f26_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f26_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f27_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f27_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f28_f_simd_guided32
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_f_simd_guided32
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f28_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_pf_simd_guided32._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_pf_simd_runtime._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c _Z19f28_pf_simd_runtimev._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c _Z20f28_pf_simd_guided32v._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/master-combined-1.c main._omp_fn.9
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/master-combined-1.c main._omp_fn.9
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/simd-1.c f2
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/simd-1.c f2
libgomp/testsuite/libgomp.c/pr70680-2.c f1._omp_fn.0
libgomp/testsuite/libgomp.c/pr70680-2.c f2._omp_fn.0
libgomp/testsuite/libgomp.c/pr70680-2.c f3._omp_fn.0
libgomp/testsuite/libgomp.c/pr70680-2.c f4._omp_fn.0
libgomp/testsuite/libgomp.c/simd-8.c foo
libgomp/testsuite/libgomp.c/simd-9.c bar
libgomp/testsuite/libgomp.c/simd-9.c foo
2020-09-25 Jakub Jelinek <jakub@redhat.com>
gcc/
* omp-low.c (scan_omp_1_stmt): Don't call scan_omp_simd for
collapse > 1 loops as simt doesn't support collapsed loops yet.
* omp-expand.c (expand_omp_for_init_counts, expand_omp_for_init_vars):
Small tweaks to function comment.
(expand_omp_simd): Rewritten collapse > 1 support to only attempt
to vectorize the innermost loop and emit set of outer loops around it.
For non-composite simd with collapse > 1 without broken loop don't
even try to compute number of iterations first. Add support for
non-rectangular simd loops.
(expand_omp_for): Don't sorry_at on non-rectangular simd loops.
gcc/testsuite/
* gcc.dg/vect/vect-simd-17.c: New test.
libgomp/
* testsuite/libgomp.c/loop-25.c: New test.
Martin Liska [Thu, 24 Sep 2020 14:29:49 +0000 (16:29 +0200)]
Add cgraph_edge::debug function.
gcc/ChangeLog:
* cgraph.c (cgraph_edge::debug): New.
* cgraph.h (cgraph_edge::debug): New.
Martin Liska [Thu, 24 Sep 2020 14:37:41 +0000 (16:37 +0200)]
Fix spacing in cgraph_node::dump.
gcc/ChangeLog:
* cgraph.c (cgraph_node::dump): Always print space at the end
of a message. Remove one extra space.
projects / gcc.git / log