android: add rules to build a gallium_dri.so

This single .so includes all of the enabled gallium drivers.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>

android: add rules to build gallium/state_trackers/dri

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>

android: export more dirs from libmesa_dri_common

The include paths of libmesa_dri_common are also used by modules
that need libmesa_dri_common.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>

android: loader: export the path to be included

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965/gen9: Use raw PS invocation count for queries

Previously the number needed to be divided by 4 to get the proper results. Now
the hardware does the right thing. Through experimentation it seems Braswell
(CHV) does also need the division by 4.

Fixes piglit test:
arb_pipeline_statistics_query-frag

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

glsl: fix comment typo: s/accpet/accept/

mesa: remove some MAX_NV_FRAGMENT_PROGRAM_* macros

GL_NV_fragment_program support was removed a while ago.  This is just
some clean-up.

Reviewed-by: Matt Turner <mattst88@gmail.com>

fs/reg_allocate: Remove the MRF hack helpers from fs_visitor

These are helpers that only exist in this one file.  No reason to put them
in the visitor.

Reviewed-by: Neil Roberts <neil@linux.intel.com>

i965/fs: Don't let the EOT send message interfere with the MRF hack

Previously, we just put the message for the EOT send as high in the file as
it would go.  This is because the register pre-filling hardware will stop
all over the early registers in the file in preparation for the next thread
while you're still sending the last message.  However, if something happens
to spill, then the MRF hack interferes with the EOT send message and, if
things aren't scheduled nicely, will stomp on it.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90520
Reviewed-by: Neil Roberts <neil@linux.intel.com>

rtasm: Generalize executable memory allocator to all Unices.

We're only using fairly portable standard Unix calls here, so might as
well save ourselves future trouble by enabling on all Unices by default.

https://bugs.freedesktop.org/show_bug.cgi?id=90904

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965/fs: Drop fs_inst::force_uncompressed.

This is now unused.  Saves a whole bit of memory per instruction.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Remove dead IR construction code from the visitor.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate test_fs_cmod_propagation to the IR builder.

v2: Use set_predicate/condmod.  Use fs_builder::OPCODE instead of
    ::emit.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate test_fs_saturate_propagation to the IR builder.

v2: Use set_saturate.  Use fs_builder::OPCODE instead of ::emit.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate translation of NIR texturing instructions to the IR builder.

v2: Don't remove assignments of base_ir just yet.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate translation of NIR intrinsics to the IR builder.

v2: Use fs_builder::SEL instead of ::emit.  Use set_condmod().

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate translation of NIR ALU instructions to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate translation of NIR control flow to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate NIR variable handling to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate NIR emit_percomp() to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate CS terminate message to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate VS output writes to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate FS framebuffer writes to the IR builder.

The explicit call to fs_builder::group() in emit_single_fb_write() is
required by the builder (otherwise the assertion in fs_builder::emit()
would fail) because the subsequent LOAD_PAYLOAD and FB_WRITE
instructions are in some cases emitted with a non-native execution
width.  The previous code would always use the channel enables for the
first quarter, which is dubious but probably worked in practice
because FB writes are never emitted inside non-uniform control flow
and we don't pass the kill-pixel mask via predication in the cases
where we have to fall-back to SIMD8 writes.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate FS alpha test to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate FS discard handling to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate FS gl_SamplePosition/ID computation code to the IR builder.

v2: Use fs_builder::AND/SHR/MOV instead of ::emit.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate FS interpolation code to the IR builder.

v2: Fix some preexisting trivial codestyle issues.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate shader time to the IR builder.

v2: Change null register destination type to UD so it can be compacted.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate untyped surface read and atomic to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate texturing implementation to the IR builder.

v2: Remove tabs from modified lines.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate pull constant loads to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate Gen4 send dependency workarounds to the IR builder.

v2: Change brw_null_reg() to bld.null_reg_f().

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate lower_integer_multiplication to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate lower_load_payload to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate register spills and fills to the IR builder.

Yes, it's incorrect to use the 0-th channel enable group
unconditionally without considering the execution and regioning
controls of the instruction that uses the spilled value, but it
matches the previous behaviour exactly, the builder just makes the
preexisting problem more obvious because emitting an instruction of
non-native SIMD width without having called .group() or .exec_all()
explicitly would have led to an assertion failure.

I'll fix the problem in a follow-up series, as the solution is going
to be non-trivial.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate try_replace_with_sel to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate opt_sampler_eot to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate opt_peephole_sel to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Create and emit instructions in one step in opt_peephole_sel.

This simplifies opt_peephole_sel() slightly by emitting the SEL
instructions immediately after they are created, what makes the
sel_inst and mov_imm_inst arrays unnecessary and will make it possible
to get rid of the explicit inserts when the pass is migrated to the IR
builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate opt_cse to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Don't drop force_writemask_all and _sechalf when copying a CSE temporary.

LOAD_PAYLOAD instructions need the same treatment as any other
generator instructions, at least FB writes and typed surface messages
will need a payload built with non-zero execution controls.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/vec4: Take into account all instruction fields in CSE instructions_match().

Most of these fields affect the behaviour of the instruction, but
apparently we currently don't CSE the kind of instructions for which
these fields could make a difference in the VEC4 back-end.  That's
likely to change soon though when we start using send-from-GRF for
texture sampling and surface access messages.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Take into account all instruction fields in CSE instructions_match().

Most of these fields affect the behaviour of the instruction so it
could actually break the program if we CSE a pair of otherwise
matching instructions with different values of these fields.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate opt_peephole_predicated_break to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Migrate opt_combine_constants to the IR builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Allocate a common IR builder object in fs_visitor.

v2: Call fs_builder::at_end() to point the builder at the end of the
    program explicitly.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Introduce FS IR builder.

The purpose of this change is threefold: First, it improves the
modularity of the compiler back-end by separating the functionality
required to construct an i965 IR program from the rest of the visitor
god-object, what in turn will reduce the coupling between other
components and the visitor allowing a more modular design.  This patch
doesn't yet remove the equivalent functionality from the visitor
classes, as it involves major back-end surgery.

Second, it improves consistency between the scalar and vector
back-ends.  The FS and VEC4 builders can both be used to generate
scalar code with a compatible interface or they can be used to
generate natural vector width code -- 1 or 4 components respectively.

Third, the approach to IR construction is somewhat different to what
the visitor classes currently do.  All parameters affecting code
generation (execution size, half control, point in the program where
new instructions are inserted, etc.) are encapsulated in a stand-alone
object rather than being quasi-global state (yes, anything defined in
one of the visitor classes is effectively global due to the tight
coupling with virtually everything else in the compiler back-end).
This object is lightweight and can be copied, mutated and passed
around, making helper IR-building functions more flexible because they
can now simply take a builder object as argument and will inherit its
IR generation properties in exactly the same way that a discrete
instruction would from the same builder object.

The emit_typed_write() function from my image-load-store branch is an
example that illustrates the usefulness of the latter point: Due to
hardware limitations the function may have to split the untyped
surface message in 8-wide chunks.  That means that the several
functions called to help with the construction of the message payload
are themselves required to set the execution width and half control
correctly on the instructions they emit, and to allocate all registers
with half the default width.  With the previous approach this would
require the used helper functions to be aware of the parameters that
might differ from the default state and explicitly set the instruction
bits accordingly.  With the new approach they would get a modified
builder object as argument that would influence all instructions
emitted by the helper function as if it were the default state.

Another example is the fs_visitor::VARYING_PULL_CONSTANT_LOAD()
method.  It doesn't actually emit any instructions, they are simply
created and inserted into an exec_list which is returned for the
caller to emit at some location of the program.  This sort of two-step
emission becomes unnecessary with the builder interface because the
insertion point is one more of the code generation parameters which
are part of the builder object.  The caller can simply pass
VARYING_PULL_CONSTANT_LOAD() a modified builder object pointing at the
location of the program where the effect of the constant load is
desired.  This two-step emission (which pervades the compiler back-end
and is in most cases redundant) goes away: E.g. ADD() now actually
adds two registers rather than just creating an ADD instruction in
memory, emit(ADD()) is no longer necessary.

v2: Drop scalarizing VEC4 builder.
v3: Take a backend_shader as constructor argument.  Improve handling
    of debug annotations and execution control flags.
v4: Drop Gen6 IF with inline comparison.  Rename "instr" variable.
    Initialize cursor to NULL by default and add method to explicitly
    point the builder at the end of the program.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Define consistent interface to enable instruction result saturation.

v2: Use set_ prefix.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Define consistent interface to enable instruction conditional modifiers.

v2: Use set_ prefix.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Define consistent interface to predicate an instruction.

v2: Use set_ prefix.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Drop include of simple_list.h from mtypes.h.

simple_list.h defines a number of macros with short non-namespaced
names that can easily collide with other declarations (first_elem,
last_elem, next_elem, prev_elem, at_end), and according to the comment
it was only being included because of struct simple_node, which is no
longer used in this file.

Reviewed-by: Brian Paul <brianp@vmware.com>

dri/nouveau: Include simple_list.h explicitly in nv*_state_tnl.c.

Reviewed-by: Brian Paul <brianp@vmware.com>

tnl: Include simple_list.h explicitly in t_context.c.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: Include simple_list.h explicitly in errors.c.

This seems to be the only user of simple_list in core mesa not
including the header explicitly.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa/teximage: use correct extension for accept stencil texture.

This was using the wrong extension, ARB_stencil_texturing
doesn't mention any changes in this area.

Fixes "dEQP-GLES3.functional.fbo.completeness.renderable.texture.
stencil.stencil_index8."

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90751
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Make a helper function intel_miptree_set_total_width_height()

and some more code refactoring. No functional changes in this patch.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/gen9: Set vertical alignment for the miptree

v3: Use ffs() and a switch loop in
    tr_mode_horizontal_texture_alignment() (Ben)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/gen9: Set horizontal alignment for the miptree

v3: Use ffs() and a switch loop in
    tr_mode_vertical_texture_alignment() (Ben)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/gen9: Set tiled resource mode for the miptree

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Pass miptree pointer as function parameter in intel_vertical_texture_alignment_unit

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c

and change the name to brw_miptree_choose_tiling().

V3: Remove redundant function parameters. (Topi)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Choose tiling in brw_miptree_layout() function

This refactoring is required by later patches in this series.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Disallow saturation for MACH operations.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

i965: Export format comparison for blitting between miptrees

Since the introduction of

commit 536003c11e4cb1172c540932ce3cce06f03bf44e
Author: Boyan Ding <boyan.j.ding@gmail.com>
Date:   Wed Mar 25 19:36:54 2015 +0800

    i965: Add XRGB8888 format to intel_screen_make_configs

winsys buffers no longer have an alpha channel. This causes
_mesa_format_matches_format_and_type() to reject previously working BGRA
uploads from using the BLT fast path. Instead of using the generic
routine for matching formats exactly, export the slightly more relaxed
check from intel_miptree_blit() which importantly allows the blitter
routine to apply a small number of format conversions.

References: https://bugs.freedesktop.org/show_bug.cgi?id=90839
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Alexander Monakov <amonakov@gmail.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

i915: Blit RGBX<->RGBA drawpixels

The blitter already has code to accommodate filling in the alpha channel
for BGRX destination formats, so expand this to also allow filling the
alpha channgel in RGBX formats.

More importantly for the next patch is moving the test into its own
function for the purpose of exporting the check to the callers.

v2: Fix alpha expansion as spotted by Alexander with the fix suggested by
Kenneth

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Alexander Monakov <amonakov@gmail.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

i965: Fix HW blitter pitch limits

The BLT pitch is specified in bytes for linear surfaces and in dwords
for tiled surfaces. In both cases the programmable limit is 32,767, so
adjust the check to compensate for the effect of tiling.

v2: Tweak whitespace for functions (Kenneth)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

softpipe/query: force parenthesis around a logical not

This makes GCC5 happy.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

main/version: make sure all the output variables get set in get_gl_override

This fixes 2 warnings in gcc 5.1.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

radeonsi: Add CIK SDMA support

Based on the corresponding SI support. Same as that, this is currently
only enabled for one-dimensional buffer copies due to issues with
multi-dimensional SDMA copies.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

r600g,radeonsi: Assert that there's enough space after flushing

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

docs: add news item and link release notes for mesa 10.5.7

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

docs: Add sha256sums for the 10.5.7 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit eb3a704bb0008c1d046abae31dcb0b2b980c66b1)

Add release notes for the 10.5.7 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 495bcbc48cf4e7cee0f2de11c1166a1fd6eb3969)

prog_to_nir: Fix fragment depth writes.

In the ARB_fragment_program specification, the result.depth output
variable is treated as a vec4, where the fragment depth is stored in the
.z component, and the other three components are undefined.

This is different than GLSL, which uses a scalar value (gl_FragDepth).

To make this consistent for driver backends, this patch makes
prog_to_nir use a scalar output variable for FRAG_RESULT_DEPTH,
moving result.depth.z into the first component.

Fixes Glean's fragProg1 "Z-write test" subtest.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90000
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Set max texture buffer size to hardware limit

Previously we were leaving this at the default of 64K, which meets the
spec but is too small for some real uses. The hardware can handle up to
128M.

User was complaining about this on freenode ##OpenGL today.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add gen8 fast clear perf debug

In an ideal world I would just implement this instead of adding the perf debug.
There are some errata involved which lead me to believe it won't be so simple as
flipping a few bits.

There is room to add a thing for Gen9s flexibility, but since I am actively
working on that I have opted to ignore it.

Example:
Multi-LOD fast clear - giving up (256x128x8).

v2: Use braces for if statements because they are multiple lines (Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add buffer sizes to perf debug of fast clears

When we cannot do the optimized fast clear it's important to know the buffer
size since a small buffer will have much less performance impact.

A follow-on patch could restrict printing the message to only certain sizes.

Example:
Failed to fast clear 1400x1056 depth because of scissors.  Possible 5% performance win if avoided.

Recommended-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

clover: clarify and fix the EGL interop error case

Cc: 10.6 <mesa-stable@lists.freedesktop.org>

egl: expose EGL 1.5 if all requirements are met

There's no driver support yet, because EGL_KHR_gl_colorspace isn't
implemented.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: return correct invalid-type error from eglCreateSync

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: add new platform functions (v2)

These are just wrappers around the existing extension functions.

v2: return BAD_ALLOC if _eglConvertAttribsToInt fails

Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: add eglCreateImage (v2)

v2: - use calloc
    - return BAD_ALLOC if calloc fails

Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: add eglGetSyncAttrib (v2)

v2: - don't modify "value" in eglGetSyncAttribKHR after an error
    - rename _egl_api::GetSyncAttribKHR -> GetSyncAttrib
    - rename GetSyncAttribKHR_t -> GetSyncAttrib_t
    - rename _eglGetSyncAttribKHR to _eglGetSyncAttrib

Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: add eglWaitSync

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: add EGL 1.5 functions that don't need any changes from extensions

Declare the functions without the suffix, so that the core names are exported.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: use EGL 1.5 types without suffixes

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: add context attribs from EGL 1.5

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: fix setting context flags

Cc: 10.6 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: combine VersionMajor and VersionMinor into one variable

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: set the EGL version in common code

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: remove unused _egl_global::ClientExtensions

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: import platform headers from registry (v2)

v2: don't remove local Mesa changes

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: import eglext.h from registry and cleanup eglmesaext.h (v2)

v2: include mesa and chromium extensions in eglext.h so as not to break
    existing users
v3: keep PFNEGLSWAPBUFFERSREGIONNOK because piglit uses it

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: import egl.h from registry (v2)

v2: split the commit into 3 patches

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

mesa: remove unused gl_config::colorIndexMode

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: use GL_GEOMETRY_PROGRAM_NV instead of MESA_GEOMETRY_PROGRAM

There's no reason to use our own definition.
Tessellation will use the NV definitions too.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: use _mesa_has_geometry_shader in get_programiv

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove useless gl_compute_program_state::Current

This is for user assembly shaders only (not GLSL). We won't support those.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove unused geometry shader variables

These states are for GS assembly shaders only. We don't support those.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

tgsi/ureg: fix a coverity defect in emit_decls

Reported by Ilia Mirkin.