Jacob Lifshay [Thu, 12 Oct 2023 03:29:51 +0000 (20:29 -0700)]
WIP getting asm version of knuth's algorithm d working
Jacob Lifshay [Wed, 11 Oct 2023 05:07:17 +0000 (22:07 -0700)]
WIP divmod: implemented division by single word
Jacob Lifshay [Wed, 11 Oct 2023 05:05:49 +0000 (22:05 -0700)]
support ignoring integer registers for ExpectedState
Jacob Lifshay [Wed, 11 Oct 2023 05:03:38 +0000 (22:03 -0700)]
convert assigned values to SVSHAPE when writing to SVSHAPE[0-3] SPRs
this makes mtspr SVSHAPE0, reg properly maintain ISACaller invariants
Jacob Lifshay [Tue, 10 Oct 2023 04:05:17 +0000 (21:05 -0700)]
add WIP Knuth's algorithm D assembly
Jacob Lifshay [Tue, 10 Oct 2023 03:38:30 +0000 (20:38 -0700)]
divmod: assign registers to variables
Jacob Lifshay [Tue, 10 Oct 2023 03:35:40 +0000 (20:35 -0700)]
adapt divmod algorithm for putting variables in registers
Jacob Lifshay [Tue, 10 Oct 2023 03:30:43 +0000 (20:30 -0700)]
add more features for _DivModRegsRegexLogger
Jacob Lifshay [Tue, 10 Oct 2023 01:25:43 +0000 (18:25 -0700)]
finish moving Knuth algorithm D into a class
Jacob Lifshay [Tue, 10 Oct 2023 01:21:40 +0000 (18:21 -0700)]
merely indent function
[skip ci]
Jacob Lifshay [Tue, 10 Oct 2023 01:19:25 +0000 (18:19 -0700)]
start adding DivModKnuthAlgorithmD class
Jacob Lifshay [Tue, 10 Oct 2023 01:18:28 +0000 (18:18 -0700)]
format code
Jacob Lifshay [Mon, 9 Oct 2023 04:46:57 +0000 (21:46 -0700)]
finish writing python_divmod_knuth_algorithm_d
Jacob Lifshay [Mon, 9 Oct 2023 04:46:14 +0000 (21:46 -0700)]
fix generating invalid divmod tests
Jacob Lifshay [Mon, 9 Oct 2023 04:43:00 +0000 (21:43 -0700)]
speed up divmod shift-sub tests by removing most test cases
Jacob Lifshay [Sat, 7 Oct 2023 00:08:35 +0000 (17:08 -0700)]
add WIP knuth algorithm D python implementation
Jacob Lifshay [Fri, 6 Oct 2023 22:21:07 +0000 (15:21 -0700)]
rename divmod algorithm -> divmod_shift_sub in prep for adding divmod based on Knuth's Algorithm D
Jacob Lifshay [Fri, 6 Oct 2023 02:57:29 +0000 (19:57 -0700)]
add WIP powmod_256 -- asm test is currently disabled since divmod is too slow
Jacob Lifshay [Fri, 6 Oct 2023 02:53:45 +0000 (19:53 -0700)]
fix assemble to properly look for whole symbols to replace
previously if there were labels foo and foobar, it would partially
replace foobar giving 0x<addr>bar, which is wrong.
also optimized to use dict instead of linear search for label names
Luke Kenneth Casson Leighton [Thu, 30 Nov 2023 03:03:14 +0000 (03:03 +0000)]
whitespace in pseudocode to aid clarity
Luke Kenneth Casson Leighton [Mon, 27 Nov 2023 10:08:43 +0000 (10:08 +0000)]
got sv.bc working for pospopcount
Luke Kenneth Casson Leighton [Mon, 27 Nov 2023 09:47:29 +0000 (09:47 +0000)]
try ctrtest mode in pospopcount
Luke Kenneth Casson Leighton [Thu, 23 Nov 2023 07:03:49 +0000 (07:03 +0000)]
reduce indentation
Luke Kenneth Casson Leighton [Tue, 21 Nov 2023 17:40:27 +0000 (17:40 +0000)]
starting on pospopcount assembler
Luke Kenneth Casson Leighton [Tue, 21 Nov 2023 12:39:28 +0000 (12:39 +0000)]
add cut/paste copy of strncpy example as basis for pospopcount
https://bugs.libre-soc.org/show_bug.cgi?id=672
Jacob Lifshay [Tue, 21 Nov 2023 01:45:23 +0000 (17:45 -0800)]
fix vertical-first sv.bc
https://bugs.libre-soc.org/show_bug.cgi?id=1210
Andrey Miroshnikov [Fri, 17 Nov 2023 14:55:52 +0000 (14:55 +0000)]
Added sv.bc in vertical-first test
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:42:07 +0000 (15:42 +0000)]
add Z-23 to RT FRS FRT
Shriya Sharma [Fri, 17 Nov 2023 15:38:47 +0000 (15:38 +0000)]
Added English language description for stdupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:38:13 +0000 (15:38 +0000)]
Added English language description for sthupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:36:11 +0000 (15:36 +0000)]
Added English language description for sthupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:35:39 +0000 (15:35 +0000)]
Added English language description for stbupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:34:20 +0000 (15:34 +0000)]
Added English language description for ldupsx instruction
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:30:33 +0000 (15:30 +0000)]
add RS/FRT/FRS to Z-23 Form for ls004
https://bugs.libre-soc.org/show_bug.cgi?id=1055
Shriya Sharma [Fri, 17 Nov 2023 15:33:42 +0000 (15:33 +0000)]
Added English language description for lwaupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:32:56 +0000 (15:32 +0000)]
Added English language description for lwzupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:32:18 +0000 (15:32 +0000)]
Added English language description for lhaupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:31:08 +0000 (15:31 +0000)]
Added English language description for lhzupsx instruction
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:27:48 +0000 (15:27 +0000)]
change ld/st shift to Z23-Form
Shriya Sharma [Fri, 17 Nov 2023 15:29:12 +0000 (15:29 +0000)]
Added English language description for lfdupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:27:31 +0000 (15:27 +0000)]
Added English language description for lbzupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:24:36 +0000 (15:24 +0000)]
Added English language description for stfdux instruction
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:20:37 +0000 (15:20 +0000)]
add comment/header on ld/st shift instructions
Shriya Sharma [Fri, 17 Nov 2023 15:22:08 +0000 (15:22 +0000)]
Added English language description for lfdupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 13:11:09 +0000 (13:11 +0000)]
Test case (all same nos) for maxloc
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 13:02:10 +0000 (13:02 +0000)]
add asserts to check results
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 13:01:22 +0000 (13:01 +0000)]
whitespace
Shriya Sharma [Fri, 17 Nov 2023 12:02:01 +0000 (12:02 +0000)]
Test case (all zeroes) for maxloc
Jacob Lifshay [Thu, 16 Nov 2023 03:31:32 +0000 (19:31 -0800)]
msr and svstate default to None in TestCase, they're replaced with actual values in ISACaller
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:34:38 +0000 (14:34 +0000)]
no point defining nm=-1
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:33:03 +0000 (14:33 +0000)]
add 2nd maxloc case
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:18:20 +0000 (14:18 +0000)]
move maxloc to isacaller directory
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:17:09 +0000 (14:17 +0000)]
python conversion of maxloc.c
Jacob Lifshay [Thu, 9 Nov 2023 02:27:34 +0000 (18:27 -0800)]
add TRAP docs
Jacob Lifshay [Tue, 7 Nov 2023 04:54:52 +0000 (20:54 -0800)]
misc fixes for fallout of copying insn inputs
Jacob Lifshay [Tue, 7 Nov 2023 04:38:18 +0000 (20:38 -0800)]
System Call Interrupts do *not* set SRR1[TRAP]
See PowerISA v3.1B Book III 7.5.14
Jacob Lifshay [Tue, 7 Nov 2023 04:37:07 +0000 (20:37 -0800)]
support TRAP being called without setting a trap_bit
Jacob Lifshay [Tue, 7 Nov 2023 04:54:05 +0000 (20:54 -0800)]
only write outputs that have .ok == True
Jacob Lifshay [Tue, 7 Nov 2023 04:49:19 +0000 (20:49 -0800)]
use create_full_args to generate insn arg list
Jacob Lifshay [Tue, 7 Nov 2023 04:46:03 +0000 (20:46 -0800)]
add SelectableInt.ok
Jacob Lifshay [Tue, 7 Nov 2023 04:43:13 +0000 (20:43 -0800)]
helper for one-source-of-truth for insn argument list for ISACaller and parser
Jacob Lifshay [Tue, 7 Nov 2023 04:41:11 +0000 (20:41 -0800)]
copy_assign_rhs must retain subclasses of SelectableInt
Jacob Lifshay [Mon, 6 Nov 2023 02:14:29 +0000 (18:14 -0800)]
log load/stores to InstrInOuts
Jacob Lifshay [Thu, 2 Nov 2023 01:36:10 +0000 (18:36 -0700)]
format code
Jacob Lifshay [Wed, 1 Nov 2023 05:50:40 +0000 (22:50 -0700)]
misc AST correctness fixes
Luke Kenneth Casson Leighton [Tue, 14 Nov 2023 11:58:09 +0000 (11:58 +0000)]
fix maxloc
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:25:09 +0000 (20:25 +0000)]
add debug print
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:21:42 +0000 (20:21 +0000)]
whoole stack of whitespace corrections
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:17:54 +0000 (20:17 +0000)]
more crap removed
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:14:32 +0000 (20:14 +0000)]
remove unnecessary cruft from Makefile
Andrey Miroshnikov [Wed, 8 Nov 2023 16:37:57 +0000 (16:37 +0000)]
Removed unused include: bug #676
Andrey Miroshnikov [Wed, 8 Nov 2023 16:17:59 +0000 (16:17 +0000)]
Adding fortran C example for Shriya, bug #676
Jacob Lifshay [Mon, 6 Nov 2023 03:07:57 +0000 (19:07 -0800)]
rename all load/store update-shifted-post-increment to *upsx
https://bugs.libre-soc.org/show_bug.cgi?id=1048#c21
Jacob Lifshay [Mon, 6 Nov 2023 02:20:42 +0000 (18:20 -0800)]
fix instruction name conflicts
Jacob Lifshay [Mon, 6 Nov 2023 02:18:08 +0000 (18:18 -0800)]
remove lhaup from pifixedloadshift -- all pi-shift instructions are indexed X-Form rather than D-Form
Jacob Lifshay [Mon, 6 Nov 2023 02:15:03 +0000 (18:15 -0800)]
detect duplicate instructions
Luke Kenneth Casson Leighton [Mon, 6 Nov 2023 02:46:09 +0000 (02:46 +0000)]
rename pifpstore instructions, add "p" into names
Luke Kenneth Casson Leighton [Thu, 2 Nov 2023 07:27:50 +0000 (07:27 +0000)]
use of the word "Kind" is too irritating. replace all occurrences with "Type".
cannot replace lowercase "kind" with "type" as it is a python keyword.
have to think of a better (*short*) argument name
Luke Kenneth Casson Leighton [Thu, 2 Nov 2023 07:14:58 +0000 (07:14 +0000)]
comment on rfid doing a swap-backup of the program, must find
out why and fix it so that is not necessary
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:46:12 +0000 (15:46 +0100)]
add LSHIFT and RSHIFT operators to parser. reluctantly
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:45:52 +0000 (15:45 +0100)]
look for and allow blank lines in pseudocode as well
as english description. remove use of regex (too complex to understand)
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:31:12 +0000 (15:31 +0100)]
missing colon on end of "Description"
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:00:43 +0000 (15:00 +0100)]
remove use of regex (this code is REQUIRED to be SIMPLE)
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:56:50 +0000 (11:56 +0100)]
forgot title
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:55:38 +0000 (11:55 +0100)]
missing brackets in lhbrx
Shriya Sharma [Fri, 27 Oct 2023 10:50:50 +0000 (11:50 +0100)]
added english language description for lhbrsx instruction
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:46:27 +0000 (11:46 +0100)]
missing brackets in lhbrx
Shriya Sharma [Fri, 27 Oct 2023 10:46:18 +0000 (11:46 +0100)]
added english language description for lhbrsx instruction
Shriya Sharma [Fri, 27 Oct 2023 10:44:32 +0000 (11:44 +0100)]
added english language description for ldsux instruction
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:39:35 +0000 (11:39 +0100)]
replace (RA) with "the contents of RA"
Shriya Sharma [Fri, 27 Oct 2023 10:41:40 +0000 (11:41 +0100)]
added english language description for ldbrsx instruction
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:38:09 +0000 (11:38 +0100)]
pifploadshift.mdwn, do one example english pseudocode operands
Shriya Sharma [Fri, 27 Oct 2023 10:40:24 +0000 (11:40 +0100)]
added english language description for lwbrsx instruction
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:36:17 +0000 (11:36 +0100)]
do one example stfsux in pifpstoreshift, english pseudocode operands
Shriya Sharma [Fri, 27 Oct 2023 10:38:58 +0000 (11:38 +0100)]
added english language description for lhbrsx instruction
Shriya Sharma [Fri, 27 Oct 2023 10:37:56 +0000 (11:37 +0100)]
added english language description for ldsx instruction
Shriya Sharma [Fri, 27 Oct 2023 10:35:47 +0000 (11:35 +0100)]
added english language description for lwasux instruction
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 10:33:02 +0000 (11:33 +0100)]
contents of RA again
Shriya Sharma [Fri, 27 Oct 2023 10:34:45 +0000 (11:34 +0100)]
added english language description for lwasx instruction
Shriya Sharma [Fri, 27 Oct 2023 10:33:21 +0000 (11:33 +0100)]
added english language description for lwzsux instruction