mesa: Avoid set comprehension.

Fix build error on CentOS 6.9 with Python 2.6.

  GEN    main/format_fallback.c
  File "./main/format_fallback.py", line 42
    names = {fmt.name for fmt in formats}
                        ^
SyntaxError: invalid syntax

Fixes: a1983223d883 ("mesa: Add _mesa_format_fallback_rgbx_to_rgba() [v2]")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

ac/nir: Move VS position exports before param exports.

According to Nicolai the SX can already start work when all
the position exports are done, so do those first.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Always set depthbuffer using image format instead of iview format.

We have some cases where changing between depth and stencil only aspect
was causing hangs.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>

radv: Disable depth & stencil tests when the depthbuffer doesn't support it.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>

egl: android: Fix potential use of unitialized variable

If dri2_setup_extensions() fails, the "err" variable would not be assigned
causing the error path to access an unitialized variable. Fix it by
assigning an error message.

Fixes: 2c341f2bda4 ("egl: refactor dri2_create_screen() into three separate functions")
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

intel: common: Fix link failure with standalone Android build

Some reshuffle in the Makefiles under src/intel resulted in Android
libraries being no longer linked with code using
src/intel/common/gen_debug.h that contains references to functions
exported by those libraries (namely ALOGW macro, which is currently
resolved into a call to __android_log_print() from cutils).

Fix the build by taking into account ANDROID_CFLAGS and ANDROID_LIBS for
affected module on Android NDK builds.

Fixes: d5b355ce5fd ("i965: Move intel_debug.h to intel/common/gen_debug.h")
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

Android: generate symlinks for all enabled gallium drivers

Current post install command relies on GALLIUM_TARGET_DRIVERS variable,
however variable needs to be initialized in src/gallium/Android.mk
in order that all enabled gallium drivers symlinks are correctly generated.

At the moment due to sorting of INC_DIRS and variable set with svga (vmwgfx)
only vmwgfx_dri.so and virtio_gpu_dri.so symlinks are generated.

Fixes: a3d98ca62f ("Android: use symlinks for driver loading")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

android: build imx-drm winsys

Add Android.mk for winsys/imx/drm.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

android: add etnaviv driver build support

Add etnaviv to Android makefiles.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

st/glsl_to_nir: fix edgeflag passthrough

We have to mark the additional shader input as used, otherwise it will
be eliminated, and we have to setup its index correctly.

This is a bit of a hack, but so is everything surrounding edgeflag
passthrough.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: use pipe_shader_type_from_mesa

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

tgsi_from_mesa: add tgsi_get_gl_frag_result_semantic

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

tgsi_from_mesa: add pipe_shader_type_from_mesa

So... the pipe_ prefix doesn't really fit into a TGSI header; on the
other hand, the return type has the pipe_ prefix.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

tgsi,st/mesa: move varying slot to semantic mapping into a helper for VS

We will use this helper in radeonsi's NIR path.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ddebug: handle some cases of non-TGSI shaders

NIR shaders are not captured properly in pipelined mode currently. This
would require shader cloning, which requires linking all the Gallium
drivers against NIR. We can always do that later.

v2: avoid immediate crashes in pipelined mode

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)

glsl_to_nir: zero-initialize var->data.descriptor_set

This is convenient for backends that support both Vulkan and OpenGL while
lowering samplers to derefs with nir_lower_samplers_as_deref.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: add glsl_base_type_is_integer

We will use this from radeonsi/nir, which we want to keep as pure C code.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nir: add NIR_PRINT environment variable

Reviewed-by: Rob Clark <robdclark@gmail.com>

glsl/blob: add valgrind checks that written data is defined

Undefined data will eventually trigger a valgrind error while computing
its CRC32 while writing it into the disk cache, but at that point, it is
basically impossible to track down where the undefined data came from.

With this change, finding the origin of undefined data becomes easy.

v2: remove duplicate VALGRIND_CFLAGS (Emil)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

glsl: explicitly zero out padding to gl_shader_variable bitfield

Otherwise, the padding bits remain undefined, which leads to valgrind
errors when storing the gl_shader_variable in the disk cache.

v2: use rzalloc instead of an explicit padding member variable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: simplify add_uniform_to_shader::visit_field

Each field gets a distinct name, so we should never hit the case where
the name already exists in the parameter list.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: look for multiple variables simultaneously with find_assignment_visitor

Save some passes over the IR.

v2: redesign to make the users of find_assignments more readable
v3:
- fix missing !
- add some comments and make the num_found check more explicit (Timothy)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

gallium/radeon: fix VDPAU breakage, need VRAM with WC

a5xx: enable polygon offset clamps

This is already set and emitted by the code.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: implement logicop support

The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: enable polygon mode selection

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: disable ARB_depth_clamp for now

We need to figure out how to implement it properly. Right now it doesn't
work at all.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: fix clip_halfz support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: improve 3d texture sampling

At least the first level works now. Eventually the later levels stop
working, there appears to be some alignment issue. But this improves the
situation immensely.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: remove one of the MIPFILTER_LINEAR bits

It doesn't appear to do what we want. Removing this bit makes
lodclamp-between as well as a number of dEQP tests pass, with no visible
ill effect.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: enable formats newly added to the headers

This enables S3TC, BPTC, ETC2, and ASTC texture decoding. Additionally
this enables RGB32 texture buffer objects, as well as 11_11_10_FLOAT and
10_10_10_2 vertex formats (and related extensions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: include color swap when decoding vertices

This fixes support for BGRA vertex formats

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

a5xx: update headers

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>

gallium/radeon: attempt to fix a compiler failure in radeon_winsys.h

trivial.

winsys/amdgpu: use 128KB BOs for suballocations of up to 64KB BOs

This decreases the number of BOs, but might also increase memory usage.
It's better for small textures.

The gameplay is on the far right:
https://people.freedesktop.org/~mareko/suballoc.svg

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: allow suballocating textures

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: generalize the function for in-place texture reallocation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: add radeon_winsys::buffer_is_suballocated

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: clean up pb_cache bucket/usage determination

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: enable suballocations for VRAM with no CPU access

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: clean up (domain, flags) <-> (slab heap) translations

This is cleaner, and we are down to 4 slabs.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove RADEON_FLAG_CPU_ACCESS

https://lists.freedesktop.org/archives/amd-gfx/2017-June/010591.html

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: disallow exports of sparse and suballocated BOs

I think it's unsafe, because the slabs can reuse exported storage.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: clean up r600_texture_get_handle

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: rename RADEON_FLAG_HANDLE -> RADEON_FLAG_NO_SUBALLOC

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: fix a possible crash for buffer exports

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: ignore PIPE_BIND_SHARED for buffers

BO exports can't be predicted this way.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add a HUD query for getting an average GFX BO list size

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: release EGLImage on EGLImageTarget* error

The smapi->get_egl_image() call in st_egl_image_get_surface() stores a
reference to the EGLImage's texture in stimg.texture. That reference is
released via pipe_resource_reference(&stimg.texture, NULL) before stimg
goes out of scope at the end of the function, but not in the error path
if !is_format_supported().

Fixes: 83e9de25f325 ("st/mesa: EGLImageTarget* error handling")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

vc4: automake: include vc4_cl_dump.h in

Ensure vc4_cl_dump.h and $(BROADCOM_FILES) are distributed in the
dist-file.

This fixes `make distcheck`

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

st/mesa: fix tessellation shaders with no support for shareable shaders

Broken by: b43c887a9bf1e3fb99b0dc22bfea5db81375a06e

Reported by Gert Wollny.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radv: enable Int64 capability (v2)

I'm not 100% sure this is all wired up but it looks like it is.

v2: actually enable extension.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac/nir: fix 64-bit shifts

NIR always makes the shift amount 32 bits, but LLVM asserts if the two
sources aren't the same type. Zero-extend the shift amount to make LLVM
happy.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac/nir: implement 64-bit packing and unpacking

We implement the split opcodes, and tell NIR to lower the original ones.
The lowering to LLVM is a little more complicated, but NIR can optimize
the split ones a little better, and some NIR lowering passes that we
might want to use (particularly for doubles) emit the split ones.

This should fix pack/unpackDouble2x32, which seems like a bug since when
we enabled the Float64 capability. It will also fix pack/unpackInt2x32
when we enable the Int64 capability.

Fixes: 798ae37c ("radv: Enable Float64 support.")
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

spirv: fix OpBitcast when the src and dst bitsize are different (v3)

Before, we were just implementing it with a move, which is incorrect
when the source and destination have different bitsizes. To implement
it properly, we need to use the 64-bit pack/unpack opcodes. Since
glslang uses OpBitcast to implement packInt2x32 and unpackInt2x32, this
should fix them on anv (and radv once we enable the int64 capability).

v2: make supporting non-32/64 bit easier (Jason)
v3: add another assert (Jason)

Fixes: b3135c3c ("anv: Advertise shaderInt64 on Broadwell and above")
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

svga: don't call svga_texture_device_format_has_alpha() for PIPE_BUFFER

svga_texture_device_format_has_alpha() is only intended to work for
texture resources, not buffer resources.  This fixes a failed assertion
in the svga_texture() cast function when running texture buffer tests.

Also, add an assertion in svga_texture_device_format_has_alpha() to
catch the issue sooner.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: fix texture buffer object regression

With change 8aba778fa2cd98a0b5a7429d3c5057778a0c808c we stopped binding
sampler objects for texture buffers.  That broke our texture sample /
sampler view setup code.

Now, we loop over the max(num samplers, num sampler views) and handle
the sampler and view information separately.  For texture buffers,
the sampler will be NULL but the sampler view non-null.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: move assertion in draw_vgpu10()

The buffer binding flags aren't ensured until after the
svga_buffer_handle() call, so move the assertion after it.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: fix buffer binding flags initialization

If a buffer is created/initialized with glNamedBufferData we will
have no target (GL_ARRAY_BUFFER, GL_UNIFORM_BUFFER, etc) so the
svga_buffer::bind_flags will be zero until we try to get the buffer
handle.

This patch initializes the svga_buffer::bind_flags field when it's
zero.

This fixes the Piglit arb_uniform_buffer_object-rendering-dsa test.

Note that there's still issues in this area that'll have to be
addressed in the future.  For example, creating a buffer object
as GL_UNIFORM_BUFFER and later using it as a vertex buffer will
fail.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

docs: update bug reporting guidelines

Suggest attaching output of glxinfo/wglinfo.  Suggest providing
an apitrace.

st/mesa: remove an obsolete comment

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: remove unused parameter/member of add_uniform_to_shader

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

util/disk_cache: fix a comment

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: simplify disable_varying_optimizations_for_sso

We always have stage == first and stage == last when first == last, so
drop the special case. Also rephrase the comment to make the logic
clearer.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: always print non-zero var->data.location_frac

This is helpful in debugging varying assignments.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

winsys/radeon: only call pb_slabs_reclaim when slabs are actually used

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100242
Fixes: fb827c055cb1 ("winsys/radeon: enable buffer allocation from slabs")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

anv: check support for enabled features in vkCreateDevice()

From Vulkan spec, 4.2.1. "Device Creation":

  "vkCreateDevice verifies that extensions and features requested in
   the ppEnabledExtensionNames and pEnabledFeatures members of
   pCreateInfo, respectively, are supported by the implementation."

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@gmail.com>

anv: merge tessellation's primitive mode in merge_tess_info()

SPIR-V tessellation shaders that were created from HLSL will have
the primitive generation domain set in tessellation control shader
(hull shader in HLSL) instead of the tessellation evaluation shader.

v2:
- Add assert (Kenneth)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

swr: Limit memory held by defer deleted resources.

This patch limits the number of items on the fence work queue (the
deferred deletion list) by submitting a sync fence when the queue size
exceeds a threshold.  This initiates deferred deletion of all resources
on the list and decreases the total amount of memory held waiting for
"deferred deletion".

This resolves  bug 101467 filed against swr for the piglit
streaming-texture-leak test.  For those running on smaller memory
(16GB?) systems, this will prevent oom-killer.

Thus far, we have not seen any real world applications that exhibit
behavior like the streaming-texture-leak test; as any form of pipeline
flush will trigger the defer queue and properly free any retained
allocations.  But, this addresses those as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

anv: fix reported timestampPeriod value

We lost some precision on a previous change due to switching to
integers. Since we report a float in timestampPeriod, we want the
division to happen in floats.

CID: 1413021
Fixes: c77d98ef32 ("intel: common: express timestamps units in frequency")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel: genxml: make a couple of enums show up in aubinator

In particular Shader Channel Select & Texture Address Control Mode.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

i965: Print access flags in INTEL_DEBUG=buf output.

Being able to see the access mode of various mappings is incredibly
useful for debugging.  With this patch, INTEL_DEBUG=buf now shows
data such as:

   bo_create: buf 7 (bufferobj) 640b
   bo_map_gtt: 7 (bufferobj) -> 0x7fca1fae5000, WRITE ASYNC
   brw_bo_map_cpu: 7 (bufferobj) -> 0x7fca1fae4000, READ
   bo_map_gtt: 5 (bufferobj) -> 0x7fca1fad4000, WRITE ASYNC
   brw_bo_map_cpu: 7 (bufferobj) -> 0x7fca1fae4000, READ

which makes it easy to see that there are async GTT writes with
intervening CPU reads.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Remove clearing of bo->map_gtt after failure

With the conversion to storing the result of drm_mmap to a local and not
directly to bo->map_gtt itself, we no longer should clear bo->map_gtt.
In the best the operation is redundant as we know bo->map_gtt to already
be NULL, but in the worst case we overwrite a concurrent thread that
successfully mmaped the GTT.

Fixes: 314647c4c206 ("i965: Drop global bufmgr lock from brw_bo_map_* functions.")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add inline to brw_bo_unmap

I meant to do this in "i965: Make brw_bo_unmap a static inline."
but botched the commit fixup.

i965: Drop global bufmgr lock from brw_bo_map_* functions.

After removing the unusuable debugging code in the previous commit, we
can also entirely remove the global mutex around mapping the buffer for
the first time and replace it with a single atomic operation to update
the cache once we retrieve the mmap.

v2 (Ken): Split out from Chris's original commit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Make brw_bo_unmap a static inline.

With the broken debugging code gone, it doesn't do anything anymore.
We could technically eliminate it, but I'd like to keep it around in
case we want to add something there again someday.  Otherwise we'd
have to go all over the codebase adding unmap calls back again.

Based on a patch by Chris Wilson.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Discard bo->map_count

Supposedly we were keeping a reference count for the number of users of
a mapping so that we could use valgrind to detect access to the map
outside of the valid section. However, we were incrementing the counter
only when first creating the cached mapping but decrementing on every
unmap. The bo->map_count tracking was wrong and so the debugging code
was completely useless.

v2 (Ken): Separate out atomic compare and swap optimization.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Add a comment about not needing VALGRIND_MALLOCLIKE_BLOCK.

At first glance this seems missing, since we handle it manually for CPU
and WC maps.  Although a bit inconsistent, it's actually not necessary.

Thanks to Chris Wilson for explaining this to me.

Reviewed-by: Matt Turner <mattst88@gmail.com>

radv: Use v4i32 variant of llvm.SI.load.const.

We apparently still used v16i8 ....

As radeonsi doesn't use it with LLVM version checks I don't think
we need them either.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

svga: add texture size/levels sanity check code in svga_texture_create()

The state tracker should never ask us to create a texture with invalid
dimensions / mipmap levels.  Do some assertions to check that.

No Piglit regressions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

st/mesa: fix texture image resource selection in st_render_texture()

If we're rendering to an incomplete/inconsistent (cube) texture, the
different faces/levels of the texture may be stored in different
resources.  Before, we always used the texture object resource.  Now,
we use the texture image resource.  In normal circumstances, that's
the same resource.  But in some cases, such as the Piglit
fbo-incomplete-texture-03 test, the cube faces are in different
resources and we need to render to the texture image resource.

Fixes fbo-incomplete-texture-03 with VMware driver.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/mesa: check for incomplete texture in st_finalize_texture()

Return early from st_finalize_texture() if we have an incomplete
texture.  This avoids trying to create a texture resource with invalid
parameters (too many mipmap levels given the base dimension).

Specifically, the Piglit fbo-incomplete-texture-03 test winds up
calling pipe_screen::resource_create() with width0=32, height0=32 and
last_level=6 because the first five cube faces are 32x32 but the sixth
face is 64x64.  Some drivers handle this, but others (like VMware svga)
do not (generates device errors).

Note that this code is on the path that's usually not taken (we normally
build consistent textures).

No Piglit regressions.

v2: only need to check for base-level completeness since that's what has to
be consistent in order to specify the dimensions for a new gallium texture.
Per Roland.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium/docs: document that TXF is used with PIPE_BUFFER resources

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium/docs: clarify that samplers are not used with PIPE_BUFFER resources

Commit 8aba778fa2cd98a0b5a7429d3c5057778a0c808c "st/mesa: don't set
sampler states for TBOs" changed how texture buffer objects are handled.
Document the new convention.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

vc4: Start using XML unpack functions in CL dump.

For now this is a no-op on the output, but it makes it clear that we've
had weird things going on with things like
V3D21_CLIPPER_Z_SCALE_AND_OFFSET.

vc4: Replace a couple of magic numbers with #define usage.

vc4: Move rasterizer state packing to CSO creation time.

This gets our vc4_emit.c size back down a bit:

before:
   1020       0       0    1020     3fc src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
    968       0       0     968     3c8 src/gallium/drivers/vc4/.libs/vc4_emit.o

vc4: Convert the driver to emitting the shader record using pack macros.

vc4: Simplify pack header usage

Take the CL pointer in, which will be useful for enabling relocs.
However, our code expands a bit more:

before:
   4449       0       0    4449    1161 src/gallium/drivers/vc4/.libs/vc4_draw.o
    988       0       0     988     3dc src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
   4481       0       0    4481    1181 src/gallium/drivers/vc4/.libs/vc4_draw.o
   1020       0       0    1020     3fc src/gallium/drivers/vc4/.libs/vc4_emit.o

vc4: Start using the pack header.

This slightly inflates the size of the generated code, in exchange for
getting us some convenient tools.

before:
   4389       0       0    4389    1125 src/gallium/drivers/vc4/.libs/vc4_draw.o
    808       0       0     808     328 src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
   4449       0       0    4449    1161 src/gallium/drivers/vc4/.libs/vc4_draw.o
    988       0       0     988     3dc src/gallium/drivers/vc4/.libs/vc4_emit.o

vc4: Introduce XML-based packet header generation like Intel's.

I really liked this idea, as it should help with management of packet
parsing tools like the CL dump.  The python script is forked off of theirs
because our packets are byte-based instead of dwords, and the changes to
do so while avoiding performance regressions due to unaligned accesses
were quite invasive.

v2: Fix Android.mk paths, drop shebang for python script, fix overlap
    detection.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Rob Herring <robh@kernel.org>

swr: Minor cleanup of variable usage, no functional change.

In swr_update_derived, for consistency, index buffer validation should
be using the p_draw_info copy "info" rather than referencing
p_draw_info.

No functional change.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: use swr_query_result type instead of void

Tag pStat field in swr_draw_context structure so gen_llvm_types.py
can deal with the actual structure type instead of using void.

Code cleanup, no functional change.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: increase number of possible draws in flight

Increases performance of some large workloads on KNL by ~30%.

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

swr/rast: move default split size from driver to rasterizer

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

swr/rast: Fix missing setup of psContext.pColorBuffer

Fixes render target read access from pixel shaders.

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

swr/rast: Switch intrinsic usage to SIMDLib

Switch from a macro-based simd intrinsics layer to a more C++
implementation, which also adds AVX512 optimizations to 128-bit
and 256-bit SIMD.

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

scons: allow .inl file extension

Intended for header files which are not meant to be included directly.

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

swr/rast: Fix unused variable warnings

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

swr/rast: Split rasterizer.cpp to improve compile time

Hardcode split to four files currently.  Decreases swr build
time on KNL by over 50%.

Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>