yosys.git
4 years agokernel: Ensure `dict` always hashes to the same value given the same contents.
Alberto Gonzalez [Fri, 24 Apr 2020 08:37:16 +0000 (08:37 +0000)]
kernel: Ensure `dict` always hashes to the same value given the same contents.

4 years agokernel: Re-implement `dict` hash code as a `dict` member function instead of a specia...
Alberto Gonzalez [Wed, 22 Apr 2020 22:04:22 +0000 (22:04 +0000)]
kernel: Re-implement `dict` hash code as a `dict` member function instead of a specialized template for `hash_ops`.

4 years agotechmap: Replace naughty `const_cast<>()`s.
Alberto Gonzalez [Tue, 21 Apr 2020 17:47:00 +0000 (17:47 +0000)]
techmap: Replace naughty `const_cast<>()`s.

Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
4 years agotechmap: Replace pseudo-private member usage with the range accessor function and...
Alberto Gonzalez [Tue, 21 Apr 2020 07:51:29 +0000 (07:51 +0000)]
techmap: Replace pseudo-private member usage with the range accessor function and some naughty `const_cast<>()`s.

4 years agotechmap: sort celltypeMap as it determines techmap order
Eddie Hung [Tue, 21 Apr 2020 03:56:38 +0000 (20:56 -0700)]
techmap: sort celltypeMap as it determines techmap order

4 years agoReplace `std::set`s using custom comparators with `pool`.
Alberto Gonzalez [Mon, 20 Apr 2020 22:55:11 +0000 (22:55 +0000)]
Replace `std::set`s using custom comparators with `pool`.

Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
4 years agotechmap: prefix special wires with backslash for use as IdString
Eddie Hung [Mon, 20 Apr 2020 22:50:12 +0000 (15:50 -0700)]
techmap: prefix special wires with backslash for use as IdString

4 years agoFurther clean up `passes/techmap/techmap.cc`.
Alberto Gonzalez [Mon, 20 Apr 2020 21:57:23 +0000 (21:57 +0000)]
Further clean up `passes/techmap/techmap.cc`.

Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
4 years agoUse `emplace()` for more efficient insertion into various `dict`s.
Alberto Gonzalez [Mon, 20 Apr 2020 05:59:00 +0000 (05:59 +0000)]
Use `emplace()` for more efficient insertion into various `dict`s.

4 years agoBuild constant bits directly rather than constructing an object and copying its bits.
Alberto Gonzalez [Mon, 20 Apr 2020 05:10:08 +0000 (05:10 +0000)]
Build constant bits directly rather than constructing an object and copying its bits.

4 years agoReplace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`.
Alberto Gonzalez [Mon, 20 Apr 2020 04:46:09 +0000 (04:46 +0000)]
Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`.

4 years agoUse `emplace()` rather than `insert()`.
Alberto Gonzalez [Mon, 20 Apr 2020 04:42:19 +0000 (04:42 +0000)]
Use `emplace()` rather than `insert()`.

4 years agoClean up pseudo-private member usage and ensure range iteration uses references where...
Alberto Gonzalez [Mon, 20 Apr 2020 00:01:14 +0000 (00:01 +0000)]
Clean up pseudo-private member usage and ensure range iteration uses references where possible to avoid unnecessary copies.

4 years agoClean up extraneous buffer.
Alberto Gonzalez [Sun, 19 Apr 2020 23:52:21 +0000 (23:52 +0000)]
Clean up extraneous buffer.

4 years agoReplace `std::map` with `dict` for `unique_bit_id`.
Alberto Gonzalez [Sun, 19 Apr 2020 22:44:38 +0000 (22:44 +0000)]
Replace `std::map` with `dict` for `unique_bit_id`.

4 years agoReplace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `cellbits_...
Alberto Gonzalez [Sun, 19 Apr 2020 22:41:21 +0000 (22:41 +0000)]
Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `cellbits_to_tplbits`.

4 years agoReplace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`.
Alberto Gonzalez [Sun, 19 Apr 2020 22:38:10 +0000 (22:38 +0000)]
Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`.

4 years agoReplace `std::map` with `dict` for `TechmapWires` type.
Alberto Gonzalez [Sun, 19 Apr 2020 22:34:17 +0000 (22:34 +0000)]
Replace `std::map` with `dict` for `TechmapWires` type.

4 years agoReplace `std::map` with `dict` for `celltypeMap`.
Alberto Gonzalez [Sun, 19 Apr 2020 22:32:28 +0000 (22:32 +0000)]
Replace `std::map` with `dict` for `celltypeMap`.

4 years agoReplace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`.
Alberto Gonzalez [Sun, 19 Apr 2020 22:24:20 +0000 (22:24 +0000)]
Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`.

4 years agoReplace `std::map` with `dict` for `positional_ports`.
Alberto Gonzalez [Sun, 19 Apr 2020 22:21:52 +0000 (22:21 +0000)]
Replace `std::map` with `dict` for `positional_ports`.

4 years agoAdd specialized `hash()` for type `dict` and use a `dict` instead of a `std::map...
Alberto Gonzalez [Tue, 14 Apr 2020 18:09:05 +0000 (18:09 +0000)]
Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::map` for `techmap_cache` and `techmap_do_cache`.

4 years agoReplace `std::map` with `dict` for `simplemap_mappers`.
Alberto Gonzalez [Tue, 14 Apr 2020 17:50:23 +0000 (17:50 +0000)]
Replace `std::map` with `dict` for `simplemap_mappers`.

4 years agoUse `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`.
Alberto Gonzalez [Tue, 14 Apr 2020 17:44:33 +0000 (17:44 +0000)]
Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`.

4 years agoReplace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techmap/techma...
Alberto Gonzalez [Tue, 14 Apr 2020 17:38:43 +0000 (17:38 +0000)]
Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techmap/techmap.cc`.

Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
4 years agoDo not modify design modules while iterating over `modules()`.
Alberto Gonzalez [Fri, 10 Apr 2020 07:19:05 +0000 (07:19 +0000)]
Do not modify design modules while iterating over `modules()`.

Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
4 years agoClean up pseudo-private member usage, superfluous `std::vector` instantiation, and...
Alberto Gonzalez [Sun, 5 Apr 2020 07:07:50 +0000 (07:07 +0000)]
Clean up pseudo-private member usage, superfluous `std::vector` instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`.

4 years agoMerge pull request #2025 from YosysHQ/eddie/frontend_cleanup
Eddie Hung [Tue, 5 May 2020 14:59:40 +0000 (07:59 -0700)]
Merge pull request #2025 from YosysHQ/eddie/frontend_cleanup

frontend: cleanup to use more ID::*, more dict<> instead of map<>

4 years agoMerge pull request #2012 from whitequark/fix-wasi-abc-build
whitequark [Tue, 5 May 2020 14:03:40 +0000 (14:03 +0000)]
Merge pull request #2012 from whitequark/fix-wasi-abc-build

Fix WASI builds with abc enabled

4 years agoMerge pull request #2026 from YosysHQ/eddie/scratchpad_abc9_W
Eddie Hung [Tue, 5 May 2020 13:49:36 +0000 (06:49 -0700)]
Merge pull request #2026 from YosysHQ/eddie/scratchpad_abc9_W

synth_ice40/ecp5/xilinx: allow abc9.W to be overridden via scratchpad

4 years agoMerge pull request #2024 from YosysHQ/eddie/primitive_src
Eddie Hung [Tue, 5 May 2020 13:49:18 +0000 (06:49 -0700)]
Merge pull request #2024 from YosysHQ/eddie/primitive_src

verilog: set src attribute for primitives

4 years agoMerge pull request #2023 from YosysHQ/eddie/specify_src
Eddie Hung [Tue, 5 May 2020 13:49:06 +0000 (06:49 -0700)]
Merge pull request #2023 from YosysHQ/eddie/specify_src

verilog: fix specify src attribute

4 years agosynth_ice40/ecp5/xilinx: allow abc9.W to be overridden via scratchpad
Eddie Hung [Mon, 4 May 2020 18:44:00 +0000 (11:44 -0700)]
synth_ice40/ecp5/xilinx: allow abc9.W to be overridden via scratchpad

4 years agoverilog: fix specify src attribute
Eddie Hung [Mon, 4 May 2020 17:53:06 +0000 (10:53 -0700)]
verilog: fix specify src attribute

4 years agofrontend: cleanup to use more ID::*, more dict<> instead of map<>
Eddie Hung [Mon, 4 May 2020 17:48:37 +0000 (10:48 -0700)]
frontend: cleanup to use more ID::*, more dict<> instead of map<>

4 years agoverilog: set src attribute for primitives
Eddie Hung [Mon, 4 May 2020 17:22:05 +0000 (10:22 -0700)]
verilog: set src attribute for primitives

4 years agotests: add tests for primitives' src
Eddie Hung [Mon, 4 May 2020 17:21:47 +0000 (10:21 -0700)]
tests: add tests for primitives' src

4 years agoMerge pull request #1996 from boqwxp/rtlil_source_locations
Eddie Hung [Mon, 4 May 2020 15:58:50 +0000 (08:58 -0700)]
Merge pull request #1996 from boqwxp/rtlil_source_locations

frontend: Include complete source location instead of just `location.first_line` in `frontends/ast/genrtlil.cc`.

4 years agoMerge pull request #2000 from whitequark/log_error-trap
whitequark [Sun, 3 May 2020 16:19:42 +0000 (16:19 +0000)]
Merge pull request #2000 from whitequark/log_error-trap

kernel: Trap in `log_error()` when a debugger is attached

4 years agokernel: Trap in `log_error()` when a debugger is attached.
whitequark [Fri, 24 Apr 2020 19:37:47 +0000 (19:37 +0000)]
kernel: Trap in `log_error()` when a debugger is attached.

The workflow of debugging fatal pass errors in Yosys is flawed in
three ways:
 1. Running Yosys under a debugger is sufficient for the debugger
    to catch some fatal errors (segfaults, aborts, STL exceptions)
    but not others (`log_error()`, `log_cmd_error()`). This is
    neither obvious nor easy to remember.
 2. To catch Yosys-specific fatal errors, it is necessary to set
    a breakpoint at `logv_error_with_prefix()`, or at least,
    `logv_error()`. This is neither obvious nor easy to remember,
    and GDB's autocomplete takes many seconds to suggest function
    names due to the large amount of symbols in Yosys.
 3. If a breakpoint is not set and Yosys encounters with such
    a fatal error, the process terminates. When debugging a crash
    that takes a long time to reproduce (or a nondeterministic crash)
    this can waste a significant amount of time.

To solve this problem, add a macro `YS_DEBUGTRAP` that acts as a hard
breakpoint (if available), and a macro `YS_DEBUGTRAP_IF_DEBUGGING`
that acts as a hard breakpoint only if debugger is present.

Then, use `YS_DEBUGTRAP_IF_DEBUGGING` in `logv_error_with_prefix()`
to obviate the need for a breakpoint on nearly every platform.

Co-Authored-By: Alberto Gonzalez <boqwxp@airmail.cc>
4 years agoMerge pull request #2014 from YosysHQ/claire/fixoptalu
Claire Wolf [Sun, 3 May 2020 09:56:29 +0000 (11:56 +0200)]
Merge pull request #2014 from YosysHQ/claire/fixoptalu

Fix the other "opt_expr -fine" bug introduced in 213a89558

4 years agotest: add test for #2014
Eddie Hung [Sat, 2 May 2020 21:22:37 +0000 (14:22 -0700)]
test: add test for #2014

4 years agoMerge pull request #2013 from YosysHQ/eddie/aiger_fixes
Eddie Hung [Sat, 2 May 2020 21:16:10 +0000 (14:16 -0700)]
Merge pull request #2013 from YosysHQ/eddie/aiger_fixes

 aiger: fixes for ports that have start_offset != 0

4 years agoFix the other "opt_expr -fine" bug introduced in 213a89558
Claire Wolf [Sat, 2 May 2020 19:34:24 +0000 (21:34 +0200)]
Fix the other "opt_expr -fine" bug introduced in 213a89558

Signed-off-by: Claire Wolf <claire@symbioticeda.com>
4 years agoabc9_ops: -reintegrate to be sensitive to start_offset too
Eddie Hung [Sat, 2 May 2020 18:19:04 +0000 (11:19 -0700)]
abc9_ops: -reintegrate to be sensitive to start_offset too

4 years agotests: aiger test for wire->start_offset != 0
Eddie Hung [Sat, 2 May 2020 16:56:10 +0000 (09:56 -0700)]
tests: aiger test for wire->start_offset != 0

4 years agoaiger: fixes for ports that have start_offset != 0
Eddie Hung [Sat, 2 May 2020 16:55:34 +0000 (09:55 -0700)]
aiger: fixes for ports that have start_offset != 0

4 years agoMerge pull request #2010 from YosysHQ/claire/fixopt
Claire Wolf [Sat, 2 May 2020 09:20:02 +0000 (11:20 +0200)]
Merge pull request #2010 from YosysHQ/claire/fixopt

Fix "opt_expr -fine" bug introduced in 213a89558

4 years agoUpdate ABC to include WASI support fixes.
whitequark [Sat, 2 May 2020 00:18:33 +0000 (00:18 +0000)]
Update ABC to include WASI support fixes.

4 years agoFix WASI builds with abc enabled.
whitequark [Fri, 1 May 2020 23:57:35 +0000 (23:57 +0000)]
Fix WASI builds with abc enabled.

This PR works around #2011.

4 years agoMerge pull request #2001 from whitequark/wasi
whitequark [Fri, 1 May 2020 21:28:20 +0000 (21:28 +0000)]
Merge pull request #2001 from whitequark/wasi

Add WASI platform support

4 years agoAdd testcase for #2010
Eddie Hung [Fri, 1 May 2020 21:07:33 +0000 (14:07 -0700)]
Add testcase for #2010

4 years agoFix "opt_expr -fine" bug introduced in 213a89558
Claire Wolf [Fri, 1 May 2020 17:10:26 +0000 (19:10 +0200)]
Fix "opt_expr -fine" bug introduced in 213a89558

Signed-off-by: Claire Wolf <claire@symbioticeda.com>
4 years agoMerge pull request #1997 from whitequark/document-ootb
Claire Wolf [Fri, 1 May 2020 13:35:33 +0000 (15:35 +0200)]
Merge pull request #1997 from whitequark/document-ootb

Explain how to do out-of-tree builds in README

4 years agoMerge pull request #1981 from YosysHQ/claire/fix1837
Claire Wolf [Fri, 1 May 2020 12:58:41 +0000 (14:58 +0200)]
Merge pull request #1981 from YosysHQ/claire/fix1837

Clear current_scope when done with RTLIL generation

4 years agofrontend: Include complete source location instead of just `location.first_line`...
Alberto Gonzalez [Fri, 24 Apr 2020 08:08:25 +0000 (08:08 +0000)]
frontend: Include complete source location instead of just `location.first_line` in `frontends/ast/genrtlil.cc`.

4 years agoAdd WASI platform support.
whitequark [Mon, 11 Nov 2019 09:23:06 +0000 (09:23 +0000)]
Add WASI platform support.

This includes the following significant changes:
  * Patching ezsat and minisat to disable resource limiting code
    on WASM/WASI, since the POSIX functions they use are unavailable.
  * Adding a new definition, YOSYS_DISABLE_SPAWN, present if platform
    does not support spawning subprocesses (i.e. Emscripten or WASI).
    This definition hides the definition of `run_command()`.
  * Adding a new Makefile flag, DISABLE_SPAWN, present in the same
    condition. This flag disables all passes that require spawning
    subprocesses for their function.

4 years agoMerge pull request #1999 from YosysHQ/eddie/verific_enum_again
Eddie Hung [Thu, 30 Apr 2020 16:07:02 +0000 (09:07 -0700)]
Merge pull request #1999 from YosysHQ/eddie/verific_enum_again

verific: recover wiretype/enum attr as part of import_attributes()

4 years agoMerge pull request #2008 from whitequark/editorconfig-abc
whitequark [Thu, 30 Apr 2020 15:53:27 +0000 (15:53 +0000)]
Merge pull request #2008 from whitequark/editorconfig-abc

Fix .editorconfig to not break abc

4 years agoverific: ignore anonymous enums
Eddie Hung [Thu, 30 Apr 2020 14:48:47 +0000 (07:48 -0700)]
verific: ignore anonymous enums

4 years agoFix .editorconfig to not break abc.
whitequark [Thu, 30 Apr 2020 02:22:37 +0000 (02:22 +0000)]
Fix .editorconfig to not break abc.

4 years agoverific: support VHDL enums too
Eddie Hung [Mon, 27 Apr 2020 22:17:13 +0000 (15:17 -0700)]
verific: support VHDL enums too

4 years agoMerge pull request #1946 from YosysHQ/eddie/yosyshq_abc
Eddie Hung [Mon, 27 Apr 2020 20:48:50 +0000 (13:48 -0700)]
Merge pull request #1946 from YosysHQ/eddie/yosyshq_abc

abc: use YosysHQ/abc instead of upstream berkeley-abc/abc

4 years agoUpdate CHANGELOG and manual for departure from upstream
Eddie Hung [Mon, 27 Apr 2020 19:08:45 +0000 (12:08 -0700)]
Update CHANGELOG and manual for departure from upstream

4 years agoabc: use YosysHQ/abc instead of upstream berkeley-abc/abc
Eddie Hung [Thu, 16 Apr 2020 15:01:26 +0000 (08:01 -0700)]
abc: use YosysHQ/abc instead of upstream berkeley-abc/abc

Enabling modifications

4 years agoMerge pull request #1992 from YosysHQ/eddie/bugpoint_help
Eddie Hung [Mon, 27 Apr 2020 18:12:17 +0000 (11:12 -0700)]
Merge pull request #1992 from YosysHQ/eddie/bugpoint_help

bugpoint: improve help text

4 years agoverific: recover wiretype/enum attr as part of import_attributes()
Eddie Hung [Mon, 27 Apr 2020 15:43:54 +0000 (08:43 -0700)]
verific: recover wiretype/enum attr as part of import_attributes()

4 years agoMerge pull request #2002 from YosysHQ/dave/cxxrtl-width
whitequark [Sat, 25 Apr 2020 18:30:53 +0000 (18:30 +0000)]
Merge pull request #2002 from YosysHQ/dave/cxxrtl-width

cxxrtl: Round up constant width

4 years agocxxrtl: Round up constant width
David Shah [Sat, 25 Apr 2020 09:42:21 +0000 (10:42 +0100)]
cxxrtl: Round up constant width

Signed-off-by: David Shah <dave@ds0.me>
4 years agoREADME: explain how to do out-of-tree builds.
whitequark [Fri, 24 Apr 2020 18:07:13 +0000 (18:07 +0000)]
README: explain how to do out-of-tree builds.

4 years agoFix out-of-tree builds configured as `SMALL := 1`.
whitequark [Fri, 24 Apr 2020 23:26:26 +0000 (23:26 +0000)]
Fix out-of-tree builds configured as `SMALL := 1`.

4 years agogowin,ecp5: remove generated files in `make clean`.
whitequark [Fri, 24 Apr 2020 18:24:10 +0000 (18:24 +0000)]
gowin,ecp5: remove generated files in `make clean`.

4 years agoMerge pull request #1998 from whitequark/cxxrtl-fixes
whitequark [Fri, 24 Apr 2020 22:44:35 +0000 (22:44 +0000)]
Merge pull request #1998 from whitequark/cxxrtl-fixes

cxxrtl: fix attribute syntax, minor fixes

4 years agobugpoint: improve messaging
Eddie Hung [Fri, 24 Apr 2020 20:41:19 +0000 (13:41 -0700)]
bugpoint: improve messaging

4 years agobugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cells
Eddie Hung [Fri, 24 Apr 2020 20:26:04 +0000 (13:26 -0700)]
bugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cells

4 years agoRevert "verific: import enum attributes from verific"
Eddie Hung [Fri, 24 Apr 2020 18:57:55 +0000 (11:57 -0700)]
Revert "verific: import enum attributes from verific"

This reverts commit 5028e17f7db11f901ce9e423dfe2c6f7e68259cc.

4 years agocxxrtl: use `cxxrtl_` prefix rather than `cxxrtl.`
whitequark [Fri, 24 Apr 2020 18:35:53 +0000 (18:35 +0000)]
cxxrtl: use `cxxrtl_` prefix rather than `cxxrtl.`

The former prefix does not need to be escaped in Verilog, unlike
the latter, and the Yosys convention is to use the former.

4 years agobugpoint: skip ports with (* keep *) on; add header
Eddie Hung [Fri, 24 Apr 2020 18:17:09 +0000 (11:17 -0700)]
bugpoint: skip ports with (* keep *) on; add header

4 years agoMerge pull request #1995 from YosysHQ/eddie/fix_verific_wiretype
Claire Wolf [Fri, 24 Apr 2020 12:09:47 +0000 (14:09 +0200)]
Merge pull request #1995 from YosysHQ/eddie/fix_verific_wiretype

verific: do not assert if wire not found; warn instead

4 years agointel_alm: cleanup duplication
Dan Ravensloft [Thu, 23 Apr 2020 21:44:29 +0000 (22:44 +0100)]
intel_alm: cleanup duplication

4 years agocxxrtl: improve printing of narrow memories.
whitequark [Fri, 24 Apr 2020 05:50:10 +0000 (05:50 +0000)]
cxxrtl: improve printing of narrow memories.

4 years agocxxrtl: fix handling of parametric modules with large parameters.
whitequark [Fri, 24 Apr 2020 05:44:39 +0000 (05:44 +0000)]
cxxrtl: fix handling of parametric modules with large parameters.

These have a `$paramod$` prefix, not `$paramod\\`.

4 years agoverific: do not assert if wire not found; warn instead
Eddie Hung [Thu, 23 Apr 2020 23:28:11 +0000 (16:28 -0700)]
verific: do not assert if wire not found; warn instead

4 years agobugpoint: improve help text
Eddie Hung [Thu, 23 Apr 2020 19:16:55 +0000 (12:16 -0700)]
bugpoint: improve help text

4 years agoMerge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs
Eddie Hung [Thu, 23 Apr 2020 13:43:30 +0000 (06:43 -0700)]
Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs

abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails)

4 years agoMerge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocs
Claire Wolf [Thu, 23 Apr 2020 09:34:19 +0000 (11:34 +0200)]
Merge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocs

qbfsat: Make hole name recovery from source locations more robust.

4 years agoMerge pull request #1988 from boqwxp/qbfsat
Claire Wolf [Thu, 23 Apr 2020 09:33:54 +0000 (11:33 +0200)]
Merge pull request #1988 from boqwxp/qbfsat

qbfsat: Add `-assume-negative-polarity` option.

4 years agoMerge pull request #1986 from YosysHQ/eddie/verific_enum
Claire Wolf [Thu, 23 Apr 2020 09:28:05 +0000 (11:28 +0200)]
Merge pull request #1986 from YosysHQ/eddie/verific_enum

verific: import enum attributes from verific

4 years agointel_alm: work around a Quartus ICE
Dan Ravensloft [Wed, 22 Apr 2020 23:56:49 +0000 (00:56 +0100)]
intel_alm: work around a Quartus ICE

4 years agoqbfsat: Make hole name recovery more robust. Allow multiple cell types to share the...
Alberto Gonzalez [Thu, 23 Apr 2020 05:42:18 +0000 (05:42 +0000)]
qbfsat: Make hole name recovery more robust. Allow multiple cell types to share the same source location as long as only one `$anyconst` or `$anyseq` has that location.

4 years agoMerge pull request #1984 from YosysHQ/eddie/getParam_exception
Eddie Hung [Thu, 23 Apr 2020 05:12:41 +0000 (22:12 -0700)]
Merge pull request #1984 from YosysHQ/eddie/getParam_exception

kernel: Cell::getParam() to throw exception again if not found

4 years agoqbfsat: Add `-assume-negative-polarity` option.
Alberto Gonzalez [Thu, 23 Apr 2020 04:06:15 +0000 (04:06 +0000)]
qbfsat: Add `-assume-negative-polarity` option.

4 years agoecp5: ecp5_gsr to skip cells that don't have GSR parameter again
Eddie Hung [Thu, 23 Apr 2020 00:53:08 +0000 (17:53 -0700)]
ecp5: ecp5_gsr to skip cells that don't have GSR parameter again

4 years agotests: read +/xilinx/cell_sim.v before xilinx_dsp test
Eddie Hung [Thu, 23 Apr 2020 00:50:30 +0000 (17:50 -0700)]
tests: read +/xilinx/cell_sim.v before xilinx_dsp test

4 years agoxilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only
Eddie Hung [Thu, 23 Apr 2020 00:43:25 +0000 (17:43 -0700)]
xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only

4 years agoverific: import enum attributes from verific
Eddie Hung [Thu, 23 Apr 2020 00:26:56 +0000 (17:26 -0700)]
verific: import enum attributes from verific

4 years agotest: ice40_dsp test to read +/ice40/cells_sim.v for default params
Eddie Hung [Wed, 22 Apr 2020 23:35:35 +0000 (16:35 -0700)]
test: ice40_dsp test to read +/ice40/cells_sim.v for default params

4 years agoxilinx: improve xilinx_dffopt message
Eddie Hung [Wed, 22 Apr 2020 20:59:56 +0000 (13:59 -0700)]
xilinx: improve xilinx_dffopt message

4 years agoxilinx: xilinx_dffopt to read cells_sim.v; fix test
Eddie Hung [Wed, 22 Apr 2020 20:57:09 +0000 (13:57 -0700)]
xilinx: xilinx_dffopt to read cells_sim.v; fix test

4 years agokernel: Cell::getParam() to throw exception again if not found
Eddie Hung [Wed, 22 Apr 2020 19:07:08 +0000 (12:07 -0700)]
kernel: Cell::getParam() to throw exception again if not found

As it did before #1945