* doc/invoke.texi (Optimize Options): Fix typo.

From-SVN: r275699

re PR fortran/91716 (ICE in output_constant, at varasm.c:5026)

2019-09-13  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR fortran/91716
        * trans-array.c (gfc_conv_array_initializer): Always assign the
        array type of the field to the string constant.

testsuite:
2019-09-13  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR fortran/91716
        * gfortran.dg/pr91716.f90: New test.

From-SVN: r275698

[PATCH][GCC] Update my email address

gcc/ChangeLog
2019-09-13  Sam Tebbs  <sam.tebbs@arm.com>

* MAINTAINERS (Sam Tebbs): Update email address.

From-SVN: r275697

re PR fortran/91717 (ICE on concatenating deferred-length character and character literal)

2019-09-13  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/91717
* dependency.c (gfc_dep_resolver): Flag identical components
and exit with return value 1 if set and no array refs.

2019-09-13  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/91717
* gfortran.dg/dependency_55.f90 : New test.

From-SVN: r275696

Daily bump.

From-SVN: r275695

libgo: update to Go1.13

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194698

From-SVN: r275691

re PR tree-optimization/89386 (Generation of vectorized MULHRS (Multiply High with Round and Scale) instruction)

PR tree-optimization/89386
* config/i386/sse.md (smulhrs<mode>3): New expander.
(smulhrsv4hi3): Ditto.

testsuite/ChangeLog:

PR tree-optimization/89386
* gcc.target/i386/pr89386.c: New test.
* gcc.target/i386/pr89386-1.c: Ditto.

From-SVN: r275689

re PR tree-optimization/91750 (Induction vectorization introduces signed overflows)

2019-09-12  Richard Biener  <rguenther@suse.de>

PR tree-optimization/91750
* tree-vect-loop.c (vectorizable_induction): Compute IV increments
in the type of the evolution.

* gcc.dg/vect/pr91750.c: New testcase.

From-SVN: r275685

PR libstdc++/91748 fix std::for_each_n for random access iterators

PR libstdc++/91748
* include/bits/stl_algo.h (for_each_n): Fix random access iterator
case.
* testsuite/25_algorithms/for_each/for_each_n.cc: Test with random
access iterators.

From-SVN: r275683

Vectorise multiply high with scaling operations (PR 89386)

2019-09-12  Yuliang Wang  <yuliang.wang@arm.com>

gcc/
PR tree-optimization/89386
* config/aarch64/aarch64-sve2.md (<su>mull<bt><Vwide>)
(<r>shrnb<mode>, <r>shrnt<mode>): New SVE2 patterns.
(<su>mulh<r>s<mode>3): New pattern for MULHRS.
* config/aarch64/iterators.md (UNSPEC_SMULLB, UNSPEC_SMULLT)
(UNSPEC_UMULLB, UNSPEC_UMULLT, UNSPEC_SHRNB, UNSPEC_SHRNT)
(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SMULHS, UNSPEC_SMULHRS)
UNSPEC_UMULHS, UNSPEC_UMULHRS): New unspecs.
(MULLBT, SHRNB, SHRNT, MULHRS): New int iterators.
(su, r): Handle the unspecs above.
(bt): New int attribute.
* internal-fn.def (IFN_MULHS, IFN_MULHRS): New internal functions.
* internal-fn.c (first_commutative_argument): Commutativity info for
above.
* optabs.def (smulhs_optab, smulhrs_optab, umulhs_optab)
(umulhrs_optab): New optabs.
* doc/md.texi (smulhs$var{m3}, umulhs$var{m3})
(smulhrs$var{m3}, umulhrs$var{m3}): Documentation for the above.
* tree-vect-patterns.c (vect_recog_mulhs_pattern): New pattern
function.
(vect_vect_recog_func_ptrs): Add it.
* testsuite/gcc.target/aarch64/sve2/mulhrs_1.c: New test.
* testsuite/gcc.dg/vect/vect-mulhrs-1.c: As above.
* testsuite/gcc.dg/vect/vect-mulhrs-2.c: As above.
* testsuite/gcc.dg/vect/vect-mulhrs-3.c: As above.
* testsuite/gcc.dg/vect/vect-mulhrs-4.c: As above.
* doc/sourcebuild.texi (vect_mulhrs_hi): Document new target selector.
* testsuite/lib/target-supports.exp
(check_effective_target_vect_mulhrs_hi): Return true for AArch64
with SVE2.

From-SVN: r275682

Daily bump.

From-SVN: r275680

re PR middle-end/83889 (new failures on some arm targets after r256644)

2019-09-11  Sandra Loosemore  <sandra@codesourcery.com>

PR testsuite/83889

gcc/testsuite/
* gcc.dg/vect/pr81740-2.c: Remove explicit dg-do run.
* gcc.dg/vect/pr88598-1.c: Likewise.
* gcc.dg/vect/pr88598-2.c: Likewise.
* gcc.dg/vect/pr88598-3.c: Likewise.
* gcc.dg/vect/pr88598-4.c: Likewise.
* gcc.dg/vect/pr88598-5.c: Likewise.
* gcc.dg/vect/pr88598-6.c: Likewise.
* gcc.dg/vect/pr89440.c: Likewise.
* gcc.dg/vect/pr90018.c: Likewise.
* gcc.dg/vect/pr91293-1.c: Likewise.
* gcc.dg/vect/pr91293-2.c: Likewise.
* gcc.dg/vect/pr91293-3.c: Likewise.

From-SVN: r275667

re PR fortran/91553 (ICE in gfc_real2complex, at fortran/arith.c:2208)

2019-09-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91553
* simplify.c (gfc_convert_constant):  During conversion check if the
constant is enclosed in parenthesis, and simplify expression.

2019-09-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91553
* gfortran.dg/pr91553.f90: New test.

From-SVN: r275657

re PR fortran/91642 (ICE: Bad IO basetype (transfer_expr, at fortran/trans-io.c:2507))

2019-09-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91642
* io.c (gfc_match_inquire): null() cannot be in an iolength inquire
list.

2019-09-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91642
* gfortran.dg/pr91642.f90: New test.

From-SVN: r275655

Simplify the code.

2019-09-11  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/predicates.md (non_add_cint_operand): Simplify the
code.

From-SVN: r275652

compiler: suppress type descriptor generation for aliases

    Change Named_object::get_backend to ignore aliases when creating type
    descriptors for types, to be consistent with
    Type::needs_specific_type_functions and the Specific_type_functions
    traversal class. For example, when compiling a package that creates an
    alias to an an externally defined type, e.g.

       import "foo"
       type MyFoo = foo.Foo

    it makes sense to skip the alias (not try to generate type specific
    functions for it) and let the normal mechanisms take care of the alias
    target, depending on whether the target is defined locally or defined
    elsewhere.

    Testcase for this problen can be found in CL 193261.

    Fixes golang/go#33866.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/191961

From-SVN: r275651

golang.org/x/sys/cpu: define doinit when needed

    Should fix the build on riscv64 and other systems.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194641

From-SVN: r275650

gotest: force test package to be imported first

    When compiling the x_test package, force the test package to be
    imported first.  That ensures that we will see the types defined in
    the test package before the types defined in the non-test version of
    the package.  This matters if the types differ in some way, such as by
    adding a new method.

    This avoids a failure in internal/poll on Solaris, in which the test
    package adds a method to a type (FD.EOFError).  I think it was Solaris-
    specific because files are sorted in a different order by default.

    The go tool handles this kind of thing correctly, by rebuilding
    dependent packages.  This is just a hack sufficient to run the libgo
    testsuite without using the go tool.

    Fixes https://gcc.gnu.org/PR91712

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194637

From-SVN: r275648

Fix Xmethod for shared_ptr::use_count()

This was reported in https://bugzilla.redhat.com/show_bug.cgi?id=1749578

* python/libstdcxx/v6/xmethods.py (SharedPtrUseCountWorker.__call__):
Fix syntax error.

From-SVN: r275644

Fix libstdc++ tests for -Wvolatile warnings in C++2a mode

* testsuite/20_util/result_of/sfinae_friendly_1.cc: Add -Wno-volatile
for C++2a and up. Define HAS_52748_FIXED and fix incorrect tests.
* testsuite/tr1/3_function_objects/result_of.cc: Add -Wno-volatile
for C++2a and up.

From-SVN: r275643

re PR rtl-optimization/89435 (wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow())

PR rtl-optimization/89435
PR rtl-optimization/89795
PR rtl-optimization/91720
* gcc.dg/pr89435.c: New test.
* gcc.dg/pr89795.c: New test.
* gcc.dg/pr91720.c: New test.

From-SVN: r275642

[PATCH] some tree struct marking

https://gcc.gnu.org/ml/gcc-patches/2019-09/msg00697.html
gcc/
* tree.h (MARK_TS_TYPE_NON_COMMON): New.
* tree.c (tree_node_structure_for_code): Reformat and alphabetize.

gcc/cp/
* c-objcp-common.c (cp-objcp-common.c): Alphababetize and
correctly mark all C++ nodes.

From-SVN: r275641

lto-opts.c (lto_write_options): Stream -g when debug is enabled.

2019-09-11  Richard Biener  <rguenther@suse.de>

* lto-opts.c (lto_write_options): Stream -g when debug is enabled.
* lto-wrapper.c (merge_and_complain): Pick up -g.
(append_compiler_options): Likewise.
(run_gcc): Re-instantiate handling -g0 at link-time.
* doc/invoke.texi (flto): Document debug info generation.

From-SVN: r275640

re PR tree-optimization/90387 (__builtin_constant_p and -Warray-bounds warnings)

2019-09-11  Richard Biener  <rguenther@suse.de>

PR tree-optimization/90387
* vr-values.c (vr_values::extract_range_basic): After inlining
simplify non-constant __builtin_constant_p to false.

* gcc.dg/Warray-bounds-44.c: New testcase.

From-SVN: r275639

re PR rtl-optimization/89795 (wrong code with -O2 -fno-dce -fno-forward-propagate -fno-sched-pressure)

PR rtl-optimization/89795
* rtlanal.c (nonzero_bits1) <SUBREG>: Do not propagate results from
inner REGs to paradoxical SUBREGs if WORD_REGISTER_OPERATIONS is set.

From-SVN: r275635

re PR tree-optimization/91723 (builtin fma is not optimized or vectorized as *+)

PR tree-optimization/91723
* tree-vect-stmts.c (vectorizable_call): Use types_compatible_p check
instead of pointer equality when checking if argument vectypes are
the same.

* gcc.dg/vect/vect-fma-3.c: New test.

From-SVN: r275634

re PR middle-end/91725 (ICE in get_nonzero_bits starting with r275587)

PR middle-end/91725
* match.pd ((A / (1 << B)) -> (A >> B)): Call tree_nonzero_bits instead
of get_nonzero_bits, only call it for integral types.

* gcc.c-torture/compile/pr91725.c: New test.

From-SVN: r275633

revert: match.pd: Add flag_unsafe_math_optimizations check before deciding on the widest type in...

2019-09-11  Richard Biener  <rguenther@suse.de>

Revert
2019-09-09  Barnaby Wilks  <barnaby.wilks@arm.com>

* match.pd: Add flag_unsafe_math_optimizations check
before deciding on the widest type in a binary math operation.

* gcc.dg/fold-binary-math-casts.c: New test.

From-SVN: r275632

Update my email address

2019-09-10  Tobias Burnus  <tobias@codesourcery.com>

        * MAINTAINERS: Update my email address.

From-SVN: r275631

Daily bump.

From-SVN: r275622

PR c++/91673 - ICE with noexcept in alias-declaration.

* parser.c (CP_PARSER_FLAGS_DELAY_NOEXCEPT): New parser flag.
(cp_parser_lambda_declarator_opt): Pass CP_PARSER_FLAGS_NONE to
cp_parser_exception_specification_opt.
(cp_parser_direct_declarator): Adjust a call to
cp_parser_exception_specification_opt.
(cp_parser_member_declaration): Pass CP_PARSER_FLAGS_DELAY_NOEXCEPT
to cp_parser_declarator if not processing a friend or typedef
declaration.
(cp_parser_late_noexcept_specifier): Adjust a call to
cp_parser_noexcept_specification_opt.
(cp_parser_noexcept_specification_opt): New parameter for parser flags,
drop the FRIEND_P parameter.  Use the new parameter.
(cp_parser_exception_specification_opt): Likewise.
(cp_parser_transaction): Adjust a call to
cp_parser_noexcept_specification_opt.
(cp_parser_transaction_expression): Likewise.

* g++.dg/cpp1z/using7.C: New test.
* g++.dg/cpp1z/using8.C: New test.

From-SVN: r275617

PR c++/91705 - constexpr evaluation rejects ++/-- on floats.

* constexpr.c (cxx_eval_increment_expression): Call fold_simple on
the offset.

* g++.dg/cpp1y/constexpr-incr2.C: New test.

From-SVN: r275613

libgo: Solaris and x/sys/cpu compatibility fixes

    Restore Solaris compatibility fixes lost when internal/x/net/lif moved
    to golang.org/x/net/lif.  Also fix the Makefile for x/net/lif and
    x/net/route.

    Change x/sys/cpu to get the cache line size from goarch.sh as the
    gofrontend version of internal/cpu does.

    Partially based on work by Rainer Orth.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194438

From-SVN: r275611

re PR go/91621 (libgo/mksysinfo.sh: please avoid test ==)

PR go/91621
    mksysinfo: change test == to test =

    Fixes https://gcc.gnu.org/PR91621

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194569

From-SVN: r275608

go/internal/gccgoimporter: support embedded field in pointer loop

    Backport of https://golang.org/cl/194440.  Original description:

        If an embedded field refers to a type via a pointer, the parser needs
        to know the name of the embedded field. It is possible that the
        pointer type is not yet resolved. This CL fixes the parser to handle
        that case by setting the pointer element type to the unresolved named
        type while the pointer is being resolved.

    Updates golang/go#34182

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194562

From-SVN: r275606

Remove call_really_used_regs

After previous patches, it's now possible for call_used_regs to be
the "real" set of call-clobbered registers, without any special
handling for fixed registers.  This patch therefore removes the
separate call_really_used_regs and updates the targets that define
CALL_REALLY_USED_REGISTERS so that they handle call_used_regs in
the same way that they used to handle call_really_used_regs.

With this change, it's no longer necessary for targets that define
CALL_REALLY_USED_REGISTERS to define CALL_USED_REGISTER as well.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* doc/tm.texi.in: Document that exactly one of CALL_USED_REGISTERS
and CALL_REALLY_USED_REGISTERS must be defined, and that
CALL_REALLY_USED_REGISTERS is preferred.
* doc/tm.texi: Regenerate.
* hard-reg-set.h (target_hard_regs::x_call_really_used_regs): Delete.
(call_really_used_regs): Likewise.
* reginfo.c: Raise an #error if both CALL_USED_REGISTERS and
CALL_REALLY_USED_REGISTERS are defined.
(initial_call_used_regs): Use CALL_REALLY_USED_REGISTERS as the
initial value if defined.
(initial_call_really_used_regs): Delete.
(saved_call_really_used_regs): Likewise.
(CALL_REALLY_USED_REGNO_P): Likewise.
(init_reg_sets): Remove handling of call_really_used_regs.
(save_register_info, restore_register_info, globalize_reg): Likewise.
(init_reg_sets_1): Likewise.  Use call_used_regs instead of
CALL_REALLY_USED_REGNO_P.  Don't set call_used_regs for registers
outside operand_reg_set.
(fix_register): Don't change call_used_regs if
CALL_REALLY_USED_REGISTERS is defined.
* config/csky/csky.h (CALL_USED_REGISTERS): Delete.
* config/csky/csky.c (get_csky_live_regs): Use call_used_regs
instead of call_really_used_regs.
(csky_conditional_register_usage): Remove the old handling of
call_used_regs and change the handling of call_really_used_regs
to use call_used_regs instead.
* config/ia64/ia64.h (CALL_USED_REGISTERS): Delete.
* config/ia64/ia64.c (fix_range): Don't set call_used_regs when
making a register fixed.
* config/m32r/m32r.h (CALL_USED_REGISTERS): Delete.
* config/m32r/m32r.c (MUST_SAVE_REGISTER): Use call_used_regs
instead of call_really_used_regs.
(m32r_conditional_register_usage): Don't set call_used_regs when
making a register fixed.
* config/mips/mips.h (CALL_USED_REGISTERS): Delete.
* config/mips/mips.c (mips_global_pointer): Use call_used_regs
instead of call_really_used_regs.
(mips_interrupt_extra_call_saved_reg_p): Likewise.
(mips_cfun_call_saved_reg_p): Likewise.
(mips_swap_registers): Remove the old handling of call_used_regs
and change the handling of call_really_used_regs to use call_used_regs
instead.
(mips_conditional_register_usage): Likewise.
* config/mn10300/mn10300.h (CALL_USED_REGISTERS): Delete.
* config/mn10300/mn10300.c (fp_regs_to_save): Use call_used_regs
instead of call_really_used_regs.
(mn10300_get_live_callee_saved_regs): Likewise.
(mn10300_expand_prologue, mn10300_expand_epilogue): Likewise.
(mn10300_conditional_register_usage): Don't set call_used_regs when
making a register fixed.
* config/rs6000/rs6000.h (CALL_USED_REGISTERS): Delete.
* config/rs6000/rs6000.c (rs6000_conditional_register_usage):
Remove the old handling of call_used_regs and change the handling
of call_really_used_regs to use call_used_regs instead.
* config/s390/s390.h (CALL_USED_REGISTERS): Delete.
* config/s390/s390.c (s390_regs_ever_clobbered): Use call_used_regs
instead of call_really_used_regs.
(s390_register_info_gprtofpr, s390_register_info): Likewise.
(s390_hard_regno_rename_ok, s390_hard_regno_scratch_ok): Likewise.
(s390_emit_prologue, s300_set_up_by_prologue): Likewise.
(s390_can_use_return_insn, s390_optimize_prologue): Likewise.
(s390_conditional_register_usage): Remove the old handling of
call_used_regs and change the handling of call_really_used_regs
to use call_used_regs instead.
* config/sh/sh.h (CALL_USED_REGISTERS): Delete.
* config/sh/sh.c (output_stack_adjust, calc_live_regs): Likewise.
(sh_fix_range, reg_unused_after): Likewise.
(sh_conditional_register_usage): Remove the old handling of
call_used_regs and change the handling of call_really_used_regs
to use call_used_regs instead.
* config/sparc/sparc.h (CALL_USED_REGISTERS): Delete.
* config/sparc/sparc.c (sparc_conditional_register_usage): Don't set
call_used_regs when making a register fixed.
* config/tilegx/tilegx.h (CALL_USED_REGISTERS): Delete.
* config/tilegx/tilegx.c (tilegx_conditional_register_usage): Don't set
call_used_regs when making a register fixed.
* config/tilepro/tilepro.h (CALL_USED_REGISTERS): Delete.
* config/tilepro/tilepro.c (tilepro_conditional_register_usage): Don't
set call_used_regs when making a register fixed.
* config/visium/visium.h (CALL_USED_REGISTERS): Delete.
* config/visium/visium.c (visium_conditional_register_usage): Remove
the old handling of call_used_regs and change the handling of
call_really_used_regs to use call_used_regs instead.

From-SVN: r275605

Hide call_used_regs in target-independent code

Now that tests of call_used_regs go through call_used_or_fixed_reg_p,
we can hide call_used_regs from target-independent code.  (It still
needs to be available to targets for the conditional register usage
hooks.)

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (call_used_regs): Only define if IN_TARGET_CODE.
(call_used_or_fixed_reg_p): Expand definition of call_used_regs.
* reginfo.c (call_used_regs): New macro.

From-SVN: r275604

Remove redundant fixed_regs tests

This patch removes redundant fixed_regs tests in things like:

  !fixed_regs[i] && !call_used_or_fixed_reg_p (i)

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/alpha/alpha.c (alpha_compute_frame_layout): Remove redundant
fixed_regs test.
* config/bpf/bpf.c (bpf_compute_frame_layout, bpf_expand_prologue)
(bpf_expand_epilogue): Likewise.
* config/c6x/c6x.c (c6x_save_reg): Likewise.
* config/ft32/ft32.c (ft32_expand_prologue): Likewise.
(ft32_expand_epilogue): Likewise.
* config/i386/i386.c (ix86_save_reg): Likewise.
* config/moxie/moxie.c (moxie_expand_prologue): Likewise.
(moxie_expand_epilogue): Likewise.
* config/tilegx/tilegx.c (need_to_save_reg): Likewise.
* config/tilepro/tilepro.c (need_to_save_reg): Likewise.
* config/xtensa/xtensa.c (xtensa_call_save_reg): Likewise.

From-SVN: r275603

Add call_used_or_fixed_reg_p

Similarly to the call_used_or_fixed_regs patch, this one replaces
tests of call_used_regs[i] with call_used_or_fixed_reg_p (i).
The only remaining direct uses of call_used_regs are in reginfo.c
and in the conditional register usage hooks.

Again, this is purely mechanical.  A later patch will clear up the
oddities in config/ code.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (call_used_or_fixed_reg_p): New macro.
* cfgloopanal.c (init_set_costs): Use call_used_or_fixed_reg_p
instead of testing call_used_regs directly.
* config/aarch64/aarch64.c (aarch64_layout_frame): Likewise.
(aarch64_components_for_bb): Likewise.
* config/alpha/alpha.c (alpha_compute_frame_layout): Likewise.
* config/arc/arc.c (arc_must_save_register): Likewise.
(arc_epilogue_uses): Likewise.
* config/arm/arm.c (arm_option_override, use_return_insn): Likewise.
(legitimize_pic_address, callee_saved_reg_p): Likewise.
(arm_compute_save_reg0_reg12_mask): Likewise.
(arm_compute_save_core_reg_mask): Likewise.
(arm_get_vfp_saved_size, arm_compute_frame_layout): Likewise.
(arm_save_coproc_regs, thumb1_extra_regs_pushed): Likewise.
(cmse_nonsecure_entry_clear_before_return): Likewise.
(thumb1_expand_epilogue, arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise.
* config/avr/avr.c (avr_regs_to_save, sequent_regs_live): Likewise.
(avr_function_arg_advance, avr_find_unused_d_reg): Likewise.
(_reg_unused_after): Likewise.
* config/bfin/bfin.c (must_save_p, expand_prologue_reg_save): Likewise.
(expand_epilogue_reg_restore, n_regs_saved_by_prologue): Likewise.
(add_to_reg, hwloop_optimize): Likewise.
* config/bpf/bpf.c (bpf_compute_frame_layout, bpf_expand_prologue)
(bpf_expand_epilogue): Likewise.
* config/c6x/c6x.c (c6x_save_reg, c6x_regno_reg_class): Likewise.
* config/cr16/cr16.c (cr16_compute_save_regs): Likewise.
* config/cris/cris.c (cris_reg_saved_in_regsave_area): Likewise.
* config/epiphany/epiphany.c (epiphany_init_reg_tables): Likewise.
(epiphany_compute_function_type, MUST_SAVE_REGISTER): Likewise.
(epiphany_output_mi_thunk, epiphany_start_function): Likewise.
* config/fr30/fr30.c (fr30_num_arg_regs): Likewise.
* config/frv/frv.c (frv_stack_info): Likewise.
* config/ft32/ft32.c (ft32_compute_frame): Likewise.
(ft32_expand_prologue, ft32_expand_epilogue): Likewise.
* config/gcn/gcn.c (gcn_compute_frame_offsets): Likewise.
(move_callee_saved_registers): Likewise.
* config/h8300/h8300.c (byte_reg): Likewise.
* config/i386/i386-options.c (ix86_set_current_function): Likewise.
* config/i386/i386.c (ix86_save_reg, ix86_expand_prologue): Likewise.
(ix86_expand_epilogue, x86_order_regs_for_local_alloc): Likewise.
* config/i386/predicates.md (sibcall_memory_operand): Likewise.
* config/ia64/ia64.c (emit_safe_across_calls, find_gr_spill): Likewise.
(next_scratch_gr_reg, ia64_compute_frame_size): Likewise.
* config/iq2000/iq2000.h (MUST_SAVE_REGISTER): Likewise.
* config/lm32/lm32.c (lm32_compute_frame_size): Likewise.
* config/m32c/m32c.c (need_to_save): Likewise.
* config/m68k/m68k.c (m68k_save_reg): Likewise.
* config/mcore/mcore.c (calc_live_regs): Likewise.
* config/microblaze/microblaze.c (microblaze_must_save_register):
Likewise.
* config/mmix/mmix.c (mmix_local_regno): Likewise.
(mmix_initial_elimination_offset, mmix_reorg): Likewise.
(mmix_use_simple_return, mmix_expand_prologue): Likewise.
(mmix_expand_epilogue): Likewise.
* config/moxie/moxie.c (moxie_compute_frame): Likewise.
(moxie_expand_prologue, moxie_expand_epilogue): Likewise.
* config/msp430/msp430.c (msp430_preserve_reg_p): Likewise.
* config/nds32/nds32.h (nds32_16bit_address_type): Likewise.
(NDS32_REQUIRED_CALLEE_SAVED_P): Likewise.
* config/nios2/nios2.c (prologue_saved_reg_p): Likewise.
* config/or1k/or1k.c (callee_saved_regno_p): Likewise.
* config/pa/pa.c (pa_expand_prologue, pa_expand_epilogue): Likewise.
* config/pdp11/pdp11.c (pdp11_saved_regno): Likewise.
* config/pru/pru.c (prologue_saved_reg_p): Likewise.
* config/riscv/riscv.c (riscv_save_reg_p): Likewise.
(riscv_epilogue_uses, riscv_hard_regno_mode_ok): Likewise.
* config/rl78/rl78.c (need_to_save): Likewise.
* config/rs6000/rs6000-logue.c (save_reg_p): Likewise.
(rs6000_stack_info, generate_set_vrsave): Likewise.
(rs6000_emit_prologue, rs6000_emit_epilogue): Likewise.
* config/rs6000/rs6000.c (rs6000_debug_reg_print): Likewise.
* config/rx/rx.c (rx_get_stack_layout): Likewise.
* config/s390/s390.c (s390_call_saved_register_used): Likewise.
* config/sh/sh.c (calc_live_regs, sh_output_mi_thunk): Likewise.
* config/sparc/sparc.c (save_global_or_fp_reg_p): Likewise.
(save_local_or_in_reg_p): Likewise.
* config/stormy16/stormy16.c (REG_NEEDS_SAVE): Likewise.
(xstormy16_epilogue_uses): Likewise.
* config/tilegx/tilegx.c (need_to_save_reg): Likewise.
* config/tilepro/tilepro.c (need_to_save_reg): Likewise.
* config/v850/v850.c (compute_register_save_size): Likewise.
* config/vax/vax.c (vax_expand_prologue): Likewise.
* config/visium/visium.c (visium_save_reg_p): Likewise.
* config/xtensa/xtensa.c (xtensa_call_save_reg): Likewise.
* cselib.c (cselib_process_insn): Likewise.
* df-scan.c (df_get_entry_block_def_set): Likewise.
* function.c (aggregate_value_p): Likewise.
* haifa-sched.c (alloc_global_sched_pressure_data): Likewise.
* ira-lives.c (process_bb_node_lives): Likewise.
* ira.c (do_reload): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-remat.c (lra_remat): Likewise.
* lra.c (lra): Likewise.
* postreload.c (reload_combine_recognize_pattern): Likewise.
(reload_cse_move2add): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* regrename.c (check_new_reg_p): Likewise.
* reload.c (find_equiv_reg): Likewise.
* reload1.c (reload, find_reg): Likewise.
* sel-sched.c (init_hard_regs_data): Likewise.

From-SVN: r275602

Make more use of regs_invalidated_by_call

This cleans up a couple of places in which the previous patch had:

  call_used_or_fixed_regs & ~fixed_reg_set

In that context, regs_invalidated_by_call is IMO more obvious.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/frv/frv.c (frv_ifcvt_modify_tests): Use
regs_invalidated_by_call & ~fixed_reg_set instead of
call_used_or_fixed_regs & ~fixed_reg_set.
* config/sh/sh.c (output_stack_adjust): Likewise.

From-SVN: r275601

Replace call_used_reg_set with call_used_or_fixed_regs

CALL_USED_REGISTERS and call_used_regs infamously contain all fixed
registers (hence the need for CALL_REALLY_USED_REGISTERS etc.).
We try to recover from this to some extent with:

  /* Contains 1 for registers that are set or clobbered by calls.  */
  /* ??? Ideally, this would be just call_used_regs plus global_regs, but
     for someone's bright idea to have call_used_regs strictly include
     fixed_regs.  Which leaves us guessing as to the set of fixed_regs
     that are actually preserved.  We know for sure that those associated
     with the local stack frame are safe, but scant others.  */
  HARD_REG_SET x_regs_invalidated_by_call;

Since global registers are added to fixed_reg_set and call_used_reg_set
too, it's always the case that:

  call_used_reg_set == regs_invalidated_by_call | fixed_reg_set

This patch replaces all uses of call_used_reg_set with a new macro
call_used_or_fixed_regs to make this clearer.

This is part of a series that allows call_used_regs to be what is
now call_really_used_regs.  It's a purely mechanical replacement;
later patches clean up obvious oddities like
"call_used_or_fixed_regs & ~fixed_regs".

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (target_hard_regs::x_call_used_reg_set): Delete.
(call_used_reg_set): Delete.
(call_used_or_fixed_regs): New macro.
* reginfo.c (init_reg_sets_1, globalize_reg): Remove initialization
of call_used_reg_set.
* caller-save.c (setup_save_areas): Use call_used_or_fixed_regs
instead of call_used_regs.
(save_call_clobbered_regs): Likewise.
* cfgcleanup.c (old_insns_match_p): Likewise.
* config/c6x/c6x.c (c6x_call_saved_register_used): Likewise.
* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
* config/sh/sh.c (output_stack_adjust): Likewise.
* final.c (collect_fn_hard_reg_usage): Likewise.
* ira-build.c (ira_build): Likewise.
* ira-color.c (calculate_saved_nregs): Likewise.
(allocno_reload_assign, calculate_spill_cost): Likewise.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* ira-costs.c (ira_tune_allocno_costs): Likewise.
* ira-lives.c (process_bb_node_lives): Likewise.
* ira.c (setup_reg_renumber): Likewise.
* lra-assigns.c (find_hard_regno_for_1, lra_assign): Likewise.
* lra-constraints.c (need_for_call_save_p): Likewise.
(need_for_split_p, inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-remat.c (call_used_input_regno_present_p): Likewise.
* postreload.c (reload_combine): Likewise.
* regrename.c (find_rename_reg): Likewise.
* reload1.c (reload_as_needed): Likewise.
* rtlanal.c (find_all_hard_reg_sets): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
* shrink-wrap.c (requires_stack_frame_p): Likewise.

From-SVN: r275600

Remove no_caller_save_reg_set

Reusing the reasoning from the call_fixed_reg_set patch:

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    for (j = 1; j <= MOVE_MAX_WORDS; j++)
      if (reg_save_code (i,regno_save_mode[i][j]) == -1)

should be true whenever regno_save_mode[i][j] == VOIDmode,
which it is for:

  ~call_used_reg_set | ~have_save_mode

So this condition amounts to:

  ~call_used_reg_set | ~have_save_mode | ~have_save_insn
  == ~call_used_reg_set | ~savable_regs

no_caller_save_reg_set is then set if call_used_regs[i], so
no_caller_save_reg_set is:

  call_used_reg_set & (~call_used_reg_set | ~savable_regs)
  == call_used_reg_set & ~savable_regs

This patch expands its single user accordingly.

Note that ~savable_regs is always empty on LRA targets.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (target_hard_regs::x_no_caller_save_reg_set): Delete.
(no_caller_save_reg_set): Delete.
* caller-save.c (init_caller_save): Don't initialize it.
* ira-conflicts.c (ira_build_conflicts): Calculate
no_caller_save_reg_set locally from call_used_reg_set and savable_regs.

From-SVN: r275599

Remove call_fixed_reg_set

On targets that use reload, call_fixed_reg_set is structurally:

  fixed_reg_set                           -- reginfo.c
  | (call_used_reg_set & ~have_save_mode) -- first loop in init_caller_save
  | ~have_save_insn                       -- final loop in init_caller_save

(where "have_save_mode" and "have_save_insn" are just my names).
But the final loop in init_caller_save does:

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    for (j = 1; j <= MOVE_MAX_WORDS; j++)
      if (reg_save_code (i,regno_save_mode[i][j]) == -1)

This last condition ought to be true whenever:

  regno_save_mode[i][j] == VOIDmode

since either targetm.hard_regno_mode_ok (i, VOIDmode) should be
false or the VOIDmode save & restore shouldn't match any move insn.
And after the first loop, regno_save_mode[i][j] == VOIDmode whenever
!call_used_regs[i].  So the above is actually:

  fixed_reg_set
  | (call_used_reg_set & ~have_save_mode)
  | (~call_used_reg_set | ~have_save_insn)

which simplifies to:

  fixed_reg_set                        -- reginfo.c
  | ~have_save_mode                    -- first loop in init_caller_save
  | ~have_save_insn                    -- final loop in init_caller_save
  | ~call_used_reg_set                 -- final loop in init_caller_save

So:

  ~call_fixed_reg_set == (~fixed_reg_set
          & have_save_mode
  & have_save_insn
  & call_used_reg_set)  [A]

All users have the form:

  (call_used_reg_set or some subset) & ~(call_fixed_reg_set | ...)

i.e.:

  (call_used_reg_set or some subset) & ~call_fixed_reg_set & ~(...)

We can therefore drop the "& call_used_reg_set" from [A], leaving:

  ~fixed_reg_set & have_save_mode & have_save_insn

This patch combines have_save_mode & have_save_insn into a single
condition "a save is possible", represented as savable_regs.
We can then substitute:

  ~call_fixed_reg_set --> ~fixed_reg_set & savable_regs
                          (registers we can actually save around calls)

The patch also sets regno_save_mode[i][j] for all registers,
in case non-default ABIs require a save when the default ABI
doesn't.  This ensures that savable_regs (like fixed_reg_set but
unlike call_fixed_reg_set) isn't affected by the ABI.  This only
becomes significant with later patches and at this point is just
a simplification.

Since init_caller_save is only called for reload targets,
the default assumption for LRA is that all registers are savable,
just like the default assumption before the patch was that
(~)call_fixed_reg_set == (~)fixed_reg_set.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (target_hard_regs::x_call_fixed_reg_set): Delete.
(target_hard_regs::x_savable_regs): New field.
(call_fixed_reg_set): Delete.
(savable_regs): New macro,
* reginfo.c (globalize_reg): Don't set call_fixed_reg_set.
(init_reg_sets_1): Likewise.  Initialize savable_regs.
* caller-save.c (init_caller_save): Invoke HARD_REGNO_CALLER_SAVE_MODE
for all registers.  Set savable_regs instead of call_fixed_reg_set.
(setup_save_areas, save_call_clobbered_regs): Replace uses of
~call_fixed_reg_set with ~fixed_reg_set & savable_regs.
* config/sh/sh.c (output_stack_adjust): Likewise.

From-SVN: r275598

Move c6x REGNO_REG_CLASS out of line

I have a series of patches that hides call_used_regs from target-
independent code, a knock-on effect of which is that (public) target
macros can't use call_used_regs either.  This patch fixes the only
case in which that was a problem.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/c6x/c6x-protos.h (c6x_set_return_address): Declare.
* config/c6x/c6x.h (REGNO_REG_CLASS): Move implementation to
* config/c6x/c6x.c (c6x_regno_reg_class): ...this new function.

From-SVN: r275597

Implement std::common_reference for C++20

* include/std/type_traits (__do_common_type_impl): Implement
additional COND-RES(CREF(D1), CRED(D2)) condition for C++20.
(basic_common_reference, common_reference, common_reference_t): Define
for C++20.
* testsuite/20_util/common_reference/requirements/alias_decl.cc: New
test.
* testsuite/20_util/common_reference/requirements/
explicit_instantiation.cc: New test.
* testsuite/20_util/common_reference/requirements/typedefs.cc: New
test.

From-SVN: r275594

Make get_call_rtx_from take a const rtx_insn *

Only one caller (in dwarf2out.c) was preventing get_call_rtx_from
from taking an rtx_insn *.  Since that caller just passes a PATTERN,
it's a trivial change to make.

2019-09-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* rtl.h (get_call_rtx_from): Take a const rtx_insn * instead of an rtx.
* rtlanal.c (get_call_rtx_from): Likewise.
* dwarf2out.c (dwarf2out_var_location): Pass the insn rather
than the pattern to get_call_rtx_from.
* config/i386/i386-expand.h (ix86_notrack_prefixed_insn_p): Take
an rtx_insn * instead of an rtx.
* config/i386/i386-expand.c (ix86_notrack_prefixed_insn_p): Likewise.

From-SVN: r275593

Rename Deprecated to WarnRemoved in *.opt files.

2019-09-10  Martin Liska  <mliska@suse.cz>

* common.opt: Use newly added WarnRemoved.
* config/aarch64/aarch64.opt: Likewise.
* config/arm/arm.opt: Likewise.
* config/i386/i386.opt: Likewise.
* config/ia64/ia64.opt: Likewise.
* config/rs6000/rs6000.opt: Likewise.
* doc/options.texi: Document WarnRemoved properly.
* dwarf2out.c (gen_producer_string): Handle renamed
OPT_SPECIAL_warn_removed.
* lto-opts.c (lto_write_options): Likewise.
* lto-wrapper.c (merge_and_complain): Likewise.
* opts-common.c (decode_cmdline_option): Likewise.
(prune_options): Likewise.
(read_cmdline_option): Likewise.
(control_warning_option): Likewise.
* opts.c (print_filtered_help): Likewise.
* optc-gen.awk: Parse for WarnRemoved and make usage
of Deprecated an error.
* opth-gen.awk: Generate new OPT_SPECIAL_warn_removed.
2019-09-10  Martin Liska  <mliska@suse.cz>

* c.opt: Use newly added WarnRemoved.

From-SVN: r275592

default_format_1.f90: Remove XFAIL AIX.

        * gfortran.dg/default_format_1.f90: Remove XFAIL AIX.
        * gfortran.dg/default_format_denormal_1.f90: Same.

From-SVN: r275591

* doc/install.texi: Fix syntax for html generation.

From-SVN: r275589

LWG 3266. to_chars(bool) should be deleted

The standard requires overloads of std::to_chars for char and (un)signed
integer types. This means that our constrained function template is
non-conforming, because the difference is observable when using types
that convert to an integer (e.g. wchar_t, which promotes).

As well as defining the deleted bool overload for LWG 3266, replace the
constrained function template with overloads for each type.

* include/std/charconv (to_chars): Rename to __to_chars_i. Define
non-template overloads for each signed and unsigned integer type and
char. Define deleted overload for bool (LWG 3266).
* testsuite/20_util/to_chars/1_neg.cc: Remove.
* testsuite/20_util/to_chars/3.cc: New test.
* testsuite/20_util/to_chars/lwg3266.cc: New test.

From-SVN: r275588

re PR middle-end/91680 (Integer promotion quirk prevents efficient power of 2 division)

PR middle-end/91680
* match.pd ((A / (1 << B)) -> (A >> B)): Allow widening cast from
the shift type to type.

* gcc.dg/tree-ssa/pr91680.c: New test.
* g++.dg/torture/pr91680.C: New test.

From-SVN: r275587

[ARM/FDPIC v6 24/24] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in libstdc++ configure scripts

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

        libstdc++-v3/
     * acinclude.m4: Handle uclinux*.
     * configure: Regenerate.
     * configure.host: Handle uclinux*

From-SVN: r275586

decl.c (has_designator_problem): Use cp_expr_loc_or_input_loc in error_at.

/cp
2019-09-10  Paolo Carlini  <paolo.carlini@oracle.com>

* decl.c (has_designator_problem): Use cp_expr_loc_or_input_loc
in error_at.
(build_enumerator): Likewise.
(cp_finish_decl): Use DECL_SOURCE_LOCATION.
(grokdeclarator): Use id_loc in two error_at; change errror
message about constinit together constexpr to use two ranges.

/testsuite
2019-09-10  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/cpp0x/enum29.C: Test location(s) too.
* g++.dg/cpp0x/lambda/lambda-ice10.C: Likewise.
* g++.dg/cpp2a/constinit3.C: Likewise.
* g++.dg/ext/desig4.C: Likewise.
* g++.dg/ext/label10.C: Likewise.
* g++.old-deja/g++.other/dtor3.C: Likewise.

From-SVN: r275585

[ARM/FDPIC v6 23/24] [ARM] FDPIC: Implement libitm support.

The ldaddr macro in sjlj.S needs to be updated to support the FDPIC
model.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

libitm/
* config/arm/sjlj.S (ldaddr): Add FDPIC support.

From-SVN: r275584

[ARM/FDPIC v6 22/24] [ARM][testsuite] FDPIC: Skip tests that require -static support

Since FDPIC does not support -static, skip the related tests.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_static): Disable
for ARM FDPIC target.

From-SVN: r275583

[ARM/FDPIC v6 21/24] [ARM] FDPIC: Handle stack-protector combined patterns

The recent stack_protect_combined_set_insn and
stack_protect_combined_test_insn force recomputing of GOT base, but
need to take into account that in FDPIC mode, the PIC register is
fixed by the ABI (r9).

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

gcc/
* config/arm/arm.md (stack_protect_combined_set_insn): Handle
FDPIC mode.
(stack_protect_combined_test_insn): Likewise.

From-SVN: r275582

[ARM/FDPIC v6 19/24] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.

uclibc defines bswap_32, so use a different name in this test.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

gcc/testsuite/
* gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32.

From-SVN: r275581

[ARM/FDPIC v6 18/24] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets

Some tests have the "nonpic" guard, but pass on
arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
than adding this target to all these tests, add the "pie_enabled"
effective target.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

gcc/testsuite/
* g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
* g++.dg/ipa/devirt-c-7.C: Likewise.
* g++.dg/ipa/ivinline-1.C: Likewise.
* g++.dg/ipa/ivinline-2.C: Likewise.
* g++.dg/ipa/ivinline-3.C: Likewise.
* g++.dg/ipa/ivinline-4.C: Likewise.
* g++.dg/ipa/ivinline-5.C: Likewise.
* g++.dg/ipa/ivinline-7.C: Likewise.
* g++.dg/ipa/ivinline-8.C: Likewise.
* g++.dg/ipa/ivinline-9.C: Likewise.
* g++.dg/tls/pr79288.C: Likewise.
* gcc.dg/addr_equal-1.c: Likewise.
* gcc.dg/const-1.c: Likewise.
* gcc.dg/ipa/pure-const-1.c: Likewise.
* gcc.dg/noreturn-8.c: Likewise.
* gcc.dg/pr33826.c: Likewise.
* gcc.dg/torture/ipa-pta-1.c: Likewise.
* gcc.dg/tree-ssa/alias-2.c: Likewise.
* gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
* gcc.dg/tree-ssa/loadpre6.c: Likewise.
* gcc.dg/uninit-19.c: Likewise.

From-SVN: r275580

[ARM/FDPIC v6 17/24] [ARM][testsuite] FDPIC: Handle *-*-uclinux*

Add *-*-uclinux* to tests that work on this target.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

gcc/testsuite/
* g++.dg/abi/forced.C: Add *-*-uclinux*.
* g++.dg/abi/guard2.C: Likewise.
* g++.dg/ext/cleanup-10.C: Likewise.
* g++.dg/ext/cleanup-11.C: Likewise.
* g++.dg/ext/cleanup-8.C: Likewise.
* g++.dg/ext/cleanup-9.C: Likewise.
* g++.dg/ext/sync-4.C: Likewise.
* g++.dg/ipa/comdat.C: Likewise.
* gcc.dg/20041106-1.c: Likewise.
* gcc.dg/cleanup-10.c: Likewise.
* gcc.dg/cleanup-11.c: Likewise.
* gcc.dg/cleanup-8.c: Likewise.
* gcc.dg/cleanup-9.c: Likewise.
* gcc.dg/fdata-sections-1.c: Likewise.
* gcc.dg/fdata-sections-2.c: Likewise.
* gcc.dg/pr39323-1.c: Likewise.
* gcc.dg/pr39323-2.c: Likewise.
* gcc.dg/pr39323-3.c: Likewise.
* gcc.dg/pr65780-1.c: Likewise.
* gcc.dg/pr65780-2.c: Likewise.
* gcc.dg/pr67338.c: Likewise.
* gcc.dg/pr78185.c: Likewise.
* gcc.dg/pr83100-1.c: Likewise.
* gcc.dg/pr83100-4.c: Likewise.
* gcc.dg/strlenopt-12g.c: Likewise.
* gcc.dg/strlenopt-14g.c: Likewise.
* gcc.dg/strlenopt-14gf.c: Likewise.
* gcc.dg/strlenopt-16g.c: Likewise.
* gcc.dg/strlenopt-17g.c: Likewise.
* gcc.dg/strlenopt-18g.c: Likewise.
* gcc.dg/strlenopt-1f.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-2f.c: Likewise.
* gcc.dg/strlenopt-31g.c: Likewise.
* gcc.dg/strlenopt-33g.c: Likewise.
* gcc.dg/strlenopt-4g.c: Likewise.
* gcc.dg/strlenopt-4gf.c: Likewise.
* gcc.dg/strncmp-2.c: Likewise.
* gcc.dg/struct-ret-3.c: Likewise.
* gcc.dg/torture/pr69760.c: Likewise.
* gcc.target/arm/div64-unwinding.c: Likewise.
* gcc.target/arm/stack-checking.c: Likewise.
* gcc.target/arm/synchronize.c: Likewise.
* gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
* lib/target-supports.exp (check_effective_target_pie): Likewise.
(check_effective_target_sync_long_long_runtime): Likewise.
(check_effective_target_sync_int_long): Likewise.
(check_effective_target_sync_char_short): Likewise.

From-SVN: r275579

[ARM/FDPIC v6 16/24] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode

Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC
code and they don't support it: skip them. They also fail on
arm*-linux* when forcing -fPIC.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

gcc/testsuite/
* gcc.target/arm/eliminate.c: Accept only nonpic targets.
* g++.dg/other/anon5.C: Likewise.

From-SVN: r275578

[ARM/FDPIC v6 15/24] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.

In FDPIC mode, r9 is saved in addition to other registers, so update
the expected patterns accordingly.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/testsuite/
* gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/interrupt-2.c: Likewise.
* gcc.target/arm/pr70830.c: Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275577

[ARM/FDPIC v6 14/24] [ARM][testsuite] FDPIC: Skip unsupported tests

Several tests cannot work on ARM-FDPIC for various reasons: skip them,
or skip some directives.

gcc.dg/20020312-2.c: Skip since it forces -fno-pic.

gcc.target/arm/:
* Skip since r9 is clobbered by assembly code:
  20051215-1.c
  mmx-1.c
  pr61948.c
  pr77933-1.c
  pr77933-2.c

* Skip since the test forces armv5te which is not supported by FDPIC:
  pr40887.c
  pr19599.c

* Skip since FDPIC disables sibcall to external functions:
  sibcall-1.c
  tail-long-call
  vfp-longcall-apcs

* Skip size check since it's different for FDPIC:
  ivopts-2.c
  ivopts-3.c
  ivopts-4.c
  ivopts-5.c
  pr43597.c
  pr43920-2.c

* Disable assembler scanning invalid for FDPIC:
  pr45701-1.c
  pr45701-2.c
  stack-red-zone.c

* gnu2 TLS dialect is not supported by FDPIC:
  tlscall.c

* Test relies on symbols not generated in FDPIC:
  data-rel-2.c
  data-rel-3.c

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/testsuite/
* gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/20051215-1.c: Likewise.
* gcc.target/arm/mmx-1.c: Likewise.
* gcc.target/arm/pr19599.c: Likewise.
* gcc.target/arm/pr40887.c: Likewise.
* gcc.target/arm/pr61948.c: Likewise.
* gcc.target/arm/pr77933-1.c: Likewise.
* gcc.target/arm/pr77933-2.c: Likewise.
* gcc.target/arm/sibcall-1.c: Likewise.
* gcc.target/arm/data-rel-2.c: Likewise.
* gcc.target/arm/data-rel-3.c: Likewise.
* gcc.target/arm/tail-long-call: Likewise.
* gcc.target/arm/tlscall.c: Likewise.
* gcc.target/arm/vfp-longcall-apcs: Likewise.
* gcc.target/arm/ivopts-2.c: Skip object-size test on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/ivopts-3.c: Likewise.
* gcc.target/arm/ivopts-4.c: Likewise.
* gcc.target/arm/ivopts-5.c: Likewise.
* gcc.target/arm/pr43597.c: Likewise.
* gcc.target/arm/pr43920-2.c: Likewise.
* gcc.target/arm/pr45701-1.c: Skip scan-assembler on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/pr45701-2.c: Likewise.
* gcc.target/arm/stack-red-zone.c: Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275576

[ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M  architecture

Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.

This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

libgcc/
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
architecture.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275575

[ARM/FDPIC v6 12/24] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp

We call __aeabi_read_tp() to get the thread pointer. Since this is a
function call, we have to restore the FDPIC register afterwards.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config/arm/arm.c (arm_load_tp): Add FDPIC support.
* config/arm/arm.md (FDPIC_REGNUM): New constant.
(load_tp_soft_fdpic): New pattern.
(load_tp_soft): Disable in FDPIC mode.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275574

[ARM/FDPIC v6 11/24] [ARM] FDPIC: Add support to unwind FDPIC signal frame

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

libgcc/
* unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN)
(THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC)
(FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER)
(FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT)
(ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0, FDPIC_T2_LDR_R12_WITH_FUNCDESC)
(FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New.
(__gnu_personality_sigframe_fdpic): New.
(get_eit_entry): Add FDPIC signal frame support.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275573

[ARM/FDPIC v6 10/24] [ARM] FDPIC: Implement TLS support.

Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.

We do not support the GNU2 TLS dialect.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
(arm_call_tls_get_addr): Add FDPIC support.
(legitimize_tls_address): Likewise.
(arm_emit_tls_decoration): Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275572

[ARM/FDPIC v6 09/24] [ARM] FDPIC: Add support for taking address of nested function

In FDPIC mode, the trampoline generated to support pointers to nested
functions looks like:

   .word trampoline address
   .word trampoline GOT address
   ldr  r12, [pc, #8]
   ldr  r9, [pc, #8]
   ldr pc, [pc, #8]
   .word static chain value
   .word GOT address
   .word function's address

because in FDPIC function pointers are actually pointers to function
descriptors, we have to actually generate a function descriptor for
the trampoline.

2019--09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
support.
(arm_trampoline_init): Likewise.
(arm_trampoline_adjust_address): Likewise.
* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275571

[ARM/FDPIC v6 08/24] [ARM] FDPIC: Enforce local/global binding for function descriptors

Use local binding rules to decide whether we can use GOTOFFFUNCDESC to
compute the function address.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config/arm/arm.c (arm_fdpic_local_funcdesc_p): New function.
(legitimize_pic_address): Enforce binding rules on function
pointers in FDPIC mode.
(arm_assemble_integer): Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275570

[ARM/FDPIC v6 07/24] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
FDPIC.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275569

[ARM/FDPIC v6 06/24] [ARM] FDPIC: Add support for c++ exceptions

The main difference with existing support is that function addresses
are function descriptor addresses instead. This means that all code
dealing with function pointers now has to cope with function
descriptors instead.

For the same reason, Linux kernel helpers can no longer be called by
dereferencing their address, so we implement wrappers that directly
call the kernel helpers.

When restoring a function address, we also have to restore the FDPIC
register value (r9).

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
field.

libgcc/
* config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
(__kernel_dmb): Likewise.
(__fdpic_cmpxchg): New function.
(__fdpic_dmb): New function.
* config/arm/unwind-arm.h (FDPIC_REGNUM): New define.
(gnu_Unwind_Find_got): New function.
(_Unwind_decode_typeinfo_ptr): Add FDPIC support.
* unwind-arm-common.inc (UCB_PR_GOT): New.
(funcdesc_t): New struct.
(get_eit_entry): Add FDPIC support.
(unwind_phase2): Likewise.
(unwind_phase2_forced): Likewise.
(__gnu_Unwind_RaiseException): Likewise.
(__gnu_Unwind_Resume): Likewise.
(__gnu_Unwind_Backtrace): Likewise.
* unwind-pe.h (read_encoded_value_with_base): Likewise.

libstdc++/
* libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
support.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275568

[ARM/FDPIC v6 05/24] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation

In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

libgcc/
* libgcc/crtstuff.c: Add support for FDPIC.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275567

[ARM/FDPIC v6 04/24] [ARM] FDPIC: Add support for FDPIC for arm architecture

The FDPIC register is hard-coded to r9, as defined in the ABI.

We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.

When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
FDPIC_REGNUM.
(arm_function_ok_for_sibcall): Disable sibcall optimization if we
have no decl or go through PLT.
(calculate_pic_address_constant): New function.
(legitimize_pic_address): Call calculate_pic_address_constant.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_emit_call_insn): Add support for FDPIC.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
Define. (FDPIC_REGNUM): New define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.

gcc/testsuite/
* gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275566

[ARM/FDPIC v6 03/24] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided

In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.

We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.

At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that static link is
not supported as it requires specifying the dynamic linker because the
executable still has to relocate itself at startup.

We also force 'now' binding since lazy binding is not supported.

We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>

gcc/
* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
(CC1_SPEC): Use FDPIC_CC1_SPEC.
(MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
* config/arm/uclinuxfdpiceabi.h: New file.

libsanitizer/
* configure.tgt (arm*-*-*fdpiceabi): Sanitizers are
unsupported in this configuration.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275565

[ARM/FDPIC v6 02/24] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts

The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order to enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.

In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.

In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

config/
* futex.m4: Handle *-uclinux*.
* tls.m4 (GCC_CHECK_TLS): Likewise.

gcc/
* config.gcc: Handle *-*-uclinuxfdpiceabi.

libatomic/
* configure.tgt: Handle arm*-*-uclinux*.
* configure: Regenerate.

libgcc/
* config.host: Handle *-*-uclinuxfdpiceabi.

libitm/
* configure.tgt: Handle *-*-uclinux*.
* configure: Regenerate.

* libtool.m4: Handle uclinuxfdpiceabi.

From-SVN: r275564

PR libstdc++/91711 fix failing test

PR libstdc++/91711
* testsuite/23_containers/span/get_neg.cc: Avoid ambiguity due to
0ul being a valid null pointer constant.

From-SVN: r275563

Optimise std::remove_cv and use more helper aliases

Define partial specializations for std::remove_cv so that
std::remove_const and std::remove_volatile don't need to be
instantiated.

* include/std/type_traits (__remove_cv_t): New alias template.
(is_void, is_integral, is_floating_point, is_pointer)
(is_member_object_pointer, is_member_function_pointer, is_null_pointer)
(is_member_point), __is_signed_integer, __is_unsigned_integer)
(__make_unsigned_selector, __make_signed_selector, remove_pointer)
(__decay_selector): Use __remove_cv_t.
(remove_cv): Add partial specializations for cv-qualified types.
(__decay_t): New alias template.
(__decay_and_strip, __common_type_impl, __result_of_impl): Use
__decay_t.
(__enable_if_t): Move earlier in the file.
(_Require): Use __enable_if_t.
(swap(T&, T&)): Use _Require.
(swap(T(&)[N])): Use __enable_if_t.

From-SVN: r275562

[ARM/FDPIC 01/24] [ARM] FDPIC: Add -mfdpic option support

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
Mickaël Guêné  <mickael.guene@st.com>

* config/arm/arm.opt: Add -mfdpic option.
* doc/invoke.texi: Add documentation for -mfdpic.

Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>
From-SVN: r275561

Implement C++20 p1424 - 'constexpr' feature macro concerns...

2019-09-09  Edward Smith-Rowland  <3dw4rd@verizon.net>

Implement C++20 p1424 - 'constexpr' feature macro concerns,
Issue 3256 - Feature testing macro for constexpr algorithms,
and Issue 3257 - Missing feature testing macro update from P0858.
* include/std/version (__cpp_lib_constexpr_algorithms): Bump value.
* include/bits/algorithmfwd.h: Ditto.
* include/std/utility: Ditto.
* testsuite/25_algorithms/constexpr_macro.cc: Ditto.
* testsuite/25_algorithms/cpp_lib_constexpr.cc: New check for
__cpp_lib_constexpr macro in <algorith>.
* testsuite/20_util/exchange/constexpr.cc: Add check for
__cpp_lib_constexpr macro in <utility>.
* testsuite/25_algorithms/adjacent_find/constexpr.cc: Remove check for
__cpp_lib_constexpr_algorithms.
* testsuite/25_algorithms/all_of/constexpr.cc: Ditto.
* testsuite/25_algorithms/any_of/constexpr.cc: Ditto.
* testsuite/25_algorithms/binary_search/constexpr.cc: Ditto.
* testsuite/25_algorithms/copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/copy_backward/constexpr.cc: Ditto.
* testsuite/25_algorithms/copy_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/copy_n/constexpr.cc: Ditto.
* testsuite/25_algorithms/count/constexpr.cc: Ditto.
* testsuite/25_algorithms/count_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/equal/constexpr.cc: Ditto.
* testsuite/25_algorithms/equal_range/constexpr.cc: Ditto.
* testsuite/25_algorithms/fill/constexpr.cc: Ditto.
* testsuite/25_algorithms/fill_n/constexpr.cc: Ditto.
* testsuite/25_algorithms/find/constexpr.cc: Ditto.
* testsuite/25_algorithms/find_end/constexpr.cc: Ditto.
* testsuite/25_algorithms/find_first_of/constexpr.cc: Ditto.
* testsuite/25_algorithms/find_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/find_if_not/constexpr.cc: Ditto.
* testsuite/25_algorithms/for_each/constexpr.cc: Ditto.
* testsuite/25_algorithms/generate/constexpr.cc: Ditto.
* testsuite/25_algorithms/generate_n/constexpr.cc: Ditto.
* testsuite/25_algorithms/is_heap/constexpr.cc: Ditto.
* testsuite/25_algorithms/is_heap_until/constexpr.cc: Ditto.
* testsuite/25_algorithms/is_partitioned/constexpr.cc: Ditto.
* testsuite/25_algorithms/is_permutation/constexpr.cc: Ditto.
* testsuite/25_algorithms/is_sorted/constexpr.cc: Ditto.
* testsuite/25_algorithms/is_sorted_until/constexpr.cc: Ditto.
* testsuite/25_algorithms/lexicographical_compare/constexpr.cc: Ditto.
* testsuite/25_algorithms/lower_bound/constexpr.cc: Ditto.
* testsuite/25_algorithms/merge/constexpr.cc: Ditto.
* testsuite/25_algorithms/mismatch/constexpr.cc: Ditto.
* testsuite/25_algorithms/none_of/constexpr.cc: Ditto.
* testsuite/25_algorithms/partition_copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/partition_point/constexpr.cc: Ditto.
* testsuite/25_algorithms/remove/constexpr.cc: Ditto.
* testsuite/25_algorithms/remove_copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/remove_copy_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/remove_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/replace_copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/replace_copy_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/replace_if/constexpr.cc: Ditto.
* testsuite/25_algorithms/reverse_copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/rotate_copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/search/constexpr.cc: Ditto.
* testsuite/25_algorithms/search_n/constexpr.cc: Ditto.
* testsuite/25_algorithms/set_difference/constexpr.cc: Ditto.
* testsuite/25_algorithms/set_intersection/constexpr.cc: Ditto.
* testsuite/25_algorithms/set_symmetric_difference/constexpr.cc: Ditto.
* testsuite/25_algorithms/set_union/constexpr.cc: Ditto.
* testsuite/25_algorithms/transform/constexpr.cc: Ditto.
* testsuite/25_algorithms/unique/constexpr.cc: Ditto.
* testsuite/25_algorithms/unique_copy/constexpr.cc: Ditto.
* testsuite/25_algorithms/upper_bound/constexpr.cc: Ditto.

From-SVN: r275560

cmd/go: look for tool build ID before hashing entire file

    Also fix the key used to store the ID.

    This is a significant speedup in cmd/go run time.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194257

From-SVN: r275559

compiler: permit inlining constant expressions and expression statements

    This relatively minor change increases the number of inlinable
    functions/methods in the standard library from 983 to 2179.

    In particular it permits inlining math/bits/RotateLeftNN.  This
    restores the speed of crypto/sha256 back to what it was before the
    update to 1.13beta1.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194340

From-SVN: r275558

PR c++/84374 - diagnose invalid uses of decltype(auto).

* decl.c (grokdeclarator): Diagnose wrong usage of decltype(auto) in
a function declaration.

* g++.dg/cpp1y/auto-fn57.C: New test.

From-SVN: r275557

Daily bump.

From-SVN: r275555

misc/cgo/testcshared: restore gofrontend-local changes

    They were lost when the files were moved in the update to Go1.13beta1.
    These changes should be made in the master repo for the 1.14 release,
    as riscv64 support is added there.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194343

From-SVN: r275551

libgo: only build x/sys/cpu/cpu_gccgo.c on x86 systems

    The C file has a build tag, but the procedure we use for building C
    files ignores build tags.

    This should fix the libgo build on non-x86 systems.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194378

From-SVN: r275544

expmed.c (extract_bit_field): Update function comment regarding alt_rtl.

2019-09-09  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * expmed.c (extract_bit_field): Update function comment
        regarding alt_rtl.
        * expr.c (expand_expr_real): Update function comment
        regarding alt_rtl.
        (expand_misaligned_mem_ref): New helper function.
        (expand_expr_real_2): Use expand_misaligned_mem_ref.
        Remove duplicate assignment to "base" at case MEM_REF.
        Remove a shadowed variable "unsignedp" at case VCE.

From-SVN: r275541

compiler: don't use predeclared location for implicit runtime import

    For the main package we add an implicit import of the runtime package,
    to ensure that it is initialized.  That import used the predeclared
    location, which caused various tests, notably Named_type::is_builtin,
    to treat these imported names as builtin.  Start using a real location,
    so that those tests do the right thing.

    By the way, this implicit import is a partial cause of golang/go#19773.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194337

From-SVN: r275540

compiler: traverse types of constant expressions

    We forgot to ever traverse types of constant expressions.  This rarely
    makes a difference--evidently, since nobody noticed--but it does
    matter when we inline constant expressions: we need to ensure that the
    type is visible to the importing code.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194317

From-SVN: r275539

Remove global REG_SETs

We currently maintain global REG_SET versions of fixed_reg_set
and regs_invalidated_by_call.  With bitmap_view, we can instead
operate directly on the underlying HARD_REG_SETs, avoiding the
need to keep the two pieces of data in sync.

I have a series of patches that removes the assumption that there's
a single global ABI for all functions in the translation unit,
which includes not relying on having a global regs_invalidated_by_call.
Removing the REG_SET equivalent is one step to doing that.

Note that the affected DF code is used for EH edges or dumping only,
so shouldn't be performance critical.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* regset.h (regs_invalidated_by_call_regset): Delete.
(fixed_reg_set_regset): Likewise.
* reginfo.c (regs_invalidated_by_call_regset): Likewise.
(fixed_reg_set_regset, persistent_obstack): Likewise.
(init_reg_sets_1, globalize_reg): Update accordingly.
* df.h (df_print_regset, df_print_word_regset): Take a const_bitmap
instead of a bitmap.
* df-core.c (df_print_regset, df_print_word_regset): Likewise.
* df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call
instead of regs_invalidated_by_call_regset.
(df_lr_confluence_n, df_md_confluence_n): Likewise.
* df-scan.c (df_scan_start_dump): Likewise.
* dse.c (copy_fixed_regs): Likewise.
* config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise.

From-SVN: r275537

Add "fast" conversions from arrays to bitmaps

This patch adds a bitmap_view<X> class that creates a read-only,
on-stack bitmap representation of an array-like object X.  The main
use case is to allow HARD_REG_SETs to be used in REG_SET (i.e. bitmap)
operations.

For now it only handles constant-sized arrays, but I've tried to
define the types in a way that could handle variable-sized arrays
in future (although less efficiently).  E.g. this might be useful
for combining bitmaps and sbitmaps.

For the read-only view to work as intended, I needed to make
bitmap_bit_p take a const_bitmap instead of a bitmap.  Logically
the bitmap really is read-only, but we update the "current" and
"indx" fields of the bitmap_head after doing a search.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* array-traits.h: New file.
* coretypes.h (array_traits, bitmap_view): New types.
* bitmap.h: Include "array-traits.h"
(bitmap_bit_p): Take a const_bitmap instead of a bitmap.
(base_bitmap_view, bitmap_view): New classes.
* bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
* hard-reg-set.h: Include array-traits.h.
(array_traits<HARD_REG_SET>): New struct.
* regset.h (IOR_REG_SET_HRS): New macro.
* loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS
rather than iterating over each hard register.
* sched-deps.c (sched_analyze_insn): Likewise.
* sel-sched-ir.c (setup_id_implicit_regs): Likewise.

From-SVN: r275536

Tweak interface to ira-build.c:ior_hard_reg_conflicts

This patch makes ior_hard_reg_conflicts take a const_hard_reg_set
rather than a pointer, so that it can be passed a temporary object
in later patches.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
instead of a HARD_REG_SET *.
* ira-build.c (ior_hard_reg_conflicts): Likewise.
(ira_build): Update call accordingly.
* ira-emit.c (add_range_and_copies_from_move_list): Likewise.

From-SVN: r275535

Remove hard_reg_set_equal_p

Use "x == y" instead of "hard_reg_set_equal_p (x, y)".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (HARD_REG_SET::operator==): New function.
(HARD_REG_SET::operator!=): Likewise.
(hard_reg_set_equal_p): Delete.
* cfgcleanup.c (old_insns_match_p): Use == instead of
hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
* ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
(add_allocno_hard_regs_to_forest): Likewise.
(setup_allocno_available_regs_num): Likewise.
* ira.c (setup_pressure_classes): Likewise.
(setup_allocno_and_important_classes): Likewise.
(setup_reg_class_relations): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* reg-stack.c (change_stack, convert_regs_1): Likewise.

From-SVN: r275534

Remove IOR_COMPL_HARD_REG_SET

Use "x |= ~y" instead of "IOR_COMPL_HARD_REG_SET (x, y)", or just
"x | ~y" if the result is a temporary.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
Use "|~" instead of IOR_COMPL_HARD_REG_SET.
* config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
Likewise.
* ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
* ira.c (setup_reg_renumber): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* regrename.c (regrename_find_superclass): Likewise.
* reload1.c (find_reg): Likewise.

From-SVN: r275533

Remove AND_COMPL_HARD_REG_SET

Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
"x & ~y" if the result is a temporary.  This means that we're splitting
it into two operations, but the compiler should be able to combine them
for reasonable values of FIRST_PSEUDO_REGISTER.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
* caller-save.c (setup_save_areas): Use "&~" instead of
AND_COMPL_HARD_REG_SET.
(save_call_clobbered_regs): Likewise.
* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
* config/mips/mips.c (mips_class_max_nregs): Likewise.
(mips_conditional_register_usage): Likewise.
* config/sh/sh.c (output_stack_adjust): Likewise.
* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
(setup_profitable_hard_regs): Likewise.
(get_conflict_and_start_profitable_regs): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
(setup_regno_cost_classes_by_aclass): Likewise.
* ira-lives.c (process_bb_node_lives): Likewise.
* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
(setup_allocno_and_important_classes, setup_class_translate_array)
(setup_reg_class_relations, setup_prohibited_class_mode_regs):
Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_alt_operands, inherit_in_ebb): Likewise.
* lra-eliminations.c (update_reg_eliminate): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
(mark_target_live_regs): Likewise.
* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
(implicit_clobber_conflict_p): Likewise.
* shrink-wrap.c (requires_stack_frame_p): Likewise.
(try_shrink_wrapping): Likewise.

From-SVN: r275532

Remove IOR_HARD_REG_SET

Use "x |= y" instead of "IOR_HARD_REG_SET (x, y)" (or just "x | y"
if the result is a temporary).

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (HARD_REG_SET::operator|): New function.
(HARD_REG_SET::operator|=): Likewise.
(IOR_HARD_REG_SET): Delete.
* config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
IOR_HARD_REG_SET.
* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
* config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
* final.c (collect_fn_hard_reg_usage): Likewise.
* hw-doloop.c (scan_loop, optimize_loop): Likewise.
* ira-build.c (merge_hard_reg_conflicts): Likewise.
(ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
(propagate_some_info_from_allocno): Likewise.
(copy_info_to_removed_store_destinations): Likewise.
* ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
(allocno_reload_assign, ira_reassign_pseudos): Likewise.
(fast_allocation): Likewise.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* ira-lives.c (make_object_dead, process_single_reg_class_operands)
(process_bb_node_lives): Likewise.
* ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
* lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
* lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
(process_bb_lives): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* postreload.c (reload_combine): Likewise.
* reginfo.c (init_reg_sets_1): Likewise.
* regrename.c (merge_overlapping_regs, find_rename_reg)
(merge_chains): Likewise.
* reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
(find_reload_regs, finish_spills, choose_reload_regs_init)
(emit_reload_insns): Likewise.
* reorg.c (redundant_insn): Likewise.
* resource.c (find_dead_or_set_registers, mark_set_resources)
(mark_target_live_regs): Likewise.
* rtlanal.c (find_all_hard_reg_sets): Likewise.
* sched-deps.c (sched_analyze_insn): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
(find_best_reg_for_expr): Likewise.
* shrink-wrap.c (try_shrink_wrapping): Likewise.

From-SVN: r275531

Remove AND_HARD_REG_SET

Use "x &= y" instead of "AND_HARD_REG_SET (x, y)" (or just "x & y"
if the result is a temporary).

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (HARD_REG_SET::operator&): New function.
(HARD_REG_SET::operator&): Likewise.
(AND_HARD_REG_SET): Delete.
* caller-save.c (setup_save_areas): Use "&" instead of
AND_HARD_REG_SET.
(save_call_clobbered_regs): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/m32c/m32c.c (reduce_class): Likewise.
* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
* final.c (get_call_reg_set_usage): Likewise.
* ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
(setup_left_conflict_sizes_p): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
* ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
(setup_reg_class_relations): Likewise.
* reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
* reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.

From-SVN: r275530

Remove COMPL_HARD_REG_SET

"COMPL_HARD_REG_SET (x, y)" becomes "x = ~y".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (HARD_REG_SET::operator~): New function.
(COMPL_HARD_REG_SET): Delete.
* config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead
of COMPL_HARD_REG_SET.
(try_rename_operands): Likewise.
* config/sh/sh.c (push_regs): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (contains_reg_p): Likewise.
* reload1.c (finish_spills, choose_reload_regs_init): Likewise.

From-SVN: r275529

Remove COPY_HARD_REG_SET

This patch replaces "COPY_HARD_REG_SET (x, y)" with "x = y".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (COPY_HARD_REG_SET): Delete.
* caller-save.c (save_call_clobbered_regs): Use assignment instead
of COPY_HARD_REG_SET.
* config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise.
(epiphany_conditional_register_usage): Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/ia64/ia64.c (ia64_compute_frame_size): Likewise.
* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
* config/m68k/m68k.c (m68k_conditional_register_usage): Likewise.
* config/mips/mips.c (mips_class_max_nregs): Likewise.
* config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise.
* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
* config/sh/sh.c (output_stack_adjust): Likewise.
* final.c (collect_fn_hard_reg_usage): Likewise.
(get_call_reg_set_usage): Likewise.
* ira-build.c (ira_create_object, remove_low_level_allocnos)
(ira_flattening): Likewise.
* ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest)
(setup_left_conflict_sizes_p, setup_profitable_hard_regs)
(get_conflict_and_start_profitable_regs, allocno_reload_assign)
(ira_reassign_pseudos): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
(setup_regno_cost_classes_by_aclass): Likewise.
* ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise.
(setup_reg_subclasses, setup_class_subset_and_memory_move_costs)
(setup_stack_reg_pressure_class, setup_pressure_classes)
(setup_allocno_and_important_classes, setup_class_translate_array)
(setup_reg_class_relations, setup_prohibited_class_mode_regs)
(ira_setup_eliminable_regset): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_alt_operands, inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* lra.c (lra): Likewise.
* mode-switching.c (new_seginfo): Likewise.
* postreload.c (reload_combine): Likewise.
* reg-stack.c (straighten_stack): Likewise.
* reginfo.c (save_register_info, restore_register_info): Likewise.
(init_reg_sets_1, record_subregs_of_mode): Likewise
* regrename.c (create_new_chain, rename_chains): Likewise.
* reload1.c (order_regs_for_reload, find_reg): Likewise.
(find_reload_regs): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
(mark_target_live_regs): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.

From-SVN: r275528

Make note_stores take an rtx_insn

I have a series of patches that (as a side effect) makes all rtl
passes use the information collected by -fipa-ra.  This showed up a
latent bug in the liveness tracking in regrename.c, which doesn't take
CALL_INSN_FUNCTION_USAGE into account when processing clobbers.

This actually seems to be quite a common problem with passes that use
note_stores; only a handful remember to walk CALL_INSN_FUNCTION_USAGE
too.  I think it was just luck that I saw it with regrename first.

This patch tries to make things more robust by passing an insn rather
than a pattern to note_stores.  The old function is still available
as note_pattern_stores for the few places that need it.

When updating callers, I've erred on the side of using note_stores
rather than note_pattern_stores, because IMO note_stores should be
the default choice and we should only use note_pattern_stores if
there's a specific reason.  Specifically:

* For cselib.c, "body" may be a COND_EXEC_CODE instead of the main
  insn pattern.

* For ira.c, I wasn't sure whether extending no_equiv to
  CALL_INSN_FUNCTION_USAGE really made sense, since we don't do that
  for normal call-clobbered registers.  Same for mark_not_eliminable
  in reload1.c

* Some other places only have a pattern available, and since those
  places wouldn't benefit from walking CALL_INSN_FUNCTION_USAGE,
  it seemed better to alter the code as little as possible.

* In the config/ changes, quite a few callers have already weeded
  out CALL insns.  It still seemed better to use note_stores rather
  than prematurely optimise.  (note_stores should tail call to
  note_pattern_stores once it sees that the insn isn't a call.)

The patch also documents what SETs mean in CALL_INSN_FUNCTION_USAGE.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* rtl.h (CALL_INSN_FUNCTION_USAGE): Document what SETs mean.
(note_pattern_stores): Declare.
(note_stores): Take an rtx_insn *.
* rtlanal.c (set_of): Use note_pattern_stores instead of note_stores.
(find_all_hard_reg_sets): Pass the insn rather than its pattern to
note_stores.  Remove explicit handling of CALL_INSN_FUNCTION_USAGE.
(note_stores): Take an rtx_insn * as argument and process
CALL_INSN_FUNCTION_USAGE.  Rename old function to...
(note_pattern_stores): ...this.
(find_first_parameter_load): Pass the insn rather than
its pattern to note_stores.
* alias.c (memory_modified_in_insn_p, init_alias_analysis): Likewise.
* caller-save.c (setup_save_areas, save_call_clobbered_regs)
(insert_one_insn): Likewise.
* combine.c (combine_instructions): Likewise.
(likely_spilled_retval_p): Likewise.
(try_combine): Use note_pattern_stores instead of note_stores.
(record_dead_and_set_regs): Pass the insn rather than its pattern
to note_stores.
(reg_dead_at_p): Likewise.
* config/bfin/bfin.c (workaround_speculation): Likewise.
* config/c6x/c6x.c (maybe_clobber_cond): Likewise.  Take an rtx_insn *
rather than an rtx.
* config/frv/frv.c (frv_registers_update): Use note_pattern_stores
instead of note_stores.
(frv_optimize_membar_local): Pass the insn rather than its pattern
to note_stores.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/i386/i386.c (ix86_avx_u128_mode_after): Likewise.
* config/mips/mips.c (vr4130_true_reg_dependence_p): Likewise.
(r10k_needs_protection_p, mips_sim_issue_insn): Likewise.
(mips_reorg_process_insns): Likewise.
* config/s390/s390.c (s390_regs_ever_clobbered): Likewise.
* config/sh/sh.c (flow_dependent_p): Likewise.  Take rtx_insn *s
rather than rtxes.
* cse.c (delete_trivially_dead_insns): Pass the insn rather than
its pattern to note_stores.
* cselib.c (cselib_record_sets): Use note_pattern_stores instead
of note_stores.
* dce.c (mark_nonreg_stores): Remove the "body" parameter and pass
the insn to note_stores.
(prescan_insns_for_dce): Update call accordingly.
* ddg.c (mem_write_insn_p): Pass the insn rather than its pattern
to note_stores.
* df-problems.c (can_move_insns_across): Likewise.
* dse.c (emit_inc_dec_insn_before, replace_read): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
* gcse-common.c (record_last_mem_set_info_common): Likewise.
* gcse.c (load_killed_in_block_p, compute_hash_table_work): Likewise.
(single_set_gcse): Likewise.
* ira.c (validate_equiv_mem): Likewise.
(update_equiv_regs): Use note_pattern_stores rather than note_stores
for no_equiv.
* loop-doloop.c (doloop_optimize): Pass the insn rather than its
pattern to note_stores.
* loop-invariant.c (calculate_loop_reg_pressure): Likewise.
* loop-iv.c (simplify_using_initial_values): Likewise.
* mode-switching.c (optimize_mode_switching): Likewise.
* optabs.c (emit_libcall_block_1): Likewise.
(expand_atomic_compare_and_swap): Likewise.
* postreload-gcse.c (load_killed_in_block_p): Likewise.
(record_opr_changes): Likewise.  Remove explicit handling of
CALL_INSN_FUNCTION_USAGE.
* postreload.c (reload_combine, reload_cse_move2add): Likewise.
* regcprop.c (kill_clobbered_values): Likewise.
(copyprop_hardreg_forward_1): Pass the insn rather than its pattern
to note_stores.
* regrename.c (build_def_use): Likewise.
* reload1.c (reload):  Use note_pattern_stores instead of note_stores
for mark_not_eliminable.
(reload_as_needed): Pass the insn rather than its pattern
to note_stores.
(emit_output_reload_insns): Likewise.
* resource.c (mark_target_live_regs): Likewise.
* sched-deps.c (init_insn_reg_pressure_info): Likewise.
* sched-rgn.c (sets_likely_spilled): Use note_pattern_stores
instead of note_stores.
* shrink-wrap.c (try_shrink_wrapping): Pass the insn rather than
its pattern to note_stores.
* stack-ptr-mod.c (pass_stack_ptr_mod::execute): Likewise.
* var-tracking.c (adjust_insn, add_with_sets): Likewise.

From-SVN: r275527

Simplify the implementation of HARD_REG_SET

We have two styles of HARD_REG_SET: a single integer based on
HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
or an array of integers.  One of the nice properties of this arrangement
is that:

  void foo (const HARD_REG_SET);

is passed by value as an integer when the set is small enough and
by reference otherwise.

(This is in constrast to "const HARD_REG_SET &", which would always
be passed by reference, and in contrast to passing a structure wrapper
like "struct s { T elts[1]; }" by value, where the structure might be
passed like a T or by reference, depending on the ABI.)

However, one of the disadvantages of using an array is that simple
assignment doesn't work.  We need to use COPY_HARD_REG_SET instead.

This patch uses a structure wrapper around the array, and preserves
the above "nice property" using a new const_hard_reg_set typedef.
The patch also removes the manual unrolling for small array sizes;
I think these days we can rely on the compiler to do that for us.

This meant fixing two port-specific quirks:

- epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
  The patch passes the NO_REGS set instead.

- ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
  are bigger than HARD_REG_SET.  The patch just open-codes them.

The patch is probably being too conservative.  Very few places actually
take advantage of the "nice property" above, and we could have a
cleaner interface if we used a structure wrapper for all cases.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
than a #define.  Use a structure rather than an array as the
fallback definition.  Remove special cases for low array sizes.
(const_hard_reg_set): New typedef.
(hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
(hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
(hard_reg_set_empty_p): Likewise.
(SET_HARD_REG_BIT): Use a function rather than a macro to
handle the case in which HARD_REG_SET is a structure.
(CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
(SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
(AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
(IOR_COMPL_HARD_REG_SET): Likewise.
(hard_reg_set_iterator::pset): Constify the pointer target.
(hard_reg_set_iter_init): Take a const_hard_reg_set instead
of a "const HARD_REG_SET".  Update the handling of non-integer
HARD_REG_SETs.
* recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
* reload.h: Likewise.
* rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
* regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
of a "const HARD_REG_SET".
(overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
(range_in_hard_reg_set_p): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
* config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
(rws_insn_set, rws_insn_test): In the CHECKING_P version,
take an unsigned int and open-code the HARD_REG_SET operations.

From-SVN: r275526

rs6000: Update rlwinm-[012].c

gcc/testsuite/
* gcc.target/powerpc/rlwinm-0.c: Adjust expected instruction counts.
* gcc.target/powerpc/rlwinm-1.c: Ditto.
* gcc.target/powerpc/rlwinm-2.c: Ditto.

From-SVN: r275525