gallivm,draw,llvmpipe: Remove support for versions of LLVM prior to 3.1.

Older versions haven't been tested probably don't work anyway.  But more
importantly, code supporting it is hindering further work.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

configure: Require LLVM 3.1.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

scons: Require LLVM 3.1

Support for prior versions will be removed in the following change.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965: Reformat brw_set_src1 so it can be easily found with grep.

i965: fix size assert for gen7 in brw_init_compaction_tables()

It should compare with it's own size.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>

i965: Relax accumulator dependency scheduling on Gen < 6

Many instructions implicitly update the accumulator on Gen < 6. The instruction
scheduling code just calls add_barrier_deps() for each accumulator access on
these platforms, but a large class of operations don't actually update the
accumulator -- mostly move and logical instructions. Teaching the scheduling
code about this would allow more flexibility to schedule instructions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77740
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: simplify the M_PI*f macros, fixes build on OpenBSD

The M_PI*f macros used a preprocessor paste to append 'f'
to M_PI defines, which works if the values are only numbers
but breaks on OpenBSD where M_PI definitions have casts
and brackets to meet requirements of a future version of POSIX,

http://austingroupbugs.net/view.php?id=801
http://austingroupbugs.net/view.php?id=828

Simplify the M_PI*f macros by using casts directly in the defines
as suggested by Kenneth Graunke.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78665
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>

docs: Really add the 10.1.3 release nots this time

Commit a96c3bccf6791359d1159ebe9475e0ed5cf790ed intended to add these, but I
forgot to add the file.

freedreno/a3xx: occlusion query support

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: add support for hw queries

Real GPU queries need some infrastructure to track samples per tile and
accumulate the results.  But fortunately this can be shared across GPU
generation.

See:
https://github.com/freedreno/freedreno/wiki/Queries#hardware-queries

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/query: allow multiple query implementations

Split out fd_query into an abstract base class, to allow multiple
implementations.  The current sw based queries are moved into
fd_sw_query.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

mesa: Dump ARB_vp/fp source and IR when MESA_GLSL=dump.

As far as I can tell, Mesa hasn't had a convenient way to dump ARB_vp/fp
source until now.  Using MESA_GLSL=dump is convenient, since it means
you can use a single environment variable to dump a program's shaders,
no matter which language they're written in.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Don't _swrast_BlitFramebuffer when doing CopyTexSubImage.

The point of copytexsubimage_using_blit_framebuffer is to use a hardware
accelerated BlitFramebuffer path.  If that fails, we shouldn't do a
swrast blit---we should try our CTSI fallback code.

This is especially important for i965 and GLES, where we don't even
create a swrast context.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77705
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965/gen8: Set depth extent field

The depth extent field is used to limit the allowed slice range that
can be rendered to.

With the previous setting, only slice 0 could be rendered.

This fixes piglit amd_vertex_shader_layer-layered-depth-texture-render.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/gen8 depth: Set depth size based on LOD0 for 3D textures

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/gen7 depth: Set depth size based on LOD0 for 3D textures

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/gen8 renderbuffer: Set depth size based on LOD0 for 3D textures

Fixes piglit's
'gl-3.2-layered-rendering-clear-color-all-types 3d mipmapped'

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/gen7 renderbuffer: Set depth size based on LOD0 for 3D textures

If blorp is disabled for color clears, then piglit's
'gl-3.2-layered-rendering-clear-color-all-types 3d mipmapped'
will fail.

Currently, gen8 fails similarly on this test because gen8
does not use blorp.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

freedreno/a3xx: add point-size

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>

glsl_to_tgsi: remove unnecessary dead code elimination pass

With the more advanced dead code elimination pass already being run,
eliminate_dead_code was making no difference in instruction count, and had
an undesirable O(n^2) runtime. So remove it and rename
eliminate_dead_code_advanced to eliminate_dead_code.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

ralloc: Omit detailed license information about talloc.

That information misleads source code auditing tools to think that
ralloc itself is released under LGPL v3.

Instead, simply state talloc is not licensed under a permissive license.

v2: Use wording suggested by Kenneth.

Reviewed-by: Brian Paul <brianp@vmware.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Avoid redundant call to brw_merge_inputs() in brw_try_draw_prims()

We always call brw_merge_inputs() right before looping over the primitives but
this can be called inside the loop for each primitive too. In the case we do it
for the first primitive the call is redundant and can be skipped.

Reviewed-by: Eric Anholt <eric@anholt.net>

glsl: Do not call lhs->variable_referenced() multiple times

Instead take the result from the first call and use it where needed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

meta: Refactor state save/restore for framebuffer texture blits

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

wayland: Move version 2 request to end of interface specification

We're moving towards requiring interface additions to be appended to the
end of the interface block.  No functional change, opcodes are assigned as
before, but version 2 additions are now grouped together, which prevents
a scanner warning.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>

glsl: the number of samplers is already calculated so use it

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Stop doing remapping of "special" regs.

Now that we aren't using pixel_[xy] in live variables, nothing is looking
at these regs after the visitor stage.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Generalize the pixel_x/y workaround for all UW types.

This is the only case where a fs_reg in brw_fs_visitor is used during
optimization/code generation, and it meant that optimizations had to be
careful to not move pixel_x/y's register number without updating it.

Additionally, it turns out we had a couple of other UW values that weren't
getting this treatment (like gl_SampleID), so this more general fix is
probably a good idea (though I wasn't able to replicate problems with
either pixel_[xy]'s values or gl_SampleID, even when telling the register
allocator to reuse registers immediately)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move has_hiz from the slice to the level.

The value depends only on the level, so no need to store the bool per slice.
Shrinks intel_mipmap_slice from 24 bytes to 16, while slotting into an
existing hole in intel_mipmap_level.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

meta: Refactor configuration of renderbuffer sampling

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

meta: Refactor binding of renderbuffer as texture image

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

meta: Merge compiling and linking of blit program

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/blorp: Expose coordinate scissoring and mirroring

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen8: Use helper variables for surface parameters

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nv50,nvc0: fix blit 3d path for 1d array textures

Need to adjust coordinates since the shader receives the array index as
depth in z, but the TEX instruction expects it to be the second
coordinate for a 1D array texture. This fixes fbo-generatemipmap-array.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50,nvc0: leave queries on during blit, turn them on for 2d engine

Fixes the new logic of the conditional rendering piglit test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

mesa/st: leave current query enabled during glBlitFramebuffer

Also make sure that pipe_blit_info gets zero'd out so that query isn't
accidentally left enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium: add bit to pipe_blit_info to leave current query enabled

Previously the implication was that queries should be disabled during
blits. However glBlitFramebuffer() is supposed to obey the current
query, and this new bit will indicate that to the driver.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nv50: fix setting of texture ms info to be per-stage

Different textures may be bound to each slot for each stage. So we need
to be able to upload ms parameters for each one without stages
overwriting each other.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

nv50/ir: make sure to reverse cond codes on all the OP_SET variants

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.2 10.1" <mesa-stable@lists.freedesktop.org>

freedreno/a2xx: fix compiler warning

Signed-off-by: Rob Clark <robclark@freedesktop.org>

radeonsi: prepare depth export registers at compile time

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: simplify depth/stencil export code

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeon/llvm: add support for non-scalar system values

The sample position is one of them.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: add and use a helper function for loading constants

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: only count CS space for state atoms if we're going to draw

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: remove unused variable exports_ps in si_pipe_shader_ps

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: use DRAW_PREAMBLE on CIK

It's the same as setting the 3 regs separately, but shorter, and it also
seems to be required on GFX7.2 and later. This doesn't fix Hawaii.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

r600g: simplify framebuffer state size computation

Take the upper bound. The number doesn't have to absolutely correct, only safe.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

Revert "i965: Fix depth (array slices) computation for 1D_ARRAY render targets."

This reverts commit e6967270c75a5b669152127bb7a746d55f4407a6.

Chris Forbes pointed out that this is broken for texture views which
restrict the number of slices.  He committed a better fix which makes
this unnecessary.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>

egl_dri2: cleanup memory leak in dri2_create_context()

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

ilo: destroy the mutex, if winsys creation fails

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

glx/tests: Partially revert commit 51e3569573a7b3f8da0df093836761003fcdc414

C++ does not support designated initializers, thus compilation
is not guaranteed to succeed. Surprisingly gcc 4.6.3 fails to
build the code, while version 4.9.0 compiles it without a hitch.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78403
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>

configure: error out if building GBM without dri

Both backends require --enable-dri, and building an empty libgbm
makes little to no sense. Error out at configure to prevent the
user from shooting themselves in the foot.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78225
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: propagate FragDepthLayout to gl_program

The information was lost during linking, causing the layout to be treated as
FRAG_DEPTH_LAYOUT_NONE.

Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Rename linker's is_varying_var

Both the ast->IR and linker have functions with this name, but different
behavior.

Rename the linker's version to var_counts_against_varying_limit to be
closer to what it is actually used for.

Suggested by Ian a while back.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Fix GPU hangs on Broadwell in shaders with some control flow.

According to the documentation, we need to set the source 0 register
type to IMM for flow control instructions that have both JIP and UIP.

Fixes GPU hangs in approximately 10 Piglit tests, 5 es3conform tests,
Unigine Crypt, a WebGL raytracer demo, and several Steam titles.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75478
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75878
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76939
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Tested-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

radeonsi: Enable geometry shaders with LLVM 3.4.1

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
CC: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

configure.ac: Add LLVM_VERSION_PATCH to DEFINES

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
CC: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

docs: Import 10.1.3 release notes, andd news item.

st/xa: Fix performance regression introduced by commit "Cache render target surface"

The mentioned commit has the nasty side-effect of turning off accelerated
copies.

Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>

clover: Destory pipe_screen when device does not support compute v2

v2:
  - Make sure screen was successfully created before destroying it.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

pipe-loader: Don't destroy the winsys in the sw loader

The screen takes ownership of the winsys, and is responsible for
destroying it.  Users of pipe-loader should make sure they destory
and  screens they've created to avoid memory leaks.

This fixes a crash in clover introduced by
ce6c17c0833032e91a2d1b34f9eb80c738a854a2 where the pipe-loader was
destroying the winsys while a screen was still using it.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

i965/Gen8: Set up layer constraints properly for depth buffers

Same issues as the previous commit fixed for Gen7:
- Bogus physical->logical layer conversion; depth/stencil surfaces
  are still IMS layout on Gen8.
- mt_layer ignored in layered rendering case, which breaks handling
  of views with MinLayer.
- Render target array extent not set correctly for arrays.

I'm not able to test this one since I can't get a Broadwell yet, but
it's the same set of fixes as for Gen7.

V2: Restore the MAX2() to account for zero depth/layer_count.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/Gen7: Set up layer constraints properly for depth buffers

Again, a few problems:
- Layered attachments did not honor MinLayer.
- Non-layered MSAA attachments rendered to the wrong layer due to
  dividing by the layer count. All depth buffers use the IMS layout, so
  the physical layer count == logical layer count.
- Layered attachments were not limited to irb->layer_count, so we could
  render off the end of the texture.

V2: Restore the MAX2() to account for zero depth/layer_count.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/Gen8: Set up layer constraints properly for renderbuffers

Fixing the same issues the previous commit does for Gen7.

Note that I can't test this one, since I don't have a Broadwell.

V2: Restore the MAX2() to account for zero depth/layer_count.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/Gen7: Set up layer constraints properly for renderbuffers

There were a few problems here, which mostly just broke layered
rendering into a view:

- Render target view extent was always set to be == depth. This is
  benign for non-layered-rendering, but allows writes off the end of the
  render target for layered rendering, which ends badly.
- Layered rendering did not honor the mt_layer setting, so would not
  properly handle MinLayer being set on a view.

V2: Restore the MAX2() to account for zero depth/layer_count.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Fix typo in assert message

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

radeonsi: Don't use anonymous struct trick in atom tracking

I'm somewhat impressed that current gccs will let you do this, but
sufficiently old ones (including 4.4.7 in RHEL6) won't.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>

llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS limit definition.

When the limit was changed to be defined in terms of LP_MAX_SHADER_VARIANTS
(75f1fea14f524ef05e980d825fda3ae226ae2ffe) when it was increased, this
inadvertently lowered the limit in some branches (that have a lower
LP_MAX_SHADER_VARIANTS number) when merged. So, make sure the limit is always
at least the number it once was.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

draw: do not use draw_get_option_use_llvm() inside draw execution paths

1c73e919a4b4dd79166d0633075990056f27fd28 made it possible to not allocate
the tgsi machine if llvm was used. However, draw_get_option_use_llvm() is
not reliable after draw context creation, since drivers can explicitly
request a non-llvm draw context even if draw_get_option_use_llvm() would
return true (and softpipe does just that) which leads to crashes.
Thus use draw->llvm to determine if we're using llvm or not instead (and
make draw->llvm available even if HAVE_LLVM is false so we don't have to put
even more ifdefs).

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

i965: Fix depth (array slices) computation for 1D_ARRAY render targets.

1D array targets store the number of slices in the Height field.

Fixes Piglit's spec/!OpenGL 3.2/layered-rendering/clear-color-all-types
1d_array single_level, at least when used with Meta clears.

Cc: "10.2 10.1 10.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa: Fix MaxNumLayers for 1D array textures.

1D array targets store the number of slices in the Height field.

Cc: "10.2 10.1 10.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Enable GL_ARB_texture_view on Broadwell.

This is a port of commit c9c08867ed07ceb10b67ffac5f0a33812710a5e8.
A tiny bit of extra work was necessary to not break stencil texturing.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

mesa: pass target through to driver when choosing texture format

This only matters for TextureView where the texObj's target has not been
set yet, in all other instances, texObj->target should be the same as
the passed-in target parameter.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

nv50/ir/gk110: fix set with f32 dest

Should fix comparison opcodes like SGE/SLT/etc which expected a float to
be returned. These were previously getting integer 0/-1 values.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: 10.2 <mesa-stable@lists.freedesktop.org>

nv50/ir: allow load propagation when flags are defined

The old condition disallowed load propagation any time flags were
defined, even with e.g. set and a constbuf reference. The new condition
disallows it only with immediate propagation. (There are no opcodes that
set the condition flag and have an immediate argument.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa/st: pass 4-offset TG4 without lowering if supported

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: add a cap for supporting 4-offset TG4 opcodes

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

svga: add switch case for PIPE_SHADER_CAP_PREFERRED_IR, remove default case

Remove default switch case so we're warned of missing cases at compile
time.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

tgsi: add missing switch cases in tgsi_exec_get_shader_param()

Add cases for PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS and
PIPE_SHADER_CAP_PREFERRED_IR.  Remove default switch case so we
learn of missing cases at compile time.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

gallivm: add PIPE_SHADER_CAP_PREFERRED_IR switch case, remove default

Return PIPE_SHADER_IR_TGSI for the PIPE_SHADER_CAP_PREFERRED_IR query.
Remove default switch case so we learn of missing switch cases at
compile time.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

gallium: remove enum numbers from shader cap queries

The enum numbers were just cruft.

Reviewed-by: Michel Dänzer <michel@daenzer.net>

linker: Fix consumer_inputs_with_locations indexing

In an earlier incarnation of populate_consumer_input_sets and
get_matching_input, the consumer_inputs_with_locations array was indexed
using the user-specified location.  In that version, only user-defined
varyings were included in the array.

In the current incarnation, the Mesa location is used to index the
array, and built-in varyings are included.

This change fixes the unit test to exepect gl_ClipDistance in the array,
and it resizes the arrays to actually be big enough.  It's just dumb
luck that the existing piglit tests use small enough locations to not
stomp the stack. :(

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78258
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Cc: Vinson Lee <vlee@freedesktop.org>

st/wgl: Advertise WGL_ARB_create_context(_profile).

We added wglCreateContextAttribsARB but not the extension strings.

This allows creation of GL 3.x contexts.

Reviewed-by: Brian Paul <brianp@vmware.com>

st/wgl: Honour request of 3.1 contexts through core profile where available.

Port 5f493eed69f6fb11239c04119d602f1c23a68cbd from GLX.

Reviewed-by: Brian Paul <brianp@vmware.com>

meta: Only clear the requested color buffers.

This path is used to implement both glClear and glClearBuffer; the
latter is only supposed to clear particular buffers.  Core Mesa provides
us that information in the buffers bitmask; we must only clear buffers
mentioned there.

To accomplish this, we save/restore the color draw buffers state, and
use glDrawBuffers to restrict drawing to the relevant buffers.

Fixes Piglit's spec/!OpenGL 3.0/clearbuffer-mixed-formats and
spec/ARB_framebuffer_object/fbo-drawbuffers-none glClearBuffer tests
for drivers using meta clears (such as Broadwell).

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77852
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77856
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meta: Add infrastructure for saving/restoring the DrawBuffers state.

Sometimes we need to configure what draw buffers we render to, without
creating a new FBO.  This path will make that possible.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meta: Add a new MESA_META_DRAW_BUFFERS bit.

This will be used for saving/restoring the glDrawBuffers state.
For now, make sure that existing users of MESA_META_ALL don't get
the new bit, since they probably won't want it.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meta: Unify the GLSL and fixed-function clear paths.

The majority of _mesa_meta_Clear and _mesa_meta_glsl_Clear was the same;
adding a boolean for whether to use GLSL allows us to share most of it
without polluting either path too much.

Tested for regressions by hacking i965 to always use the non-GLSL path.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Always intel_prepare_render() after invalidating front buffers.

Fixes glean/texture_srgb, which hit recursive-flush prevention
assertions in vbo_exec_FlushVertices.

This probably hurts the performance of front buffer rendering, but
very few people in their right mind do front buffer rendering.

Fixes Glean's texture_srgb test.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

radeonsi: implement ARB_texture_cube_map_array

No LLVM changes needed.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
v2: updated GL3.txt and relnotes

configure.ac: radeonsi requires EGL_DRM and GBM

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

glsl: fix bogus layout qualifier warnings

Print out GL_ARB_explicit_attrib_location warnings only
when parsing attribute that uses "location" qualifier.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77245
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

docs: Import 10.1.2 release notes, andd news item.

st/egl: Flush resources before presentation (android - bug 77966)

[olv: Use the real name provided by the patch author.  Ideally this could be
moved to somewhere higher level so that we would not need to create a pipe
context to flush resources.  Plus, it is not clear if flushing resources for
another context is valid.]

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

docs: mark ARB_stencil_texturing as done for nv50+/r600+

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa/st: implement ARB_stencil_texturing

If StencilSampling is enabled on the texture object, pass in an
equivalent stencil-only format.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nv50,nvc0: add X8Z24_UNORM, fix stencil-only formats

S8_UINT will become useful when ARB_texture_stencil8 becomes supported by
mesa. The other stencil formats are needed for ARB_stencil_texturing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>