mesa.git
9 years agoi965/fs: fix regs_read() for LINTERP
Connor Abbott [Wed, 1 Jul 2015 16:58:47 +0000 (09:58 -0700)]
i965/fs: fix regs_read() for LINTERP

The second source always stays within the same SIMD8 register.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
9 years agonir: add nir_foreach_instr_safe_reverse()
Connor Abbott [Wed, 15 Jul 2015 19:01:20 +0000 (12:01 -0700)]
nir: add nir_foreach_instr_safe_reverse()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
9 years agonir: add nir_instr_is_first() and nir_instr_is_last() helpers
Connor Abbott [Wed, 15 Jul 2015 19:00:47 +0000 (12:00 -0700)]
nir: add nir_instr_is_first() and nir_instr_is_last() helpers

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
9 years agoi965/cs: Use dispatch width of 8 for cs terminate payload setup
Jordan Justen [Thu, 16 Jul 2015 22:07:05 +0000 (15:07 -0700)]
i965/cs: Use dispatch width of 8 for cs terminate payload setup

This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_write: Assertion `var < num_vars' failed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965/cs: Return 1 for regs_read on CS_OPCODE_CS_TERMINATE
Jordan Justen [Thu, 16 Jul 2015 22:04:43 +0000 (15:04 -0700)]
i965/cs: Return 1 for regs_read on CS_OPCODE_CS_TERMINATE

This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_read: Assertion `var < num_vars' failed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoprogram: Allow redundant OPTION ARB_fog_* directives.
Kenneth Graunke [Sun, 5 Jul 2015 02:15:16 +0000 (19:15 -0700)]
program: Allow redundant OPTION ARB_fog_* directives.

A fragment program from "Pixel Piracy" contains redundant OPTION
directives:

!!ARBfp1.0
OPTION ARB_precision_hint_fastest;
OPTION ARB_fog_exp2;
OPTION ARB_precision_hint_fastest;
OPTION ARB_fog_exp2;
...

We already allow redundant ARB_precision_hint_fastest directives, but
disallow the redundant (yet consistent) ARB_fog_exp2 directives, failing
to compile the program.

The specification seems to contradict itself - the main text says that
only one fog application option may be specified, but then backpedals,
indicating the intent is to disallow /contradictory/ flags.  One of the
issues suggests that specifying contradictory ones is stupid, but
allowed, and only the last one should take effect.

Accepting multiple redundant (but consistent) directives seems harmless,
and like a reasonable interpretation of the specification.  It also
fixes a fragment program found in the wild.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoi965: Push miptree tiling request into flags
Ben Widawsky [Tue, 14 Jul 2015 16:56:09 +0000 (09:56 -0700)]
i965: Push miptree tiling request into flags

With the last few patches a way was provided to influence lower layer miptree
layout and allocation decisions via flags (replacing bools). For simplicity, I
chose not to touch the tiling requests because the change was slightly less
mechanical than replacing the bools.

The goal is to organize the code so we can continue to add new parameters and
tiling types while minimizing risk to the existing code, and not having to
constantly add new function parameters.

v2: Rebased on Anuj's recent Yf/Ys changes
Fix non-msrt MCS allocation (was only happening in gen8 case before)

v3: small fix in assertion requested by Chad

v4: Use parens to get the order right from v3.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoRevert "i965: Push miptree tiling request into flags"
Ben Widawsky [Thu, 16 Jul 2015 23:52:08 +0000 (16:52 -0700)]
Revert "i965: Push miptree tiling request into flags"

This reverts commit 51e8d549e110f86cb7107cf712843aebd956fb9a.

9 years agoi965: Push miptree tiling request into flags
Ben Widawsky [Tue, 14 Jul 2015 16:56:09 +0000 (09:56 -0700)]
i965: Push miptree tiling request into flags

With the last few patches a way was provided to influence lower layer miptree
layout and allocation decisions via flags (replacing bools). For simplicity, I
chose not to touch the tiling requests because the change was slightly less
mechanical than replacing the bools.

The goal is to organize the code so we can continue to add new parameters and
tiling types while minimizing risk to the existing code, and not having to
constantly add new function parameters.

v2: Rebased on Anuj's recent Yf/Ys changes
Fix non-msrt MCS allocation (was only happening in gen8 case before)

v3: small fix in assertion requested by Chad

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> (v2)
Reviewed-by: Chad Versace <chad.versace@intel.com> (v2)
9 years agoi965/fs: Factor out universally broken calculation of the register component size.
Francisco Jerez [Tue, 14 Jul 2015 12:43:44 +0000 (15:43 +0300)]
i965/fs: Factor out universally broken calculation of the register component size.

This in principle simple calculation was being open-coded in a number
of places (in a series I haven't yet sent for review there will be a
couple more), all of them were subtly broken in one way or another:
None of them were handling the HW_REG case correctly as pointed out by
Connor, and fs_inst::regs_read() was handling the stride=0 case rather
naively.  This patch solves both problems and factors out the
calculation as a new fs_reg method.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965: Implement nir_op_uadd_carry and _usub_borrow without accumulator.
Francisco Jerez [Thu, 9 Jul 2015 18:42:28 +0000 (21:42 +0300)]
i965: Implement nir_op_uadd_carry and _usub_borrow without accumulator.

This gets rid of two no16() fall-backs and should allow better
scheduling of the generated IR.  There are no uses of usubBorrow() or
uaddCarry() in shader-db so no changes are expected.  However the
"arb_gpu_shader5/execution/built-in-functions/fs-usubBorrow" and
"arb_gpu_shader5/execution/built-in-functions/fs-uaddCarry" piglit
tests go from 40 to 28 instructions.  The reason is that the plain ADD
instruction can easily be CSE'ed with the original addition, and the
b2i negation can easily be propagated into the source modifier of
another instruction, so effectively both operations are performed with
just one instruction.

v2: Rely on carry_to_arith() and borrow_to_arith() to lower these
    (Ilia Mirkin).

Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agoi965: Implement b2f and b2i using negation.
Francisco Jerez [Fri, 10 Jul 2015 16:18:39 +0000 (19:18 +0300)]
i965: Implement b2f and b2i using negation.

Booleans are represented as 0/-1 on modern hardware which means we can
just negate them to convert them into a numeric type.  Negation has
the benefit that it can be implemented using a source modifier which
can easily be propagated into some other instruction.  shader-db
results on HSW:

total instructions in shared programs: 6349082 -> 6346693 (-0.04%)
instructions in affected programs:     40948 -> 38559 (-5.83%)
helped:                                123
HURT:                                  1
GAINED:                                1
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agogallium: add interface for writable shader buffers
Marek Olšák [Sun, 5 Jul 2015 13:00:22 +0000 (15:00 +0200)]
gallium: add interface for writable shader buffers

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agogallium: add interface for writable shader images
Marek Olšák [Sun, 5 Jul 2015 12:48:33 +0000 (14:48 +0200)]
gallium: add interface for writable shader images

PIPE_CAPs will be added some other time.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agogallium: add new limits for shader buffers and images
Marek Olšák [Sun, 5 Jul 2015 12:34:13 +0000 (14:34 +0200)]
gallium: add new limits for shader buffers and images

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agogallium: add BIND flags for R/W buffers and images
Marek Olšák [Sun, 5 Jul 2015 11:51:16 +0000 (13:51 +0200)]
gallium: add BIND flags for R/W buffers and images

PIPE_CAPs and TGSI support will be added later. The TGSI support should be
straightforward. We only need to split TGSI_FILE_RESOURCE into TGSI_FILE_IMAGE
and TGSI_FILE_BUFFER, though duplicating all opcodes shouldn't be necessary.

The idea is:
* ARB_shader_image_load_store should use set_shader_images.
* ARB_shader_storage_buffer_object should use set_shader_buffers(slots 0..M-1)
  if M shader storage buffers are supported.
* ARB_shader_atomic_counters should use set_shader_buffers(slots M..N)
  if N-M+1 atomic counter buffers are supported.

PIPE_CAPs can describe various constraints for early DX11 hardware.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agogallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGS
Marek Olšák [Fri, 12 Jun 2015 12:24:17 +0000 (14:24 +0200)]
gallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGS

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agoi965/gen9: Use custom MOCS entries set up by the kernel.
Francisco Jerez [Wed, 1 Jul 2015 13:32:24 +0000 (16:32 +0300)]
i965/gen9: Use custom MOCS entries set up by the kernel.

Instead of relying on hardware defaults the i915 kernel driver is
going program custom MOCS tables system-wide on Gen9 hardware.  The
"WT" entry previously used for renderbuffers had a number of problems:
It disabled caching on eLLC, it used a reserved L3 cacheability
setting, and it used to override the PTE controls making renderbuffers
always WT on LLC regardless of the kernel's setting.  Instead use an
entry from the new MOCS tables with parameters: TC=LLC/eLLC, LeCC=PTE,
L3CC=WB.

The "WB" entry previously used for anything other than renderbuffers
has moved to a different index in the new MOCS tables but it should
have the same caching semantics as the old entry.

Even though the corresponding kernel change ("drm/i915: Added
Programming of the MOCS") is in a way an ABI break it doesn't seem
necessary to check that the kernel is recent enough because the change
should only affect Gen9 which is still unreleased hardware.

v2: Update MOCS values for the new Android-incompatible tables
    introduced in v7 of the kernel patch.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-July/071080.html
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
9 years agoclover: little OpenCL status code logging clean
EdB [Tue, 7 Jul 2015 15:58:56 +0000 (17:58 +0200)]
clover: little OpenCL status code logging clean

s/build_error/compile_error in order to match the stored OpenCL status code.
Make program::build catch and log every OpenCL error.
Make tgsi error triggering uniform with the llvm one.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agoglsl: avoid compiler's segfault when processing operators with void arguments
Renaud Gaubert [Sat, 11 Jul 2015 17:38:10 +0000 (19:38 +0200)]
glsl: avoid compiler's segfault when processing operators with void arguments

This is done by returning an rvalue of type void in the
ast_function_expression::hir function instead of a void expression.

This produces (in the case of the ternary) an hir with a call
to the void returning function and an assignment of a void variable
which will be optimized out (the assignment) during the optimization
pass.

This fix results in having a valid subexpression in the many
different cases where the subexpressions are functions whose
return values are void.

Thus preventing to dereference NULL in the following cases:
  * binary operator
  * unary operators
  * ternary operator
  * comparison operators (except equal and nequal operator)

Equal and nequal had to be handled as a special case because
instead of segfaulting on a forbidden syntax it was now accepting
expressions with a void return value on either (or both) side of
the expression.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85252

Signed-off-by: Renaud Gaubert <renaud@lse.epita.fr>
Reviewed-by: Gabriel Laskar <gabriel@lse.epita.fr>
Reviewed-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
9 years agor200: fix some potential big endian issues
Roland Scheidegger [Thu, 16 Jul 2015 01:55:59 +0000 (03:55 +0200)]
r200: fix some potential big endian issues

The formats chosen (both by texture format choser, fbo storage allocation)
are different for big endian not just for rgba8 but also lower bit width
formats (why I don't actually know). Even the function to test for renderable
formats used different formats, however the actual colorbuffer setup did not.
And the blitter did not take that into account neither.
Untested (what could possibly go wrong...).
Same as for r100.

Acked-by: Marek Olšák <marek.olsak@amd.com>
9 years agoradeon: fix some potential big endian issues
Roland Scheidegger [Thu, 16 Jul 2015 01:18:20 +0000 (03:18 +0200)]
radeon: fix some potential big endian issues

The formats chosen (both by texture format choser, fbo storage allocation)
are different for big endian not just for rgba8 but also lower bit width
formats (why I don't actually know). Even the function to test for renderable
formats used different formats, however the actual colorbuffer setup did not.
And the blitter did not take that into account neither.
Untested (what could possibly go wrong...).

Acked-by: Marek Olšák <marek.olsak@amd.com>
9 years agoradeon/r200: mark state atoms as dirty after blits
Roland Scheidegger [Sat, 11 Jul 2015 18:03:27 +0000 (20:03 +0200)]
radeon/r200: mark state atoms as dirty after blits

Blit submits lots of packets which are usually handled by state atoms, so
these must be dirtied.
Not sure if this fixes anything, but it was a concern raised by bug 51658
(with this all issues there seen as actual bugs should be fixed, with the
exception of the patch to upload non-used texenv state atoms which I just
don't understand).

Acked-by: Marek Olšák <marek.olsak@amd.com>
9 years agor200: fix fbo rendering by disabling optimized texture format chooser
Roland Scheidegger [Thu, 16 Jul 2015 01:06:47 +0000 (03:06 +0200)]
r200: fix fbo rendering by disabling optimized texture format chooser

It is rather unfortunate that we don't know if a texture is going to be used
as a rt later, and we lack the means to do something about a format chosen
which we can't render to directly, so disable this and always chose renderable
format for rgba8 textures.
This addresses an issue raised on (old) bug,
https://bugs.freedesktop.org/show_bug.cgi?id=51658 with gnome-shell, don't
know if that's still applicable but it might fix other things as well.

Acked-by: Marek Olšák <marek.olsak@amd.com>
9 years agoi965: Fix 32 bit build warnings in intel_get_yf_ys_bo_size()
Anuj Phogat [Tue, 7 Jul 2015 19:23:33 +0000 (12:23 -0700)]
i965: Fix 32 bit build warnings in intel_get_yf_ys_bo_size()

Along with fixing the type of pitch parameter, patch also changes
the types of few local variables and function return type.

Warnings fixed are:
intel_mipmap_tree.c:671:7: warning: passing argument 3 of
'intel_get_yf_ys_bo_size' from incompatible pointer type

intel_mipmap_tree.c:563:1: note: expected 'uint64_t *' but
argument is of type 'long unsigned int *'

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965: Optimize batchbuffer macros.
Matt Turner [Thu, 9 Jul 2015 02:00:48 +0000 (19:00 -0700)]
i965: Optimize batchbuffer macros.

Previously OUT_BATCH was just a macro around an inline function which
does

   brw->batch.map[brw->batch.used++] = dword;

When making consecutive calls to intel_batchbuffer_emit_dword() the
compiler isn't able to recognize that we're writing consecutive memory
locations or that it doesn't need to write batch.used back to memory
each time.

We can avoid both of these problems by making a local pointer to the
next location in the batch in BEGIN_BATCH().

Cuts 18k from the .text size.

   text     data      bss      dec      hex  filename
4946956   195152    26192  5168300   4edcac  i965_dri.so before
4928956   195152    26192  5150300   4e965c  i965_dri.so after

This series (including commit c0433948) improves performance of Synmark
OglBatch7 by 8.01389% +/- 0.63922% (n=83) on Ivybridge.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agoi965: Add and use USED_BATCH macro.
Matt Turner [Sat, 11 Jul 2015 21:36:25 +0000 (14:36 -0700)]
i965: Add and use USED_BATCH macro.

The next patch will replace the .used field with an on-demand
calculation of batchbuffer usage.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agoi965: Split batch emission from relocation functions.
Matt Turner [Thu, 9 Jul 2015 01:59:51 +0000 (18:59 -0700)]
i965: Split batch emission from relocation functions.

So that everything writing to the batch between BEGIN_BATCH() and
ADVANCE_BATCH() goes through OUT_BATCH.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agoi965: Move BEGIN_BATCH() into same control flow as ADVANCE_BATCH().
Matt Turner [Thu, 9 Jul 2015 01:56:52 +0000 (18:56 -0700)]
i965: Move BEGIN_BATCH() into same control flow as ADVANCE_BATCH().

BEGIN_BATCH() and ADVANCE_BATCH() will contain "do {" and "} while (0)"
respectively to allow declaring local variables used by intervening
OUT_BATCH macros. As such, BEGIN_BATCH() and ADVANCE_BATCH() need to be
in the same control flow.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agoosmesa: fix OSMesaPixelsStore typo
Brian Paul [Wed, 15 Jul 2015 12:15:06 +0000 (06:15 -0600)]
osmesa: fix OSMesaPixelsStore typo

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91337
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agovc4: Cache the texture p1 for the sampler.
Eric Anholt [Tue, 14 Jul 2015 19:32:04 +0000 (12:32 -0700)]
vc4: Cache the texture p1 for the sampler.

Cuts another 12% of vc4_uniforms.o, in exchange for computing it at
CSO creation time.

9 years agovc4: Cache texture p0/p1 setup for the sampler view.
Eric Anholt [Tue, 14 Jul 2015 19:18:40 +0000 (12:18 -0700)]
vc4: Cache texture p0/p1 setup for the sampler view.

In exchange for a bit of space and computation in CSO setup, we cut
vc4_uniform.c (draw time) code size by 4.8%.

9 years agovc4: Move uniforms handling to a separate file.
Eric Anholt [Tue, 14 Jul 2015 19:21:23 +0000 (12:21 -0700)]
vc4: Move uniforms handling to a separate file.

The rest of vc4_program.c is about compiling, while this is about
uniform emit at draw time.

9 years agovc4: Fix some -Wdouble-promotion warnings.
Eric Anholt [Tue, 14 Jul 2015 18:54:15 +0000 (11:54 -0700)]
vc4: Fix some -Wdouble-promotion warnings.

No code generation changes from this, but it'll be useful to have this
next time I go checking -Wdouble-promotion.

9 years agoi965/cs: Initialize GPGPU Thread Count
Jordan Justen [Fri, 12 Jun 2015 02:17:03 +0000 (19:17 -0700)]
i965/cs: Initialize GPGPU Thread Count

This field should always be set for gen8. In the bdw PRM, Volume 2d:
Command Reference: Structures under INTERFACE_DESCRIPTOR_DATA, DWORD
6, Bits 9:0, Number of Threads in GPGPU Thread Group:

"This field should not be set to 0 even if the barrier is disabled,
since an accurate value is needed for proper pre-emption."

In the HSW PRM, the it doesn't mention that it must always be set, but
it should not hurt.

Reported-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
9 years agovc4: Fix compiler warnings on release builds.
Eric Anholt [Sat, 11 Jul 2015 00:00:34 +0000 (17:00 -0700)]
vc4: Fix compiler warnings on release builds.

9 years agovc4: Add better debug for register allocation failure.
Eric Anholt [Sat, 11 Jul 2015 00:01:37 +0000 (17:01 -0700)]
vc4: Add better debug for register allocation failure.

9 years agovc4: Drop reloc_count tracking for debug asserts on non-debug builds.
Eric Anholt [Fri, 10 Jul 2015 23:11:23 +0000 (16:11 -0700)]
vc4: Drop reloc_count tracking for debug asserts on non-debug builds.

Cuts another 88 bytes of compiled code.

9 years agovc4: Rework cl handling to be friendlier to the compiler.
Eric Anholt [Fri, 10 Jul 2015 05:51:06 +0000 (22:51 -0700)]
vc4: Rework cl handling to be friendlier to the compiler.

Drops 680 bytes of code, from avoiding a bunch of extra updates to the
next pointer in the struct.

9 years agovc4: Make a helper function for getting the current offset in the CL.
Eric Anholt [Fri, 10 Jul 2015 21:46:42 +0000 (14:46 -0700)]
vc4: Make a helper function for getting the current offset in the CL.

I needed to rewrite this a bit for safety checking in the next commit.
Despite being a static inline of the same thing that was being done, we
lose 36 bytes of code for some reason.

9 years agovc4: Drop separate cl*_reloc_hindex().
Eric Anholt [Fri, 10 Jul 2015 05:48:17 +0000 (22:48 -0700)]
vc4: Drop separate cl*_reloc_hindex().

Now that RCL generation is in the kernel, we don't have any other
callers.  Oddly, the compiler generates another 8 bytes of code for
this, but the simplification is worth it.

9 years agovc4: Store reloc pointers as pointers, not offsets.
Eric Anholt [Fri, 10 Jul 2015 05:42:22 +0000 (22:42 -0700)]
vc4: Store reloc pointers as pointers, not offsets.

Now that we don't resize the CL as we build (it's set up at the top by
vc4_start_draw()), we can store the pointers instead of offsets from
the base.  Saves a bit of math in emitting relocs (about 60 bytes of
code).

9 years agovc4: Add perf debug for when we wait on BOs.
Eric Anholt [Tue, 30 Jun 2015 05:32:03 +0000 (22:32 -0700)]
vc4: Add perf debug for when we wait on BOs.

9 years agoi965: Mark constant static data as const.
Matt Turner [Mon, 13 Jul 2015 22:40:41 +0000 (15:40 -0700)]
i965: Mark constant static data as const.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoglsl: Lower shader storage buffer object loads to GLSL IR instrinsics
Samuel Iglesias Gonsalvez [Wed, 8 Jul 2015 15:30:44 +0000 (17:30 +0200)]
glsl: Lower shader storage buffer object loads to GLSL IR instrinsics

Extend the existing lower_ubo_reference pass to also detect SSBO loads
and lower them to __intrinsic_load_ssbo intrinsics.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Lower shader storage buffer object writes to GLSL IR instrinsics
Samuel Iglesias Gonsalvez [Wed, 8 Jul 2015 15:03:06 +0000 (17:03 +0200)]
glsl: Lower shader storage buffer object writes to GLSL IR instrinsics

Extend the existing lower_ubo_reference pass to also detect SSBO writes
and lower them to __intrinsic_store_ssbo intrinsics.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Don't do copy propagation on buffer variables
Iago Toral Quiroga [Fri, 24 Apr 2015 09:17:15 +0000 (11:17 +0200)]
glsl: Don't do copy propagation on buffer variables

Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Don't do constant variable on buffer variables
Iago Toral Quiroga [Fri, 24 Apr 2015 09:15:48 +0000 (11:15 +0200)]
glsl: Don't do constant variable on buffer variables

Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Don't do constant propagation on buffer variables
Iago Toral Quiroga [Fri, 24 Apr 2015 09:14:17 +0000 (11:14 +0200)]
glsl: Don't do constant propagation on buffer variables

Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Do not kill dead assignments to buffer variables or SSBO declarations.
Iago Toral Quiroga [Mon, 6 Apr 2015 08:19:50 +0000 (10:19 +0200)]
glsl: Do not kill dead assignments to buffer variables or SSBO declarations.

If we kill dead assignments we lose the buffer writes.

Also, we never kill UBO declarations even if they are never referenced
by the shader, they are always considered active. Although the spec
does not seem say this specifically for SSBOs, it is probably implied
since SSBOs are pretty much the same as UBOs, only that you can write
to them.

v2:
- Fix the comment (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Don't do tree grafting on buffer variables
Iago Toral Quiroga [Mon, 6 Apr 2015 07:37:58 +0000 (09:37 +0200)]
glsl: Don't do tree grafting on buffer variables

Otherwise we can lose writes into the buffers backing the variables.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Implement _mesa_BindBufferRange for target GL_SHADER_STORAGE_BUFFER
Iago Toral Quiroga [Thu, 19 Mar 2015 10:42:33 +0000 (11:42 +0100)]
mesa: Implement _mesa_BindBufferRange for target GL_SHADER_STORAGE_BUFFER

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Implement _mesa_BindBufferBase for target GL_SHADER_STORAGE_BUFFER
Iago Toral Quiroga [Thu, 19 Mar 2015 10:37:43 +0000 (11:37 +0100)]
mesa: Implement _mesa_BindBufferBase for target GL_SHADER_STORAGE_BUFFER

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Implement _mesa_BindBuffersRange for target GL_SHADER_STORAGE_BUFFER
Iago Toral Quiroga [Thu, 19 Mar 2015 10:21:52 +0000 (11:21 +0100)]
mesa: Implement _mesa_BindBuffersRange for target GL_SHADER_STORAGE_BUFFER

v2:
- Fix error message (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Implement _mesa_BindBuffersBase for target GL_SHADER_STORAGE_BUFFER
Iago Toral Quiroga [Thu, 19 Mar 2015 09:47:17 +0000 (10:47 +0100)]
mesa: Implement _mesa_BindBuffersBase for target GL_SHADER_STORAGE_BUFFER

v2:
- Add space before const (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Implement _mesa_DeleteBuffers for target GL_SHADER_STORAGE_BUFFER
Iago Toral Quiroga [Thu, 19 Mar 2015 09:31:23 +0000 (10:31 +0100)]
mesa: Implement _mesa_DeleteBuffers for target GL_SHADER_STORAGE_BUFFER

v2:
- Remove the extra spaces (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Initialize and free shader storage buffers
Iago Toral Quiroga [Thu, 19 Mar 2015 10:50:51 +0000 (11:50 +0100)]
mesa: Initialize and free shader storage buffers

v2:
- Fix indention, used tabs instead of whitespaces. (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: fix error messages in invalid declarations of shader storage blocks
Samuel Iglesias Gonsalvez [Thu, 19 Mar 2015 09:22:00 +0000 (10:22 +0100)]
glsl: fix error messages in invalid declarations of shader storage blocks

Due to GL_ARB_shader_storage_buffer_object extension, shader storage blocks
have the same limitations as uniform blocks.

This patch fixes the corresponding error messages.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: buffer variables cannot be defined outside interface blocks
Samuel Iglesias Gonsalvez [Wed, 18 Mar 2015 09:52:53 +0000 (10:52 +0100)]
glsl: buffer variables cannot be defined outside interface blocks

Section 4.3.7 "Buffer Variables", GLSL 4.30 spec:

"Buffer variables may only be declared inside interface blocks
(section 4.3.9 “Interface Blocks”), which are then referred to as
shader storage blocks. It is a compile-time error to declare buffer
variables at global scope (outside a block)."

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: shader buffer variables cannot have initializers
Samuel Iglesias Gonsalvez [Wed, 18 Mar 2015 09:25:10 +0000 (10:25 +0100)]
glsl: shader buffer variables cannot have initializers

Section 4.3.7 "Buffer Variables" of the GLSL 4.30 spec:

    "Buffer variables cannot have initializers."

v2:
- Rewrite error message (Jordan)

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: enable binding layout qualifier usage for shader storage buffer objects
Samuel Iglesias Gonsalvez [Wed, 18 Mar 2015 08:02:51 +0000 (09:02 +0100)]
glsl: enable binding layout qualifier usage for shader storage buffer objects

See GLSL 4.30 spec, section 4.4.5 "Uniform and Shader Storage Block
Layout Qualifiers".

v2:
- Add whitespace in an error message. Delete period '.' at the end of that
error message (Jordan).

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: add MaxShaderStorageBlocks to struct gl_program_constants
Samuel Iglesias Gonsalvez [Thu, 14 May 2015 10:37:07 +0000 (12:37 +0200)]
mesa: add MaxShaderStorageBlocks to struct gl_program_constants

v2:
- Set MaxShaderStorageBlocks to 8.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: Add shader storage buffer support to struct gl_context
Iago Toral Quiroga [Thu, 19 Mar 2015 09:15:30 +0000 (10:15 +0100)]
mesa: Add shader storage buffer support to struct gl_context

This includes the array of bindings, the current buffer bound to the
GL_SHADER_STORAGE_BUFFER target and a set of general limits and default
values for shader storage buffers.

v2:
- Use spec values for the new defined constants (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Identify active uniform blocks that are buffer blocks as such.
Iago Toral Quiroga [Mon, 23 Mar 2015 10:19:12 +0000 (11:19 +0100)]
glsl: Identify active uniform blocks that are buffer blocks as such.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: link buffer variables and shader storage buffer interface blocks
Kristian Høgsberg [Wed, 13 May 2015 09:17:23 +0000 (11:17 +0200)]
glsl: link buffer variables and shader storage buffer interface blocks

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Implement parser support for 'buffer' qualifier
Kristian Høgsberg [Wed, 13 May 2015 08:53:46 +0000 (10:53 +0200)]
glsl: Implement parser support for 'buffer' qualifier

This is used to identify shader storage buffer interface blocks where
buffer variables are declared.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agonir: add nir_var_shader_storage
Iago Toral Quiroga [Mon, 18 May 2015 13:47:18 +0000 (15:47 +0200)]
nir: add nir_var_shader_storage

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: rename is_in_uniform_block to is_in_buffer_block
Iago Toral Quiroga [Fri, 5 Jun 2015 07:11:53 +0000 (09:11 +0200)]
mesa: rename is_in_uniform_block to is_in_buffer_block

Since this now checks if a variable is inside a uniform or a shader
storage block.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: Add ir_var_shader_storage
Kristian Høgsberg [Wed, 13 May 2015 08:41:55 +0000 (10:41 +0200)]
glsl: Add ir_var_shader_storage

This will be used to identify buffer variables inside shader storage
buffer objects, which are very similar to uniforms except for a few
differences, most important of which is that they are writable.

Since buffer variables are so similar to uniforms, we will almost always
want them to go through the same paths as uniforms.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agomesa: define ARB_shader_storage_buffer_object extension
Samuel Iglesias Gonsalvez [Tue, 17 Mar 2015 11:17:27 +0000 (12:17 +0100)]
mesa: define ARB_shader_storage_buffer_object extension

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
9 years agoglsl: free interface_types
Timothy Arceri [Mon, 13 Jul 2015 21:41:26 +0000 (07:41 +1000)]
glsl: free interface_types

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
9 years agoglsl: replace some more old hash_table uses
Timothy Arceri [Mon, 13 Jul 2015 21:37:59 +0000 (07:37 +1000)]
glsl: replace some more old hash_table uses

The util/hash_table was intended to be a fast hash table
replacement for the program/hash_table see 35fd61bd99c1 and 72e55bb6888ff.

This change replaces some more uses of the old hash table.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
9 years agoauxiliary/vl: use the correct screen index
Emil Velikov [Fri, 10 Jul 2015 20:27:13 +0000 (21:27 +0100)]
auxiliary/vl: use the correct screen index

Inspired (copied) from Marek's commit for egl/x11
commit 0b56e23e7f3(egl/dri2: use the correct screen index)

v2: Fix copy/pasta errors.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
9 years agoradeon: remove dri_mirror state
Emil Velikov [Tue, 7 Jul 2015 13:44:11 +0000 (14:44 +0100)]
radeon: remove dri_mirror state

Most of the data stored(duplicated) was unused, and for the one that is
follow the approach set by other drivers.
This eliminates the use of legacy (dri1) types.

Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoi915: remove unused driFd variable
Emil Velikov [Tue, 7 Jul 2015 13:13:33 +0000 (14:13 +0100)]
i915: remove unused driFd variable

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agoi965: bump libdrm requirement to 2.4.61 and drop in-tree workaround
Emil Velikov [Mon, 6 Jul 2015 08:42:01 +0000 (09:42 +0100)]
i965: bump libdrm requirement to 2.4.61 and drop in-tree workaround

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
9 years agobugzilla_mesa.sh: sort the bugs list by number
Emil Velikov [Mon, 13 Jul 2015 19:01:39 +0000 (20:01 +0100)]
bugzilla_mesa.sh: sort the bugs list by number

v2: Use change sed/sort based on Ilia's suggestion.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agoradeonsi: directly include radeon/* headers
Emil Velikov [Tue, 30 Jun 2015 13:37:19 +0000 (14:37 +0100)]
radeonsi: directly include radeon/* headers

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agoauxiliary/vl: use loader_open_device() over open()
Emil Velikov [Mon, 29 Jun 2015 13:03:22 +0000 (14:03 +0100)]
auxiliary/vl: use loader_open_device() over open()

The former handles O_CLOEXEC (and the lack of it) appropriately.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agopipe-loader: use loader_open_device() rather than open()
Emil Velikov [Mon, 29 Jun 2015 13:01:39 +0000 (14:01 +0100)]
pipe-loader: use loader_open_device() rather than open()

The former handles O_CLOEXEC (and the lack of it) appropriately.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agopipe-loader: remove pipe_loader_sw_probe_xlib
Emil Velikov [Mon, 29 Jun 2015 12:28:33 +0000 (13:28 +0100)]
pipe-loader: remove pipe_loader_sw_probe_xlib

It was only useful for st/egl, although I've never got to merging the
pipe-loader and inline-helpers before it was removed. There are no users
for it ATM.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agoautomake: remove empty GALLIUM_PIPE_LOADER_LIBS
Emil Velikov [Mon, 29 Jun 2015 12:08:06 +0000 (13:08 +0100)]
automake: remove empty GALLIUM_PIPE_LOADER_LIBS

Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agoautomake: pipe-loader: remove the 'client' pipe-loader
Emil Velikov [Mon, 29 Jun 2015 12:02:21 +0000 (13:02 +0100)]
automake: pipe-loader: remove the 'client' pipe-loader

Was only around as opencl's pipe-loader wanted to link against xcb in
some cases.

Cc: Rob Clark <robclark@freedesktop.org>
Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agopipe-loader: remove pipe_loader_drm_probe_fd() x_auth argument
Emil Velikov [Mon, 29 Jun 2015 11:44:44 +0000 (12:44 +0100)]
pipe-loader: remove pipe_loader_drm_probe_fd() x_auth argument

No longer used by anyone, as of last commit.

Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agopipe-loader: simplify pipe_loader_drm_probe
Emil Velikov [Tue, 30 Jun 2015 14:53:27 +0000 (15:53 +0100)]
pipe-loader: simplify pipe_loader_drm_probe

Do not iterate and (attempt to) open the render device, if we're over
the requested number of devices.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agopipe-loader: drop support for non-render node devices
Emil Velikov [Mon, 29 Jun 2015 11:36:45 +0000 (12:36 +0100)]
pipe-loader: drop support for non-render node devices

Render nodes have been around for quite some time. Removing support via
the master/primary node allows us to clean up the conditional
compilation and simplify the build greatly.

For example currently we the pipe-loader, which explicitly links against
xcb and friends (for X auth) if found at compile-time. That
would cause problems as one will be forced to use X/xcb, even if it's a
headless system that is used for opencl.

v2: Clarify the linking topic in the commit message.

Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agoradeonsi: direct emit intrinsic for DFRAC.
Dave Airlie [Mon, 13 Jul 2015 08:11:20 +0000 (09:11 +0100)]
radeonsi: direct emit intrinsic for DFRAC.

Michel reported this still failed, and this fixed it

Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agoradeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.
Dave Airlie [Wed, 1 Jul 2015 03:58:24 +0000 (04:58 +0100)]
radeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.

This adds the translation from TGSI to AMDGPU llvm backend, for the
64-bit opcodes. The backend pretty much handles everything for us
fine. There is one patch required for SI DFRAC support, that I know
off.

[airlied: fixed missing comma, updated relnotes]

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agoloader: don't leak udev_enumerate
Guillaume Desmottes [Fri, 17 Apr 2015 13:13:36 +0000 (15:13 +0200)]
loader: don't leak udev_enumerate

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agodri3_open: don't leak the reply
Guillaume Desmottes [Fri, 17 Apr 2015 13:13:35 +0000 (15:13 +0200)]
dri3_open: don't leak the reply

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agodoxygen: Remove doxygen_sqlite3.db with 'make clean'
Rhys Kidd [Sat, 27 Jun 2015 03:14:38 +0000 (13:14 +1000)]
doxygen: Remove doxygen_sqlite3.db with 'make clean'

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agodoxygen: Add doxygen_sqlite3.db to .gitignore
Rhys Kidd [Sat, 27 Jun 2015 03:14:37 +0000 (13:14 +1000)]
doxygen: Add doxygen_sqlite3.db to .gitignore

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agodocs: add news item and link release notes for mesa 10.6.2
Emil Velikov [Sat, 11 Jul 2015 19:36:44 +0000 (20:36 +0100)]
docs: add news item and link release notes for mesa 10.6.2

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agodocs: Add sha256 checksums for the 10.6.2 release
Emil Velikov [Sat, 11 Jul 2015 19:33:16 +0000 (20:33 +0100)]
docs: Add sha256 checksums for the 10.6.2 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 89cbd91b17989ec7eb1cb93ac427a84dca56cd79)

9 years agoAdd release notes for the 10.6.2 release
Emil Velikov [Sat, 11 Jul 2015 18:46:49 +0000 (19:46 +0100)]
Add release notes for the 10.6.2 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9643cce94c8a1938e3342fb83d025a1e5c2aa79b)

9 years agotgsi: add DFMA to the opcode infer functions.
Dave Airlie [Wed, 1 Jul 2015 05:31:13 +0000 (06:31 +0100)]
tgsi: add DFMA to the opcode infer functions.

Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agor600g: move sampler/ubo index registers before temp reg
Dave Airlie [Thu, 9 Jul 2015 05:49:56 +0000 (15:49 +1000)]
r600g: move sampler/ubo index registers before temp reg

temp_reg needs to be last, as we increment things
away from it, otherwise on cayman some tests were overwriting
the index regs.

Fixes 2 piglit with ARB_gpu_shader5 forced on cayman.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agor600g: fix sampler/ubo indexing on cayman
Dave Airlie [Thu, 9 Jul 2015 05:22:09 +0000 (15:22 +1000)]
r600g: fix sampler/ubo indexing on cayman

Cayman needs a different method to upload the CF IDX0/1

This fixes 31 piglits when ARB_gpu_shader5 is forced on
with cayman.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agonv50, nvc0: enable at least one color RT if alphatest is enabled
Ilia Mirkin [Fri, 10 Jul 2015 20:42:18 +0000 (16:42 -0400)]
nv50, nvc0: enable at least one color RT if alphatest is enabled

Fixes the following piglits:
  fbo-alphatest-nocolor
  fbo-alphatest-nocolor-ff

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
9 years agoi965: Remove special case for layered drawbuffer attachments.
Kenneth Graunke [Thu, 25 Jun 2015 17:08:06 +0000 (10:08 -0700)]
i965: Remove special case for layered drawbuffer attachments.

When binding a layered texture, the layer is already 0.  There's no need
to special case this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>