aarch64: Fix pr71727.c failure

This test started failing after the switch to -fno-common because we can
now force the array to be aligned to 16 bytes, which in turn lets us use
SIMD accesses.  Locally restoring -fcommon seems the most faithful to
the original PR.

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
PR testsuite/71727
* gcc.target/aarch64/pr71727.c: Add -fcommon.

Add __gcov_indirect_call_profiler_v4_atomic.

PR gcov-profile/93403
* tree-profile.c (gimple_init_gcov_profiler): Generate
both __gcov_indirect_call_profiler_v4 and
__gcov_indirect_call_profiler_v4_atomic.
PR gcov-profile/93403
* libgcov-profiler.c (__gcov_indirect_call_profiler_v4):
Call __gcov_indirect_call_profiler_body.
(__gcov_indirect_call_profiler_body): New.
(__gcov_indirect_call_profiler_v4_atomic): New.
* libgcov.h (__gcov_indirect_call_profiler_v4_atomic):
New declaration.

analyzer: fixes to tree_cmp and other comparators

region_model.cc's tree_cmp attempted to verify that the ordering
is symmetric by asserting that
  tree_cmp (x, y) == -tree_cmp (y, x)

This condition is too strong: it's only required for a comparator that
  sign (tree_cmp (x, y)) == -sign (tree_cmp (y, x))
and the incorrect form of the assertion doesn't hold e.g. on s390x where
for certain inputs x, y, tree_cmp (x, y) == 1 and tree_cmp (y, x) == -2,
breaking the build in "make selftest" in stage1.

In any case, these checks are redundant, since qsort_chk performs them.

Additionally, there is a potential lack of transitivity in
worklist::key_t::cmp where hashval_t values are compared by subtraction,
which could fail to be transitive if overflows occur.

This patch eliminates the redundant checks and reimplements the hashval_t
comparisons in terms of < and >, fixing these issues.

gcc/analyzer/ChangeLog:
* call-string.cc (call_string::cmp_1): Delete, moving body to...
(call_string::cmp): ...here.
* call-string.h (call_string::cmp_1): Delete decl.
* engine.cc (worklist::key_t::cmp_1): Delete, moving body to...
(worklist::key_t::cmp): ...here.  Implement hash comparisons
via comparison rather than subtraction to avoid overflow issues.
* exploded-graph.h (worklist::key_t::cmp_1): Delete decl.
* region-model.cc (tree_cmp): Eliminate buggy checking for
symmetry.

aarch64: Add vector/vector vec_extract patterns [PR92822]

Part of the problem in this PR is that we don't provide patterns
to extract a 64-bit vector from one half of a 128-bit vector.
Adding them fixes:

FAIL: gcc.target/aarch64/fmul_intrinsic_1.c scan-assembler-times fmul\\td[0-9]+, d[0-9]+, d[0-9]+ 1
FAIL: gcc.target/aarch64/fmul_intrinsic_1.c scan-assembler-times fmul\\tv[0-9]+.2d, v[0-9]+.2d, v[0-9]+.d\\[[0-9]+\\] 3

The 2s failures need target-independent changes, after which they rely
on these patterns too.

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR target/92822
* config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
expander.
(@aarch64_split_simd_mov<mode>): Use it.
(aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
Leave the vec_extract patterns to handle 2-element vectors.
(aarch64_simd_mov_from_<mode>high): Likewise.
(vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
(vec_extractv2dfv1df): Likewise.

aarch64: Fix failure in cmpimm_branch_1.c

gcc.target/aarch64/cmpimm_branch_1.c started failing after Bernd's
fix to make combine take the costs of jumps into account
(g:391500af1932e696a007).  This is because the rtx costs
of *compare_condjump<GPI:mode> were higher than the costs
of the instructions it combines.

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
jump conditions for *compare_condjump<GPI:mode>.

analyzer: fix setjmp-detection and support sigsetjmp

This patch removes the hack in is_setjmp_call_p of looking for
"setjmp" and "_setjmp", replacing it with some logic adapted from
special_function_p in calls.c, ignoring up to 2 leading underscores from
the fndecl's name when checking for a function by name.

It also requires that such functions are "extern" and at file scope
for them to be matched.

The patch also generalizes the setjmp/longjmp handling in the analyzer
to also work with sigsetjmp/siglongjmp.  Doing so requires generalizing
some hardcoded functions in diagnostics (which were hardcoded to avoid
user-facing messages referring to "_setjmp", which is an implementation
detail) - the patch adds a new function, get_user_facing_name for this,
for use on calls that matched is_named_call_p and
is_specical_named_call_p.

gcc/analyzer/ChangeLog:
* analyzer.cc  (is_named_call_p): Check that fndecl is "extern"
and at file scope.  Potentially disregard prefix _ or __ in
fndecl's name.  Bail if the identifier is NULL.
(is_setjmp_call_p): Expect a gcall rather than plain gimple.
Remove special-case check for leading prefix, and also check for
sigsetjmp.
(is_longjmp_call_p): Also check for siglongjmp.
(get_user_facing_name): New function.
* analyzer.h (is_setjmp_call_p): Expect a gcall rather than plain
gimple.
(get_user_facing_name): New decl.
* checker-path.cc (setjmp_event::get_desc): Use
get_user_facing_name to avoid hardcoding the function name.
(rewind_event::rewind_event): Add rewind_info param, using it to
initialize new m_rewind_info field, and strengthen the assertion.
(rewind_from_longjmp_event::get_desc): Use get_user_facing_name to
avoid hardcoding the function name.
(rewind_to_setjmp_event::get_desc): Likewise.
* checker-path.h (setjmp_event::setjmp_event): Add setjmp_call
param and use it to initialize...
(setjmp_event::m_setjmp_call): New field.
(rewind_event::rewind_event): Add rewind_info param.
(rewind_event::m_rewind_info): New protected field.
(rewind_from_longjmp_event::rewind_from_longjmp_event): Add
rewind_info param.
(class rewind_to_setjmp_event): Move rewind_info field to parent
class.
* diagnostic-manager.cc (diagnostic_manager::add_events_for_eedge):
Update setjmp-handling for is_setjmp_call_p requiring a gcall;
pass the call to the new setjmp_event.
* engine.cc (exploded_node::on_stmt): Update for is_setjmp_call_p
requiring a gcall.
(stale_jmp_buf::emit): Use get_user_facing_name to avoid
hardcoding the function names.
(exploded_node::on_longjmp): Pass the longjmp_call when
constructing rewind_info.
(rewind_info_t::add_events_to_path): Pass the rewind_info_t to the
rewind_from_longjmp_event's ctor.
* exploded-graph.h (rewind_info_t::rewind_info_t): Add
longjmp_call param.
(rewind_info_t::get_longjmp_call): New.
(rewind_info_t::m_longjmp_call): New.
* region-model.cc (region_model::on_setjmp): Update comment to
indicate this is also for sigsetjmp.
* region-model.h (struct setjmp_record): Likewise.
(class setjmp_svalue): Likewise.

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/sigsetjmp-5.c: New test.
* gcc.dg/analyzer/sigsetjmp-6.c: New test.

testsuite/91171 no longer needed XFAIL

2020-01-27  Richard Biener  <rguenther@suse.de>

PR testsuite/91171
* gcc.dg/graphite/scop-21.c: un-XFAIL.

analyzer: fix build with gcc 4.4 (PR 93276)

This patch fixes various build failures seen with gcc 4.4

gcc prior to 4.6 complains about:

  error: #pragma GCC diagnostic not allowed inside functions

for various uses of PUSH_IGNORE_WFORMAT and POP_IGNORE_WFORMAT.
This patch makes them a no-op with such compilers.

The patch also fixes various errors with template base initializers
and redundant uses of "typename" that older g++ implementations
can't cope with.

gcc/analyzer/ChangeLog:
PR analyzer/93276
* analyzer.h (PUSH_IGNORE_WFORMAT, POP_IGNORE_WFORMAT): Guard these
macros with GCC_VERSION >= 4006, making them no-op otherwise.
* engine.cc (exploded_edge::exploded_edge): Specify template for
base class initializer.
(exploded_graph::add_edge): Specify template when chaining up to
base class add_edge implementation.
(viz_callgraph_node::dump_dot): Drop redundant "typename".
(viz_callgraph_edge::viz_callgraph_edge): Specify template for
base class initializer.
* program-state.cc (sm_state_map::clone_with_remapping): Drop
redundant "typename".
(sm_state_map::print): Likewise.
(sm_state_map::hash): Likewise.
(sm_state_map::operator==): Likewise.
(sm_state_map::remap_svalue_ids): Likewise.
(sm_state_map::on_svalue_purge): Likewise.
(sm_state_map::validate): Likewise.
* program-state.h (sm_state_map::iterator_t): Likewise.
* supergraph.h (superedge::superedge): Specify template for base
class initializer.

gcc/ChangeLog:
PR analyzer/93276
* digraph.cc (test_edge::test_edge): Specify template for base
class initializer.

c++: Bogus error using namespace alias [PR91826]

My changes to is_nested_namespace broke is_ancestor's use where a namespace
alias might be passed in.  This changes is_ancestor to look through the alias.

PR c++/91826
* name-lookup.c (is_ancestor): Allow CHILD to be a namespace alias.

[ARC] Update ARC600 multiplication cost.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_rtx_costs): Update mul64 cost.

[ARC] Save mlo/mhi registers when ISR.

ARC600 when configured with mul64 instructions uses mlo and mhi
registers to store the 64 result of the multiplication. In the ARC600
ISA documentation we have the next register configuration when ARC600
is configured only with mul64 extension:

Register | Name | Use
---------+------+------------------------------------
r57      | mlo  | Multiply low 32 bits, read only
r58      | mmid | Multiply middle 32 bits, read only
r59      | mhi  | Multiply high 32 bits, read only
-----------------------------------------------------

When used for Co-existence configurations we have for mul64 the next
registers used:

Register | Name | Use
---------+------+------------------------------------
r58      | mlo  | Multiply low 32 bits, read only
r59      | mhi  | Multiply high 32 bits, read only
-----------------------------------------------------

Note that mlo/mhi assignment doesn't swap when bigendian CPU
configuration is used.

The compiler will always use r58 for mlo, regardless of the
configuration choosen to ensure mlo/mhi correct splitting. Fixing mlo
to the right register number is done at assembly time. The dwarf info
is also notified via DBX_... macro. Both mlo/mhi registers needs to
saved when ISR happens using a custom sequence.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc-protos.h (gen_mlo): Remove.
(gen_mhi): Likewise.
* config/arc/arc.c (AUX_MULHI): Define.
(arc_must_save_reister): Special handling for r58/59.
(arc_compute_frame_size): Consider mlo/mhi registers.
(arc_save_callee_saves): Emit fp/sp move only when emit_move
paramter is true.
(arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
mlo/mhi name selection.
(arc_restore_callee_saves): Don't early restore blink when ISR.
(arc_expand_prologue): Add mlo/mhi saving.
(arc_expand_epilogue): Add mlo/mhi restoring.
(gen_mlo): Remove.
(gen_mhi): Remove.
* config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
numbering when MUL64 option is used.
(DWARF2_FRAME_REG_OUT): Define.
* config/arc/arc.md (arc600_stall): New pattern.
(VUNSPEC_ARC_ARC600_STALL): Define.
(mulsi64): Use correct mlo/mhi registers.
(mulsi_600): Clean it up.
* config/arc/predicates.md (mlo_operand): Remove any dependency on
TARGET_BIG_ENDIAN.
(mhi_operand): Likewise.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/interrupt-6.c: Update test.

[ARC] Propagate uncached type attribute to each member of a struct.

Like `packed` type attribute, the ARC's `uncached` type attribute
needs to be propagated to each member of the struct where it is used,
triggering the .di flag for any access of the struct members. However,
any complex CFG manipulation may drop memory pointer type attributes,
leading to the impossibility to discriminate the direct accesses from
normal ones. To solve this issue, we will treat the direct memory
accessed specially via unspecs.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
Petro Karashchenko  <petro.karashchenko@ring.com>

* config/arc/arc.c (arc_is_uncached_mem_p): Check struct
attributes if needed.
(prepare_move_operands): Generate special
unspec instruction for direct access.
(arc_isuncached_mem_p): Propagate uncached attribute to each
structure member.
* config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
(VUNSPEC_ARC_STDI): Likewise.
(ALLI): New mode iterator.
(mALLI): New mode attribute.
(lddi): New instruction pattern.
(stdi): Likewise.
(stdidi_split): Split instruction for architectures which are not
supporting ll64 option.
(lddidi_split): Likewise.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
Petro Karashchenko  <petro.karashchenko@ring.com>

* gcc.target/arc/uncached-1.c: Update test.
* gcc.target/arc/uncached-2.c: Likewise.
* gcc.target/arc/uncached-3.c: New test.
* gcc.target/arc/uncached-4.c: Likewise.
* gcc.target/arc/uncached-5.c: Likewise.
* gcc.target/arc/uncached-6.c: Likewise.
* gcc.target/arc/uncached-7.c: Likewise.
* gcc.target/arc/uncached-8.c: Likewise.
* gcc.target/arc/arc.exp (ll64): New predicate.

[ARC] Make libgcc compatible with ARC's reduced register set config.

ARC processors can work with a reduced register set (i.e. registers
r4-r9 and r16-r25 are not available). This option can be enabled
passing -mrf16 option to the compiler, or by using -mcpu=em_mini CPU
configuration. Using RF16 config requires all the hand-made assembly
files used in libgcc to have the corresponding RF16 object attribute
set.

This patch qualifies the relevant hand-made assembly files to
RF16 config, and also adds generic c-functions for the one which are
not.

libgcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/crti.S: Add RF16 object attribute.
* config/arc/crtn.S: Likewise.
* config/arc/crttls.S: Likewise.
* config/arc/lib1funcs.S: Likewise.
* config/arc/fp-hack.h (ARC_OPTFPE): Define.
* config/arc/lib2funcs.c: New file.
* config/arc/t-arc: Add lib2funcs to LIB2ADD.

libstdc++: Fix deduction guide for std::span (PR93426)

The deduction guide from an iterator and sentinel used the wrong alias
template and so didn't work.

PR libstdc++/93426
* include/std/span (span): Fix deduction guide.
* testsuite/23_containers/span/deduction.cc: New test.

lra: Stop registers being incorrectly marked live [PR92989]

lra_assign has an assert to make sure that no pseudo is allocated
to a conflicting hard register.  It used to be restricted to
!flag_ipa_ra, but in g:a1e6ee38e708ef2bdef4 I'd enabled it for
flag_ipa_ra too.  It then tripped while building libstdc++
for mips-mti-linux.

The failure was due to code at the end of process_bb_lives.  For an
abnormal/EH edge, we need to make sure that all pseudos that are live
on entry to the destination conflict with all hard registers that are
clobbered by an abnormal call return.  The usual way to do this would
be to simulate a clobber of the hard registers, by making them live and
them making them dead again.  Making the registers live creates the
conflict; making them dead again restores the correct live set for
whatever follows.

However, process_bb_lives skips the second step (making the registers
dead again) at the start of a BB, presumably on the basis that there's
no further code that needs a correct live set.  The problem for the PR
is that that wasn't quite true in practice.  There was code further
down process_bb_lives that updated the live-in set of the BB for some
registers, and this live set was "contaminated" by registers that
weren't live but that created conflicts.  This information then got
propagated to other blocks, so that registers that were made live
purely to create a conflict at the start of the EH receiver then became
needlessly live throughout preceding blocks.  This in turn created a
fake conflict with pseudos in those blocks, invalidating the choices
made by IRA.

The easiest fix seems to be to update the live-in set *before* adding
the fake live registers.  An alternative would be to simulate the full
clobber, but that seems a bit wasteful.

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR rtl-optimization/92989
* lra-lives.c (process_bb_lives): Update the live-in set before
processing additional clobbers.

cselib: Fix handling of multireg values for call insns [PR93170]

g:3bd2918594dae34ae84f mishandled the case in which only the
tail end of a multireg hard register is invalidated by the call.
Walking all the entries should be both safer and more precise.

Avoiding cselib_invalidate_regno also means that we no longer
walk the same list multiple times (which is something we did
before g:3bd2918594dae34ae84f too).

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR rtl-optimization/93170
* cselib.c (cselib_invalidate_regno_val): New function, split out
from...
(cselib_invalidate_regno): ...here.
(cselib_invalidated_by_call_p): New function.
(cselib_process_insn): Iterate over all the hard-register entries in
REG_VALUES and invalidate any that cross call-clobbered registers.

gcc/testsuite/
* gcc.dg/torture/pr93170.c: New test.

dojump: Fix gcc.dg/torture/pr91323.c for aarch64 targets

PR91323 was fixed for x86 and sparc in target code, but aarch64
instead relies on the target-independent comparison splitters.
Since LTGT is an unordered-signalling operation, we should split
it into unordered-signalling operations for any input that could
be NaN, not just inputs that could be signalling NaNs.

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* dojump.c (split_comparison): Use HONOR_NANS rather than
HONOR_SNANS when splitting LTGT.

Filter out language specific options from --help=common.

PR driver/91220
* opts.c (print_filtered_help): Exclude language-specific
options from --help=common unless enabled in all FEs.

Do not print params in --help except --help=param.

* opts.c (print_help): Exclude params from
all except --help=param.

Do not generate a unique fnname for resolver.

PR target/93274
* config/i386/i386-features.c (make_resolver_func):
Align the code with ppc64 target implementation.
Do not generate a unique name for resolver function.
PR target/93274
* gcc.target/i386/pr81213.c: Adjust to not expect
a globally unique name.

tree-optimization/93397 delay converted reduction chain adjustment

The following delays adjusting the SLP graph for converted reduction
chains to a point where the SLP build no longer can fail since we
otherwise fail to undo marking the conversion as a group.

2020-01-27  Richard Biener  <rguenther@suse.de>

PR tree-optimization/93397
* tree-vect-slp.c (vect_analyze_slp_instance): Delay
converted reduction chain SLP graph adjustment.

* gcc.dg/torture/pr93397.c: New testcase.

fortran] Fix PR 85781, ICE on valid

        PR fortran/85781
        * trans-expr.c (gfc_conv_substring): Handle non-ARRAY_TYPE strings
        of Bind(C) procedures.

        PR fortran/85781
        * gfortran.dg/bind_c_char_2.f90: New.
        * gfortran.dg/bind_c_char_3.f90: New.
        * gfortran.dg/bind_c_char_4.f90: New.
        * gfortran.dg/bind_c_char_5.f90: New.

c++: Testsuite adjustments for PR 90992.

It occurred to me that the NotNoexcept class is irrelevant to the issue I
was fixing, so let's remove it.

c++: Fix -Wnoexcept handling of system headers (PR90992).

The immediate issue here was that the second warning didn't depend on the
first one, so if the first location was in a system header, we'd
mysteriously give the second by itself.

It's also the case that the thing we care about being in a system header is
the function that we want to suggest adding 'noexcept' to, not the
noexcept-expression; it's useful to suggest adding noexcept to a user
function to satisfy a noexcept-expression in a system header.

PR c++/90992
* except.c (maybe_noexcept_warning): Check DECL_IN_SYSTEM_HEADER and
temporarily enable -Wsystem-headers.  Change second warning to
conditional inform.

Daily bump.

Fix last CL.

sanopt: Avoid crash on anonymous parameter [PR93436]

Here we crash when using -fsanitize=address -fdump-tree-sanopt because
the dumping code uses IDENTIFIER_POINTER on a null DECL_NAME.  Instead,
we can print "<anonymous>" in such a case.  Or we could avoid printing
that diagnostic altogether.

2020-01-26  Marek Polacek  <polacek@redhat.com>

PR tree-optimization/93436
* sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
null DECL_NAME.

coroutines: Fix whitespace and comment markers.

This amends the cases where inline comments in function calls were
followed by a space.  It also fixes some uses of C++ style and wrongly
wrapped comment end markers.

gcc/cp/ChangeLog:

2020-01-26  Iain Sandoe  <iain@sandoe.co.uk>

* coroutines.cc: Amend whitespace after inline comments
throughout.  Ensure use of C-style comment markers.

testsuite: xfail gcc.target/i386/pr91298-?.c on Solaris/x86 with as

The new gcc.target/i386/pr91298-?.c testcases FAIL on Solaris/x86 with the
native assembler:

FAIL: gcc.target/i386/pr91298-1.c (test for excess errors)

Excess errors:
Assembler: pr91298-1.c
        "/var/tmp//ccE6r3xb.s", line 5 : Syntax error
        Near line: "    .globl  $quux"
        "/var/tmp//ccE6r3xb.s", line 6 : Syntax error
        Near line: "    .type   $quux, @function"
        "/var/tmp//ccE6r3xb.s", line 7 : Syntax error
        Near line: "$quux:"
        "/var/tmp//ccE6r3xb.s", line 15 : Syntax error
        Near line: "    .size   $quux, .-$quux"
        "/var/tmp//ccE6r3xb.s", line 24 : Syntax error
        Near line: "    movl    $($a), %eax"
        "/var/tmp//ccE6r3xb.s", line 38 : Syntax error
        Near line: "    leal    ($a)(,%eax,4), %eax"
        "/var/tmp//ccE6r3xb.s", line 51 : Syntax error
        Near line: "    movl    ($a), %eax"
        "/var/tmp//ccE6r3xb.s", line 63 : Syntax error
        Near line: "    movl    ($a)+16, %eax"
        "/var/tmp//ccE6r3xb.s", line 97 : Syntax error
        Near line: "    movl    $($quux), %eax"
        "/var/tmp//ccE6r3xb.s", line 101 : Syntax error
        Near line: "    .globl  $a"
        "/var/tmp//ccE6r3xb.s", line 104 : Syntax error
        Near line: "    .type   $a, @object"
        "/var/tmp//ccE6r3xb.s", line 105 : Syntax error
        Near line: "    .size   $a, 72"
        "/var/tmp//ccE6r3xb.s", line 106 : Syntax error
        Near line: "$a:"
        "/var/tmp//ccE6r3xb.s", line 228 : Syntax error
        Near line: "    .long   ($a)"

FAIL: gcc.target/i386/pr91298-2.c (test for excess errors)

It only allows letters, digits, '_' and '.' in identifiers:
https://docs.oracle.com/cd/E37838_01/html/E61064/eqbsx.html#XALRMeoqjw

For lack of an effective-target keyword matching -fdollars-in-identifiers,
this patch fixes this by xfailing them on *-*-solaris2.* && !gas.

Tested on i386-pc-solaris2.11 with as and gas and x86_64-pc-linux-gnu.

* gcc.target/i386/pr91298-1.c: xfail on Solaris/x86 with native
assembler.
* gcc.target/i386/pr91298-2.c: Likewise.

checking: avoid verify_type_variant crash on incomplete type.

Here, we end up calling gen_type_die_with_usage for a type that's in the
middle of finish_struct_1, after we set TYPE_NEEDS_CONSTRUCTING on it but
before we copy all the flags to the variants--and, significantly, before we
set its TYPE_SIZE.  It seems reasonable to only look at
TYPE_NEEDS_CONSTRUCTING on complete types, since we aren't going to try to
create an object of an incomplete type any other way.

PR c++/92601
* tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
of complete types.

Avoid creating string insns unless string support is enabled

* config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
(rx_setmem): Likewise.

i386: Fix up *{add,sub}v<dwi>4_doubleword patterns (PR target/93412)

In the *{add,sub}v<dwi>4_doubleword patterns, we don't really want to see a
VOIDmode last operand, because it then means invalid RTL
(sign_extend:{TI,POI} (const_int ...)) or so, and therefore something we
don't really handle in the splitter either.  We have
*{add,sub}v<dwi>4_doubleword_1 pattern for those and that is what combine
will match, the problem in this testcase is just that it was only RA that
propagated the constant into the instruction.

In the similar *{add,sub}v<mode>4 patterns, we make sure not to accept
VOIDmode operand and similarly to these have _1 suffixed variant that allows
constants.

2020-01-26  Jakub Jelinek  <jakub@redhat.com>

PR target/93412
* config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
Use nonimmediate_operand instead of x86_64_hilo_general_operand and
drop <di> from constraint of last operand.

* gcc.dg/pr93412.c: New test.

i386: Fix up *avx_vperm_broadcast_v4df [PR93430]

Apparently my recent patch which moved the *avx_vperm_broadcast* and
*vpermil* patterns before vpermpd broke the following testcase, the
define_insn_and_split matched always but the splitter condition only split
it if not -mavx2 for V4DFmode, basically relying on the vpermpd pattern to
come first.

The following patch fixes it by moving that part of SPLIT-CONDITION into
CONDITION, so that when it is not met, we just don't match the pattern
and thus match the later vpermpd pattern in that case.
Except, for { 0, 0, 0, 0 } permutation, there is actually no reason to do
that, vbroadcastsd from memory seems to be slightly cheaper than vpermpd $0.

2020-01-26  Jakub Jelinek  <jakub@redhat.com>

PR target/93430
* config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
TARGET_AVX2 and V4DFmode not in the split condition, but in the
pattern condition, though allow { 0, 0, 0, 0 } broadcast always.

* gcc.dg/pr93430.c: New test.
* gcc.target/i386/avx2-pr93430.c: New test.

c++: avoid ICE with __builtin_memset (PR90997).

warn_for_memset calls fold_for_warn, which calls fold_non_dependent_expr, so
also calling instantiate_non_dependent_expr here is undesirable.

PR c++/90997
* semantics.c (finish_call_expr): Don't call
instantiate_non_dependent_expr before warn_for_memset.

Daily bump.

testsuite: Fix up pr93166.C test, so that it doesn't FAIL with -std=c++98 and tests what it is supposed to test.

2020-01-26  Jakub Jelinek  <jakub@redhat.com>

PR ipa/93166
* g++.dg/pr93166.C: Move to ...
* g++.dg/pr93166_0.C: ... here.  Turn it into a proper lto test.

testsuite: Fix up pr92788.C FAIL on ia32.

2020-01-26  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/92788
* g++.dg/pr92788.C: Move to ...
* g++.target/i386/pr92788.C: ... here.  Remove target from dg-do line.
Change type of operator new's first parameter to __SIZE_TYPE__.

c++: Poor diagnostic for dynamic_cast in constexpr context [PR93414]

I neglected to add a proper diagnostic for the reference dynamic_cast
case when the operand of a dynamic_cast doesn't refer to a public base
of Derived, resulting in suboptimal error message

   error: call to non-'constexpr' function 'void* __cxa_bad_cast()'

2020-01-25  Marek Polacek  <polacek@redhat.com>

PR c++/93414 - poor diagnostic for dynamic_cast in constexpr context.
* constexpr.c (cxx_eval_dynamic_cast_fn): Add a reference
dynamic_cast diagnostic.

* g++.dg/cpp2a/constexpr-dynamic18.C: New test.

Fix missing SCNuMAX defines in inttypes.h on hpux11.[01]*

2020-01-25  John David Anglin  <danglin@gcc.gnu.org>

* inclhack.def (hpux_c99_inttypes4): New, add missing SCNuMAX defines.
* fixincl.x: Regenerate.
* tests/base/inttypes.h: Update for above fix.

Remove assertion in get_info_about_necessary_edges

2020-01-25  Feng Xue  <fxue@os.amperecomputing.com>

        PR ipa/93166
        * ipa-cp.c (get_info_about_necessary_edges): Remove value
        check assertion.

        PR ipa/93166
        * g++.dg/pr93166.C: New test.

Fix gcc.target/aarch64/vec_zeroextend.c for big-endian

vec_zeroextend.c fails on big-endian as it assumes
0 index is the lower part but it is not for
big-endian case.  This fixes the problem by
using the correct index for the lower part
for big-endian.

Committed as obvious after a test on aarch64_be-linux-gnu.

ChangeLog:
* gcc.target/aarch64/vec_zeroextend.c: Fix for big-endian.

c++: Fix ICE with constrained friend (PR93400).

Here, the problem was that tsubst_friend_function was modifying the
CONSTRAINT_INFO for the friend template to have the constraints for one
instantiation, which fell down when we went to adjust it for another
instantiation.  Fixed by deferring substitution of trailing requirements
until we try to check declaration matching.

PR c++/93400 - ICE with constrained friend.
* constraint.cc (maybe_substitute_reqs_for): New.
* decl.c (function_requirements_equivalent_p): Call it.
* pt.c (tsubst_friend_function): Only substitute
TEMPLATE_PARMS_CONSTRAINTS.
(tsubst_template_parms): Copy constraints.

c++: Fix ICE with lambda in member operator (PR93279)

Here the problem was that we were remembering the lookup in template scope,
and then trying to reuse that lookup in the instantiation without
substituting into it at all.  The simplest solution is to not try to
remember a lookup that finds a class-scope declaration, as in that case
doing the normal lookup again at instantiation time will always find the
right declarations.

PR c++/93279 - ICE with lambda in member operator.
* name-lookup.c (maybe_save_operator_binding): Don't remember
class-scope bindings.

Daily bump.

Fix ICE due to invalid jump threading request

PR tree-optimization/92788
* tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
not EDGE_ABNORMAL.

PR tree-optimization/92788
* g++.dg/pr92788.C: New test.

c++: Fix parameter map handling of member typedef.

any_template_parm_r was looking at the args of an alias template-id, but we
need to look at all args of a member alias/typedef, including implicit ones
from the enclosing class.

PR c++/93377 - ICE with member alias in constraint.
* pt.c (any_template_parm_r): Look at template arguments for all
aliases, not only alias templates.

i386: prefer vpermilpd over vpermpd [PR93395]

In Agner Fog's tables, vpermilp[sd] with immediates seem to be
much faster than vpermpd with immediate, for a good reason,
the former only permute something within the lanes and don't do anything
intra-lane, while vpermpd can.  So, functionality-wise, vpermilpd
is more efficient subset of vpermpd.  We use the same RTL for those
though (and also for certain broadcast).

Now, the problem was that the vpermpd pattern appeared first in sse.md,
followed by the broadcast patterns, followed by the vpermilp[sd].
Which means unless -mavx -mno-avx2, we'd emit vpermpd instead of the
more efficient alternatives.

The following patch reorders them, so that vpermpd comes last, if we
can match a broadcast, we do, if we can match a vpermilp[sd] that is not a
broadcast, we will, otherwise fall back (of course only if -mavx2) to
vpermpd.

2020-01-24  Jakub Jelinek  <jakub@redhat.com>

PR target/93395
* config/i386/sse.md (*avx_vperm_broadcast_v4sf,
*avx_vperm_broadcast_<mode>,
<sse2_avx_avx512f>_vpermil<mode><mask_name>,
*<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
Move before avx2_perm<mode>/avx512f_perm<mode>.

* gcc.target/i386/pr93395.c: New test.
* gcc.target/i386/avx512vl-vpermilpdi-1.c: Remove xfail.

simplify-rtx: Punt for modes with precision above MAX_BITSIZE_MODE_ANY_INT [PR93376]

The following patch makes sure we punt in the 3 spots if precision is above
MAX_BITSIZE_MODE_ANY_INT.

2020-01-24  Jakub Jelinek  <jakub@redhat.com>

PR target/93376
* simplify-rtx.c (simplify_const_unary_operation,
simplify_const_binary_operation): Punt for mode precision above
MAX_BITSIZE_MODE_ANY_INT.

Decrease cortexa57_extra_costs's alu.shift_reg

Like I mentioned in https://gcc.gnu.org/ml/gcc/2020-01/msg00157.html,
The shift by a register should be just COSTS_N_INSNS (1) rather than
COSTS_N_INSNS (2).  This allows lshift_cheap_p to return true now
and converting switches to be using shift and other like
structures.  I noticed this difference when I was working
through PR 93131 and understanding what reassoc could handle.

ChangeLog:
* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
alu.shift_reg to 0.

c++: Fix ICE in tsubst_copy with parenthesized expression [PR93299]

Since e4511ca2e9ecdb51d41b64452398f8e2df575668 force_paren_expr can create
a VIEW_CONVERT_EXPR so that we have something to set REF_PARENTHESIZED_P
on, while not making the expression dependent.  But tsubst_copy can't cope
with such a VIEW_CONVERT_EXPR, because it's not location_wrapper_p, or
a TEMPLATE_PARM_INDEX wrapped in a VIEW_CONVERT_EXPR.

I think we need to teach tsubst_copy how to handle it.  Setting
EXPR_LOCATION_WRAPPER_P in force_paren_expr would make the ICE go away
too, but tsubst_copy would lose the REF_PARENTHESIZED_P flag.

2020-01-24  Marek Polacek  <polacek@redhat.com>

PR c++/93299 - ICE in tsubst_copy with parenthesized expression.
* pt.c (tsubst_copy): Handle a REF_PARENTHESIZED_P VIEW_CONVERT_EXPR.

* g++.dg/cpp1y/paren5.C: New test.

Add -fdelete-null-pointer-checks to some C++ testcases.

These testcases were failing on nios2-elf, which defaults to
-fno-delete-null-pointer-checks.

2020-01-24  Sandra Loosemore  <sandra@codesourcery.com>

gcc/testsuite/
* g++.dg/cpp0x/constexpr-odr1.C: Add -fdelete-null-pointer-checks.
* g++.dg/cpp0x/constexpr-odr2.C: Likewise.
* g++.dg/cpp0x/nontype4.C: Likewise.
* g++.dg/cpp1y/constexpr-new.C: Likewise.
* g++.dg/cpp1y/new1.C: Likewise.
* g++.dg/cpp1y/new2.C: Likewise.
* g++.dg/cpp2a/constexpr-dynamic11.C: Likewise.
* g++.dg/cpp2a/constexpr-dynamic17.C: Likewise.
* g++.dg/cpp2a/constexpr-dynamic4.C: Likewise.
* g++.dg/cpp2a/constexpr-new1.C: Likewise.
* g++.dg/cpp2a/constexpr-new10.C: Likewise.
* g++.dg/cpp2a/constexpr-new2.C: Likewise.
* g++.dg/cpp2a/constexpr-new3.C: Likewise.
* g++.dg/cpp2a/constexpr-new4.C: Likewise.
* g++.dg/cpp2a/constexpr-new8.C: Likewise.
* g++.dg/cpp2a/constexpr-new9.C: Likewise.
* g++.dg/cpp2a/nontype-class1.C: Likewise.

c++: Unshare expressions from constexpr cache.

Another place we need to unshare cached expressions.

PR c++/92852 - ICE with generic lambda and reference var.
* constexpr.c (maybe_constant_value): Likewise.

Add missing ChangeLog entry.

libstdc++: Simplify construction of comparison category types

The _Eq and _Ord enumerations can be combined into one, reducing the
number of constructors needed for the comparison category types. The
redundant equal enumerator can be removed and equivalent used in its
place. The _Less and _Greater enumerators can be renamed because 'less'
and 'greater' are already reserved names anyway.

* libsupc++/compare (__cmp_cat::_Eq): Remove enumeration type.
(__cmp_cat::_Ord::equivalent): Add enumerator.
(__cmp_cat::_Ord::_Less, __cmp_cat::_Ord::_Greater): Rename to less
and greater.
(partial_ordering, weak_ordering, strong_ordering): Remove
constructors taking __cmp_cat::_Eq parameters. Use renamed
enumerators.

Emit reasonable diagnostic rather than ICE on invalid ASM on H8 port

PR target/13721
* config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
for REGs.  Call output_operand_lossage to get more reasonable
diagnostics.

PR target/13721
* gcc.target/h8300/pr13721.c: New test.

Add PR markers for yesterday's H8 changes

Fix ICE on unsupported FP comparison

2020-01-24  Andrew Stubbs  <ams@codesourcery.com>

gcc/
* config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
gcn_fp_compare_operator.
(vec_cmpu<mode>di): Use gcn_compare_operator.
(vec_cmp<u>v64qidi): Use gcn_compare_operator.
(vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
(vec_cmpu<mode>di_exec): Use gcn_compare_operator.
(vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
(vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
(vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
gcn_fp_compare_operator.
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
gcn_fp_compare_operator.
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
gcn_fp_compare_operator.
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
gcn_fp_compare_operator.

contrib: Change 'remote' for personal branches and add branch creation script

Whilst trying to convert the add vendor branch script to work with
personal branches I encountered a minor issue where git would report
ambiguous refs when checking out the new branch.

It turns out that this is because git considers <me>/<topic> to be
ambiguous if both

  refs/heads/<me>/<topic>

and

  refs/remotes/<me>/<topic>

exist in the list of known branches.

Having thought about this a bit, I think the best solution is to adopt
something more like the vendors space and call the remote users/<me>
(this also works better if you want to set up remotes to track other
users branches as well).

So this patch has two parts.

1) It updates gcc-git-customization.sh to set up the new 'remote' and
converts any existing remote and branches tracking that to the new
format
2) It adds a new script to set up a personal branch on the gcc git repository.

* gcc-git-customization.sh: Use users/<pfx> for the personal remote
rather than just <pfx>.  Convert any existing personal branches to the
new remote.
* git-add-user-branch.sh: New file.

libgo: handle --with-toolexeclibdir=.

Patch by Maciej W. Rozycki.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/216239

Remove bogus __has_include controlling macro

I noticed, but ignored this code when addressing p80005, but having
fixed up defined(X) on the modules branch, I could see where it came
from, and it's obviously wrong as we've just pulled out a string
contant from the token.

* expr.c (parse_has_include): Remove bogus controlling macro code.

Add `--with-toolexeclibdir=' configuration option

Provide means, in the form of a `--with-toolexeclibdir=' configuration
option, to override the default installation directory for target
libraries, otherwise known as $toolexeclibdir.  This is so that it is
possible to get newly-built libraries, particularly the shared ones,
installed in a common place, so that they can be readily used by the
target system as their host libraries, possibly over NFS, without a need
to manually copy them over from the currently hardcoded location they
would otherwise be installed in.

In the presence of the `--enable-version-specific-runtime-libs' option
and for configurations building native GCC the option is ignored.

config/
* toolexeclibdir.m4: New file.

gcc/
* doc/install.texi (Cross-Compiler-Specific Options): Document
`--with-toolexeclibdir' option.

libada/
* Makefile.in (configure_deps): Add `toolexeclibdir.m4'.
* configure.ac: Handle `--with-toolexeclibdir='.
* configure: Regenerate.

libatomic/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* testsuite/Makefile.in: Regenerate.

libffi/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* include/Makefile.in: Regenerate.
* man/Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.

libgcc/
* Makefile.in (configure_deps): Add `toolexeclibdir.m4'.
* configure.ac: Handle `--with-toolexeclibdir='.
* configure: Regenerate.

libgfortran/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libgomp/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* testsuite/Makefile.in: Regenerate.

libhsail-rt/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libitm/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* testsuite/Makefile.in: Regenerate.

libobjc/
* Makefile.in (aclocal_deps): Add `toolexeclibdir.m4'.
* aclocal.m4: Include `toolexeclibdir.m4'.
* configure.ac: Handle `--with-toolexeclibdir='.
* configure: Regenerate.

liboffloadmic/
* plugin/configure.ac: Handle `--with-toolexeclibdir='.
* plugin/Makefile.in: Regenerate.
* plugin/aclocal.m4: Regenerate.
* plugin/configure: Regenerate.
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libphobos/
* m4/druntime.m4: Handle `--with-toolexeclibdir='.
* m4/Makefile.in: Regenerate.
* libdruntime/Makefile.in: Regenerate.
* src/Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libquadmath/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libsanitizer/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* asan/Makefile.in: Regenerate.
* interception/Makefile.in: Regenerate.
* libbacktrace/Makefile.in: Regenerate.
* lsan/Makefile.in: Regenerate.
* sanitizer_common/Makefile.in: Regenerate.
* tsan/Makefile.in: Regenerate.
* ubsan/Makefile.in: Regenerate.

libssp/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libstdc++-v3/
* acinclude.m4: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* include/Makefile.in: Regenerate.
* libsupc++/Makefile.in: Regenerate.
* po/Makefile.in: Regenerate.
* python/Makefile.in: Regenerate.
* src/Makefile.in: Regenerate.
* src/c++11/Makefile.in: Regenerate.
* src/c++17/Makefile.in: Regenerate.
* src/c++98/Makefile.in: Regenerate.
* src/filesystem/Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.

libvtv/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* testsuite/Makefile.in: Regenerate.

zlib/
* configure.ac: Handle `--with-toolexeclibdir='.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.

libgcov: Fix merging of topn [PR92924]

PR tree-optimization/92924
* libgcov-merge.c (merge_topn_values_set): Fix merging.

debug/92763 Fix testcase to require fopenmp

The testcase fails to link on targets without -pthread which is
implied by -fopenmp. Use dg-require-effective-target fopenmp to avoid
this problem.

2020-01-24  Christophe Lyon  <christophe.lyon@linaro.org>

PR debug/92763
* g++.dg/debug/pr92763.C: Require fopenmp.

Add missing ChangeLog entry for my last commit

libgomp/ChangeLog: Add entry for commit 4bd03ed69bd.

Fix expectation and types in acc_get_property tests

* Weaken expectation concerning acc_property_free_memory.
  Do not expect the value returned by CUDA since that value might have
  changed in the meantime.
* Use correct type for the results of calls to acc_get_property in tests.

libgomp/
* testsuite/libgomp.oacc-c-c++-common/acc_get_property-aux.c
(expect_device_properties): Remove "expected_free_mem" argument,
change "expected_total_mem" argument type to size_t;
change types of acc_get_property results to size_t,
adapt format strings.
* testsuite/libgomp.oacc-c-c++-common/acc_get_property.c:
Use %zu instead of %zd to print size_t values.
* testsuite/libgomp.oacc-c-c++-common/acc_get_property-2.c: Adapt and
rename to ...
* testsuite/libgomp.oacc-c-c++-common/acc_get_property-nvptx.c: ... this.
* testsuite/libgomp.oacc-c-c++-common/acc_get_property-3.c: Adapt and
rename to ...
* testsuite/libgomp.oacc-c-c++-common/acc_get_property-host.c: ... this.

Reviewed-by: Thomas Schwinge <thomas@codesourcery.com>

doc: target.def (flags_regnum): Also mention effect on delay slot filling.

* target.def (flags_regnum): Also mention effect on delay slot filling.
* doc/tm.texi: Regenerate.

Previously only mentioned an effect on compare elimination.

analyzer: avoid relying on system <assert.h> in testsuite (PR 93367)

PR analyzer/93367 reports a testsuite failure in abort.c on
hppa64-hp-hpux11.11 when detecting if the analyzer "knows" that the
condition holds after the assert.

The root cause is that the assertion failure function in that
configuration's <assert.h> is not marked with
__attribute__ ((__noreturn__)).

This patch reworks the test to avoid <assert.h> in favor of a custom
implementation of assert, so that the test demonstrates the idea without
relying on properties of <assert.h>.

gcc/testsuite/ChangeLog:
PR analyzer/93367
* gcc.dg/analyzer/abort.c: Remove include of <assert.h>.
Replace use of assert with a custom assertion implementation.

Daily bump.

internal/cpu: don't define CacheLinePadSize for riscv64

In libgo CacheLinePadSize is defined by the generated file cpugen.go.

Keep cpu_riscv64.go around, even though it is now empty, so that
we will pick up changes to it in future merges.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/216077

Fix diagnostic text on H8.

* config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.

Fix profiling issue on H8 port

* config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
profiling label

testsuite: Require lp64 target rather x86_64-*-* in pr93027.c. [PR93027]

I've noticed this test failed on x86_64-linux with -m32 or -mx32 testing,
the triplet doesn't really say which actual multilib it is, and the test
really works with lp64.

2020-01-23  Jakub Jelinek  <jakub@redhat.com>

PR inline-asm/93027
* gcc.target/i386/pr93027.c: Require lp64 target rather x86_64-*-*.

[libiberty] output empty args as a pair of quotes

writeargv writes out empty arguments in a way that expandargv skips
them instead of preserving them.  Fixed by writing out a pair of
quotes for them.

for  libiberty/ChangeLog

* argv.c (writeargv): Output empty args as "".

reject macros in math decl check

The C++ headers #undef the functions we are testing for, just in case
they're implemented as macros, so do that in the cross math decl tests
as well.

for  libstdc++-v3/ChangeLog

* crossconfig.m4 (GLIBCXX_CHECK_MATH_DECL): Reject macros.
* configure: Rebuild.

tolerate padding in mbstate_t

Padding in mbstate_t objects may get the memcmp to fail.
Attempt to avoid the failure with zero initialization.

for  libstdc++-v3/ChangeLog

* testsuite/27_io/fpos/mbstate_t/1.cc: Zero-init mbstate_t.

postreload: Fix up postreload combine [PR93402]

The following testcase is miscompiled, because the postreload pass changes:
-(insn 14 13 23 2 (parallel [
-            (set (reg:DI 1 dx [94])
-                (plus:DI (reg:DI 1 dx [95])
-                    (reg:DI 5 di [92])))
-            (clobber (reg:CC 17 flags))
-        ]) "pr93402.c":8:30 186 {*adddi_1}
-     (expr_list:REG_EQUAL (plus:DI (reg:DI 5 di [92])
-            (const_int 111111111111 [0x19debd01c7]))
-        (nil)))
-(insn 23 14 25 2 (set (reg:SI 0 ax)
+(insn 23 13 25 2 (set (reg:SI 0 ax)
         (const_int 0 [0])) "pr93402.c":10:1 67 {*movsi_internal}
      (nil))
 (insn 25 23 26 2 (use (reg:SI 0 ax)) "pr93402.c":10:1 -1
      (nil))
-(insn 26 25 35 2 (use (reg:DI 1 dx)) "pr93402.c":10:1 -1
+(insn 26 25 35 2 (use (plus:DI (reg:DI 1 dx [95])
+            (reg:DI 5 di [92]))) "pr93402.c":10:1 -1
      (nil))
A USE insn is not a normal insn and verify_changes called from
apply_change_group is happy about any changes into it.
The following patch avoids this optimization if we were to change
the USE operand (this routine only changes a reg into (plus reg reg2)).

2020-01-23  Jakub Jelinek  <jakub@redhat.com>

PR rtl-optimization/93402
* postreload.c (reload_combine_recognize_pattern): Don't try to adjust
USE insns.

* gcc.c-torture/execute/pr93402.c: New test.

Fix "PR c++/92804 ICE trying to use concept as a nested-name-specifier"

A rather simple ICE where we failed to properly check for concept-ids
uses in nested-name-specifiers.

Tested x86_64-linux.

       /cp
       PR c++/92804
       * parser.c (cp_parser_nested_name_specifier_opt): Properly
       diagnose concept-ids.

       /testsuite
       PR c++/92804
       * g++.dg/concepts/pr92804-1.C: New.
       * g++.dg/concepts/pr92804-2.C: New.

c++: Avoid ICE when constant evaluation of __builtin_strchr fails.

If we can't change the argument to &"...", use the original arg instead of
the partially munged one.

PR c++/93331 - ICE with __builtin_strchr.
* constexpr.c (cxx_eval_builtin_function_call): Use the original
argument if we didn't manage to extract a STRING_CST.

c++: Fix ICE with defaulted destructor and template.

In a template we don't instantiate a deferred noexcept-spec, and we don't
need it because we aren't going to do anything with the value of
throwing_cleanup in a template anyway.

PR c++/93345 - ICE with defaulted dtor and template.
PR c++/33799
* decl.c (cxx_maybe_build_cleanup): Don't try to set
throwing_cleanup in a template.

analyzer: avoid ICE with missing arguments (PR 93375)

PR analyzer/93375 reports an ICE under certain circumstances
involving a call where the number of arguments at the callsite
is less than the parameter count of the callee,

Specifically, the ICE occurs when pruning a checker_path for a
diagnostic, when attempting to maintain which expression is of
interest through such a call.

The root cause is an assumption that there were enough arguments at
the callsite, within callgraph_superedge's methods for mapping
expressions between callee and caller.

This patch adds checks for this to the relevant methods, fixing the ICE.

gcc/analyzer/ChangeLog:
PR analyzer/93375
* supergraph.cc (callgraph_superedge::get_arg_for_parm): Fail
gracefully is the number of parameters at the callee exceeds the
number of arguments at the call stmt.
(callgraph_superedge::get_parm_for_arg): Likewise.

gcc/testsuite/ChangeLog:
PR analyzer/93375
* gcc.dg/analyzer/pr93375.c: New test.

c-family: One more 40752 tweak for unsigned char.

My last patch didn't fix all the failures on unsignd char targets.  We were
missing one warning because by suppressing -Wsign-conversion for the second
operand of + we missed an overflow that we want to warn about, and we
properly don't warn about unsigned / or %.

PR testsuite/93391 - PR 40752 test fails with unsigned plain char.
* c-warn.c (conversion_warning): Change -Wsign-conversion handling.
* lib/target-supports.exp (check_effective_target_unsigned_char):
New.

Emit .note.GNU-stack for hard-float linux targets.

libgcc/ChangeLog:

2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

* config/mips/gnustack.h: Check for TARGET_LIBC_GNUSTACK also.

gcc/ChangeLog:

2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

* config.in: Regenerated.
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
for TARGET_LIBC_GNUSTACK.
* configure: Regenerated.
* configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
found to be 2.31 or greater.

Emit .note.GNU-stack for soft-float linux targets.

gcc/ChangeLog:

2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
TARGET_SOFT_FLOAT.
* config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
(mips_asm_file_end): New function. Delegate to
file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
* config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.

libgcc/ChangeLog:

2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

* config/mips/gnustack.h: New file.
* config/mips/crti.S: Include gnustack.h.
* config/mips/crtn.S: Likewise.
* config/mips/mips16.S: Likewise.
* config/mips/vr4120-div.S: Likewise.

i386: Fix ICEs on TImode signed overflow add/sub patterns [PR93376]

The following testcase ICEs, because during try_combine of i3:
(insn 18 17 19 2 (parallel [
            (set (reg:CCO 17 flags)
                (eq:CCO (plus:OI (sign_extend:OI (reg:TI 96))
                        (const_int 1 [0x1]))
                    (sign_extend:OI (plus:TI (reg:TI 96)
                            (const_int 1 [0x1])))))
            (set (reg:TI 98)
                (plus:TI (reg:TI 96)
                    (const_int 1 [0x1])))
        ]) "pr93376.c":8:10 223 {*addvti4_doubleword_1}
     (expr_list:REG_UNUSED (reg:TI 98)
        (expr_list:REG_DEAD (reg:TI 96)
            (nil))))
and i2:
(insn 17 37 18 2 (set (reg:TI 96)
        (const_wide_int 0x7fffffffffffffffffffffffffffffff)) "pr93376.c":8:10 65 {*movti_internal}
     (nil))
the eq in there gets simplified into:
(eq:CCO (const_wide_int 0x080000000000000000000000000000000)
    (const_wide_int 0x80000000000000000000000000000000))
and simplify-rtx.c tries to simplify it by simplifying MINUS
of the two operands.
Now, i386 defines MAX_BITSIZE_MODE_ANY_INT to 128, because OImode
and XImode are used mainly as a placeholder for the vector modes;
these new signed overflow patterns are an exception to that,
but what they really need is just TImode precision + 1 (maybe 2 worst case)
bits at any time.

wide-int.h defines WIDE_INT_MAX_ELTS in a way that it contains one more
HWI above number of HWIs to cover WIDE_INT_MAX_ELTS, so on i386 that is
3 HWIs, meaning that TImode precision + 1/2 bits is still representable in
there.  Unfortunately, the way wi::sub_large is implemented, it needs
not just those 3 HWIs, but one HWI above the maximum of the lengths of
both operands, which means it buffer overflows, overwrites the following
precision in wide_int_storage and ICEs later on.  The need for 4 HWIs is
only temporary, because canonize immediately after it canonicalizes it
back to 3 HWIs only.

The patch is something suggested by Richard S., avoid using OImode
for this and instead use a partial int mode that is smaller.

2020-01-23  Jakub Jelinek  <jakub@redhat.com>

PR target/93376
* config/i386/i386-modes.def (POImode): New mode.
(MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
* config/i386/i386.md (DPWI): New mode attribute.
(addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
(QWI): Rename to...
(QPWI): ... this.  Use POI instead of OI for TImode.
(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
*subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
instead of <QWI>.

* gcc.dg/pr93376.c: New test.

libstdc++: Simplify makefile rule for largefile-config.h (PR91947)

The previous rule could leave an incomplete file if the build was
interrupted, which would then not be remade if make was run again.

This makes the rule more robust by writing to a temporary file and only
moving it into place as the final step. It also simplifies the rule so
that only the essential macro definitions are written to the file, not
the explanatory comments and commented out #undef lines.

Also, the macro for enabling LFS on Mac OS X 10.5 is now set
unconditionally, which is a bug fix from upstream autoconf.

PR libstdc++/91947
* include/Makefile.am (${host_builddir}/largefile-config.h): Simplify
rule.
* include/Makefile.in: Regenerate.

aarch64: Fix -mtrack-speculation for irreversible conditions [PR93341]

We can't yet represent the inverse of all conditions in rtl
(see g:865257c447cc50f5819e), triggering an ICE in the pass
that handles -mtrack-speculation.  Since we don't expect these
insns to be optimised in any way, the easiest fix seemed to be
to add an insn that reverses the condition internally.

2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR target/93341
* config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
unspec.
(speculation_tracker_rev): New pattern.
* config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
Use speculation_tracker_rev to track the inverse condition.

gcc/testsuite/
PR target/93341
* gcc.target/aarch64/pr93341.c: New test.

analyzer: introduce analyzer-torture.exp

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/data-model-3.c: Remove hardcoded "-O2" and move
to torture/conftest-1.c.
* gcc.dg/analyzer/torture/analyzer-torture.exp: New.
* gcc.dg/analyzer/torture/conftest-1.c: Move here from
analyzer/data-model-3.c.
* gcc.dg/analyzer/torture/poc.c: New test.

Remove wrong bail out in prune_topn_counter.

* libgcov-driver.c (prune_topn_counter): Remove
check for -1 as we only prune run-time counters
that do not generate an invalid state.

Fix libgomp plugin-gcn bug

2020-01-23  Andrew Stubbs  <ams@codesourcery.com>

libgomp/
* plugin/plugin-gcn.c (parse_target_attributes): Use correct mask for
the device id.

tree-optimization/93354 FRE redundant store removal validity fix

This fixes tracking of the alias-set of partial defs for use by
redundant store removal.

2020-01-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/93381
* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
alias-set of the def as argument and record the first one.
(vn_walk_cb_data::first_set): New member.
(vn_reference_lookup_3): Pass the alias-set of the current def
to push_partial_def.  Fix alias-set used in the aggregate copy
case.
(vn_reference_lookup): Consistently set *last_vuse_ptr.
* real.c (clear_significand_below): Fix out-of-bound access.

* gcc.dg/torture/pr93354.c: New testcase.

i386: Use bzhi for x & ((1 << y) - 1) or x & ((1U << y) - 1) [PR93346]

The bzhi patterns are quite complicated because they need to accurately
describe the behavior of the instruction for all input values.
The following patterns are simple and make bzhi recognizable even for
cases where not all input values are valid, because the user used
a shift, in which case the low 8 bit of the last operand need to be in
between 0 and precision-1.

2020-01-23  Jakub Jelinek  <jakub@redhat.com>

PR target/93346
* config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
New define_insn patterns.

* gcc.target/i386/pr93346.c: New test.

PR c/84919 - bogus -Wrestrict on sprintf %p with destination as argument

gcc/c-family/ChangeLog:

PR c/84919
* c-common.c (check_function_arguments): Avoid overlap checking
of sprintf functions.

gcc/testsuite/ChangeLog:

PR c/84919
* gcc.dg/Wrestrict-20.c: New test.

aarch64: Skip whilele_1.C test for ILP32

The definitions of the integer types for ILP32 newlib make the
resolution of some of the bool-related tests ambiguous.

2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* g++.target/aarch64/sve/acle/general-c++/whilele_1.C: Skip for ILP32.

aarch64: Skip some SVE ACLE function-body tests for ILP32

The load, store, prefetch and alias-check test functions require
extra zero extends for ILP32, so they don't match the expected function
bodies.  This patch therefore skips those parts of the tests for ILP32,
but keeps the compile/assemble parts.

2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/aarch64/sve/acle/asm/ld1_f16.c: Skip check-function-bodies
test for ILP32.
* gcc.target/aarch64/sve/acle/asm/ld1_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_gather_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_gather_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sb_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sh_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sw_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sw_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sw_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1sw_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ub_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uh_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uw_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uw_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uw_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1uw_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_gather_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_gather_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sb_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sh_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sw_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sw_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sw_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1sw_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1ub_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_gather_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_gather_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uh_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uw_gather_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uw_gather_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uw_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1uw_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sb_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sb_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sb_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sb_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sb_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sb_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sh_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sh_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sh_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sh_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sw_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1sw_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1ub_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1ub_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1ub_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1ub_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1ub_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1ub_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1uh_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1uh_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1uh_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1uh_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1uw_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1uw_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfb.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfb_gather.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfd.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfd_gather.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfh.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfh_gather.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfw.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfw_gather.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_scatter_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_scatter_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1b_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1h_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1w_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1w_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1w_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1w_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/general/temporaries_1.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_gather_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_gather_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_gather_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_gather_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sb_gather_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sb_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sb_gather_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sb_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sh_gather_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sh_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sh_gather_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sh_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sw_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1sw_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1ub_gather_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1ub_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1ub_gather_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1ub_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1uh_gather_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1uh_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1uh_gather_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1uh_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1uw_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1uw_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_scatter_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_scatter_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1b_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1b_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1b_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1b_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1h_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1h_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1h_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1h_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1w_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1w_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_u8.c: Likewise.

testsuite: Add target/xfail argument to check-function-bodies

check-function-bodies allows individual function tests to be
annotated with target/xfail selectors, but sometimes it's
useful to have the same selector for all functions.

2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* doc/sourcebuild.texi (check-function-bodies): Add an
optional target/xfail selector.

gcc/testsuite/
* lib/scanasm.exp (check-function-bodies): Add an optional
target/xfail selector.

auto-inc-dec: Don't add incs/decs to bare CLOBBERs [PR93124]

In this PR, auto-inc-dec was trying to turn:

    (set (reg X) (plus (reg X) (const_int N)))
    (clobber (mem (reg X)))

into:

    (clobber (mem (pre_modify (reg X) ...)))

But bare clobber insns are just there to describe dataflow.  They're
not supposed to generate any code.

2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR rtl-optimization/93124
* auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
bare USE and CLOBBER insns.

gcc/testsuite/
* gcc.dg/torture/pr93124.c: New test.

gotest: explicitly skip type descriptors

Type descriptors are normally weak and nm will report them as V,
so we will skip them when collecting the list of symbols.
But when not using GNU nm, they may be reported as D,
so also skip them in symstogo.

This fixes go/doc/check on Solaris.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/215900

analyzer: fix ICE due to sm-state origin being purged (PR 93382)

The ICE in PR analyzer/93382 is a validation error.

The global variable "idx" acquires a "tainted" state from local array
n1[0].  When the frame is popped, the svalue for n1[0] is purged, but
the "taint" sm_state_map's entry for "idx" has a svalue_id referencing
the now-purged svalue.  This is caught by program_state::validate as an
assertion failure.

This patch fixes the issue by resetting the origin id within
sm_state_map entries for the case where the origin id has been purged.

gcc/analyzer/ChangeLog:
PR analyzer/93382
* program-state.cc (sm_state_map::on_svalue_purge): If the
entry survives, but the origin is being purged, then reset the
origin to null.

gcc/testsuite/ChangeLog:
PR analyzer/93382
* gcc.dg/analyzer/pr93382.c: New test.

analyzer: fix build with --enable-checking=release

When adding namespaces to the analyzer in
r10-6151-g75038aa6aa5b562e6358108619d66ef2ccab9a53
I messed up the nesting of the #endif for #if CHECKING_P
and the closing of namespace ana.

This patch fixes it.

gcc/analyzer/ChangeLog:
* sm-signal.cc: Fix nesting of CHECKING_P and namespace ana.

Fix patchable-function-entry on arc

The problem here is arc looks at current_output_insn unconditional
but sometimes current_output_insn is NULL.  With patchable-function-entry,
it will be. This is similar to how the nios2, handles "%.".

Committed as obvious after a simple test with -fpatchable-function-entry=1.

ChangeLog:
* config/arc/arc.c (output_short_suffix): Check insn for nullness.