mesa.git
5 years agopanfrost/midgard: Don't try to "alias" texture registers
Alyssa Rosenzweig [Mon, 8 Jul 2019 18:51:14 +0000 (11:51 -0700)]
panfrost/midgard: Don't try to "alias" texture registers

It won't work. Just, stop it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agoradv: compute correct number of input vertices for NGG
Samuel Pitoiset [Tue, 9 Jul 2019 07:18:25 +0000 (09:18 +0200)]
radv: compute correct number of input vertices for NGG

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: remove extra code for exporting LayerID to the next stage
Samuel Pitoiset [Wed, 10 Jul 2019 11:03:50 +0000 (13:03 +0200)]
radv: remove extra code for exporting LayerID to the next stage

Now that the output usage mask is set to 0x1 the LayerID is
correctly exported in the loop above.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: set the LayerId output usage mask if FS needs it
Samuel Pitoiset [Wed, 10 Jul 2019 11:03:49 +0000 (13:03 +0200)]
radv: set the LayerId output usage mask if FS needs it

When the stage preceding FS doesn't export it the fragment shader
might read it, even if it's 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agopanfrost: Update supported formats
Alyssa Rosenzweig [Mon, 1 Jul 2019 18:53:38 +0000 (11:53 -0700)]
panfrost: Update supported formats

Much of the format selection code was inherited from softpipe (!) of all
places, and a lot of it is accordingly cruft. Later if-elses were added
in random places to workaround missing formats at various points in
history. Clean up some of this.

Theoretically, any format we can texture from we can also render to. In
practice, there are a few corner cases that we need to disable
explicitly.

For one, we do have to restrict SCANOUT formats to workaround
buggy apps (in particular, dEQP which with --deqp-surface-type=window
under Weston will end up with RGB10_A2 and complain about low alpha
precision). Just be clearer about how/why.

Also, RGB5_A1 support is still broken; let's not worry about that quite
yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/mfbd: Cleanup format code selection
Alyssa Rosenzweig [Fri, 5 Jul 2019 13:26:48 +0000 (06:26 -0700)]
panfrost/mfbd: Cleanup format code selection

Rather than have random variables flying around and a long if-else
chain, use a switch. They're literally *designed* for this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Cleanup blend switch
Alyssa Rosenzweig [Wed, 3 Jul 2019 22:31:24 +0000 (15:31 -0700)]
panfrost/midgard: Cleanup blend switch

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/mfbd: Handle PIPE_FORMAT_B10G10R10A2_UNORM
Alyssa Rosenzweig [Fri, 5 Jul 2019 22:59:22 +0000 (15:59 -0700)]
panfrost/mfbd: Handle PIPE_FORMAT_B10G10R10A2_UNORM

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Handle PIPE_FORMAT_B10G10R10A2_UNORM
Alyssa Rosenzweig [Fri, 5 Jul 2019 22:58:54 +0000 (15:58 -0700)]
panfrost/midgard: Handle PIPE_FORMAT_B10G10R10A2_UNORM

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Implement ES3-format writeout
Alyssa Rosenzweig [Wed, 3 Jul 2019 19:34:32 +0000 (12:34 -0700)]
panfrost: Implement ES3-format writeout

We add support for writing out (via a blend shader):

   - RGBA4
   - RGB10_A2_UNORM
   - RGB10_A2_UINT
   - RGB5_A1_UNORM
   - R11G11B10_FLOAT

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Refactor blend infrastructure
Alyssa Rosenzweig [Fri, 5 Jul 2019 22:40:08 +0000 (15:40 -0700)]
panfrost: Refactor blend infrastructure

We would like to permit keying blend shaders against the framebuffer
format, which requires some new blending abstractions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Use unsigned blend patch offset
Alyssa Rosenzweig [Fri, 5 Jul 2019 23:51:30 +0000 (16:51 -0700)]
panfrost/midgard: Use unsigned blend patch offset

We would like the offset field to be unsigned, letting 0 represent "no
offset" and positive represent an offset.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Handle pure int formats
Alyssa Rosenzweig [Tue, 2 Jul 2019 17:54:23 +0000 (10:54 -0700)]
panfrost/midgard: Handle pure int formats

I'm not sure I'm totally comfortable with this, but conceptually neither
float nor pure-int formats require any format conversion, except size
conversion. Going from a shaderable format (fp32 or i16, for instance)
into a blendable format (fp16) is a separate question, one we can defer
momentarily while we're not interested in actually blending.

As an aside, I'd be fascinated by an integer-based blending
implementation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/mfbd: Handle pure int formats
Alyssa Rosenzweig [Tue, 2 Jul 2019 17:50:00 +0000 (10:50 -0700)]
panfrost/mfbd: Handle pure int formats

We see that the render target itself turns out to be typeless
(surprise!)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Set rt_count_2 for bpp>4 formats
Alyssa Rosenzweig [Tue, 2 Jul 2019 16:54:23 +0000 (09:54 -0700)]
panfrost: Set rt_count_2 for bpp>4 formats

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Implement preliminary float converters
Alyssa Rosenzweig [Tue, 2 Jul 2019 16:23:31 +0000 (09:23 -0700)]
panfrost/midgard: Implement preliminary float converters

We'll need some careful handling, but for now, get some baseline code
out for handling float formats in a blend shader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Skip blend for REPLACE (shader)
Alyssa Rosenzweig [Tue, 2 Jul 2019 16:48:19 +0000 (09:48 -0700)]
panfrost/midgard: Skip blend for REPLACE (shader)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Handle "blend disabled" blend shaders
Alyssa Rosenzweig [Tue, 2 Jul 2019 16:08:18 +0000 (09:08 -0700)]
panfrost: Handle "blend disabled" blend shaders

Normally, disabled blend can definitely be fixed-function'd away, but
if a blend shader is used merely for format conversion rather than
blending, this code path can be nevertheless hit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Route format through fixed-function blending
Alyssa Rosenzweig [Tue, 2 Jul 2019 13:47:13 +0000 (06:47 -0700)]
panfrost: Route format through fixed-function blending

Not all framebuffer formats are supported by the fixed-function blender.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Pipe framebuffer format around
Alyssa Rosenzweig [Tue, 2 Jul 2019 13:34:52 +0000 (06:34 -0700)]
panfrost: Pipe framebuffer format around

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Use Gallium framebuffer formats
Alyssa Rosenzweig [Tue, 2 Jul 2019 13:28:47 +0000 (06:28 -0700)]
panfrost/midgard: Use Gallium framebuffer formats

Ideally, we would keep Galliumisms far away from the compiler;
unfortunately, Mesa hasn't standardized on system of format codes to be
shared across APIs and across drivers, so using Gallium formats is our
best bet in the short run.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Use fp16 exclusively while blending
Alyssa Rosenzweig [Tue, 2 Jul 2019 02:55:00 +0000 (19:55 -0700)]
panfrost/midgard: Use fp16 exclusively while blending

We now have some preliminary fp16 support available. We're not able to
expose this for GLSL quite yet, but for internal blend shaders, we're
able to do control bitness ourselves just fine. So let's fp16 that
stuff!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Remove opt_copy_prop_tex
Alyssa Rosenzweig [Tue, 2 Jul 2019 13:05:18 +0000 (06:05 -0700)]
panfrost/midgard: Remove opt_copy_prop_tex

Eventually this should be replaced by proper tex RA / not emitting so
many silly moves to begin with / better general copy prop. For now
remove it since it breaks things.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Fix scalarification
Alyssa Rosenzweig [Tue, 2 Jul 2019 03:23:50 +0000 (20:23 -0700)]
panfrost/midgard: Fix scalarification

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Handle fp16 in embedded_to_inline_constants
Alyssa Rosenzweig [Tue, 2 Jul 2019 03:02:57 +0000 (20:02 -0700)]
panfrost/midgard: Handle fp16 in embedded_to_inline_constants

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Eliminate redundant type convert
Alyssa Rosenzweig [Tue, 2 Jul 2019 02:57:49 +0000 (19:57 -0700)]
panfrost/midgard: Eliminate redundant type convert

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Fix fp16 embedded constants
Alyssa Rosenzweig [Tue, 2 Jul 2019 02:49:51 +0000 (19:49 -0700)]
panfrost/midgard: Fix fp16 embedded constants

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Hoist mask field
Alyssa Rosenzweig [Tue, 2 Jul 2019 01:51:48 +0000 (18:51 -0700)]
panfrost/midgard: Hoist mask field

Share a single mask field in midgard_instruction with a unified format,
rather than using separate masks for each instruction tag with
hardware-specific formats. Eliminates quite a bit of duplicated code and
will enable vec8/vec16 masks as well (which don't map as cleanly to the
hardware as we might like).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Allow fp16 in scalar ALU
Alyssa Rosenzweig [Tue, 2 Jul 2019 01:35:28 +0000 (18:35 -0700)]
panfrost/midgard: Allow fp16 in scalar ALU

The packing is a little different, so implement that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Implement f2u16 and friends
Alyssa Rosenzweig [Tue, 2 Jul 2019 00:41:20 +0000 (17:41 -0700)]
panfrost/midgard: Implement f2u16 and friends

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Implement f2f16/f2f32
Alyssa Rosenzweig [Tue, 2 Jul 2019 00:38:26 +0000 (17:38 -0700)]
panfrost/midgard: Implement f2f16/f2f32

These conversions handle half-floats within the shader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Verify src_bitsize == dst_bitsize
Alyssa Rosenzweig [Tue, 2 Jul 2019 00:35:25 +0000 (17:35 -0700)]
panfrost/midgard: Verify src_bitsize == dst_bitsize

We can handle differing, but we'd prefer not to because there are
restrictions on sizing which aren't accounted for yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Simplify blend read
Alyssa Rosenzweig [Tue, 2 Jul 2019 00:23:58 +0000 (17:23 -0700)]
panfrost/midgard: Simplify blend read

It's not clear where the extra indirection was from (older hardware or
just older blobs?)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: NIRify blend load scale/convert
Alyssa Rosenzweig [Mon, 1 Jul 2019 23:45:07 +0000 (16:45 -0700)]
panfrost/midgard: NIRify blend load scale/convert

The scale and type-convert can now be expressed in NIR, rather than MIR,
which is significantly more maintainable and demonstrates correctness of
the type conversion patches.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Fix blend constant scheduling bug
Alyssa Rosenzweig [Mon, 1 Jul 2019 23:44:49 +0000 (16:44 -0700)]
panfrost/midgard: Fix blend constant scheduling bug

Blend constant conflicts run in two directions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Implement upscaling type converts
Alyssa Rosenzweig [Mon, 1 Jul 2019 23:44:00 +0000 (16:44 -0700)]
panfrost/midgard: Implement upscaling type converts

Rather than using a dest_override, we upscale integers by using a half
field with a sign-extend bit. A variant of this trick should also work
for floats, but one step at a time!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Move blend load/store into NIR
Alyssa Rosenzweig [Mon, 1 Jul 2019 22:02:40 +0000 (15:02 -0700)]
panfrost/midgard: Move blend load/store into NIR

We have dedicated intrinsics to access the raw contents of the tile
buffer so we can use a dedicated NIR pass to lower appropriately for
blend shaders, rather than introducing a bizarre hardcoded blend
epilogue that only works for RGBA8_UNORM.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Use nir_dest_num_components
Alyssa Rosenzweig [Mon, 1 Jul 2019 22:28:37 +0000 (15:28 -0700)]
panfrost/midgard: Use nir_dest_num_components

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Implement integer downsize ops
Alyssa Rosenzweig [Mon, 1 Jul 2019 22:26:22 +0000 (15:26 -0700)]
panfrost/midgard: Implement integer downsize ops

Oh, dear. No turning back now.

We begin implementing non-32-bit types, using downsizing integer type
conversions as the initial instructions. We implement them naively as
type-converting moves; substantially more efficient operation is
possible by copypropping the type conversion modifier, but this
optimization is not implemented here.

Size converting modifiers on Midgard allow an instruction to write to a
destination 1/2 the size, or to read from a source 1/2 the size. If we
need an extreme conversion (32-bit to 8-bit, for instance), multiple
type converting ops are chained together, which here is handled via an
algebraic pass.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Move scale from MIR to NIR
Alyssa Rosenzweig [Mon, 1 Jul 2019 21:46:43 +0000 (14:46 -0700)]
panfrost/midgard: Move scale from MIR to NIR

This begins the process of removing blend shader specific MIR into a
more general NIR lowering pass for formats.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/midgard: Passthrough nir_lower_framebuffer
Alyssa Rosenzweig [Mon, 1 Jul 2019 20:26:07 +0000 (13:26 -0700)]
panfrost/midgard: Passthrough nir_lower_framebuffer

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Extend clear colour packing
Alyssa Rosenzweig [Mon, 1 Jul 2019 18:49:06 +0000 (11:49 -0700)]
panfrost: Extend clear colour packing

Eventually, this will allow packing clear colours for all formats,
including floating-point framebuffers, pure integer buffers, and special
formats. Currently, a few of these formats are supported, and many more
are handled through a generic Gallium colour packing path (which is not
a perfect fit for the hardware, but works for many formats and is a sane
default for the moment.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost/mfbd: Include codes for float framebuffers
Alyssa Rosenzweig [Mon, 1 Jul 2019 16:44:40 +0000 (09:44 -0700)]
panfrost/mfbd: Include codes for float framebuffers

We see the hardware doesn't actually support float framebuffers in the
native sense -- rather, it just allows higher bpp framebuffers and lets
a blend shader / additional clear_color fields sort out the formats.
This will be.. interesting.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Prepare some code for MRT
Alyssa Rosenzweig [Mon, 1 Jul 2019 16:09:03 +0000 (09:09 -0700)]
panfrost: Prepare some code for MRT

Full MRT support is a while away, but in the mean time, we can remove
code that explicitly assumes nr_cbufs <= 0, to minimize the obstacles
we'll face later when we add the whole thing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Use standard ALIGN_POT/INFINITY macros
Alyssa Rosenzweig [Fri, 5 Jul 2019 15:25:56 +0000 (08:25 -0700)]
panfrost: Use standard ALIGN_POT/INFINITY macros

We had vendored duplicates from pre-Mesa days; clean that up.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agoegl: add glvnd symbols check
Eric Engestrom [Thu, 11 Oct 2018 17:38:52 +0000 (18:38 +0100)]
egl: add glvnd symbols check

According to the spec [1], `__egl_Main` is the only symbol that needs to
be exported. We don't want applications directly linking against
libEGL_mesa.so (apps should always go through libEGL.so, regardless of
who is providing it), so we shouldn't export any other symbols either.

[1] https://github.com/NVIDIA/libglvnd/blob/master/include/glvnd/libeglabi.h
    (this header is the closest there is to a spec)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoegl: rewrite entrypoints check
Eric Engestrom [Thu, 22 Nov 2018 18:44:29 +0000 (18:44 +0000)]
egl: rewrite entrypoints check

Part of the effort to replace shell scripts with portable python scripts.
I could've used a trivial `assert lines == sorted(lines)`, but this way
the caller is shown which entrypoint is out of order.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agomapi: add shared glapi symbols check
Eric Engestrom [Thu, 22 Nov 2018 19:16:00 +0000 (19:16 +0000)]
mapi: add shared glapi symbols check

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agotu: add exported symbols check
Eric Engestrom [Fri, 29 Mar 2019 17:15:45 +0000 (17:15 +0000)]
tu: add exported symbols check

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agovulkan: add symbols file
Eric Engestrom [Thu, 11 Oct 2018 14:01:46 +0000 (15:01 +0100)]
vulkan: add symbols file

According to the Vulkan ICD spec [1], these two symbols must be exposed:
- vk_icdGetInstanceProcAddr
- vk_icdNegotiateLoaderICDInterfaceVersion

and this one is optional:
- vk_icdGetPhysicalDeviceProcAddr

[1] https://github.com/KhronosGroup/Vulkan-Loader/blob/master/loader/LoaderAndLayerInterface.md

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agomeson: remove unused env_test
Eric Engestrom [Thu, 11 Oct 2018 17:36:36 +0000 (18:36 +0100)]
meson: remove unused env_test

No longer used as of last commit :)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agogles: use new symbols check script
Eric Engestrom [Thu, 11 Oct 2018 13:46:34 +0000 (14:46 +0100)]
gles: use new symbols check script

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agogbm: sort symbols
Eric Engestrom [Tue, 11 Jun 2019 18:00:33 +0000 (19:00 +0100)]
gbm: sort symbols

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agogbm: use new symbols check script
Eric Engestrom [Thu, 11 Oct 2018 13:43:35 +0000 (14:43 +0100)]
gbm: use new symbols check script

Note: the list in gbm-symbols.txt is the same as the one that was in
gbm-symbols-check, I just took the opportunity to sort it.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoegl: use new symbols check script
Eric Engestrom [Thu, 11 Oct 2018 13:40:28 +0000 (14:40 +0100)]
egl: use new symbols check script

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agosymbols-check: introduce new python script
Eric Engestrom [Thu, 11 Oct 2018 12:08:42 +0000 (13:08 +0100)]
symbols-check: introduce new python script

I've re-written this in bash a couple times over the years, and then
I realised python is much more portable and already required by Mesa, so
we might as well make use of it.

I decided to still use the build system's NM instead of re-implementing
symbols extraction, to offload the complexity of keeping it compatible
with many systems (Linux, Unix, BSD, MacOS, etc.), especially when
cross-building.

This new script checks not only that nothing is exported when it
shouldn't be, but also that everything that should be exported is.
Sometimes, some symbols _can_ be exported but don't have to be, in which
case they can be prefixed with `(optional)`.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agonv50/ir/nir: implement load/store_global
Karol Herbst [Thu, 22 Feb 2018 10:58:44 +0000 (11:58 +0100)]
nv50/ir/nir: implement load/store_global

required by OpenCL

v2: fix setting globalAccess

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: handle kernel inputs
Karol Herbst [Thu, 31 Jan 2019 11:33:03 +0000 (12:33 +0100)]
nv50/ir/nir: handle kernel inputs

required by OpenCL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: don't assert on !main
Karol Herbst [Fri, 8 Mar 2019 13:12:00 +0000 (14:12 +0100)]
nv50/ir/nir: don't assert on !main

required for OpenCL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: parse system values first and stop for compute shaders
Karol Herbst [Thu, 31 Jan 2019 11:24:44 +0000 (12:24 +0100)]
nv50/ir/nir: parse system values first and stop for compute shaders

required by OpenCL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonir/lower_io: Don't use variable to get deref mode
Connor Abbott [Wed, 10 Jul 2019 09:55:24 +0000 (11:55 +0200)]
nir/lower_io: Don't use variable to get deref mode

Drivers only use lower_io for modes where pointers don't have a
meaningful value, and dereferences can always be traced back to a
variable. But there can be other modes, like global mode with
VK_EXT_buffer_device_address, where pointers cannot be traced back to a
variable, and lower_io would segfault on loads/stores of these since
nir_deref_instr_get_variable() would return NULL.

Just use the mode on the deref itself to filter out these modes before
we try to get the variable.

Fixes: 118a66df990 ("radv: Use NIR barycentric coordinates")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: Don't optimize after lowering FS inputs
Connor Abbott [Tue, 9 Jul 2019 11:43:13 +0000 (13:43 +0200)]
radv: Don't optimize after lowering FS inputs

Currently this is done rather late in radv, after lowering booleans, so
it isn't safe to run additional optimizations that may add e.g. 1-bit
booleans. We could move the lowering parts earlier, but since right now
we only lower FS inputs and by this point all indirects have been
lowered away, there's no reason we should need to optimize anything.

One shader from Devil May Cry 5 was getting optimized, but only because
the optimization loop was working on 32-bit booleans which revealed an
opportunity that was hidden with 1-bit booleans, and we generated a
1-bit boolean which is invalid.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111092
Fixes: 118a66df9907772bb9e5503b736c95d7bb62d52c
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoandroid: amd/addrlib: add gfx10 support
Mauro Rossi [Sat, 6 Jul 2019 19:16:04 +0000 (21:16 +0200)]
android: amd/addrlib: add gfx10 support

Fix the following building error:

external/mesa/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp:35:10:
fatal error: 'gfx10_gb_reg.h' file not found
         ^~~~~~~~~~~~~~~~
1 error generated.

Fixes: 78cdf9a ("amd/addrlib: add gfx10 support")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
5 years agoandroid: amd/common/gfx10: add register JSON
Mauro Rossi [Sat, 6 Jul 2019 18:21:31 +0000 (20:21 +0200)]
android: amd/common/gfx10: add register JSON

The necessary Android makefile building rules are added
and the generation rules are simplified for readability

Fixes the following building errors:

external/mesa/src/amd/common/ac_llvm_build.c:1496:45:
error: use of undeclared identifier 'V_008F0C_IMG_FORMAT_8_UINT'
   case V_008F0C_BUF_DATA_FORMAT_8: format = V_008F0C_IMG_FORMAT_8_UINT; break;
                                             ^
Fixes: 74a26af ("amd/common/gfx10: add register JSON")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
5 years agoandroid: radeonsi/gfx10: generate gfx10_format_table.h (v2)
Mauro Rossi [Sat, 6 Jul 2019 19:27:21 +0000 (21:27 +0200)]
android: radeonsi/gfx10: generate gfx10_format_table.h (v2)

Fix Android building rules for gfx10_format_table.h generated header

(v2) Add LOCAL_C_INCLUDES += $(intermediates)/radeonsi to fix error:

external/mesa/src/gallium/drivers/radeonsi/si_state.c:46:10:
fatal error: 'gfx10_format_table.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 0ffa229 ("radeonsi/gfx10: generate gfx10_format_table.h")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
5 years agoandroid: virgl: remove unnecessary LOCAL_C_INCLUDES
Chih-Wei Huang [Mon, 8 Jul 2019 02:16:18 +0000 (10:16 +0800)]
android: virgl: remove unnecessary LOCAL_C_INCLUDES

The path could be imported automatically.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
5 years agoandroid: vulkan/util: fix generating vk_enum_to_str.*
Chih-Wei Huang [Fri, 5 Jul 2019 08:35:19 +0000 (16:35 +0800)]
android: vulkan/util: fix generating vk_enum_to_str.*

The gen_enum_to_str.py generates vk_enum_to_str.c and its header at once.
However, the makefiles incorrectly list both files parallel with the same
recipes. That means both two files may be generated simultaneously by two
processes. The generating files may be truncated by another process, as
shown below:

$ cd $OUT/obj/STATIC_LIBRARIES/libmesa_vulkan_util_intermediates/util
$ ls -l

-rw-rw-r-- 1 lh lh 193713 Jul  5 13:31 vk_enum_to_str.c
-rw-rw-r-- 1 lh lh   4609 Jul  5 13:31 vk_enum_to_str.d
-rw-rw-r-- 1 lh lh      0 Jul  5 16:21 vk_enum_to_str.h

Let one file depends on the other with empty recipe to avoid the issue.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoandroid: radv: import include paths from used libraries
Chih-Wei Huang [Tue, 25 Jun 2019 09:11:12 +0000 (17:11 +0800)]
android: radv: import include paths from used libraries

It's unnecessary to manually add these include paths since they could
be imported automatically.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: anv: import include path of libmesa_nir
Chih-Wei Huang [Thu, 20 Jun 2019 10:14:35 +0000 (18:14 +0800)]
android: anv: import include path of libmesa_nir

Add libmesa_nir to a common LOCAL_STATIC_LIBRARIES defined by
ANV_STATIC_LIBRARIES so that its include path can be imported
automatically. Then ANV_INCLUDES is unnecessary and could be
eliminated.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: anv: eliminate libmesa_anv_entrypoints
Chih-Wei Huang [Thu, 20 Jun 2019 10:13:36 +0000 (18:13 +0800)]
android: anv: eliminate libmesa_anv_entrypoints

The dummy library libmesa_anv_entrypoints is totally unnecessary.
The four VULKAN_GENERATED_FILES could be generated and built in
libmesa_vulkan_common directly. The libraries using the generated
headers should get it via the exported include path.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: vulkan/util: fix export path
Chih-Wei Huang [Thu, 20 Jun 2019 07:51:44 +0000 (15:51 +0800)]
android: vulkan/util: fix export path

Export the correct include path so that the libraries use it can
get it automatically.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: radv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIES
Chih-Wei Huang [Thu, 20 Jun 2019 07:46:22 +0000 (15:46 +0800)]
android: radv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIES

The libmesa_git_sha1 is a dummy library. There is no reason to put
it into LOCAL_WHOLE_STATIC_LIBRARIES.

Move libmesa_vulkan_util to the vulkan.radv which really needs it.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: anv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIES
Chih-Wei Huang [Thu, 20 Jun 2019 07:45:03 +0000 (15:45 +0800)]
android: anv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIES

The libmesa_anv_entrypoints and libmesa_genxml are dummy libraries.
There is no reason to put them into LOCAL_WHOLE_STATIC_LIBRARIES.

Move libmesa_vulkan_util to the vulkan HAL which really needs it.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: radv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRS
Chih-Wei Huang [Wed, 19 Jun 2019 08:48:52 +0000 (16:48 +0800)]
android: radv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRS

The vulkan module is the final HAL. No need to export its headers
since none will import it.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoandroid: anv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRS
Chih-Wei Huang [Wed, 19 Jun 2019 08:16:27 +0000 (16:16 +0800)]
android: anv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRS

The vulkan module is the final HAL. No need to export its headers
since none will import it.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agonir/loop_analyze: Pass nir_const_values directly to helpers
Jason Ekstrand [Tue, 25 Jun 2019 01:27:26 +0000 (20:27 -0500)]
nir/loop_analyze: Pass nir_const_values directly to helpers

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/loop_analyze: Properly handle swizzles in loop conditions
Jason Ekstrand [Fri, 21 Jun 2019 14:18:16 +0000 (09:18 -0500)]
nir/loop_analyze: Properly handle swizzles in loop conditions

This commit re-plumbs all of nir_loop_analyze to use nir_ssa_scalar for
all intermediate values so that we can properly handle swizzles.  Even
though if conditions are required to be scalars, they may still consume
swizzles so you could have ((a.yzw < b.zzx).xz && c.xx).y == 0 as your
loop termination condition.  The old code would just bail the moment it
saw its first non-zero swizzle but we can now properly chase the scalar
from the if condition to all the way to a, b, and c.

Shader-db results on Kaby Lake:

    total loops in shared programs: 4388 -> 4364 (-0.55%)
    loops in affected programs: 29 -> 5 (-82.76%)
    helped: 29
    HURT: 5

Shader-db results on Haswell:

    total loops in shared programs: 4370 -> 4373 (0.07%)
    loops in affected programs: 2 -> 5 (150.00%)
    helped: 2
    HURT: 5

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/loop_analyze: Refactor detection of limit vars
Jason Ekstrand [Mon, 24 Jun 2019 22:33:02 +0000 (17:33 -0500)]
nir/loop_analyze: Refactor detection of limit vars

This commit reworks both get_induction_and_limit_vars() and
try_find_trip_count_vars_in_iand to return true on success and not
modify their output parameters on failure.  This makes their callers
significantly simpler.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir: Add some helpers for chasing SSA values properly
Jason Ekstrand [Thu, 20 Jun 2019 16:12:54 +0000 (11:12 -0500)]
nir: Add some helpers for chasing SSA values properly

There are various cases in which we want to chase SSA values through ALU
ops ranging from hand-written optimizations to back-end translation
code.  In all these cases, it can be very tricky to do properly because
of swizzles.  This set of helpers lets you easily work with a single
component of an SSA def and chase through ALU ops safely.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/loop_analyze: Bail if we encounter swizzles
Jason Ekstrand [Mon, 24 Jun 2019 21:21:07 +0000 (16:21 -0500)]
nir/loop_analyze: Bail if we encounter swizzles

None of the current code knows what to do with swizzles.  Take the safe
option for now and bail if we see one.  This does have a small shader-db
impact but it is at least safe.

Shader-db results on Kaby Lake:

    total loops in shared programs: 4364 -> 4388 (0.55%)
    loops in affected programs: 5 -> 29 (480.00%)
    helped: 5
    HURT: 29

Shader-db results on Haswell:

    total loops in shared programs: 4373 -> 4370 (-0.07%)
    loops in affected programs: 5 -> 2 (-60.00%)
    helped: 5
    HURT: 2

Fixes: 6772a17acc8ee "nir: Add a loop analysis pass"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/loop_analyze: Use new eval_const_* helpers in test_iterations
Jason Ekstrand [Thu, 20 Jun 2019 21:29:30 +0000 (16:29 -0500)]
nir/loop_analyze: Use new eval_const_* helpers in test_iterations

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/loop_analyze: Handle bit sizes correctly in calculate_iterations
Jason Ekstrand [Thu, 20 Jun 2019 21:26:19 +0000 (16:26 -0500)]
nir/loop_analyze: Handle bit sizes correctly in calculate_iterations

The current code assumes everything is 32-bit which is very likely true
but not guaranteed by any means.  Instead, use nir_eval_const_opcode to
do the calculations in a bit-size-agnostic way.  We also use the new
constant constructors to build the correct size constants.

Fixes: 6772a17acc8ee "nir: Add a loop analysis pass"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/loop_analyze: Fix phi-of-identical-alu detection
Jason Ekstrand [Thu, 20 Jun 2019 21:13:39 +0000 (16:13 -0500)]
nir/loop_analyze: Fix phi-of-identical-alu detection

One issue was that the original version didn't check that swizzles
matched when comparing ALU instructions so it could end up matching
very different instructions.  Using the nir_instrs_equal function from
nir_instr_set.c which we use for CSE should be much more reliable.
Another was that the loop assumes it will only run two iterations which
may not be true.  If there's something which guarantees that this case
only happens for phis after ifs, it wasn't documented.

Fixes: 9e6b39e1d521 "nir: detect more induction variables"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/instr_set: Expose nir_instrs_equal()
Jason Ekstrand [Thu, 20 Jun 2019 18:47:30 +0000 (13:47 -0500)]
nir/instr_set: Expose nir_instrs_equal()

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir/builder: Use nir_const_value_for_* for constructing immediates
Jason Ekstrand [Mon, 24 Jun 2019 23:23:29 +0000 (18:23 -0500)]
nir/builder: Use nir_const_value_for_* for constructing immediates

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir: Refactor nir_src_as_* constant functions
Jason Ekstrand [Wed, 26 Jun 2019 01:33:46 +0000 (20:33 -0500)]
nir: Refactor nir_src_as_* constant functions

Now that we have the nir_const_value_as_* helpers, every one of these
functions is effectively the same except for the suffix they use so we
can easily define them with a repeated macro.  This also means that
they're inline and the fact that the nir_src is being passed by-value
should no longer really hurt anything.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir: Add more helpers for working with const values
Jason Ekstrand [Thu, 20 Jun 2019 15:36:10 +0000 (10:36 -0500)]
nir: Add more helpers for working with const values

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agovirgl: remove virgl_transfer_queue_lists
Chia-I Wu [Mon, 8 Jul 2019 23:45:36 +0000 (16:45 -0700)]
virgl: remove virgl_transfer_queue_lists

COMPLETED_LIST is always empty.  We only need one list.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
5 years agovirgl: simplify virgl_transfer_queue_extend
Chia-I Wu [Mon, 8 Jul 2019 23:31:46 +0000 (16:31 -0700)]
virgl: simplify virgl_transfer_queue_extend

We can reuse virgl_transfer_queue_find_pending.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
5 years agovirgl: remove transfer after transfer_write
Chia-I Wu [Mon, 8 Jul 2019 21:35:27 +0000 (14:35 -0700)]
virgl: remove transfer after transfer_write

Now that virgl_transfer_queue_is_queued does not search
COMPLETED_LIST, we don't need to move transfers to that list.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
5 years agovirgl: improve virgl_transfer_queue_is_queued
Chia-I Wu [Mon, 8 Jul 2019 23:34:32 +0000 (16:34 -0700)]
virgl: improve virgl_transfer_queue_is_queued

Search only the pending list and return immediately on the first
hit.

When the transfer queue was introduced, the function was used to
deal with

  write transfer -> draw -> write transfer

sequence.  It was used to tell if the second transfer intersects
with the first transfer. If yes, the transfer queue avoided
reordering the second transfer to before the draw (by flushing) in
case the draw uses the transferred data.

With the recent changes to the transfer code, the function is used
to deal with

  write transfer -> readback transfer

We want to avoid reordering the readback transfer to before the
first transfer (also by flushing).

In the old code, we needed to track the compeleted transfers as well
to avoid reordering.  But in the new code, a readback transfer is
guaranteed to see the data from the completed transfers (in other
words, it cannot be reoderered to before the already completed
transfers).  We don't need to search the COMPLETED_LIST.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
5 years agovirgl: fix transfers_intersect for mipmaps
Chia-I Wu [Mon, 8 Jul 2019 23:20:01 +0000 (16:20 -0700)]
virgl: fix transfers_intersect for mipmaps

We never use transfers_intersect with textures, but fix it anyway to
avoid confusion.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
5 years agovirgl: fix some false positives in transfers_overlap
Chia-I Wu [Mon, 8 Jul 2019 23:12:29 +0000 (16:12 -0700)]
virgl: fix some false positives in transfers_overlap

Rewrite the function and check z/depth more carefully.  We
intentionally avoid u_box_test_intersection_2d because it returns
true when two boxes touch but do not intersect and can be confusing.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
5 years agoradeonsi/gfx10: enable primitive binning by default
Marek Olšák [Thu, 4 Jul 2019 02:24:36 +0000 (22:24 -0400)]
radeonsi/gfx10: enable primitive binning by default

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi/gfx10: implement primitive binning
Marek Olšák [Wed, 3 Jul 2019 02:34:42 +0000 (22:34 -0400)]
radeonsi/gfx10: implement primitive binning

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi: simplify primitive binning enablement
Marek Olšák [Thu, 4 Jul 2019 02:27:12 +0000 (22:27 -0400)]
radeonsi: simplify primitive binning enablement

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi: set primitive binning tunables for dGPUs
Marek Olšák [Thu, 4 Jul 2019 02:23:18 +0000 (22:23 -0400)]
radeonsi: set primitive binning tunables for dGPUs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi: set FLUSH_ON_BINNING_TRANSITION when needed
Marek Olšák [Thu, 4 Jul 2019 02:04:30 +0000 (22:04 -0400)]
radeonsi: set FLUSH_ON_BINNING_TRANSITION when needed

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi/gfx10: use the new scan converter when binning is disabled
Marek Olšák [Thu, 4 Jul 2019 01:57:43 +0000 (21:57 -0400)]
radeonsi/gfx10: use the new scan converter when binning is disabled

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi/gfx9: fix an oversight in primitive binning code
Marek Olšák [Wed, 3 Jul 2019 02:31:14 +0000 (22:31 -0400)]
radeonsi/gfx9: fix an oversight in primitive binning code

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>