i965: Program 2x MSAA sample positions.

There are only two sensible placements for 2x MSAA samples - and one is
the mirror image of the other.  I chose (0.25, 0.25) and (0.75, 0.75).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Store 4x MSAA sample positions in a scalar value, not an array.

Storing a single value in an array is rather pointless.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Duplicate less code in GetSamplePositions driver hook.

The 4x and 8x cases contained identical code for extracting the X and
Y sample offset values and converting them from U0.4 back to float.

Without this refactoring, we'd have to duplicate it a third time in
order to support 2x MSAA.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

nouveau/video: make sure that firmware is present when checking caps

Apparently some players are ill-prepared for us claiming that a decoder
exists only to have creating it fail, and express this poor preparation
with crashes (e.g. flash). Check that firmware is there to increase the
chances of there being a high correlation between reported capabilities
and ability to create a decoder.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 10.0 10.1 <mesa-stable@lists.freedesktop.org>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>

mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.

In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally
renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and
MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their
sense.  The commit message was correct, but what sed commands actually
got run didn't match that.

This patch swaps the two enum names, reversing them.  This should undo
the damage, but might break things if people have manually fixed a few
instances in the meantime...

Mark's commit also failed to mention renames:
s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g
s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g
but those seem okay.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: remove duplicated init of MaxViewports

Already declared 5 lines before.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

gallium: add geometry shader output limits

v2: adjust limits for radeonsi and llvmpipe
v3: add documentation

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

mesa: Removed unnecessary check for NULL pointer when freeing memory

Note that it is OK to pass NULL pointers to this function since this commit:

mesa: modified _mesa_align_free() to accept NULL pointer
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0cc59d68a9f5231e8e2111393a1834858820735

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nv30: report 8 maximum inputs

nvfx_fragprog_assign_generic only allows for up to 10/8 texcoords for
nv40/nv30. This fixes compilation of the varying-packing tests.
Furthermore it appears that the last 2 inputs on nv4x don't seem to
work in those tests, so just report 8 everywhere for now.

Tested on NV42, NV44. NV4B appears to have additional problems.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 9.1 9.2 10.0 10.1 <mesa-stable@lists.freedesktop.org>

nv50/ir/ra: some register spilling fixes

Cc: 10.1 <mesa-stable@lists.freedesktop.org>

mesa: update assertion in detach_shader() for geom shaders

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74723
Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>

mesa: allocate gl_debug_state on demand

We don't need to allocate all the state related to GL_ARB_debug_output
until some aspect of that extension is actually needed.

The sizeof(gl_debug_state) is huge (~285KB on 64-bit systems), not even
counting the 54(!) hash tables and lists that it contains.  This change
reduces the size of gl_context alone from 431KB bytes to 145KB bytes on
64-bit systems and from 277KB bytes to 78KB bytes on 32-bit systems.

Reviewed-by: Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: trivial clean-ups in errors.c

Whitespace changes, 78-column rewrapping, comment clean-ups, add
some braces, etc.

Reviewed-by: Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: remove _mesa_ prefix from some static functions

Reviewed-by: Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Label JIP and UIP in Broadwell shader disassembly.

This makes it obvious which number is which.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Don't disassemble UIP field for Broadwell WHILE instructions.

The WHILE instruction doesn't have UIP.  It only has JIP.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Don't print source registers for Broadwell flow control.

The bits which normally contain the source register descriptions
actually contain the JIP/UIP jump targets, which we already printed.

Interpreting JIP/UIP as source registers results in some really creepy
looking output, like IF statements with acc14.4<0,1,0>UD sources.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Fix fast depth clear values on Broadwell.

Broadwell's 3DSTATE_CLEAR_PARAMS packet expects a floating point value
regardless of format.  This means we need to stop converting it to
UNORM.

Storing the value as float would make sense, but since we already have a
uint32_t field, this patch continues shoehorning it into that.  In a
sense, this makes mt->depth_clear_value the DWord you emit in the
packet, rather than the clear value itself.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

nvc0: handle TGSI_SEMANTIC_LAYER

Cc: 10.1 <mesa-stable@lists.freedesktop.org>

nvc0: create the SW object

It's required for being able to use software methods now.

nvc0/ir/emit: hardcode vertex output stream to 0 for now

i965: Enable ARB_texture_gather for one component on Gen6.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Emit shader w/a for Gen6 gather

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Emit shader w/a for Gen6 gather

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add surface format overrides for Gen6 gather

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add Gen6 gather wa to sampler key

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Optimize triop_csel with all-true or all-false.

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Optimize various cases of fma (aka MAD).

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Optimize lrp(x, x, coefficient) --> x.

total instructions in shared programs: 1627754 -> 1624534 (-0.20%)
instructions in affected programs:     45748 -> 42528 (-7.04%)
GAINED:                                3
LOST:                                  0

(serious sam, humus domino demo)

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Optimize pow(x, 1) -> x.

total instructions in shared programs: 1627826 -> 1627754 (-0.00%)
instructions in affected programs:     6640 -> 6568 (-1.08%)
GAINED:                                0
LOST:                                  0

(HoN and savage2)

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Optimize log(exp(x)) and exp(log(x)) into x.

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Optimize ~~x into x.

v2: Fix pasteo of an extra abs being inserted (caught by many).  Rewrite
    to drop the silly switch statement.

Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)

i965: Add some informative debug when the X Server botches DRI2 GetBuffers.

We've had various bug reports over the years where miptrees are missing,
and when I screwed it up while adding DRI2 to the modesetting driver, I
figured I should put the info necessary for debug here.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Remove redundant check in blitter-based glBlitFramebuffer().

The intel_miptree_blit() code checks the format for us now, plus it
handles xrgb vs argb for us.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Fix Gen8+ disassembly of half float subregister numbers.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Use the new brw_load_register_mem helper for draw indirect.

This makes it work on Broadwell, too.

v2: Drop bogus double write to 3DPRIM_BASE_VERTEX register
    (caught by Chris Forbes).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Implement a brw_load_register_mem helper function.

This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64
distinction.

Placing the function in intel_batchbuffer.c is rather arbitrary; there
wasn't really an obvious place for it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Fix INTEL_DEBUG=vs for fixed-function/ARB programs.

Since commit 9cee3ff562f3e4b51bfd30338fd1ba7716ac5737, INTEL_DEBUG=vs
has caused a NULL pointer dereference for fixed-function/ARB programs.

In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the
gl_shader_program.  This is different than the FS visitor.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Don't lose precision qualifiers when encountering "centroid".

Mesa fails to retain the precision qualifier when parsing:

   #version 300 es
   centroid in mediump vec2 v;

Consider how the parser's type_qualifier production is applied.
First, the precision_qualifier rule creates a new ast_type_qualifier:

    <precision: mediump>

Then the storage_qualifier rule creates a second one:

    <flags: in>

and calls merge_qualifier() to fold in any previous qualifications,
returning:

    <flags: in, precision: mediump>

Finally, the auxiliary_storage_qualifier creates one for "centroid":

    <flags: centroid>

it then does $$ = $1 and $$.flags |= $2.flags, resulting in:

    <flags: centroid, in>

Since precision isn't stored in the flags bitfield, it is lost.  We need
to instead call merge_qualifier to combine all the fields.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reported-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

st/mesa: avoid sw fallback for getting/decompressing textures

If st_GetTexImage() is to decompress the texture, avoid the fallback
path even if prefer_blit_based_texture_transfer = false.  For drivers
that returned PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 0, we
were always taking the fallback path for texture decompression rather
than rendering a quad.  The later is a lot faster.

Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/tgsi: correct typo propagated from NV_vertex_program1_1

In the specification text of NV_vertex_program1_1, the upper
limit of the RCC instruction is written as 1.884467e+19 in
scientific notation, but as 0x5F800000 in binary. But the binary
version translates to 1.84467e+19 rather than 1.884467e+19 in
scientific notation.

Since the lower-limit equals 2^-64 and the binary version equals
2^+64, let's assume the value in scientific notation is a typo
and implement this using the value from the binary version
instead.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/tgsi: use CLAMP instead of open-coded clamps

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

egl: Unhide functionality in _eglInitSurface()

_eglInitResource() was used to memset entire _EGLSurface by
writing more than size of pointed target. This does work
as long as Resource is the first element in _EGLSurface,
this patch fixes such dependency.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

egl: Unhide functionality in _eglInitContext()

_eglInitResource() was used to memset entire _EGLContext by
writing more than size of pointed target. This does work
as long as Resource is the first element in _EGLContext,
this patch fixes such dependency.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

glx: Add missing null check in __glX_send_client_info()

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

i965: Add missing null check in fs_visitor::dead_code_eliminate_local()

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

glx: Add some missing null checks in glx_pbuffer.c

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

glsl: Fix null access on file read error

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

glx: Add missing null check in __glXCloseDisplay

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

glx: Add missing null checks in glxcmds.c

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

main/get: support ARB_gpu_shader5

If a driver enables ARB_gpu_shader5 and sets Const.MaxVertexSteams >= 4,
then piglit's arb_gpu_shader5-minmax test should now pass.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glapi: add definitions for ARB_gpu_shader5

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

nouveau/codegen: allow tex offsets on non-TXF instructions (e.g. TXL)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>

nv50: only over-allocate by a page for code

The pre-fetching doesn't go too far. Tested with over-allocating by only
a page, and didn't see any errors in dmesg. Saves ~512KB of VRAM.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 10.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>

nv50: fix layerid to be the fp input number rather than vp output number

In the tests they were the same so it didn't matter, but indications are
that this is the correct behaviour. Also take this opportunity to
(trivially) support using gl_Layer in fp.

Cc: 10.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>

nv50: rework primid logic

Functionally identical but much simpler. Should also better integrate
with future layer/viewport changes/fixes.

Cc: 10.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>

glx: Pass NULL DRI drawables into the DRI driver for None GLX drawables

GLX_ARB_create_context allows making a GLX context current with None
drawable and readables, but this was never implemented correctly in GLX.
We would create a __DRIdrawable for the None GLX drawable and pass that
to the DRI driver and that would somehow work.  Now it's somehow broken.

The way this should have worked is that we pass a NULL DRI drawable
to the DRI driver when the GLX user calls glXMakeContextCurrent()
with None for drawable and readables.

https://bugs.freedesktop.org/show_bug.cgi?id=74143
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>

st/vdpau: add flush on unmap

Flush the context when we unmap a buffer, otherwise VDPAU might
start rendering the next frame while we still reference that buffer.

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: StrangeNoises (rachel@strangenoises.org)

vdpau: flush the context before exporting the surface v2

Bugzilla (bug needs XBMC changes as well):
https://bugs.freedesktop.org/show_bug.cgi?id=73191

When VL uploads vertex buffers, it uses PIPE_TRANSFER_DONTBLOCK, which always
flushes the context in the winsys if the buffer being mapped is busy. Since
I added handling of DISCARD_RANGE, DONTBLOCK has had no effect when combined
with DISCARD_RANGE and I think the context isn't flushed anywhere else,
so no commands are submitted to the GPU until the IB is full, which takes
a lot of frames.

Using DISCARD_RANGE is not the only way to trigger this bug. The other way
is to reallocate the vertex buffer before every upload.

BTW, I'm not sure if this is the right place for flushing, but it does fix
the bug.

v2 (chk): move the flush to the right place.

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: StrangeNoises (rachel@strangenoises.org)

glsl: Initialize ubo_binding_mask flags to zero.

Missed in commit e63bb298. Caused sporadic test failures, like
incorrect-in-layout-qualifier-repeated-prim.geom.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

gallium/radeon: fix warnings

gallium: remove PIPE_USAGE_STATIC

Reviewed-by: Brian Paul <brianp@vmware.com>

gallium: define the behavior of PIPE_USAGE_* flags properly

STATIC will be removed in the following commit.

v2: changed the definition of IMMUTABLE

Reviewed-by: Brian Paul <brianp@vmware.com>

gallium: remove PIPE_RESOURCE_FLAG_GEN_MIPS

Unused.

Reviewed-by: Brian Paul <brianp@vmware.com>

r600g,radeonsi: set resource domains in one place (v2)

v2: This doesn't change the behavior. It only moves the tiling check
    to r600_init_resource and removes the usage parameter.

Reviewed-by: Christian König <christian.koenig@amd.com>

st/mesa: fix crash when a shader uses a TBO and it's not bound

This binds a NULL sampler view in that case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74251

Cc: "10.1" "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/omx: add workaround for bug in Bellagio

Not blocking for the message thread can lead to accessing freed up memory.

Signed-off-by: Christian König <christian.koenig@amd.com>

st/omx: initial OpenMAX support v3

Featuring a full grown MPEG2 and H264 decoder and a couple of hundred bugs.

v2 (Leo): fix an error for pic_order_cnt_type 1
v3 (Leo): implement support for field decoding

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>

vl/rbsp: add H.264 RBSP implementation

Signed-off-by: Christian König <christian.koenig@amd.com>

vl/vlc: add function to limit the vlc size

Signed-off-by: Christian König <christian.koenig@amd.com>

vl/vlc: add remove bits function

Signed-off-by: Christian König <christian.koenig@amd.com>

radeon: update legal notes on UVD

Signed-off-by: Christian König <christian.koenig@amd.com>

radeon: just don't map VRAM buffers at all

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeon/video: directly create buffers in the right domain

Avoid moving things around on start of stream.

Signed-off-by: Christian König <christian.koenig@amd.com>

radeon/video: seperate common video functions

Signed-off-by: Christian König <christian.koenig@amd.com>

gallium/dri2: Fix dri2_dup_image

dri2_dup_image was not copying the dri_format field.

This was causing some bugs, for example:
. we create an gbm_bo.
. we get an EGLImage from the gbm_bo.
. Bug: impossible to get again the gbm_bo from the EGLImage by
  importing. (gbm dri2 backend)

Signed-off-by: Axel Davy <axel.davy@ens.fr>

i965/vs: Fix typo in brw_compute_vue_map

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Fix register types in dump_instructions().

This regressed when I converted BRW_REGISTER_TYPE_* to be an abstract
type that doesn't match the hardware description.  dump_instruction()
was using reg_encoding[] from brw_disasm.c, which no longer matches
(and was incorrect for Gen8+ anyway).

This patch introduces a new function to convert the abstract enum values
into the letter suffix we expect.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reported-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

egl/glx: Remove egl_glx driver

Mesa now has a real, feature-rich EGL implementation on X11 via xcb.
Therefore I believe there is no longer a practical need for the egl_glx
driver.

Furthermore, egl_glx appears to be unmaintained.  The most recent
nontrivial commit to egl_glx was 6baa5f1 on 2011-11-25.

Tested by running weston-smoke in windowed Weston on X with i965.

Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Kristian Høgsberg <krh@bitplanet.net>

docs: update 10.1 relnotes to note GL 3.3 on r600 and radeonsi.

Signed-off-by: Dave Airlie <airlied@redhat.com>

tgsi/ureg: increase the number of immediates

ureg_program is allocated on the heap so we can just bump the
number of immediates that it can handle. It's needed for d3d10.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: make sure analysis works with large number of immediates

We need to handle a lot more immediates and in order to do that
we also switch from allocating this structure on the stack to
allocating it on the heap.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: handle huge number of immediates

We only supported up to 256 immediates, which isn't enough. We had
code which was allocating immediates as an allocated array, but it
was always used along a statically backed array for performance
reasons. This commit adds code to skip that performance optimization
and always use just the dynamically allocated immediates if the
number of them is too great.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: allow large numbers of temporaries

The number of allowed temporaries increases almost with every
iteration of an api. We used to support 128, then we started
increasing and the newer api's support 4096+. So if we notice
that the number of temporaries is larger than our statically
allocated storage would allow we just treat them as indexable
temporaries and allocate them as an array from the start.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965/fs: Assume FBO rendering in precompile if MRT.

If multiple color outputs are written, this shader is unlikely to be
useful with a winsys framebuffer.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Guess nr_color_regions better in precompile

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

docs: Add relnotes for 10.2

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

mesa: Bump version to 10.2.0-devel

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Move intel_prepare_render() above first buffer access

The driver is supposed to ensure buffers before any drawing operation, but in
do_blit_drawpixels() and do_blit_copypixels() we inspect the buffer format
before calling intel_prepare_render().  That was covered up by the
unconditional call to intel_prepare_render() in intelMakeCurrent(), but we
now only do this on the initial intelMakeCurrent call for a context
(to get the size for the initial viewport values).

https://bugs.freedesktop.org/show_bug.cgi?id=74083

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Alexander Monakov <amonakov@gmail.com>

st/mesa: add MESA_SHADER_COMPUTE case in shader_stage_to_ptarget()

Silences compiler warning.  Trivial.

mesa: re-wrap, fix-up comment text in formats.h

Wrap to 78 columns, fix comment formatting.
Trivial.

i965/cs: Allow ARB_compute_shader to be enabled via env var.

This will allow testing of compute shader functionality before it is
completed.

To enable ARB_compute_shader functionality in the i965 driver, set
INTEL_COMPUTE_SHADER=1.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965/cs: Create the brw_compute_program struct, and the code to initialize it.

v2: Fix comment.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl/cs: Prohibit mixing of compute and non-compute shaders.

Fixes piglit test:
spec/ARB_compute_shader/linker/mix_compute_and_non_compute

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl/cs: Prohibit user-defined ins/outs in compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

main/cs: Implement query for COMPUTE_WORK_GROUP_SIZE.

v2: Improve error message.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa/cs: Handle compute shader local size during linking.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl/cs: Handle compute shader local_size_{x,y,z} declaration.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_COUNT constant.

v2: Document that the 3-element array MaxComputeWorkGroupCount is
indexed by dimension.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_INVOCATIONS constant.

Reviewed-by: Matt Turner <mattst88@gmail.com>
v2: Use CONTEXT_INT rather than CONTEXT_ENUM.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>