2017-07-28  Tamar Christina  <tamar.christina@arm.com>

* config/aarch64/aarch64.c
(aarch64_simd_container_mode): Add prototype.
(aarch64_expand_mov_immediate): Add HI support.
(aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p: New.
(aarch64_can_const_movi_rtx_p): New.
(aarch64_preferred_reload_class):
Remove restrictions of using FP registers for certain SIMD operations.
(aarch64_rtx_costs): Added new cost for CONST_DOUBLE moves.
(aarch64_valid_floating_const): Add integer move validation.
(aarch64_simd_imm_scalar_p): Remove.
(aarch64_output_scalar_simd_mov_immediate): Generalize function.
(aarch64_legitimate_constant_p): Expand list of supported cases.
* config/aarch64/aarch64-protos.h
(aarch64_float_const_rtx_p, aarch64_can_const_movi_rtx_p): New.
(aarch64_reinterpret_float_as_int): New.
(aarch64_simd_imm_scalar_p): Remove.
* config/aarch64/constraints.md (Uvi): New.
(Dd): Split into Ds and new Dd.
* config/aarch64/aarch64.md (*movsi_aarch64):
Add SIMD mov case.
(*movdi_aarch64): Add SIMD mov case.

From-SVN: r250672

tree-predcom.c: (struct chain): Handle store-store chain in which stores for elimination only...

* tree-predcom.c: (struct chain): Handle store-store chain in which
stores for elimination only store loop invariant values.
(execute_pred_commoning_chain): Ditto.
(prepare_initializers_chain_store_elim): Ditto.
(prepare_finalizers): Ditto.
(is_inv_store_elimination_chain): New function.
(initialize_root_vars_store_elim_1): New function.

From-SVN: r250670

tree-predcom.c: Revise general description of the pass.

* tree-predcom.c: Revise general description of the pass.
(enum chain_type): New enum type for store elimination.
(struct chain): New field supporting store elimination.
(struct component): Ditto.
(dump_chain): Dump store-stores chain.
(release_chain): Release resources.
(split_data_refs_to_components): Compute and create component
contains only stores for elimination.
(get_chain_last_ref_at): New function.
(make_invariant_chain): Initialization.
(make_rooted_chain): Specify chain type in parameter and record it.
(add_looparound_copies): Skip for store-stores chain.
(determine_roots_comp): Compute type of chain and pass it to
make_rooted_chain.
(initialize_root_vars_store_elim_2): New function.
(finalize_eliminated_stores): New function.
(remove_stmt): Handle store for elimination.
(execute_pred_commoning_chain): Execute predictive commoning on
store-store chains.
(determine_unroll_factor): Skip unroll for store-stores chain.
(prepare_initializers_chain_store_elim): New function.
(prepare_initializers_chain): Hanlde store-store chain.
(prepare_finalizers_chain, prepare_finalizers): New function.
(tree_predictive_commoning_loop): Return integer value indicating
if loop is unrolled or lcssa form is corrupted.
(tree_predictive_commoning): Rewrite for lcssa form if necessary.

gcc/testsuite
* gcc.dg/tree-ssa/predcom-dse-1.c: New test.
* gcc.dg/tree-ssa/predcom-dse-2.c: New test.
* gcc.dg/tree-ssa/predcom-dse-3.c: New test.
* gcc.dg/tree-ssa/predcom-dse-4.c: New test.
* gcc.dg/tree-ssa/predcom-dse-5.c: New test.
* gcc.dg/tree-ssa/predcom-dse-6.c: New test.
* gcc.dg/tree-ssa/predcom-dse-7.c: New test.
* gcc.dg/tree-ssa/predcom-dse-8.c: New test.
* gcc.dg/tree-ssa/predcom-dse-9.c: New test.
* gcc.dg/tree-ssa/predcom-dse-10.c: New test.
* gcc.dg/tree-ssa/predcom-dse-11.c: New test.

From-SVN: r250669

tree-predcom.c (initialize_root): Delete.

* tree-predcom.c (initialize_root): Delete.
(execute_pred_commoning_chain): Initialize root vars and replace
reference of non-combined chain directly, rather than call above
function.

From-SVN: r250668

tree-predcom.c (ref_at_iteration): Add parameter NITERS.

* tree-predcom.c (ref_at_iteration): Add parameter NITERS.  Compute
memory reference to DR at (NITERS + ITERS)-th iteration of loop.

From-SVN: r250667

tree-predcom.c (struct chain): New field init_seq.

* tree-predcom.c (struct chain): New field init_seq.
(release_chain): Release init_seq.
(prepare_initializers_chain): Record intialization stmts in above
field.
(insert_init_seqs): New function.
(tree_predictive_commoning_loop): Call insert_init_seqs.

From-SVN: r250666

* tree-predcom.c (determine_roots_comp): Skip trivial components.

From-SVN: r250665

match.pd: Remove superfluous :c.

2017-07-28  Richard Biener  <rguenther@suse.de>

* match.pd: Remove superfluous :c.
* genmatch.c (simplify::id): Add member.
(lower_commutative, lower_opt_convert, lower_cond, lower_for):
Copy id.
(current_id): New global.
(dt_node::parent): Move from ...
(dt_operand::parent): ... here.  Add for_id member.
(is_a_helper <dt_operand *>::test): DT_TRUE is also a dt_operand.
(decision_tree::find_node): Relax order requirement when
merging DT_TRUE nodes to ones inbetween the current simplify
and the one we try to merge with.  Add diagnostic whenever
we need to enforce pattern order by not merging.
(decision_tree::insert): Set current_id.
(decision_tree::print_node): Dump parent node and for_id.
(parser::last_id): Add member.
(parser::push_simplify): Assign unique id.
(parser::parser): Initialize last_id.

From-SVN: r250664

Set DECL_VALUE_EXPR after a debug stmt is generated (PR sanitizer/81340).

2017-07-28  Martin Liska  <mliska@suse.cz>

PR sanitizer/81340
* sanopt.c (sanitize_rewrite_addressable_params): Set VALUE_EXPR after
gimple_build_debug_bind.
2017-07-28  Martin Liska  <mliska@suse.cz>

PR sanitizer/81340
* g++.dg/asan/pr81340.C: New test.

From-SVN: r250660

re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression])

2017-07-28  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81502
* match.pd: Add pattern combining BIT_INSERT_EXPR with
BIT_FIELD_REF.
* tree-cfg.c (verify_expr): Verify types of BIT_FIELD_REF
size/pos operands.
(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR pos.
* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Use bitsizetype
for BIT_FIELD_REF args.
* fold-const.c (make_bit_field_ref): Likewise.
* tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.

* gcc.target/i386/pr81502.c: New testcase.

From-SVN: r250659

re PR sanitizer/80998 (Implement -fsanitize=pointer-overflow)

PR sanitizer/80998
* sanopt.c (pass_sanopt::execute): Handle IFN_UBSAN_PTR.
* tree-ssa-alias.c (call_may_clobber_ref_p_1): Likewise.
* flag-types.h (enum sanitize_code): Add SANITIZER_POINTER_OVERFLOW.
Or it into SANITIZER_UNDEFINED.
* ubsan.c: Include gimple-fold.h and varasm.h.
(ubsan_expand_ptr_ifn): New function.
(instrument_pointer_overflow): New function.
(maybe_instrument_pointer_overflow): New function.
(instrument_object_size): Formatting fix.
(pass_ubsan::execute): Call instrument_pointer_overflow
and maybe_instrument_pointer_overflow.
* internal-fn.c (expand_UBSAN_PTR): New function.
* ubsan.h (ubsan_expand_ptr_ifn): Declare.
* sanitizer.def (__ubsan_handle_pointer_overflow,
__ubsan_handle_pointer_overflow_abort): New builtins.
* tree-ssa-tail-merge.c (merge_stmts_p): Handle IFN_UBSAN_PTR.
* internal-fn.def (UBSAN_PTR): New internal function.
* opts.c (sanitizer_opts): Add pointer-overflow.
* lto-streamer-in.c (input_function): Handle IFN_UBSAN_PTR.
* fold-const.c (build_range_check): Compute pointer range check in
integral type if pointer arithmetics would be needed.  Formatting
fixes.
gcc/testsuite/
* c-c++-common/ubsan/ptr-overflow-1.c: New test.
* c-c++-common/ubsan/ptr-overflow-2.c: New test.
libsanitizer/
* ubsan/ubsan_handlers.cc: Cherry-pick upstream r304461.
* ubsan/ubsan_checks.inc: Likewise.
* ubsan/ubsan_handlers.h: Likewise.

From-SVN: r250656

Do not handle VLA in sanitization (PR sanitizer/81460).

2017-07-28  Martin Liska  <mliska@suse.cz>

PR sanitizer/81460
* sanopt.c (sanitize_rewrite_addressable_params): Do not rewrite
parameters that are of a variable-length.
2017-07-28  Martin Liska  <mliska@suse.cz>

PR sanitizer/81460
* gcc.dg/asan/pr81460.c: New test.

From-SVN: r250655

[PowerPC/RTEMS] Add 64-bit support using ELFv2 ABI

Add 64-bit support for RTEMS using the ELFv2 ABI with 64-bit long
double.

gcc/
* config.gcc (powerpc-*-rtems*): Remove rs6000/eabi.h.  Add
rs6000/biarch64.h.
* config/rs6000/rtems.h (ASM_DECLARE_FUNCTION_SIZE): New macro.
(ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
(CRT_CALL_STATIC_FUNCTION): Likewise.
(ASM_DEFAULT_SPEC): New define.
(ASM_SPEC32): Likewise.
(ASM_SPEC64): Likewise.
(ASM_SPEC_COMMON): Likewise.
(ASM_SPEC): Likewise.
(INVALID_64BIT): Likewise.
(LINK_OS_DEFAULT_SPEC): Likewise.
(LINK_OS_SPEC32): Likewise.
(LINK_OS_SPEC64): Likewise.
(POWERPC_LINUX): Likewise.
(PTRDIFF_TYPE): Likewise.
(RESTORE_FP_PREFIX): Likewise.
(RESTORE_FP_SUFFIX): Likewise.
(SAVE_FP_PREFIX): Likewise.
(SAVE_FP_SUFFIX): Likewise.
(SIZE_TYPE): Likewise.
(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
(TARGET_64BIT): Likewise.
(TARGET_64BIT): Likewise.
(TARGET_AIX): Likewise.
(WCHAR_TYPE_SIZE): Likewise.
(WCHAR_TYPE): Undefine.
(TARGET_OS_CPP_BUILTINS): Add 64-bit PowerPC defines.
(CPP_OS_DEFAULT_SPEC): Use previous CPP_OS_RTEMS_SPEC.
(CPP_OS_RTEMS_SPEC): Delete.
(SUBSUBTARGET_EXTRA_SPECS): Remove cpp_os_rtems.  Add
asm_spec_common, asm_spec32, asm_spec64, link_os_spec32, and
link_os_spec64.
* config/rs6000/t-rtems: Add mcpu=e6500/m64 multilibs.

libgcc/
* config/rs6000/ibm-ldouble.c: Disable if defined __rtems__.

From-SVN: r250652

re PR tree-optimization/81578 (ICE in omp_reduction_init_op)

PR tree-optimization/81578
* tree-parloops.c (build_new_reduction): Bail out if
reduction_code isn't one of the standard OpenMP reductions.
Move the details printing after that decision.

* gcc.dg/pr81578.c: New test.

From-SVN: r250651

re PR tree-optimization/81573 (wrong code at -O3 on x86_64-linux-gnu)

2017-07-28  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81573
* gcc.dg/torture/pr81573.c: Explicitely use signed char.

From-SVN: r250650

go-backend.c (go_write_export_data): Use EXCLUDE section for AIX.

* go-backend.c (go_write_export_data): Use EXCLUDE section for
AIX.

From-SVN: r250648

Daily bump.

From-SVN: r250647

predicates.md (volatile_mem_operand): Remove code related to reload_in_progress.

* config/rs6000/predicates.md (volatile_mem_operand): Remove code
related to reload_in_progress.
(splat_input_operand): Likewise.
* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_rtx):
Delete prototype.
* config/rs6000/rs6000.c (machine_function): Remove sdmode_stack_slot
field.
(TARGET_EXPAND_TO_RTL_HOOK): Delete.
(TARGET_INSTANTIATE_DECLS): Likewise.
(legitimate_indexed_address_p): Delete reload_in_progress code.
(rs6000_debug_legitimate_address_p): Likewise.
(rs6000_eliminate_indexed_memrefs): Likewise.
(rs6000_emit_le_vsx_store): Likewise.
(rs6000_emit_move_si_sf_subreg): Likewise.
(rs6000_emit_move): Likewise.
(register_to_reg_type): Likewise.
(rs6000_pre_atomic_barrier): Likewise.
(rs6000_machopic_legitimize_pic_address): Likewise.
(rs6000_allocate_stack_temp): Likewise.
(rs6000_address_for_fpconvert): Likewise.
(rs6000_address_for_altivec): Likewise.
(rs6000_secondary_memory_needed_rtx): Delete function.
(rs6000_check_sdmode): Likewise.
(rs6000_alloc_sdmode_stack_slot): Likewise.
(rs6000_instantiate_decls): Likewise.
* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_RTX): Delete.
* config/rs6000/rs6000.md (splitter for *movsi_got_internal):
Delete reload_in_progress.
(*vec_reload_and_plus_<mptrsize>): Likewise.
* config/rs6000/vsx.md (vsx_mul_v2di): Likewise.
(vsx_div_v2di): Likewise.
(vsx_udiv_v2di): Likewise.

From-SVN: r250638

rs6000.opt (mlra): Replace with stub.

gcc/

* config/rs6000/rs6000.opt (mlra): Replace with stub.
* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Delete OPTION_MASK_LRA.
* config/rs6000/rs6000.c (TARGET_LRA_P): Delete.
(rs6000_debug_reg_global): Delete print of LRA status.
(rs6000_option_override_internal): Delete dead LRA related code.
(rs6000_lra_p): Delete function.
* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mlra.

gcc/testsuite/

* g++.dg/pr69667.C: Remove option -mlra.
* gcc.target/powerpc/dform-1.c: Likewise.
* gcc.target/powerpc/dform-2.c: Likewise.
* gcc.target/powerpc/dform-3.c: Likewise.
* gcc.target/powerpc/p8vector-int128-1.c: Likewise.
* gcc.target/powerpc/p9-vparity.c: Likewise.
* gcc.target/powerpc/pr63491.c: Likewise.
* gcc.target/powerpc/pr67808.c: Likewise.
* gcc.target/powerpc/pr68805.c: Likewise.
* gcc.target/powerpc/pr69461.c: Likewise.
* gcc.target/powerpc/pr71680.c: Likewise.
* gcc.target/powerpc/pr77289.c: Likewise.
* gcc.target/powerpc/pr78458.c: Likewise.
* gcc.target/powerpc/pr78543.c: Likewise.
* g++.dg/pr71294.C: Remove option -mno-lra.
* gcc.target/powerpc/pr71656-1.c: Likewise.
* gcc.target/powerpc/pr71656-2.c: Likewise.
* gcc.target/powerpc/pr71698.c: Likewise.

From-SVN: r250637

re PR c/45784 (gcc OpenMP - error: invalid controlling predicate)

PR c/45784
* c-omp.c (c_finish_omp_for): If the condition is wrapped in
rhs of COMPOUND_EXPR(s), skip them and readd their lhs into
new COMPOUND_EXPRs around the rhs of the comparison.

* testsuite/libgomp.c/pr45784.c: New test.
* testsuite/libgomp.c++/pr45784.C: New test.

From-SVN: r250635

Add RTEMS support

gcc/ChangeLog

2017-07-27  Sebastian Huber  <sebastian.huber@embedded-brains.de>

* config.gcc (riscv*-*-elf*): Add (riscv*-*-rtems*).
* config/riscv/rtems.h: New file.

From-SVN: r250632

[PATCH][AArch64] Fix missing optimization for CMP+AND

During combine GCC tries to merge CMP (with zero) and AND into a TST. However,
in cases where an ANDS operand is not compatible, this was being missed. Adding
a define_split where this operand was moved to a register seems to help out.

Committed on behalf of Sudi Das

---
gcc/

2017-07-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
    Sudakshina Das  <sudi.das@arm.com>

* config/aarch64/aarch64.md
(define_split for and<mode>3nr_compare): Move
non aarch64_logical_operand to a register.
(define_split for and_<SHIFT:optab><mode>3nr_compare0): Move non
register immediate operand to a register.
* config/aarch64/predicates.md (aarch64_mov_imm_operand): New.

gcc/testsuite

2017-07-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
    Sudakshina Das  <sudi.das@arm.com>

* gcc.target/aarch64/tst_imm_split_1.c: New Test.

Co-Authored-By: Sudakshina Das <sudi.das@arm.com>
From-SVN: r250631

re PR c/81417 (-Wsign-compare should print types being compared)

PR c/81417
* c-warn.c (warn_for_sign_compare): Tweak the warning message.  Print
the types.

* c-c++-common/Wsign-compare-1.c: New test.
* g++.dg/warn/Wsign-compare-2.C: Update dg-warning.
* g++.dg/warn/Wsign-compare-4.C: Likewise.
* g++.dg/warn/Wsign-compare-6.C: Likewise.
* g++.dg/warn/compare1.C: Likewise.
* gcc.dg/compare1.c: Likewise.
* gcc.dg/compare2.c: Likewise.
* gcc.dg/compare4.c: Likewise.
* gcc.dg/compare5.c: Likewise.
* gcc.dg/pr35430.c: Likewise.
* gcc.dg/pr60087.c: Likewise.

From-SVN: r250630

re PR middle-end/81564 (ICE in group_case_labels_stmt())

gcc/
PR middle-end/81564
* tree-cfg.c (group_case_labels_stmt): Handle already deleted blocks.

gcc/testsuite/
PR middle-end/81564
* gcc.dg/pr81564.c: New test.

From-SVN: r250628

re PR tree-optimization/81573 (wrong code at -O3 on x86_64-linux-gnu)

2017-07-27  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81573
PR tree-optimization/81494
* tree-vect-loop.c (vect_create_epilog_for_reduction): Handle
multi defuse cycle case.

* gcc.dg/torture/pr81573.c: New testcase.

From-SVN: r250627

re PR tree-optimization/81571 (ICE at -O3 in both 32-bit and 64-bit modes (internal compiler error: in as_a, at is-a.h:192))

2017-07-27  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81571
* tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
PHIs.

* gcc.dg/torture/pr81571.c: New testcase.

From-SVN: r250626

Validate that Init value is within range defined by IntegerRange.

2017-07-27  Martin Liska  <mliska@suse.cz>

* opt-functions.awk: Add validation of value of Init.
* optc-gen.awk: Pass new argument.

From-SVN: r250625

sparc.c (sparc_option_override): Set MASK_FSMULD flag earlier and only if MASK_FPU is set.

* config/sparc/sparc.c (sparc_option_override): Set MASK_FSMULD flag
earlier and only if MASK_FPU is set.  Adjust formatting.

From-SVN: r250623

Fix indirect call optimization done by autoFDO.

2017-07-27  Martin Liska  <mliska@suse.cz>

* auto-profile.c (autofdo_source_profile::update_inlined_ind_target):
Fix wrong condition.

From-SVN: r250622

Initialize counters in autoFDO to zero, not to uninitialized.

2017-07-27  Martin Liska  <mliska@suse.cz>

* auto-profile.c (afdo_annotate_cfg): Assign zero counts to
BBs and edges seen by autoFDO.

From-SVN: r250621

re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression])

2017-07-27  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81502
* tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR
with incompatible but same sized type.
(execute_update_addresses_taken): Likewise.

* gcc.target/i386/vect-insert-1.c: New testcase.

From-SVN: r250620

[Patch (preapproved)] Guard Copy Header pass on

While answering a user question on the equivalence of
-ftree-loop-vectorize + -ftree-slp-vectorize and -ftree-vectorize I
spotted one case which broke the equivalence. pass_ch::process_loop_p
was guarded on flag_tree_vectorize, meaning you would get it for
-ftree-vectorize, but not for -ftree-loop-vectorize/-ftree-slp-vectorize.

This patch fixes that, getting rid of the only use of flag_tree_vectorize
in the code base.

gcc/

* tree-ssa-loop-ch.c (pass_ch::process_loop_p): Guard on
flag_tree_loop_vectorize rather than flag_tree_vectorize.

From-SVN: r250619

S/390: Fix PR81534

The HI/QI atomic_fetch_<atomic><mode>" expander accepted symbolic
references and emitted CAS patterns whose insn predicates rejected them.

Fixed by allowing symbolic references there as well.  Reload will get
rid of them due to the constraint letter.

Regression tested on s390x.

gcc/ChangeLog:

2017-07-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

PR target/81534
* config/s390/s390.md ("*atomic_compare_and_swap<mode>_1")
("*atomic_compare_and_swapdi_2", "*atomic_compare_and_swapsi_3"):
Change s_operand to memory_operand.

gcc/testsuite/ChangeLog:

2017-07-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

PR target/81534
* gcc.target/s390/pr81534.c: New test.

From-SVN: r250617

[rs6000] Avoid rotates of floating-point modes

The little-endian VSX code uses rotates to swap the two 64-bit halves of
128-bit scalar modes.  This is fine for TImode and V1TImode, but it
isn't really valid to use RTL rotates on floating-point modes like
KFmode and TFmode, and doing that triggered an assert added by the
SVE series.  This patch uses bit-casts to V1TImode instead.

2017-07-27  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_permute): Declare.
* config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Replace with...
(rs6000_emit_le_vsx_permute): ...this.  Take the destination as input.
Emit instructions rather than returning an expression.  Handle TFmode
and KFmode by casting to TImode.
(rs6000_emit_le_vsx_load): Update to use rs6000_emit_le_vsx_permute.
(rs6000_emit_le_vsx_store): Likewise.
* config/rs6000/vsx.md (VSX_TI): New iterator.
(*vsx_le_permute_<mode>): Use it instead of VSX_LE_128.
(*vsx_le_undo_permute_<mode>): Likewise.
(*vsx_le_perm_load_<mode>): Use rs6000_emit_le_vsx_permute to
emit the split sequence.
(*vsx_le_perm_store_<mode>): Likewise.

From-SVN: r250615

re PR tree-optimization/81555 (Wrong code at -O1)

PR tree-optimization/81555
PR tree-optimization/81556
* tree-ssa-reassoc.c (rewrite_expr_tree): Add NEXT_CHANGED argument,
if true, force CHANGED for the recursive invocation.
(reassociate_bb): Remember original length of ops array, pass
len != orig_len as NEXT_CHANGED in rewrite_expr_tree call.

* gcc.c-torture/execute/pr81555.c: New test.
* gcc.c-torture/execute/pr81556.c: New test.

From-SVN: r250609

attribs.c (decl_attributes): Imply noinline, noclone and no_icf attributes for noipa attribute.

* attribs.c (decl_attributes): Imply noinline, noclone and no_icf
attributes for noipa attribute.  For naked attribute use
lookup_attribute first before lookup_attribute_spec.
* final.c (rest_of_handle_final): Disable IPA RA for functions with
noipa attribute.
* ipa-visibility.c (non_local_p): Fix comment typos.  Return true
for functions with noipa attribute.
(cgraph_externally_visible_p): Return true for functions with noipa
attribute.
* cgraph.c (cgraph_node::get_availability): Return AVAIL_INTERPOSABLE
for functions with noipa attribute.
* doc/extend.texi: Document noipa function attribute.
* tree-ssa-structalias.c (refered_from_nonlocal_fn): Set *nonlocal_p
also for functions with noipa attribute.
(ipa_pta_execute): Set nonlocal_p also for nodes with noipa attribute.
c-family/
* c-attribs.c (c_common_attribute_table): Add noipa attribute.
(handle_noipa_attribute): New function.
testsuite/
* gcc.dg/attr-noipa.c: New test.
* gcc.dg/ipa/ipa-pta-18.c: New test.
* gcc.dg/ipa/ipa-sra-11.c: New test.

From-SVN: r250607

Daily bump.

From-SVN: r250601

aarch64.c (thunderx_vector_cost): Decrease cost of vec_unalign_load_cost and vec_unalign_store_cost.

2017-07-26  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.c (thunderx_vector_cost): Decrease cost of
        vec_unalign_load_cost and vec_unalign_store_cost.

From-SVN: r250597

rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete -mvsx-small-integer option.

[gcc]
2017-07-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
-mvsx-small-integer option.
(ISA_3_0_MASKS_IEEE): Likewise.
(OTHER_VSX_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.opt (-mvsx-small-integer): Likewise.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Simplify
code, only testing for DImode being allowed in non-VSX floating
point registers.
(rs6000_init_hard_regno_mode_ok): Change TARGET_VSX_SMALL_INTEGER
to TARGET_P8_VECTOR test.  Remove redundant VSX test inside of
another VSX test.
(rs6000_option_override_internal): Delete -mvsx-small-integer.
(rs6000_expand_vector_set): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Delete TARGET_VSX_SMALL_INTEGER,
since TARGET_P9_VECTOR was already tested.
(rs6000_opt_masks): Remove -mvsx-small-integer.
* config/rs6000/vsx.md (vsx_extract_<mode>): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(vsx_extract_<mode>_p9): Delete TARGET_VSX_SMALL_INTEGER, since a
test for TARGET_VEXTRACTUB was used, and that uses
TARGET_P9_VECTOR.
(p9 extract splitter): Likewise.
(vsx_extract_<mode>_di_p9): Likewise.
(vsx_extract_<mode>_store_p9): Likewise.
(vsx_extract_si): Delete TARGET_VSX_SMALL_INTEGER, since a test
for TARGET_P9_VECTOR was used.  Delete code that is now dead with
the elimination of TARGET_VSX_SMALL_INTEGER.
(vsx_extract_<mode>_p8): Likewise.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Likewise.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise.
(vsx_set_<mode>_p9): Likewise.
(vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Likewise.
(vsx_insert_extract_v4sf_p9): Likewise.
(vsx_insert_extract_v4sf_p9_2): Likewise.
* config/rs6000/rs6000.md (sign extend splitter): Change
TARGET_VSX_SMALL_INTEGER to TARGET_P8_VECTOR test.
(floatsi<mode>2_lfiwax_mem): Likewise.
(floatunssi<mode>2_lfiwzx_mem): Likewise.
(float<QHI:mode><FP_ISA3:mode>2): Delete TARGET_VSX_SMALL_INTEGER,
since a test for TARGET_P9_VECTOR was used.
(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(fix_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(fix_trunc<mode>si2_stfiwx): Likewise.
(fix_trunc<mode>si2_internal): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fixuns_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(fixuns_trunc<mode>si2_stfiwx): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fctiw<u>z_<mode>_smallint): Delete TARGET_VSX_SMALL_INTEGER,
since a test for TARGET_P9_VECTOR was used.
(splitter for loading small constants): Likewise.

[gcc/testsuite]
2017-07-25  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/vsx-himode.c: Delete -mvsx-small-integer
option.
* gcc.target/powerpc/vsx-himode2.c: Likewise.
* gcc.target/powerpc/vsx-himode3.c: Likewise.
* gcc.target/powerpc/vsx-qimode.c: Likewise.
* gcc.target/powerpc/vsx-qimode2.c: Likewise.
* gcc.target/powerpc/vsx-qimode3.c: Likewise.
* gcc.target/powerpc/vsx-simode.c: Likewise.
* gcc.target/powerpc/vsx-simode2.c: Likewise.
* gcc.target/powerpc/vsx-simode3.c: Likewise.

From-SVN: r250595

PR libstdc++/53984 fix failing test

PR libstdc++/53984
* testsuite/27_io/basic_fstream/53984.cc: Fix test.

From-SVN: r250594

re PR go/81548 ("make distclean" does not clean all of gotools/)

PR go/81548
* Makefile.am (MOSTLYCLEANFILES): Add *.sent.
* Makefile.in: Rebuild.

From-SVN: r250593

aarch64.c (thunderx_vector_cost): Fix vec_fp_stmt_cost.

2017-07-26  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.c (thunderx_vector_cost): Fix
        vec_fp_stmt_cost.

From-SVN: r250592

re PR c++/71570 (ICE on invalid variable capture in cxx_incomplete_type_diagnostic, at cp/typeck2.c:55)

/cp
2017-07-26  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/71570
* lambda.c (add_capture): Early return if we cannot capture by
reference.

/testsuite
2017-07-26  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/71570
* g++.dg/cpp0x/lambda/lambda-ice17.C: New.

From-SVN: r250591

configure.ac: Check for XCOFF32/XCOFF64.

* configure.ac: Check for XCOFF32/XCOFF64.  Check for loadquery.
* filetype.awk: Separate AIX XCOFF32 and XCOFF64.
* xcoff.c: Add support for AIX XCOFF32 and XCOFF64 formats.
* configure, config.h.in: Regenerate.

From-SVN: r250590

runtime: handle Alpha GNU/Linux in getSiginfo

    Patch by Uros Bizjak.

    Reviewed-on: https://go-review.googlesource.com/51370

From-SVN: r250588

x86: Properly check saved register CFA offset

X86 prologue saves register at CFA offset.  Since its location on stack
is computed as CFA - its CFA_OFFSET, CFA_OFFSET points the end of the
saved register area on stack.  This patch updates sp_valid_at and
fp_valid_at to properly check saved register CFA offset.

gcc/

PR target/81563
* config/i386/i386.c (sp_valid_at): Properly check CFA offset.
(fp_valid_at): Likewise.

gcc/testsuite/

PR target/81563
* gcc.target/i386/pr81563.c: New test

From-SVN: r250587

[Patch AArch64 obvious] Unify address costs to generic_addrcost_table

The special case address cost tables for Cortex-A57 and qdf24xx are no
different from the generic address cost table. We should just use the
address cost table directly. If this changes in future, a core is welcome
to add new address cost tables.

gcc/

* config/aarch64/aarch64.c (cortexa57_addrcost_table): Remove.
(qdf24xx_addrcost_table): Likewise.
(cortexa57_tunings): Update to use generic_branch_cost.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.
(qdf24xx_tunings): Likewise.

From-SVN: r250585

P0702R1 - List deduction of vector.

* pt.c (do_class_deduction): Special-case deduction from a single
element of related type.

From-SVN: r250584

PR c++/67054 - Inherited ctor with non-default-constructible members

        PR c++/67054 - Inherited ctor with non-default-constructible members
        * method.c (walk_field_subobs) Consider member initializers (NSDMIs)
when deducing an inheriting constructor.

From-SVN: r250583

[Patch AArch64 Obvious] Unify branch costs to generic_branch_cost

All the cores in AArch64 use the pair {1, 3} for their branch costs. As
that is covered by generic_branch_cost, we can just use that directly and
save the tiny amount of redundant code. If in future any core wants to
modify this, they can always add a special-case branch-cost back.

gcc/

* config/aarch64/aarch64.c (cortexa57_branch_cost): Remove.
(thunderx2t99_branch_cost): Likewise.
(cortexa35_tunings): Update to use generic_branch_cost.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.
(thunderx2t99_tunings): Likewise.

From-SVN: r250582

53984.cc: Fix typo in dg-require directive.

2017-07-26  Paolo Carlini  <paolo.carlini@oracle.com>

* testsuite/27_io/basic_fstream/53984.cc: Fix typo in dg-require
directive.

From-SVN: r250575

[SPARC] Add -mfsmuld option

Add the -mfsmuld option to control the generation of the FsMULd
instruction.  In general, this instruction is available in architecture
version V8 and V9 CPUs with FPU.  Some CPUs of this category do not
support this instruction properly, e.g. AT697E, AT697F and UT699.  Some
CPUs of this category do not implement it in hardware, e.g. LEON3/4 with
GRFPU-lite.

gcc/
* config/sparc/sparc.c (dump_target_flag_bits): Dump MASK_FSMULD.
(sparc_option_override): Honour MASK_FSMULD.
* config/sparc/sparc.h (MASK_FEATURES): Add MASK_FSMULD.
* config/sparc/sparc.md (muldf3_extend): Use TARGET_FSMULD.
* config/sparc/sparc.opt (mfsmuld): New option.
* doc/invoke.texi (mfsmuld): Document option.

From-SVN: r250570

Disable pr79041-2.c with -mabi=ilp32.

    gcc/testsuite/
PR target/79041
* gcc.target/aarch64/pr79041-2.c: Don't run in ILP32.

From-SVN: r250567

re PR middle-end/70992 (Infinite recursion between fold_build2_stat_loc and fold_binary_loc w/ -fwrapv)

PR middle-end/70992
* tree.c (build2_stat): Don't set TREE_CONSTANT on divisions by zero.

* gcc.dg/overflow-warn-1.c: Adjust dg-error.
* gcc.dg/overflow-warn-2.c: Likewise.
* gcc.dg/overflow-warn-3.c: Likewise.
* gcc.dg/overflow-warn-4.c: Likewise.
* gcc.dg/torture/pr70992-2.c: New test.
* gcc.dg/torture/pr70992.c: New test.

From-SVN: r250566

gimple-match-head.c (do_valueize): Return OP if valueize returns NULL_TREE.

2017-07-26  Richard Biener  <rguenther@suse.de>

* gimple-match-head.c (do_valueize): Return OP if valueize
returns NULL_TREE.
(get_def): New helper to get at the def stmt of a SSA name
if valueize allows.
* genmatch.c (dt_node::gen_kids_1): Use get_def instead of
do_valueize to get at the def stmt.
(dt_operand::gen_gimple_expr): Simplify do_valueize calls.

* gcc/testsuite/gcc.dg/pr70920-2.c: Adjust for transform already
happening in ccp1.
* gcc/testsuite/gcc.dg/pr70920-4.c: Likewise.

From-SVN: r250565

Fix PR46932: Block auto increment on frame pointer

Block auto increment on frame pointer references.  This is never
beneficial since the SFP expands into SP+C or FP+C during register
allocation.  The generated code for the testcase is now as expected:

str x30, [sp, -32]!
strb w0, [sp, 31]
add x0, sp, 31
bl foo3
ldr x30, [sp], 32
ret

    gcc/
PR middle-end/46932
* auto-inc-dec.c (parse_add_or_inc): Block autoinc on sfp.

    gcc/testsuite/
PR middle-end/46932
* gcc.dg/pr46932.c: New testcase.

From-SVN: r250564

Move non-local goto expansion after parm_birth_insn (PR sanitize/81186).

2017-07-26  Martin Liska  <mliska@suse.cz>

PR sanitize/81186
* function.c (expand_function_start): Make expansion of
nonlocal_goto_save_area after parm_birth_insn.
2017-07-26  Martin Liska  <mliska@suse.cz>

PR sanitize/81186
* gcc.dg/asan/pr81186.c: New test.

From-SVN: r250561

[SPARC] Drop superfluous MASK_FPU enable

All TARGET_DEFAULT defines set MASK_FPU.  There is no need to set it in
some CPU target flags enable.

gcc/
* config/sparc/sparc.c (sparc_option_override): Remove MASK_FPU
from all CPU target flags enable members.

From-SVN: r250557

genmatch.c (dt_simplify::gen): Make iterator vars const.

2017-07-25  Richard Biener  <rguenther@suse.de>

* genmatch.c (dt_simplify::gen): Make iterator vars const.
(decision_tree::gen): Make 'type' const.
(write_predicate): Likewise.

From-SVN: r250556

rs6000.c (rs6000_init_hard_regno_mode_ok): Eliminate TARGET_UPPER_REGS_{DF,DI,SF} usage.

2017-07-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok):
Eliminate TARGET_UPPER_REGS_{DF,DI,SF} usage.
(rs6000_option_override_internal): Likewise.
(rs6000_expand_vector_set): Likewise.
* config/rs6000/rs6000.h (TARGET_UPPER_REGS_DF): Delete.
(TARGET_UPPER_REGS_SF): Likewise.
(TARGET_UPPER_REGS_DI): Likewise.
(TARGET_VEXTRACTUB): Eliminate TARGET_UPPER_REGS_{DF,DI,SF}.
(TARGET_DIRECT_MOVE_64BIT): Likewise.
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Likewise.
(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(Splitters for DI constants in Altivec registers): Likewise.
* config/rs6000/vsx.md (vsx_set_<mode>_p9): Likewise.
(vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Likewise.
(vsx_insert_extract_v4sf_p9): Likewise.
(vsx_insert_extract_v4sf_p9_2): Likewise.

From-SVN: r250555

Daily bump.

From-SVN: r250554

extend.texi: Update the built-in documentation file for the existing built-in functions...

gcc/ChangeLog:

2017-07-25  Carl Love  <cel@us.ibm.com>

* doc/extend.texi: Update the built-in documentation file for the
existing built-in functions
vector signed char vec_cnttz (vector signed char);
vector unsigned char vec_cnttz (vector unsigned char);
vector signed short vec_cnttz (vector signed short);
vector unsigned short vec_cnttz (vector unsigned short);
vector signed int vec_cnttz (vector signed int);
vector unsigned int vec_cnttz (vector unsigned int);
vector signed long long vec_cnttz (vector signed long long);
vector unsigned long long vec_cnttz (vector unsigned long long);

gcc/testsuite/ChangeLog:

2017-07-25  Carl Love  <cel@us.ibm.com>

* gcc.target/powerpc/builtins-4-p9-runnable.c:  Add test file for
vec_cnttz builtins.

From-SVN: r250549

compiler: clean up unresolved placeholders for pointer types

    Add a new helper routine Type::finish_pointer_types that walks through
    the pointer type cache and looks for placeholder types that may have
    been created at some point before conversion of named types, and
    invokes Type::finish_backend() on said placeholders.  This is needed
    to handle cases where the compiler manufactures a pointer type as part
    of lowering, then a placeholder is created for it due to a call to
    Type::backend_type_size(), but there is no explicit reference to the
    type in user code.

    Reviewed-on: https://go-review.googlesource.com/51131

From-SVN: r250548

PR libstdc++/53984 handle exceptions in basic_istream::sentry

PR libstdc++/53984
* include/bits/basic_ios.h (basic_ios::_M_setstate): Adjust comment.
* include/bits/istream.tcc (basic_istream::sentry): Handle exceptions
during construction.
* include/std/istream: Adjust comments for formatted input functions
and unformatted input functions.
* testsuite/27_io/basic_fstream/53984.cc: New.
* testsuite/27_io/basic_istream/sentry/char/53984.cc: New.

From-SVN: r250545

Remove deprecated iostream members for C++17

* include/bits/ios_base.h (ios_base::io_state, ios_base::open_mode)
(ios_base::seek_dir): Remove for C++17.
* include/std/streambuf (basic_streambuf::stossc): Remove for C++17.
Add deprecated attribute for C++11 and C++14.
* testsuite/27_io/types/1.cc: Don't run for C++17 and later.
* testsuite/27_io/types/4.cc: New.

From-SVN: r250531

tree-ssa-uninit.c (warn_uninitialized_vars): Don't warn about memory accesses where the use is for the first operand of a...

2017-07-25  Andrew Pinski  <apinski@cavium.com>

        * tree-ssa-uninit.c (warn_uninitialized_vars): Don't warn about memory
        accesses where the use is for the first operand of a BIT_INSERT.

From-SVN: r250530

Fix i686-pc-cygwin build failure.

gcc/
PR bootstrap/81521
* config/i386/winnt-cxx.c (i386_pe_adjust_class_at_definition): Look
for FUNCTION_DECLs in TYPE_FIELDS rather than TYPE_METHODS.

From-SVN: r250529

Delete files unused since openbsd 2 & 3 support was dropped.

gcc/
* config/i386/gstabs.h: Delete.
* config/i386/openbsd.h, config/i386/t-openbsd: Likewise.

From-SVN: r250527

i386.c (ix86_decompose_address): Do not check for register RTX when looking at index_reg or base_reg.

* config/i386/i386.c (ix86_decompose_address): Do not check for
register RTX when looking at index_reg or base_reg.
* config/i386/i386.h (INCOMING_RETURN_ADDR_RTX): Use stack_pointer_rtx.

From-SVN: r250526

gimple.c (gimple_assign_set_rhs_with_ops): Do not ask gsi_replace to update EH info here.

* gimple.c (gimple_assign_set_rhs_with_ops): Do not ask gsi_replace
to update EH info here.
ada/
* checks.adb (Apply_Divide_Checks): Ensure that operands are not
evaluated twice.

From-SVN: r250525

match.pd: combine successive multiplications by constants

* match.pd ((X * CST1) * CST2): Simplify to X * (CST1 * CST2).
testsuite:
* gcc.dg/tree-ssa/assoc-2.c: Enhance.
* gcc.dg/tree-ssa/slsr-4.c: Adjust.

From-SVN: r250524

match.pd: reassociate multiplications

* match.pd ((X * CST) * Y): Reassociate to (X * Y) * CST.
testsuite/
* gcc.dg/tree-ssa/assoc-2.c: New testcase.

From-SVN: r250523

c-attribs.c (c_common_attribute_table): Add entry for "patchable_function_entry".

2017-07-07  Torsten Duwe  <duwe@suse.de>

        c-family/
* c-attribs.c (c_common_attribute_table): Add entry for
"patchable_function_entry".

        lto/
* lto-lang.c (lto_attribute_table): Add entry for
"patchable_function_entry".

* common.opt: Introduce -fpatchable-function-entry
command line option, and its variables function_entry_patch_area_size
and function_entry_patch_area_start.
* opts.c (common_handle_option): Add -fpatchable_function_entry_ case,
including a two-value parser.
* target.def (print_patchable_function_entry): New target hook.
* targhooks.h (default_print_patchable_function_entry): New function.
* targhooks.c (default_print_patchable_function_entry): Likewise.
* toplev.c (process_options): Switch off IPA-RA if
patchable function entries are being generated.
* varasm.c (assemble_start_function): Look at the
patchable-function-entry command line switch and current
function attributes and maybe generate NOP instructions by
calling the print_patchable_function_entry hook.
* doc/extend.texi: Document patchable_function_entry attribute.
* doc/invoke.texi: Document -fpatchable_function_entry
command line option.
* doc/tm.texi.in (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY):
New target hook.
* doc/tm.texi: Re-generate.

* c-c++-common/patchable_function_entry-default.c: New test.
* c-c++-common/patchable_function_entry-decl.c: Likewise.
* c-c++-common/patchable_function_entry-definition.c: Likewise.

From-SVN: r250521

re PR target/81532 (insn does not satisfy its constraints: extract_constrain_insn, at recog.c:2213)

PR target/81532
* config/i386/constraints.md (Yd, Ye): Use ALL_SSE_REGS for
TARGET_AVX512DQ rather than TARGET_AVX512BW.

* gcc.target/i386/pr80833-3.c: New test.
* gcc.target/i386/avx512dq-pr81532.c: New test.
* gcc.target/i386/avx512bw-pr81532.c: New test.

From-SVN: r250520

parsecpu.awk (all_cores): Remove duplicates.

2017-07-25  Tamar Christina  <tamar.christina@arm.com>

* config/arm/parsecpu.awk (all_cores): Remove duplicates.

From-SVN: r250519

re PR tree-optimization/81455 (Compile-time hog w/ -O1 -funswitch-loops)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81455
* tree-ssa-loop-unswitch.c (find_loop_guard): Make sure to
not walk in cycles when looking for guards.

* gcc.dg/pr81455.c: New testcase.

From-SVN: r250518

re PR tree-optimization/81529 (ICE in vectorizable_induction, at tree-vect-loop.c:6613)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81529
* tree-vect-stmts.c (process_use): Disregard live induction PHIs
when optimizing backedge uses.

* gfortran.dg/pr81529.f90: New testcase.

From-SVN: r250517

dwarf2asm.c (dw2_asm_output_nstring): Encode double quote character for AIX.

        * dwarf2asm.c (dw2_asm_output_nstring): Encode double quote
        character for AIX.
        * dwarf2out.c (output_macinfo): Copy debug_line_section_label
        to dl_section_ref.  On AIX, append an expression to subtract
        the size of the section length to dl_section_ref.

From-SVN: r250516

* c-decl.c (grokfield): Remove local variable.

From-SVN: r250513

re PR target/79041 (aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used)

Fix PR79041

Add missing scan assembler to testcase.

    gcc/testsuite/
* gcc.target/aarch64/pr79041-2.c: Improve test.

From-SVN: r250512

* ioparm.def: Use 1U << 31 instead of 1 << 31 as flags2 mask.

From-SVN: r250510

Do not silently continue if config.{build,host,gcc} fails

If config.{build,host,gcc} fails, configure currently silently
continues.  This then makes it much harder than necessary to notice
you made a stupid pasto in config.gcc (and where exactly).

* configure.ac: If any of the config.* scripts fail, exit 1.
* configure: Regenerate.

From-SVN: r250507

re PR tree-optimization/81410 (-O3 breaks code)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81410
* gcc.dg/vect/pr81410.c: Do not typedef uint64_t.

From-SVN: r250506

re PR tree-optimization/81546 (ICE at -O3 during GIMPLE pass dom)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR middle-end/81546
* tree-ssa-operands.c (verify_imm_links): Remove cap on number
of immediate uses, be more verbose on errors.

From-SVN: r250505

re PR tree-optimization/81510 (ice in operator[],  at vec.h:749)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81510
* tree-vect-loop.c (vect_is_simple_reduction): When the
reduction stmt is not inside the loop bail out.

* gcc.dg/torture/pr81510.c: New testcase.
* gcc.dg/torture/pr81510-2.c: Likewise.

From-SVN: r250504

re PR tree-optimization/81303 (410.bwaves regression caused by r249919)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81303
* tree-vect-loop-manip.c (vect_loop_versioning): Build
profitability check against LOOP_VINFO_NITERSM1.

From-SVN: r250503

domwalk: optimize basic block sorting

* domwalk.c (cmp_bb_postorder): Simplify.
(sort_bbs_postorder): New function.  Use it...
(dom_walker::walk): ...here to optimize common cases.

From-SVN: r250502

Fix wrong condition in ipa-visibility.c (PR ipa/81520).

2017-07-25  Martin Liska  <mliska@suse.cz>

PR ipa/81520
* ipa-visibility.c (function_and_variable_visibility): Make the redirection
just on target that do supporting aliasing.  Fix GNU coding style.
2017-07-25  Martin Liska  <mliska@suse.cz>

PR ipa/81520
* gcc.dg/ipa/pr81520.c: New test.

From-SVN: r250501

[RTEMS] Add GCC Runtime Library Exception

gcc/

PR libgcc/61152
* config/aarch64/rtems.h: Add GCC Runtime Library Exception.
Format changes.
* config/arm/rtems.h: Likewise.
* config/bfin/rtems.h: Likewise.
* config/i386/rtemself.h: Likewise.
* config/lm32/rtems.h: Likewise.
* config/m32c/rtems.h: Likewise.
* config/m68k/rtemself.h: Likewise.
* config/microblaze/rtems.h: Likewise.
* config/mips/rtems.h: Likewise.
* config/moxie/rtems.h: Likewise.
* config/nios2/rtems.h: Likewise.
* config/powerpcspe/rtems.h: Likewise.
* config/rs6000/rtems.h: Likewise.
* config/rtems.h: Likewise.
* config/sh/rtems.h: Likewise.
* config/sh/rtemself.h: Likewise.
* config/sparc/rtemself.h: Likewise.

From-SVN: r250500

re PR lto/81487 ([mingw32] ld.exe: error: asprintf failed)

gcc/
PR 81487
* hsa-brig.c (brig_init): Use xasprintf instead of asprintf.
* gimple-pretty-print.c (dump_profile, dump_probability): Same.
* tree-ssa-structalias.c (alias_get_name): Same.

From-SVN: r250499

re PR c/81364 (Bogus -Wmultistatement-macros warning)

PR c/81364
* c-parser.c (c_parser_else_body): Don't warn about multistatement
macro expansion if the body is in { }.
(c_parser_while_statement): Likewise.
(c_parser_for_statement): Likewise.

* Wmultistatement-macros-12.c: New test.

From-SVN: r250498

re PR target/81414 (ICE in fma steering on AArch64/cortex-a57)

PR target/81414
* config/aarch64/cortex-a57-fma-steering.c (analyze): Skip fmul/fmac
instructions if no du chain is found.

gcc/testsuite
* gcc.target/aarch64/pr81414.C: New.

From-SVN: r250496

* config/avr/avr-log.c (avr_log_vadump) ['T']: Print NULL-TREE.

From-SVN: r250495

re PR sanitizer/81505 (ICE in tree-ssa-loop-manip.c:95 with -fsanitize=signed-integer-overflow)

2017-07-25  Richard Biener  <rguenther@suse.de>

PR middle-end/81505
* fold-const.c (fold_negate_const): TREE_OVERFLOW should be
sticky.

* gcc.dg/ubsan/pr81505.c: New testcase.

From-SVN: r250494

Daily bump.

From-SVN: r250493

PR testsuite/80759 Fix broken tests in ms-sysv.exp

2017-07-24  Daniel Santos  <daniel.santos@pobox.com>

PR testsuite/80759
* gcc.target/x86_64/abi/ms-sysv/do-test.S
(ELFFN_BEGIN): Rename to FN_TYPE.
(ELFFN_END): Rename to FN_SIZE.
(ASMNAME): New macro.
(FUNC): Rename to FUNC_BEGIN, use ASMNAME and use .globl instead of
.global.
(FUNC_END): Use ASMNAME.
(test_data_save): Remove.
(test_data_input): Likewise.
(test_data_output: Likewise.
(test_data_fn): Likewise.
(test_data_retaddr): Likewise.
(regs_to_mem): Make globals, use r10 instead of rax.
(mem_to_regs): Likewise.
(do_test_unaligned): Remove .cfi directives, remove pushf/popf, move
body to ms-sysv.c.
(do_test_aligned): Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.c:
Add dg-* directives.
(PASTE_STR): New macro.
(ASMNAME): Likewise.
(LOAD_TEST_DATA_ADDR): Likewise.
(TEST_DATA_OFFSET): Likewise.
(do_test_body0): New C function.
(do_test_body): New inline assembly routine.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp
(runtest_ms_sysv): Modify.

From-SVN: r250489

PR testsuite/80759 Fix -mcall-ms2sysv-xlogues on Darwin and Solaris

2017-07-24  Daniel Santos  <daniel.santos@pobox.com>

PR testsuite/80759
* config.host: include i386/t-msabi for darwin and solaris.
* config/i386/i386-asm.h
(ELFFN): Rename to FN_TYPE.
(FN_SIZE): New macro.
(FN_HIDDEN): Likewise.
(ASMNAME): Likewise.
(FUNC_START): Rename to FUNC_BEGIN, use ASMNAME, replace .global with
.globl.
(HIDDEN_FUNC): Use ASMNAME and .globl instead of .global.
(SSE_SAVE): Convert to cpp macro, hard-code offset (always 0x60).
* config/i386/resms64.S: Use SSE_SAVE as cpp macro instead of gas
.macro.
* config/i386/resms64f.S: Likewise.
* config/i386/resms64fx.S: Likewise.
* config/i386/resms64x.S: Likewise.
* config/i386/savms64.S: Likewise.
* config/i386/savms64f.S: Likewise.

From-SVN: r250488

rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Delete upper-regs options.

[gcc]
2017-07-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Delete
upper-regs options.
(ISA_2_7_MASKS_SERVER): Likewise.
(ISA_3_0_MASKS_IEEE): Likewise.
(OTHER_P8_VECTOR_MASKS): Likewise.
(OTHER_VSX_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
(power7 cpu): Use ISA_2_6_MASKS_SERVER instead of using a
duplicate list of options.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Remove
explicit -mupper-regs options.
* config/rs6000/rs6000.opt (-mvsx-scalar-memory): Delete
-mupper-regs* options.  Delete -mvsx-scalar-memory, which was an
alias for -mupper-regs-df.
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Likewise.
(rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_option_override_internal): Likewise.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_UPPER_REGS_DF): Define upper regs
options in terms of whether -mvsx or -mpower8-vector was used.
(TARGET_UPPER_REGS_DI): Likewise.
(TARGET_UPPER_REGS_SF): Likewise.
* doc/invoke.texi (RS/6000 and PowerPC Options): Delete the
-mupper-regs-* options.

[gcc/testsuite]
2017-07-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/pr65849-1.c: Delete, test no longer valid
since the upper-regs options have been deleted.
* gcc.target/powerpc/pr65849-2.c: Likewise.
* gcc.target/powerpc/pr80099-1.c: Likewise.
* gcc.target/powerpc/pr80099-2.c: Likewise.
* gcc.target/powerpc/pr80099-3.c: Likewise.
* gcc.target/powerpc/pr80099-4.c: Likewise.
* gcc.target/powerpc/pr80099-5.c: Likewise.
* gcc.target/powerpc/builtins-2-p9-runnable.c: Update test to
support removal of the upper-regs options.
* gcc.target/powerpc/p8vector-fp.c: Likewise.
* gcc.target/powerpc/p8vector-ldst.c: Likewise.
* gcc.target/powerpc/p9-dimode1.c: Likewise.
* gcc.target/powerpc/p9-dimode2.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-1.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-10.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-5.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-9.c: Likewise.
* gcc.target/powerpc/ppc-round.c: Likewise.
* gcc.target/powerpc/pr71720.c: Likewise.
* gcc.target/powerpc/pr72853.c: Likewise.
* gcc.target/powerpc/pr79907.c: Likewise.
* gcc.target/powerpc/pr78953.c: Likewise.
* gcc.target/powerpc/upper-regs-df.c: Likewise.
* gcc.target/powerpc/upper-regs-sf.c: Likewise.
* gcc.target/powerpc/vec-extract-1.c: Likewise.
* gcc.target/powerpc/vec-init-3.c: Likewise.
* gcc.target/powerpc/vec-init-6.c: Likewise.
* gcc.target/powerpc/vec-init-7.c: Likewise.
* gcc.target/powerpc/vec-set-char.c: Likewise.
* gcc.target/powerpc/vec-set-int.c: Likewise.
* gcc.target/powerpc/vec-set-short.c: Likewise.

From-SVN: r250482

passes: Print a header in emergency_dump_function

Currently the emergency dump has no separation whatsoever from any
previous output in the dump file, making it harder than necessary
to find.

* passes.c (emergency_dump_function): Print some empty lines and a
header before the RTL dump.

From-SVN: r250481

cfgrtl: Don't crash in rtl_dump_bb if BB_END(bb) is NULL

Currently rtl_dump_bb crashes if BB_END(bb) is NULL, like it can be
during expand (rtl_dump_bb can be called at any time, by the emergency
dump added recently for example).

This fixes it.

* cfgrtl.c (rtl_dump_bb): Don't call NEXT_INSN on NULL.

From-SVN: r250480