zink: return old fence from zink_flush

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: reference renderpass and framebuffer from cmdbuf

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: cache those pipelines

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: move renderpass inside gfx pipeline state

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: cache programs

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: pass zink_render_pass to pipeline-creation

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: prepare for multiple cmdbufs

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: move cmdbuf-resetting into a helper

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: do not leak image-views

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: move render-pass begin to helper

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: prepare for caching of renderpases/framebuffers

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: implement loops

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: implement discard

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: implement if-statements

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: prepare for control-flow

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: handle reading registers

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: implement some integer ops

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: store all values as uint.

This adds bitcasting to uint everywhere for now,
and stores all spir-v ssa values as uints.

It also casts bool to 0/0xffffffff for now
(nir 1-bit bools may be coming in the future).

This fixes a lot of piglit tests to pass now

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: remove discard_if

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: query support (v2)

This at least passes piglit occlusion_query test for me here now.

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: transform z-range

In vulkan, the Z-range of clip-space goes from 0..W instead of -W..+W
as is the case in OpenGL. So we need to transform the Z-range to
account for this.

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: add dri loader

export MESA_LOADER_DRIVER_OVERRIDE=zink should now work without using
swrast paths

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink/spirv: implement point-sprites

This passes glsl-fs-pointcoord_gles2 from piglit.

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: ask for flatshade lowering

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: detect presence of VK_KHR_maintenance1

Acked-by: Jordan Justen <jordan.l.justen@intel.com>

zink: introduce opengl over vulkan

Here's zink, a so far pretty simple vulkan-gallium driver that is able
to translate some applications from OpenGL to Vulkan.

The compiler is quite limited for now, this will be improved on later.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>

radv: fix OpQuantizeToF16 for NaN on GFX6-7

Do not flush NaN to 0.

Fixes
dEQP-VK.spirv_assembly.instruction.compute.opquantize.propagated_nans

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: enable fast depth/stencil clears with separate aspects on GFX8

It's similar to GFX9+. Shadow of Mordor (Vulkan beta) hits that
path and it works fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

iris: Mark aux-map BO as used by all batches

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

iris/gen12: Write GFX_AUX_TABLE base address register

Rework:
 * Move last_aux_map_state to iris_batch. (Nanley, Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

iris: Map each surf to it's aux-surf in the aux-map tables

Rework: Nanley Chery
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

isl/gen12: 64k surface alignment

Reworks:
 * Update size for aux map change (Nanley)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

iris/bufmgr: Initialize aux map context for gen12

Reworks:
 * free gen_buffer in gen_aux_map_buffer_free. (Rafael)
 * lock around aux_map_bos accesses. (Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv: Add aux-map translation for gen12+

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

anv/gen12: Write GFX_AUX_TABLE base address register

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

genxml/gen12: Add AUX MAP register definitions

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv/gen12: Initialize aux map context

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/common: Add surface to aux map translation table support

Reworks:
 * Add ISL_FORMAT_B8G8R8X8_UNORM_SRGB to get_format_encoding (Nanley)
 * ralloc_free aux_map_buffer entries in gen_aux_map_finish. (Rafael)
 * verify_aligned_space => align_and_verify_space (Rafael)
 * Add mutex to aux-map code. (Rafael, Nanley)
 * Add gen_aux_map_fill_bos (Ken)
 * Make gen_aux_map_get_state_num lockless

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv: Implement aux-map allocator interface

This interface allows the aux-map code in the intel/common library to
allocate and free buffers.

Reworks:
 * free gen_buffer in gen_aux_map_buffer_free. (Rafael)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/common: Add interface to allocate device buffers

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/dev: store whether the device uses an aux map tables on devinfo

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: setup sized internalformat for MESA_FORMAT_R10G10B10A2_UNORM

Commit d2b60e433e5 introduced restrictions (as per GLES spec) on the
internal format. We need to setup a sized format for the texture image
so framebuffers created with that are considered complete.

This change fixes following Android CTS test in AHardwareBufferNativeTests
category:

   SingleLayer_ColorTest_GpuColorOutputAndSampledImage_R10G10B10A2_UNORM

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Fixes: d2b60e433e5 ("mesa/main: R10G10B10_(A2) formats are not color renderable in ES")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

tu: fix empty-body instruction

Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

v3d: fix empty-body instruction

Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

radv: fix empty-body instruction

Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: fix empty-body instruction

Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

freedreno/a2xx: use sysval for pointcoord

Fixes a problem with shaders using gl_PointCoord.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reported-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>

pan/midgard: Disable precise occlusion queries

I thought there was hardware support for this, but it seems to broken,
or at least more complex than I believed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: allocate bo for occlusion query results

This memory needs to still be available after all the drawing is done
and forgotten about, so cannot be transient.
Also clear the result so that no rendering returns a zero.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Expose serialized NIR support

Serialized NIR is required for clover with the SPIR-V pipeline. With
this change and PAN_MESA_DEBUG=deqp, clinfo is able to successfully
probe panfrost.

Code from Nouveau (commit 7955fabcf89c7265f7f4244e46c5bcb83b9687fa by
Karol Herbst).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pipe-loader: Default to kmsro if probe fails

A device supported by kmsro will not automatically probe kmsro since the
driver name will be panfrost/lima/v3d/..., not "kmsro". Since kmsro is a
bit of a catch-all for generic (mostly embedded) GPUs, add a fallback on
kmsro for the dynamic loader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>

pipe-loader: Add kmsro pipe_loader target

kmsro is used by numerous embedded GPUs for a common winsys abstraction.
Let's add support for it for the dynamic pipe loader, so clover can
probe on these drivers.

We build the target with Panfrost. When other drivers need kmsro+clover,
we can revisit the build system part; my mesonfu is wanting.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>

scons: Fix force_scons parsing.

- Use parsed options instead of using ARGUMENTS directly.
- Handle the case of mingw cross compilation.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2003

radv: enable secure compile support

Can be enabled via the environment variable which tells the
driver how many compilation threads are expected to be called,
and therefore how many forked processes the driver should
create.

For example we would expect to call fossilize replay with
something like this:

RADV_SECURE_COMPILE_THREADS=8 ./fossilize-replay --num-threads 8 \
--shader-cache-size 0 --ignore-derived-pipelines pipeline_cache.foz

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: a support for a secure compile fork at device creation

This added support for the fork, the installation of the seccomp
filter, and the main loop for the actual compilation to be called
from i.e. run_secure_compile_device().

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_secure_compile()

This function will be called by the parent process when doing a
secure compile. It first selects a free process to work with then
passes it all the information it needs to compile the pipeline.

Once the pipeline information has been passed to the secure
process, it then waits around to read/write any disk cache entries
required before exiting.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: for secure compile exit early from radv_shader_variant_create()

We don't have permission to be creating shared memory etc.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: allow the secure process to read and write from disk cache

This allows the secure process to read and write to the disk cache
via the parent process. This commit just adds the functionality
needed for the secure process, the following commit will add the
functionality for the parent process.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_device_use_secure_compile() helper

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add some new members to radv device and instance for secure compile

These will be used by the following commits to hold information about
the forked secure compile processes.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_secure_compile_type enum

This will be used to identify information being passed between the
parent and secure process during a secure compile.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_create_shaders() to radv_shader.h

In a follwing commit we want to be able to call this for secure
compiles from radv_device.c

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add debug option to turn off in memory cache

This can be usefull for debugging the on disk cache, but is also
useful in the following patch for secure compiles which will be
used to compile huge pipeline collections. These pipeline
collections can be multiple GBs and the in memory cache grows to
multiple GBs very quickly when they are compiled so we want to
be able to turn off the in memory cache.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: get topology from pipeline key rather than VkGraphicsPipelineCreateInfo

This is cleaner and avoids having to read/write an additional copy of
topology for use with secure compile.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

docs: document new feature EGL_EXT_image_flush_external

egl: implement new functions from EGL_EXT_image_flush_external

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>

egl: handle EGL_IMAGE_EXTERNAL_FLUSH_EXT

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>

st/dri: add support for EGL_EXT_image_flush_external

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>

st/dri: assume external consumers of back buffers can write to the buffers

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>

dri_interface: add interface for EGL_EXT_image_flush_external

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>

include: add the definition of EGL_EXT_image_flush_external

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>

gitlab-ci: Add a job for meson on windows

This adds a new CI job that runs on windows with MSVC. It currently
builds softpipe and osmesa, and runs the related unit tests. It does
rely on meson's wraps for zlib, but I've set up caching of the wrap
dependencies so hopefully that wont be a problem.

I really wanted to user powershell for this, but there just isn't an
easy way to do that, it's much easier to use batch scripts, so thats
what I used.

The leading `/` for .gitlab-ci/lava... must be removed because windows
doesn't understand it, and when it reads the file the job ends in error.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>

gitlab-ci: refactor out some common stuff for Windows and Linux

Reviewed-by: Eric Engestrom <eric@engestrom.ch>

nir: Fix invalid code for MSVC

Fixes: ee2050b1111b65594f3470035f7b6f1330824684
       ("nir: Use BITSET for tracking varyings in lower_io_arrays")

docs: update releasing process to use new scripts and gitlab

There were several out of date entries in this document, update them to
current practices.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/gen_release_notes.py: Add a warning if new features are introduced in a point release

Fixes: 86079447da1e00d49db0cbff9a102eb4e71e8702
       ("scripts: Add a gen_release_notes.py script")
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/gen_release_notes.py: html escape all external data

All of these (bug titles, patch titles, features, and people's names)
can contain characters that are not valid html. Just escape everything
for safety.

Fixes: 86079447da1e00d49db0cbff9a102eb4e71e8702
       ("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/post_release.py: Add .html to hrefs

oops.

Fixes: 3226b12a09bbcbd25526fd6da6257057d26ddb31
       ("release: Add an update_release_calendar.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/post_version.py: white space fixes

Fixes: 3226b12a09bbcbd25526fd6da6257057d26ddb31
       ("release: Add an update_release_calendar.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/post_version.py: Pass version as an argument

I made a bad assumption; I assumed this would be run in the release
branch. But we don't do that, we run in the master branch. As a result
we need to pass the version as an argument.

Fixes: 3226b12a09bbcbd25526fd6da6257057d26ddb31
       ("release: Add an update_release_calendar.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/gen_release_notes.py: Return "None" if there are no new features

Which is very likely .Z > 0 releases.

Fixes: 86079447da1e00d49db0cbff9a102eb4e71e8702
       ("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/gen_release_notes.py: strip '#' from gitlab bugs

If they use the `Fixes: #1` form.

Fixes: 86079447da1e00d49db0cbff9a102eb4e71e8702
       ("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

bin/gen_release_notes.py: fix conditional of bugfix

Previously this would result in the .0 warning be generated for .z > 0
and the .z == 0 would get the other message.

Fixes: 86079447da1e00d49db0cbff9a102eb4e71e8702
       ("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>

mesa/main: Ignore filter state for MS texture completeness

After the discussion in
https://github.com/KhronosGroup/OpenGL-API/issues/45
the section 8.17 (texture completeness) of the OpenGL 4.6 core profile
was changed to explicitly say that multisample texture completeness
ignores filter state of the texture.

"Using the preceding definitions, a texture is complete unless any of the
 following conditions hold true:
   ...
  - The minification filter requires a mipmap (is neither NEAREST nor LINEAR),
    the texture is not multisample, and the texture is not mipmap complete.
  - The texture is not multisample; either the magnification filter is not
    NEAREST, or the minification filter is neither NEAREST nor NEAREST_-
    MIPMAP_NEAREST; and any of
    – The internal format of the texture is integer (see table 8.12).
    – The internal format is STENCIL_INDEX.
    – The internal format is DEPTH_STENCIL, and the value of DEPTH_-
      STENCIL_TEXTURE_MODE for the texture is STENCIL_INDEX."

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Signed-off-by: Illia Iorin <illia.iorin@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Revert "mesa/main: Fix multisample texture initialize"

This reverts commit a113a42e7369a4e43a1db1c9a7a35a3f7175615e.

Per https://github.com/KhronosGroup/OpenGL-API/issues/45 it
was a wrong way to fix the issue.

Signed-off-by: Illia Iorin <illia.iorin@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl/serialize: optimize for equal offsets in uniform remap tables

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1416
This decreases the shader cache size in the ticket from 1.6 MB to 40 KB.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl/serialize: restructure remap table code

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

nir: Use VARYING_SLOT_TESS_MAX to size indirect bitmasks

MAX_VARYINGS_INCL_PATCH subtracts VARYING_SLOT_VAR0 giving us a size
that's too small, so BITSET_SET writes words out of bounds, corrupting
the stack and causing all kinds of chaos.  VARYING_SLOT_TESS_MAX is
the right value to use here, as it's the largest location.

Closes: 2002
Fixes: ee2050b1111 ("nir: Use BITSET for tracking varyings in lower_io_arrays")
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

Revert "ci: Disable lima until its farm can get fixed."

This reverts commit fb9362c6fb9d5bd92073d31d3242614856b91f5d.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>

Revert "mapi: Inline call x86_current_tls."

This reverts commit e137b3a9b71a2711c1f68c8a8b9c0a7407fbcc4b.  It
completely broke 32-bit EGL such that wflinfo can't even run without
crashing.

rbug: Fix use of alloca() without #include "c99_alloca.h"

[12/60] Compiling C object 'src/gallium/auxiliary/eb820e8@@gallium@sta/rbug_rbug_texture.c.o'.
FAILED: src/gallium/auxiliary/eb820e8@@gallium@sta/rbug_rbug_texture.c.o
[...]
../src/gallium/auxiliary/rbug/rbug_texture.c: In function 'rbug_send_texture_info_reply':
../src/gallium/auxiliary/rbug/rbug_texture.c:302:21: error: implicit declaration of function 'alloca'; did you mean 'malloc'? [-Werror=implicit-function-declaration]
  uint32_t *height = alloca(sizeof(uint32_t) * height_len);
                     ^~~~~~
                     malloc
../src/gallium/auxiliary/rbug/rbug_texture.c:302:21: warning: initialization makes pointer from integer without a cast [-Wint-conversion]
../src/gallium/auxiliary/rbug/rbug_texture.c:303:20: warning: initialization makes pointer from integer without a cast [-Wint-conversion]
  uint32_t *depth = alloca(sizeof(uint32_t) * height_len);
                    ^~~~~~
cc1: some warnings being treated as errors

Include c99_alloca.h to portably make the alloca() prototype available.

See also: 498d9d0f, adfb9c5c, fc8139b1

Fixes: 6174cba7 ("rbug: fix transmitted texture sizes")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

pan/midgard: Express allocated registers as offsets

Rather than supplying a mask/swizzle to compose with the original, just
supply the offset of the allocated register so we can directly offset
the mask/swizzle, without resorting to composition.

This is simpler, cleaner, and will generalize to non-32-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Expose more typesize manipulation routines

These internal mir.c routines will help the RA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Add mir_set_bytemask helper

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

st/nine: Fix unused variable warnings in release build.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

st/nine: Fix build with -Werror=empty-body

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1995
Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

aco: Refactor hazard mitigations, separate pass for GFX10.

GFX10 hazards require a different approach compared to previous
generations, for example it doesn't need s_nop, and most hazards
can't be solved by adding NOPs at all. Also, they are not
resolved by branch instructions.

This commit reorganizes aco_insert_NOPs so that there is now a
separate pass for GFX10. The new GFX10 pass also respects the
control flow of the shader.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco/gfx10: Fix mitigation of VMEMtoScalarWriteHazard.

This commit refines the VMEMtoScalarWriteHazard mitigation, based
upon a closer look at what LLVM does. Also changes the code to
match the structure of the other hazard mitigations.

* The hazard is not only triggered by VMEM, FLAT and GLOBAL
  but also SCRATCH and DS instructions.
* The SMEM/SALU instructions only cause a hazard when they
  write a register that the VMEM/etc. are reading.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco/gfx10: Mitigate LdsBranchVmemWARHazard.

There is a hazard caused by there is a branch between a
VMEM/GLOBAL/SCRATCH instruction and a DS instruction.
This commit adds a workaround that avoids the problem.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco/gfx10: Mitigate SMEMtoVectorWriteHazard.

There is a hazard that happens when an SMEM instruction
reads an SGPR and then a VALU instruction writes that same SGPR.
This commit adds a workaround that avoids the problem.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>