re PR inline-asm/93027 (ICE: in match_reload, at lra-constraints.c:1060)

2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>

PR inline-asm/93027
* gcc.target/i386/pr93027.c: Use the right PR number in the test.

From-SVN: r280138

re PR libgomp/93219 (unused return value in affinity-fmt.c)

PR libgomp/93219
* libgomp.h (gomp_print_string): Change return type from void to int.
* affinity-fmt.c (gomp_print_string): Likewise.  Return true if
not all characters have been written.

From-SVN: r280137

Rename pr93207.c to pr93027.c.  Fix PR number in change logs.

From-SVN: r280136

re PR inline-asm/93027 (ICE: in match_reload, at lra-constraints.c:1060)

2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>

PR inline-asm/93207
* gcc.target/i386/pr93207.c: Run it only for x86-64.

From-SVN: r280135

testsuite: add dg-enable-nn-line-numbers

This patch adds support for obscuring the line numbers printed in the
left-hand margin when printing the source code, converting them to "NN",
e.g from:

  7111 |   if (!(flags & 0x0001)) {
       |      ^
       |      |
       |      (1) following 'true' branch...
  7112 |

to:

   NN  |   if (!(flags & 0x0001)) {
       |      ^
       |      |
       |      (1) following 'true' branch...
   NN  |

This is useful in followup patches e.g. when testing how interprocedural
paths are printed using multiline.exp, to avoid depending on precise line
numbers.

gcc/testsuite/ChangeLog:
* lib/gcc-dg.exp (cleanup-after-saved-dg-test): Reset global
nn_line_numbers_enabled.
* lib/multiline.exp (nn_line_numbers_enabled): New global.
(dg-enable-nn-line-numbers): New proc.
(maybe-handle-nn-line-numbers): New proc.
* lib/prune.exp (prune_gcc_output): Call maybe-handle-nn-line-numbers.

From-SVN: r280134

re PR inline-asm/93027 (ICE: in match_reload, at lra-constraints.c:1060)

2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>

PR inline-asm/93207
* lra-constraints.c (match_reload): Permit input operands have the
same mode as output while other input operands have a different
mode.

2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>

PR inline-asm/93207
* gcc.target/i386/pr93207.c: New test.

From-SVN: r280133

PR90838: Support ctz idioms

Support common idioms for count trailing zeroes using an array lookup.
The canonical form is array[((x & -x) * C) >> SHIFT] where C is a magic
constant which when multiplied by a power of 2 creates a unique value
in the top 5 or 6 bits.  This is then indexed into a table which maps it
to the number of trailing zeroes.  When the table is valid, we emit a
sequence using the target defined value for ctz (0):

int ctz1 (unsigned x)
{
  static const char table[32] =
    {
      0, 1, 28, 2, 29, 14, 24, 3, 30, 22, 20, 15, 25, 17, 4, 8,
      31, 27, 13, 23, 21, 19, 16, 7, 26, 12, 18, 6, 11, 5, 10, 9
    };

  return table[((unsigned)((x & -x) * 0x077CB531U)) >> 27];
}

Is optimized to:

rbit w0, w0
clz w0, w0
and w0, w0, 31
ret

    gcc/
PR tree-optimization/90838
* tree-ssa-forwprop.c (check_ctz_array): Add new function.
(check_ctz_string): Likewise.
(optimize_count_trailing_zeroes): Likewise.
(simplify_count_trailing_zeroes): Likewise.
(pass_forwprop::execute): Try ctz simplification.
* match.pd: Add matching for ctz idioms.

    testsuite/
PR tree-optimization/90838
* testsuite/gcc.target/aarch64/pr90838.c: New test.

From-SVN: r280132

aarch64.c (aarch64_invalid_conversion): New function for target hook.

gcc/ChangeLog:

2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

* config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
for target hook.
(aarch64_invalid_unary_op): New function for target hook.
(aarch64_invalid_binary_op): New function for target hook.

gcc/testsuite/ChangeLog:

2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

* g++.target/aarch64/bfloat_cpp_typecheck.C: New test.
* gcc.target/aarch64/bfloat16_scalar_typecheck.c: New test.
* gcc.target/aarch64/bfloat16_vector_typecheck_1.c: New test.
* gcc.target/aarch64/bfloat16_vector_typecheck_2.c: New test.

From-SVN: r280130

config.gcc: Add arm_bf16.h.

2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

* config.gcc: Add arm_bf16.h.
* config/aarch64/aarch64-builtins.c
(aarch64_simd_builtin_std_type): Add BFmode.
(aarch64_init_simd_builtin_types): Define element types for vector
types.
(aarch64_init_bf16_types): New function.
(aarch64_general_init_builtins): Add arm_init_bf16_types function call.
* config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
modes.
* config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
* config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
patterns.
* config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
(AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
* config/aarch64/aarch64.c
(aarch64_classify_vector_mode): Add support for BF types.
(aarch64_gimplify_va_arg_expr): Add support for BF types.
(aarch64_vq_mode): Add support for BF types.
(aarch64_simd_container_mode): Add support for BF types.
(aarch64_mangle_type): Add support for BF scalar type.
* config/aarch64/aarch64.md: Add BFmode to movhf pattern.
* config/aarch64/arm_bf16.h: New file.
* config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
* config/aarch64/iterators.md: Add BF types to mode attributes.
(HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.

2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

* g++.dg/abi/mangle-neon-aarch64.C: Add Bfloat SIMD types to test.
* g++.dg/ext/arm-bf16/bf16-mangle-aarch64-1.C: New test.
* gcc.target/aarch64/bfloat16_scalar_1.c: New test.
* gcc.target/aarch64/bfloat16_scalar_2.c: New test.
* gcc.target/aarch64/bfloat16_scalar_3.c: New test.
* gcc.target/aarch64/bfloat16_scalar_4.c: New test.
* gcc.target/aarch64/bfloat16_simd_1.c: New test.
* gcc.target/aarch64/bfloat16_simd_2.c: New test.
* gcc.target/aarch64/bfloat16_simd_3.c: New test.

From-SVN: r280129

Shorten right-shift again in C++.

Back in SVN r131862 richi removed this code to fix PR 34235, but didn't
remove the parallel code from the C front-end because the bug had previously
been fixed in r44080.  This patch copies the code from C again.

* typeck.c (cp_build_binary_op): Restore short_shift code.

From-SVN: r280128

PR c++/93143 - incorrect tree sharing with constexpr.

We don't unshare CONSTRUCTORs as often during constexpr evaluation, so we
need to unshare them here.

* constexpr.c (cxx_eval_outermost_constant_expr): Don't assume
CONSTRUCTORs are already unshared.

From-SVN: r280127

PR c++/93173 - incorrect tree sharing.

My patch for 93033 wasn't sufficient to handle all the possible sharing
introduced by split_nonconstant_init, and it occurred to me that it would
make sense to use the same unsharing technique as unshare_body, namely
copy_if_shared.

PR c++/93033
gcc/
* gimplify.c (copy_if_shared): No longer static.
* gimplify.h: Declare it.
gcc/cp/
* cp-gimplify.c (cp_gimplify_init_expr, cp_gimplify_expr): Use
copy_if_shared after cp_genericize_tree.
* typeck2.c (split_nonconstant_init): Don't unshare here.

From-SVN: r280126

[AArch64] Make -msve-vector-bits=128 generate VL-specific code

related_vector_mode and compatible_vector_types_p make it possible
to generate 128-bit SVE code while still maintaining the distinction
between SVE vectors and Advanced SIMD vectors.  We can therefore generate
VL-specific code for -msve-vector-bits=128 on little-endian targets.
In theory we could do the same for big-endian targets, but it could
have quite a high overhead; see the comment in the patch for details.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* doc/invoke.texi (-msve-vector-bits=): Document that
-msve-vector-bits=128 now generates VL-specific code for
little-endian targets.
* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
build_vector_type_for_mode to construct the data vector types.
* config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
VL-specific code for -msve-vector-bits=128 on little-endian targets.
(aarch64_simd_container_mode): Always prefer Advanced SIMD modes
for 128-bit vectors.

gcc/testsuite/
* gcc.target/aarch64/sve/struct_vect_1.c (N): Protect with #ifndef.
* gcc.target/aarch64/sve/pcs/return_1_128.c: New test.
* gcc.target/aarch64/sve/pcs/return_4_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_128.c: Likewise.
* gcc.target/aarch64/sve/single_5.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_25.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_26.c: Likewise.

From-SVN: r280125

PR c/93132 - bogus 'attribute((access))' warning when size-index is specified

gcc/c-family/ChangeLog:

PR c/93132
* c-attribs.c (append_access_attrs): Validate against the translated
access string rather than the human-readable representation.

gcc/testsuite/ChangeLog:

PR c/93132
* gcc.dg/attr-access-read-only-2.c: New test.

From-SVN: r280124

[AArch64] Fix reversed vcond_mask invocation in aarch64_evpc_sel

aarch64_evpc_sel (new in GCC 10) got the true and false vectors
the wrong way round, leading to execution failures with fixed-length
128-bit SVE.

Now that the ACLE types are in trunk, it's much easier to match
the exact asm sequence for a permute.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
invocation.

gcc/testsuite/
* gcc.target/aarch64/sve/sel_1.c: Use SVE types for the arguments and
return values.  Use check-function-bodies instead of scan-assembler.
* gcc.target/aarch64/sve/sel_2.c: Likewise
* gcc.target/aarch64/sve/sel_3.c: Likewise.

From-SVN: r280121

gotest: don't use local

    It's not part of the POSIX shell standard.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214300

From-SVN: r280118

libstdc++: Fix testcase for C++98 compatibility

* testsuite/25_algorithms/equal/deque_iterators/1.cc: Don't use C++11
initialization syntax.

From-SVN: r280117

libstdc++: Make istreambuf_iterator base class consistent (PR92285)

Since LWG 445 was implemented for GCC 4.7, the std::iterator base class
of std::istreambuf_iterator changes type depending on the -std mode
used. This creates an ABI incompatibility between different -std modes.

This change ensures the base class always has the same type. This makes
layout for C++98 compatible with the current -std=gnu++14 default, but
no longer compatible with C++98 code from previous releases. In practice
this is unlikely to cause real problems, because it only affects the
layout of types with two std::iterator base classes, one of which comes
from std::istreambuf_iterator. Such types are expected to be vanishingly
rare.

PR libstdc++/92285
* include/bits/streambuf_iterator.h (istreambuf_iterator): Make type
of base class independent of __cplusplus value.
[__cplusplus < 201103L] (istreambuf_iterator::reference): Override the
type defined in the base class
* testsuite/24_iterators/istreambuf_iterator/92285.cc: New test.
* testsuite/24_iterators/istreambuf_iterator/requirements/
base_classes.cc: Adjust expected base class for C++98.

From-SVN: r280116

OpenACC – support "if" + "if_present" clauses with "host_data"

2020-01-10  Gergö Barany  <gergo@codesourcery.com>
    Thomas Schwinge <thomas@codesourcery.com>
    Julian Brown  <julian@codesourcery.com>
    Tobias Burnus  <tobias@codesourcery.com>

        gcc/c/
        * c-parser.c (OACC_HOST_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_IF
        and PRAGMA_OACC_CLAUSE_IF_PRESENT.

        gcc/cp/
        * parser.c (OACC_HOST_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_IF
        and PRAGMA_OACC_CLAUSE_IF_PRESENT.

        gcc/fortran/
        * openmp.c (OACC_HOST_DATA_CLAUSES): Add PRAGMA_OACC_CLAUSE_IF
        and PRAGMA_OACC_CLAUSE_IF_PRESENT.

gcc/
* omp-low.c (lower_omp_target): Use GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT
if PRAGMA_OACC_CLAUSE_IF_PRESENT exist.

gcc/testsuite/
* c-c++-common/goacc/host_data-1.c: Added tests of if and if_present
clauses on host_data.
* gfortran.dg/goacc/host_data-tree.f95: Likewise.

include/
* gomp-constants.h (enum gomp_map_kind): New enumeration constant
GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT.

libgomp/
* oacc-parallel.c (GOACC_data_start): Handle
GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT.
* target.c (gomp_map_vars_async): Likewise.
* testsuite/libgomp.oacc-c-c++-common/host_data-7.c: New.
* testsuite/libgomp.oacc-fortran/host_data-5.F90: New.

From-SVN: r280115

[AArch64] Tighten mode checks in aarch64_builtin_vectorized_function

aarch64_builtin_vectorized_function checked vectors based on the
number of elements and the element mode.  This doesn't interact
well with fixed-length 128-bit SVE, where SVE modes can have those
same properties.  (And we can't just use the built-ins for SVE because
the types use a different ABI.  SVE handles this kind of thing using
optabs instead.)

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-builtins.c
(aarch64_builtin_vectorized_function): Check for specific vector modes,
rather than checking the number of elements and the element mode.

From-SVN: r280114

Use get_related_vectype_for_scalar_type for reduction indices

The related_vector_mode series missed this case in
vect_create_epilog_for_reduction, where we want to create the
unsigned integer equivalent of another vector.  Without it we
could mix SVE and Advanced SIMD vectors in the same operation.

This showed up on existing tests when testing with fixed-length
-msve-vector-bits=128.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
get_related_vectype_for_scalar_type rather than build_vector_type
to create the index type for a conditional reduction.

From-SVN: r280112

Fix gather/scatter check when updating a vector epilogue loop

update_epilogue_loop_vinfo applies SSA renmaing to the DR_REF of a
gather or scatter, so that vect_check_gather_scatter continues to work.
However, we sometimes also rely on vect_check_gather_scatter when
using gathers and scatters to implement strided accesses.

This showed up on existing tests when testing with fixed-length
-msve-vector-bits=128.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
for any type of gather or scatter, including strided accesses.

From-SVN: r280111

compiler: permit duplicate methods from embedded interfaces

    This is a language change for Go 1.14.

    Updates golang/go#6977

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214240

From-SVN: r280109

[vect] Add missing comment

gcc/ChangeLog:
2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
 comment.

From-SVN: r280108

[vect] Keep track of DR_OFFSET advance in dr_vec_info rather than data_reference

gcc/ChangeLog:
2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
get_dr_vinfo_offset
* tree-vect-loop.c (update_epilogue_loop_vinfo):  Remove orig_drs_init
parameter and its use to reset DR_OFFSET's.
(vect_transform_loop): Remove orig_drs_init argument.
* tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
member of dr_vec_info rather than the offset of the associated
data_reference's innermost_loop_behavior.
(vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
(vect_do_peeling): Remove orig_drs_init parameter and its construction.
* tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
get_dr_vinfo_offset.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.

From-SVN: r280107

2020-01-10  Richard Biener  <rguenther@suse.de>

* gimple-ssa-store-merging
(pass_store_merging::terminate_all_aliasing_chains): Cache alias info.

From-SVN: r280106

Fix ipa-clone-3.c on some targets

2020-01-10  Martin Jambor  <mjambor@suse.cz>

* gcc.dg/ipa/ipa-clone-3.c: Replace struct initializer with
piecemeal initialization.

From-SVN: r280105

[AArch64] Require aarch64_sve256_hw for a 256-bit SVE test

One of the SVE run tests was specific to 256-bit SVE but tried to
run for all SVE lengths.

2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/aarch64/sve/index_1_run.c: Require aarch64_sve256_hw
rather than aarch64_sve_hw.

From-SVN: r280104

Fix wrong parenthesis in inliner.

2020-01-10  Martin Liska  <mliska@suse.cz>

PR ipa/93217
* ipa-inline-analysis.c (offline_size): Make proper parenthesis
encapsulation that was there before r280040.

From-SVN: r280103

re PR tree-optimization/93199 (Compile time hog in sink_clobbers)

2020-01-10  Richard Biener  <rguenther@suse.de>

PR middle-end/93199
* tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
sequences to avoid walking them again for secondary opportunities.
(pass_lower_eh_dispatch::execute): Instead actually insert
them here.

From-SVN: r280102

re PR tree-optimization/93199 (Compile time hog in sink_clobbers)

2020-01-10  Richard Biener  <rguenther@suse.de>

PR middle-end/93199
* tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
(cleanup_all_empty_eh): Walk landing pads in reverse order to
avoid quadraticness.

From-SVN: r280101

IPA-CP: Access param_ipa_sra_max_replacements through opt_for_fn

2020-01-10  Martin Jambor  <mjambor@suse.cz>

* params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
* ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
to get param_ipa_sra_max_replacements.
(param_splitting_across_edge): Pass the caller to
pull_accesses_from_callee.

From-SVN: r280100

IPA-CP: Always access param_ipcp_unit_growth through opt_for_fn

2020-01-10  Martin Jambor  <mjambor@suse.cz>

* params.opt (param_ipcp_unit_growth): Mark as Optimization.
* ipa-cp.c (max_new_size): Removed.
(orig_overall_size): New variable.
(get_max_overall_size): New function.
(estimate_local_effects): Use it.  Adjust dump.
(decide_about_value): Likewise.
(ipcp_propagate_stage): Do not calculate max_new_size, just store
orig_overall_size.  Adjust dump.
(ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.

From-SVN: r280099

IPA-CP: Always access param_ipa_max_agg_items through opt_for_fn

2020-01-10  Martin Jambor  <mjambor@suse.cz>

* params.opt (param_ipa_max_agg_items): Mark as Optimization
* ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
instead of param_ipa_max_agg_items.
(merge_aggregate_lattices): Extract param_ipa_max_agg_items from
optimization info for the callee.

From-SVN: r280098

re PR testsuite/93216 (gcc.dg/optimize-bswaphi-1.c fails starting with r280034)

2020-01-10  Richard Biener  <rguenther@suse.de>

PR testsuite/93216
* gcc.dg/optimize-bswaphi-1.c: Split previously added
case into a LE and BE variant.

From-SVN: r280097

Daily bump.

From-SVN: r280096

libgo: compile examples in _test packages

    Previously if the only names defined by _test packages were examples,
    the gotest script would emit an incorrect _testmain.go file.
    I worked around that by marking the example_test.go files +build ignored.

    This CL changes the gotest script to handle this case correctly,
    and removes the now-unnecessary build tags.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214039

From-SVN: r280085

rename local _C2 identifiers in stl map header files

2020-01-09  Olivier Hainque  <hainque@adacore.com>

* doc/xml/manual/appendix_contributing.xml: Document _C2
as a reserved identifier, by VxWorks.
* include/bits/stl_map.h: Rename _C2 template typenames as _Cmp2.
* include/bits/stl_multimap.h: Likewise.

From-SVN: r280076

libstdc++: Fix <ext/pointer.h> incompatibilities with C++20

The equality operators for _ExtPtr_allocator are defined as non-const
member functions, which causes ambiguities in C++20 due to the
synthesized operator!= candidates. They should always have been const.

The _Pointer_adapter class template has both value_type and element_type
members, which makes readable_traits<_Pointer_adapter<T>> ambiguous. The
intended workaround is to add a specialization of readable_traits.

* include/ext/extptr_allocator.h (_ExtPtr_allocator::operator==)
(_ExtPtr_allocator::operator!=): Add missing const qualifiers.
* include/ext/pointer.h (readable_traits<_Pointer_adapter<S>>): Add
partial specialization to disambiguate the two constrained
specializations.

From-SVN: r280067

libstdc++: Fix testsuite failures and warnings due to is_pod deprecation

With -std=gnu++2a and -Wsystem-headers the std::is_pod deprecation
causes some new diagnostics. This suppresses them.

* include/experimental/type_traits (experimental::is_pod_v): Disable
-Wdeprecated-declarations warnings around reference to std::is_pod.
* include/std/type_traits (is_pod_v): Likewise.
* testsuite/18_support/max_align_t/requirements/2.cc: Also check
is_standard_layout and is_trivial. Do not check is_pod for C++20.
* testsuite/20_util/is_pod/requirements/explicit_instantiation.cc:
Add -Wno-deprecated for C++20.
* testsuite/20_util/is_pod/requirements/typedefs.cc: Likewise.
* testsuite/20_util/is_pod/value.cc: Likewise.
* testsuite/experimental/type_traits/value.cc: Likewise.

From-SVN: r280066

libstdc++: Implementing P0767 - deprecate POD

This adds the deprecated attribute to std::is_pod and std::is_pod_v for
C++20.

2019-12-05  JeanHeyd "ThePhD" Meneide  <phdofthehouse@gmail.com>

* include/bits/c++config (_GLIBCXX20_DEPRECATED): Add new macro.
* include/std/type_traits (is_pod, is_pod_v): Deprecate for C++20.
* testuite/20_util/is_pod/deprecated-2a.cc: New test.

From-SVN: r280065

libstdc++: Fix whitespace in ChangeLog-2019

From-SVN: r280064

Save typespec for empty array constructor.

2020-01-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/65428
* array.c (empty_constructor): New variable.
(empty_ts): New variable.
(expand_constructor): Save typespec in empty_ts.
Unset empty_constructor if there is an element.
(gfc_expand_constructor): Initialize empty_constructor
and empty_ts.  If there was no explicit constructor
type and the constructor is empty, take the type from
empty_ts.

2020-01-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/65428
* gfortran.dg/zero_sized_11.f90: New test.

From-SVN: r280063

Remove inline debug markers if support not enabled on accelerator compiler

2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>

gcc/
* lto-streamer-in.c (input_function): Remove streamed-in inline debug
markers if debug_inline_points is false.

From-SVN: r280062

libstdc++: Fix undefined behaviour in random dist serialization (PR93205)

The deserialization functions for random number distributions fail to
check the stream state before using the extracted values. In some cases
this leads to using indeterminate values to resize a vector, and then
filling that vector with indeterminate values.

No values that affect control flow should be used without checking that a
good value was read from the stream.

Additionally, where reasonable to do so, defer modifying any state in
the distribution until all values have been successfully read, to avoid
modifying some of the distribution's parameters and leaving others
unchanged.

PR libstdc++/93205
* include/bits/random.h (operator>>): Check stream operation succeeds.
* include/bits/random.tcc (operator<<): Remove redundant __ostream_type
typedefs.
(operator>>): Remove redundant __istream_type typedefs. Check stream
operations succeed.
(__extract_params): New function to fill a vector from a stream.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error line.

From-SVN: r280061

[AArch64] Add support for the SVE2 ACLE

This patch adds support for the SVE2 ACLE,  The implementation
and tests follow the same pattern as the exiting SVE ACLE support.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
extra_objs.
* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
aarch64-sve-builtins-sve2.h.
(aarch64-sve-builtins-sve2.o): New rule.
* config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
(AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
(TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
TARGET_SVE2_SM4.
* config/aarch64/aarch64-sve.md: Update comments with SVE2
instructions that are handled here.
(@cond_asrd<mode>): Generalize to...
(@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
(*cond_asrd<mode>_2): Generalize to...
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
(*cond_asrd<mode>_z): Generalize to...
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
* config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
(UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
(UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
* config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
pattern.
(@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_scatter_stnt<mode>): Likewise.
(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_mul_lane_<mode>): Likewise.
(@aarch64_sve_suqadd<mode>_const): Likewise.
(*<sur>h<addsub><mode>): Generalize to...
(@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
new pattern.
(@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
(*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
(@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
(@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_add_mul_lane_<mode>): Likewise.
(@aarch64_sve_sub_mul_lane_<mode>): Likewise.
(@aarch64_sve2_xar<mode>): Likewise.
(@aarch64_sve2_bcax<mode>): Likewise.
(*aarch64_sve2_eor3<mode>): Rename to...
(@aarch64_sve2_eor3<mode>): ...this.
(@aarch64_sve2_bsl<mode>): New expander.
(@aarch64_sve2_nbsl<mode>): Likewise.
(@aarch64_sve2_bsl1n<mode>): Likewise.
(@aarch64_sve2_bsl2n<mode>): Likewise.
(@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
(*aarch64_sve2_sra<mode>): Add MOVPRFX support.
(@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
(@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
(@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
(*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
(@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
(<su>mull<bt><Vwide>): Generalize to...
(@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
pattern.
(@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
(@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
(@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
(<SHRNB:r>shrnb<mode>): Generalize to...
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
new pattern.
(<SHRNT:r>shrnt<mode>): Generalize to...
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
new pattern.
(@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
(@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
(@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
(@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
(@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
(@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
(@aarch64_sve2_cvtnt<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
(@aarch64_sve2_cvtxnt<mode>): Likewise.
(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
(@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
(*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
(@aarch64_sve2_pmul<mode>): Likewise.
(@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
(@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
(@aarch64_sve2_tbl2<mode>): Likewise.
(@aarch64_sve2_tbx<mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
(@aarch64_sve2_histcnt<mode>): Likewise.
(@aarch64_sve2_histseg<mode>): Likewise.
(@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
(aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
(aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
(*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
(aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
(<su>mulh<r>s<mode>3): Update after above pattern name changes.
* config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
(SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
(SVE2_PMULL_PAIR_I): New mode iterators.
(UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
(UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
(UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
(UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
(UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
(UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
(UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
(UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
(UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
(UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
(UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
(UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
(UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
(UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
(UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
(UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
(UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
(UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
(UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
(UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
(UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
(UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
(UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
(UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
(UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
(UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
(UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
(UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
(UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
(UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
further down file.
(VNARROW, Ventype): New mode attributes.
(Vewtype): Handle VNx2DI.  Fix typo in comment.
(VDOUBLE): New mode attribute.
(sve_lane_con): Handle VNx8HI.
(SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
(SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
(sve_int_op, sve_int_op_rev): Handle the above codes.
(sve_pred_int_rhs2_operand): Likewise.
(MULLBT, SHRNB, SHRNT): Delete.
(SVE_INT_SHIFT_IMM): New int iterator.
(SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
and UNSPEC_WHILEHS for TARGET_SVE2.
(SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
(SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
(SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
(SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
(SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
(SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
(SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
(SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
(SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
(SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
(SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
(SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
(SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
(SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
(SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
(SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
(SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
(optab): Handle the new unspecs.
(su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
and UNSPEC_RSHRNT.
(lr): Handle the new unspecs.
(bt): Delete.
(cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
(sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
(sve_int_qsub_op): New int attributes.
(sve_fp_op, rot): Handle the new unspecs.
* config/aarch64/aarch64-sve-builtins.h
(function_resolver::require_matching_pointer_type): Declare.
(function_resolver::resolve_unary): Add an optional boolean argument.
(function_resolver::finish_opt_n_resolution): Add an optional
type_suffix_index argument.
(gimple_folder::redirect_call): Declare.
(gimple_expander::prepare_gather_address_operands): Add an optional
bool parameter.
* config/aarch64/aarch64-sve-builtins.cc: Include
aarch64-sve-builtins-sve2.h.
(TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
(TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
(TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
(TYPES_hsd_integer): Use TYPES_hsd_signed.
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
(TYPES_s_unsigned): Likewise.
(TYPES_s_integer): Use TYPES_s_unsigned.
(TYPES_sd_signed, TYPES_sd_unsigned): New macros.
(TYPES_sd_integer): Use them.
(TYPES_d_unsigned): New macro.
(TYPES_d_integer): Use it.
(TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
(TYPES_cvt_narrow): Likewise.
(DEF_SVE_TYPES_ARRAY): Include the new types macros above.
(preds_mx): New variable.
(function_builder::add_overloaded_function): Allow the new feature
set to be more restrictive than the original one.
(function_resolver::infer_pointer_type): Remove qualifiers from
the pointer type before printing it.
(function_resolver::require_matching_pointer_type): New function.
(function_resolver::resolve_sv_displacement): Handle functions
that don't support 32-bit vector indices or svint32_t vector offsets.
(function_resolver::finish_opt_n_resolution): Take the inferred type
as a separate argument.
(function_resolver::resolve_unary): Optionally treat all forms in
the same way as normal merging functions.
(gimple_folder::redirect_call): New function.
(function_expander::prepare_gather_address_operands): Add an argument
that says whether scaled forms are available.  If they aren't,
handle scaling of vector indices and don't add the extension and
scaling operands.
(function_expander::map_to_unspecs): If aarch64_sve isn't available,
fall back to using cond_* instead.
* config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
Split out the member variables into...
(rtx_code_function_base): ...this new base class.
(rtx_code_function_rotated): Inherit rtx_code_function_base.
(unspec_based_function): Split out the member variables into...
(unspec_based_function_base): ...this new base class.
(unspec_based_function_rotated): Inherit unspec_based_function_base.
(unspec_based_function_exact_insn): New class.
(unspec_based_add_function, unspec_based_add_lane_function)
(unspec_based_lane_function, unspec_based_pred_function)
(unspec_based_qadd_function, unspec_based_qadd_lane_function)
(unspec_based_qsub_function, unspec_based_qsub_lane_function)
(unspec_based_sub_function, unspec_based_sub_lane_function): New
typedefs.
(unspec_based_fused_function): New class.
(unspec_based_mla_function, unspec_based_mls_function): New typedefs.
(unspec_based_fused_lane_function): New class.
(unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
typedefs.
(CODE_FOR_MODE1): New macro.
(fixed_insn_function): New class.
(while_comparison): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
(binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
(binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
(load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
(load_gather_sv_restricted, shift_left_imm_long): Declare.
(shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
(shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
(shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
(store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
(ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
(ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
(unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
(unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
Also add an initial argument for unary_convert_narrowt, regardless
of the predication type.
(build_32_64): Allow loads and stores to specify MODE_none.
(build_sv_index64, build_sv_uint_offset): New functions.
(long_type_suffix): New function.
(binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
(binary_imm_long_base, load_gather_sv_base): Likewise.
(shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
(ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
(unary_narrowb_base, unary_narrowt_base): Likewise.
(binary_long_lane_def, binary_long_lane): New shape.
(binary_long_opt_n_def, binary_long_opt_n): Likewise.
(binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
(binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
(binary_to_uint_def, binary_to_uint): Likewise.
(binary_wide_def, binary_wide): Likewise.
(binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
(compare_def, compare): Likewise.
(compare_ptr_def, compare_ptr): Likewise.
(load_ext_gather_index_restricted_def,
load_ext_gather_index_restricted): Likewise.
(load_ext_gather_offset_restricted_def,
load_ext_gather_offset_restricted): Likewise.
(load_gather_sv_def): Inherit from load_gather_sv_base.
(load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
(shift_left_imm_def, shift_left_imm): Likewise.
(shift_left_imm_long_def, shift_left_imm_long): Likewise.
(shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
(store_scatter_index_restricted_def,
store_scatter_index_restricted): Likewise.
(store_scatter_offset_restricted_def,
store_scatter_offset_restricted): Likewise.
(tbl_tuple_def, tbl_tuple): Likewise.
(ternary_long_lane_def, ternary_long_lane): Likewise.
(ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
(ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
(ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
(ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
(ternary_qq_rotate_def, ternary_qq_rotate): New shape.
(ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
(ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
(ternary_uint_def, ternary_uint): Likewise.
(unary_convert): Fix typo in comment.
(unary_convert_narrowt_def, unary_convert_narrowt): New shape.
(unary_long_def, unary_long): Likewise.
(unary_narrowb_def, unary_narrowb): Likewise.
(unary_narrowt_def, unary_narrowt): Likewise.
(unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
(unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
(unary_to_int_def, unary_to_int): Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
(unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
(svasrd_impl): Delete.
(svcadd_impl::expand): Handle integer operations too.
(svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
new functions to derive the unspec numbers.
(svmla_svmls_lane_impl): Replace with...
(svmla_lane_impl, svmls_lane_impl): ...these new classes.  Handle
integer operations too.
(svwhile_impl): Rename to...
(svwhilelx_impl): ...this and inherit from while_comparison.
(svasrd): Use unspec_based_function.
(svmla_lane): Use svmla_lane_impl.
(svmls_lane): Use svmls_lane_impl.
(svrecpe, svrsqrte): Handle unsigned integer operations too.
(svwhilele, svwhilelt): Use svwhilelx_impl.
* config/aarch64/aarch64-sve-builtins-sve2.h: New file.
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
* config/aarch64/aarch64-sve-builtins.def: Include
aarch64-sve-builtins-sve2.def.

gcc/testsuite/
* g++.target/aarch64/sve/acle/general-c++/mul_lane_1.c: New test.
* g++.target/aarch64/sve2/acle: New directory.
* gcc.target/aarch64/pragma_cpp_predefs_3.c: New test.
* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h (TEST_TYPE_CHANGE_Z)
(TEST_DUAL_ZD, TEST_TYPE_CHANGE_ZX, TEST_TBL2, TEST_TBL2_REV): New
macros.
* gcc.target/aarch64/sve/acle/general-c/binary_lane_1.c: Do not
expect an error saying that the function has no f32 form, but instead
expect an error about SVE2 being required if the current target
doesn't support SVE2.
* gcc.target/aarch64/sve/acle/general-c/ternary_lane_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_lane_rotate_1.c Likewise.
* gcc.target/aarch64/sve/acle/general-c/binary_long_lane_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_long_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_narrowb_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_narrowt_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_wide_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_wide_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/compare_1.c,
* gcc.target/aarch64/sve/acle/general-c/compare_ptr_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_2.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_3.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_4.c,
* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_2.c,
* gcc.target/aarch64/sve/acle/general-c/mul_lane_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_long_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_to_uint_2.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowb_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowb_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowt_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowt_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/tbl_tuple_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_long_lane_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_long_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_qq_lane_rotate_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_qq_rotate_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_shift_right_imm_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_convert_narrowt_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowb_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowb_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowt_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowt_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_to_int_1.c: New tests.
* gcc.target/aarch64/sve2/bcax_1.c: Likewise.
* gcc.target/aarch64/sve2/acle: New directory.

From-SVN: r280060

[AArch64] Pass a mode to some SVE immediate queries

It helps the SVE2 ACLE support if aarch64_sve_arith_immediate_p and
aarch64_sve_sqadd_sqsub_immediate_p accept scalars as well as vectors.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
immediates as well as vector ones.
* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
(aarch64_sve_qsub_immediate): Update calls accordingly.

From-SVN: r280059

[AArch64] Add banner comments to aarch64-sve2.md

This patch imposes the same sort of structure on aarch64-sve2.md
as we already have for aarch64-sve.md, before it grows a lot more
patterns.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve2.md: Add banner comments.
(<su>mulh<r>s<mode>3): Move further up file.
(<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
(*aarch64_sve2_sra<mode>): Move further down file.
* config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.

From-SVN: r280058

compiler: don't localize names in export data

    Localizing names in export data causes the compiler output to change
    depending on the LANG environment variable, so don't do it.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214038

From-SVN: r280057

compiler: don't add composite literal keys to package bindings

    Adding composite literal keys to package bindings gets confusing when
    it is combined with dot imports.  The test case showing the resulting
    compilation failure is https://golang.org/cl/213899.

    Fix this by adding a new expression type to hold composite literal keys.
    We shouldn't see it during lowering if it is a struct field name,
    because Composite_literal_expression::do_traverse skips struct field names.
    Or, it should, but that didn't quite work with pointer types so it had to
    be tweaked.

    This lets us remove the code that recorded whether an Unknown_expression
    is a composite literal key.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214017

From-SVN: r280056

[amdgcn] Add support for sub-word sync_compare_and_swap operations

2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>

libgcc/
* config/gcn/atomic.c: New.
* config/gcn/t-amdgcn (LIB2ADD): Add atomic.c.

From-SVN: r280055

[AArch64] Simplify WHILERW and WHILEWR definition

I'd made WHILERW and WHILEWR use separate patterns from the SVE
WHILE instructions, but they're similar enough that we can use
a single pattern.  This means that we also get the flag-related
patterns "for free".

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
and UNSPEC_WHILEWR.
(while_optab_cmp): Handle them.
* config/aarch64/aarch64-sve.md
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
and add a "@" marker.
* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
instead of gen_aarch64_sve2_while_ptest.
(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.

From-SVN: r280054

[AArch64] Rename UNSPEC_WHILE* to match instruction mnemonics

The UNSPEC_WHILE*s had an underscore before the condition code,
whereas almost all other SVE unspecs are taken directly from
the mnemonic.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
(UNSPEC_WHILELE): ...this.
(UNSPEC_WHILE_LO): Rename to...
(UNSPEC_WHILELO): ...this.
(UNSPEC_WHILE_LS): Rename to...
(UNSPEC_WHILELS): ...this.
(UNSPEC_WHILE_LT): Rename to...
(UNSPEC_WHILELT): ...this.
* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
(cmp_op, while_optab_cmp): Likewise.
* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
(svwhilelt): Likewise.

From-SVN: r280053

[AArch64] Rename SVE shape "unary_count" to "unary_to_uint"

The SVE ACLE shape names use "_int" and "_uint" for arguments that are
signed-integer or unsigned-integer variants of the main vector type.
With SVE2 this variation also becomes common for return values,
which the main SVE2 patch handles using "_to_int" and "_to_uint".
This patch renames the existing unary_count shape to match the
new scheme.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
(unary_to_uint): Define.
* config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
(unary_count): Rename to...
(unary_to_uint_def, unary_to_uint): ...this.
* config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general-c/unary_count_1.c: Rename to...
* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_1.c: ...this.
* gcc.target/aarch64/sve/acle/general-c/unary_count_2.c: Rename to...
* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_2.c: ...this.
* gcc.target/aarch64/sve/acle/general-c/unary_count_3.c: Rename to...
* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_3.c: ...this.

From-SVN: r280052

[AArch64] Specify some SVE ACLE functions in a more generic way

This patch generalises some boilerplate that becomes much more
common with SVE2 intrinsics.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve-builtins-functions.h
(code_for_mode_function): New class.
(CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
* config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
(svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
(svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
(svmul_lane, svtmad): Use CODE_FOR_MODE0.

From-SVN: r280051

[AArch64] Tweak iterator usage for [SU]Q{ADD,SUB}

The pattern:

;; <su>q<addsub>

(define_insn "aarch64_<su_optab><optab><mode>"
  [(set (match_operand:VSDQ_I 0 "register_operand" "=w")
(BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w")
  (match_operand:VSDQ_I 2 "register_operand" "w")))]
  "TARGET_SIMD"
  "<su_optab><optab>\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"
  [(set_attr "type" "neon_<optab><q>")]
)

meant that we overloaded "optab" to be "qadd" for both SQADD and
UQADD.  Most other "optab" entries are instead the full optab name,
which for these patterns would be "ssadd" and "usadd" respectively.
(Unfortunately, the optabs don't extend to vectors yet, something
that would be good to fix in GCC 11.)

This patch therefore does what the comment implies and uses
q<addsub> to distinguish qadd and qsub instead.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/iterators.md (addsub): New code attribute.
* config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
Re-express as...
(aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
in the asm string and attributes.  Fix indentation.
* config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
Re-express as...
(@aarch64_sve_<optab><mode>): ...this.
* config/aarch64/aarch64-sve-builtins.h
(function_expander::expand_signed_unpred_op): Delete.
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::expand_signed_unpred_op): Likewise.
(function_expander::map_to_rtx_codes): If the optab isn't defined,
try using code_for_aarch64_sve instead.
* config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
(svqsub_impl): Likewise.
(svqadd, svqsub): Use rtx_code_function instead.

From-SVN: r280050

[AArch64] Remove fictitious [SU]RHSUB instructions

We've had skeleton support for "SRHSUB" and "URHSUB" since the initial
commit of the port, but no such instructions exist.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
(HADDSUB, sur, addsub): Remove them.

From-SVN: r280049

Fix tree-nrv.c ICE for direct internal functions

pass_return_slot::execute has:

      /* Ignore internal functions without direct optabs,
 those are expanded specially and aggregate_value_p
 on their result might result in undesirable warnings
 with some backends.  */
      && (!gimple_call_internal_p (stmt)
  || direct_internal_fn_p (gimple_call_internal_fn (stmt)))
      && aggregate_value_p (TREE_TYPE (gimple_call_lhs (stmt)),
    gimple_call_fndecl (stmt)))

But what the comment says applies to directly-mapped internal functions
too, since they're only used if the target supports them without a
libcall.

This was triggering an ICE on the attached testcase.  The svld3 call
is folded to an IFN_LOAD_LANES, which returns an array of vectors with
VNx48QImode.  Since no such return type can exist in C, the target hook
was complaining about an unexpected use of SVE modes.  (And we want to
keep asserting for that, so that we don't accidentally define an ABI for
an unexpected corner case.)

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* tree-nrv.c (pass_return_slot::execute): Handle all internal
functions the same way, rather than singling out those that
aren't mapped directly to optabs.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/nrv_1.c: New test.

From-SVN: r280048

Add a compatible_vector_types_p target hook

One problem with adding an N-bit vector extension to an existing
architecture is to decide how N-bit vectors should be passed to
functions and returned from functions.  Allowing all N-bit vector
types to be passed in registers breaks backwards compatibility,
since N-bit vectors could be used (and emulated) before the vector
extension was added.  But always passing N-bit vectors on the
stack would be inefficient for things like vector libm functions.

For SVE we took the compromise position of predefining new SVE vector
types that are distinct from all existing vector types, including
GNU-style vectors.  The new types are passed and returned in an
efficient way while existing vector types are passed and returned
in the traditional way.  In the right circumstances, the two types
are inter-convertible.

The SVE types are created using:

      vectype = build_distinct_type_copy (vectype);
      SET_TYPE_STRUCTURAL_EQUALITY (vectype);
      TYPE_ARTIFICIAL (vectype) = 1;

The C frontend maintains this distinction, using VIEW_CONVERT_EXPR
to convert from one type to the other.  However, the distinction can
be lost during gimple, which treats two vector types with the same
mode, number of elements, and element type as equivalent.  And for
most targets that's the right thing to do.

This patch therefore adds a hook that lets the target choose
whether such vector types are indeed equivalent.

Note that the new tests fail for -mabi=ilp32 in the same way as other
ACLE-based tests.  I'm still planning to fix that as a follow-on.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* target.def (compatible_vector_types_p): New target hook.
* hooks.h (hook_bool_const_tree_const_tree_true): Declare.
* hooks.c (hook_bool_const_tree_const_tree_true): New function.
* doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
* doc/tm.texi: Regenerate.
* gimple-expr.c: Include target.h.
(useless_type_conversion_p): Use targetm.compatible_vector_types_p.
* config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
function.
(TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
* config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
Use the original predicate if it already has a suitable type.

gcc/testsuite/
* gcc.target/aarch64/sve/pcs/gnu_vectors_1.c: New test.
* gcc.target/aarch64/sve/pcs/gnu_vectors_2.c: Likewise.

From-SVN: r280047

Fortran] PR84135 fix merging dimension into codimension array spec

        PR fortran/84135
        * array.c (gfc_set_array_spec): Fix shifting of codimensions
        when adding a dimension.
        * decl.c (merge_array_spec): Ditto. Fix using correct codimensions.

        PR fortran/84135
        * gfortran.dg/coarray/codimension_3.f90: New.

From-SVN: r280046

libstdc++: Define memory resource key functions non-inline (PR93208)

This prevents the vtables and RTTI from being emitted in every object
file that uses memory_resource and monotonic_buffer_resource.

Objects compiled by GCC 9.1 or 9.2 will contain inline definitions of
the destructors, vtable and RTTI, but this is harmless. The inline
definitions have identical effects to the ones that are now defined in
libstdc++.so so it doesn't matter if the inline ones are used instead of
calling the symbols exported from the runtime library.

PR libstdc++/93208
* config/abi/pre/gnu.ver: Add new exports.
* include/std/memory_resource (memory_resource::~memory_resource()):
Do not define inline.
(monotonic_buffer_resource::~monotonic_buffer_resource()): Likewise.
* src/c++17/memory_resource.cc (memory_resource::~memory_resource()):
Define.
(monotonic_buffer_resource::~monotonic_buffer_resource()): Define.
* testsuite/20_util/monotonic_buffer_resource/93208.cc: New test.

From-SVN: r280044

Make cgraph_edge::resolve-speculation static

2020-01-09  Martin Jambor  <mjambor@suse.cz>

* cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
resolve_speculation and redirect_call_stmt_to_callee static.  Change
return type of set_call_stmt to cgraph_edge *.
* auto-profile.c (afdo_indirect_call): Adjust call to
redirect_call_stmt_to_callee.
* cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
make the this pointer explicit, adjust self-recursive calls and the
call top make_direct.  Return the resulting edge.
(cgraph_edge::remove): Make this pointer explicit.
(cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
(cgraph_edge::make_direct): Likewise, adjust call to
resolve_speculation.
(cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
call to set_call_stmt.
(cgraph_update_edges_for_call_stmt_node): Update call to
set_call_stmt and remove.
* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
Renamed edge to master_edge.  Adjusted calls to set_call_stmt.
(cgraph_node::create_edge_including_clones): Moved "first" definition
of edge to the block where it was used.  Adjusted calls to
set_call_stmt.
(cgraph_node::remove_symbol_and_inline_clones): Adjust call to
cgraph_edge::remove.
* cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
make_direct and redirect_call_stmt_to_callee.
* ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
resolve_speculation and make_direct.
* ipa-inline-transform.c (inline_transform): Adjust call to
redirect_call_stmt_to_callee.
(check_speculations_1):: Adjust call to resolve_speculation.
* ipa-inline.c (resolve_noninline_speculation): Adjust call to
resolve-speculation.
(inline_small_functions): Adjust call to resolve_speculation.
(ipa_inline): Likewise.
* ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
make_direct.
* ipa-visibility.c (function_and_variable_visibility): Make iteration
safe with regards to edge removal, adjust calls to
redirect_call_stmt_to_callee.
* ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
and redirect_call_stmt_to_callee.
* multiple_target.c (create_dispatcher_calls): Adjust call to
redirect_call_stmt_to_callee
(redirect_to_specific_clone): Likewise.
* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
Adjust calls to cgraph_edge::remove.
* tree-inline.c (copy_bb): Adjust call to set_call_stmt.
(redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
(expand_call_inline): Adjust call to cgraph_edge::remove.

From-SVN: r280043

Set Optimization for param_max_speculative_devirt_maydefs.

2020-01-09  Martin Liska  <mliska@suse.cz>

* params.opt: Set Optimization for
param_max_speculative_devirt_maydefs.

From-SVN: r280042

PR middle-end/93200 - spurious -Wstringop-overflow due to assignment vectorization to multiple members

PR middle-end/93200 - spurious -Wstringop-overflow due to assignment vectorization to multiple members
PR fortran/92956 - 'libgomp.fortran/examples-4/async_target-2.f90' fails with offloading due to bogus -Wstringop-overflow warning

gcc/testsuite/ChangeLog:

PR middle-end/93200
* gcc.dg/Wstringop-overflow-30.c: New test.

gcc/ChangeLog:

PR middle-end/93200
PR fortran/92956
* builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.

From-SVN: r280041

Add Optimization for various IPA parameters.

2020-01-09  Martin Liska  <mliska@suse.cz>

* auto-profile.c (auto_profile): Use opt_for_fn
for a parameter.
* ipa-cp.c (ipcp_lattice::add_value): Likewise.
(propagate_vals_across_arith_jfunc): Likewise.
(hint_time_bonus): Likewise.
(incorporate_penalties): Likewise.
(good_cloning_opportunity_p): Likewise.
(perform_estimation_of_a_value): Likewise.
(estimate_local_effects): Likewise.
(ipcp_propagate_stage): Likewise.
* ipa-fnsummary.c (decompose_param_expr): Likewise.
(set_switch_stmt_execution_predicate): Likewise.
(analyze_function_body): Likewise.
* ipa-inline-analysis.c (offline_size): Likewise.
* ipa-inline.c (early_inliner): Likewise.
* ipa-prop.c (ipa_analyze_node): Likewise.
(ipcp_transform_function): Likewise.
* ipa-sra.c (process_scan_results): Likewise.
(ipa_sra_summarize_function): Likewise.
* params.opt: Rename ipcp-unit-growth to
ipa-cp-unit-growth.  Add Optimization for various
IPA-related parameters.

From-SVN: r280040

re PR tree-optimization/93054 (ICE in gimple_set_lhs, at gimple.c:1820)

2020-01-09  Richard Biener  <rguenther@suse.de>

PR middle-end/93054
* gimplify.c (gimplify_expr): Deal with NOP definitions.

* gcc.dg/pr93054.c: New testcase.

From-SVN: r280039

re PR tree-optimization/93040 (gcc doesn't optimize unaligned accesses to a 16-bit value on the x86 as well as it does a 32-bit value (or clang))

2020-01-09  Richard Biener  <rguenther@suse.de>

PR tree-optimization/93040
* gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.

* gcc.dg/optimize-bswaphi-1.c: Amend.
* gcc.dg/optimize-bswapsi-2.c: Likewise.

From-SVN: r280034

avr-common.c (avr_option_optimization_table): Set -fsplit-wide-types-early.

* common/config/avr/avr-common.c (avr_option_optimization_table)
[OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.

From-SVN: r280033

One more usage of cgraph_node::dump_name.

2020-01-09  Martin Liska  <mliska@suse.cz>

* cgraphclones.c (symbol_table::materialize_all_clones):
Use cgraph_node::dump_name.

From-SVN: r280031

re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)

PR inline-asm/93202
* config/riscv/riscv.c (riscv_print_operand_reloc): Use
output_operand_lossage instead of gcc_unreachable.
* doc/md.texi (riscv f constraint): Fix typo.

* gcc.target/riscv/pr93202.c: New test.

From-SVN: r280030

re PR target/93141 (Missed optimization : Use of adc when checking overflow)

PR target/93141
* config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
SWI.  Use <general_hilo_operand> instead of <general_operand>.  Use
CONST_SCALAR_INT_P instead of CONST_INT_P.
(*subv<mode>4_1): Rename to ...
(subv<mode>4_1): ... this.
(*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
define_insn_and_split patterns.
(*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
patterns.

* gcc.target/i386/pr93141-1.c: Add tests with constants that have MSB
of the low half of the constant set.
* gcc.target/i386/pr93141-2.c: New test.

From-SVN: r280029

PR libstdc++/92124 fix incorrect unordered container move assignment

* include/bits/hashtable.h (_Hashtable<>::__alloc_node_gen_t): New
template alias.
(_Hashtable<>::__fwd_value_for): New.
(_Hashtable<>::_M_assign_elements<>): Remove _NodeGenerator template
parameter.
(_Hashtable<>::_M_assign<>): Add _Ht template parameter.
(_Hashtable<>::operator=(const _Hashtable<>&)): Adapt.
(_Hashtable<>::_M_move_assign): Adapt. Replace std::move_if_noexcept
with std::move.
(_Hashtable<>::_Hashtable(const _Hashtable&)): Adapt.
(_Hashtable<>::_Hashtable(const _Hashtable&, const allocator_type&)):
Adapt.
(_Hashtable<>::_Hashtable(_Hashtable&&, const allocator_type&)):
Adapt.
* testsuite/23_containers/unordered_set/92124.cc: New.

From-SVN: r280028

vec.h: add auto_delete_vec

This patch adds a class auto_delete_vec<T>, a subclass of auto_vec <T *>
that deletes all of its elements on destruction; it's used in many
places in the analyzer patch kit.

This is a crude way for a vec to "own" the objects it points to
and clean up automatically (essentially a workaround for not being able
to use unique_ptr, due to C++98).

gcc/ChangeLog:
* vec.c (class selftest::count_dtor): New class.
(selftest::test_auto_delete_vec): New test.
(selftest::vec_c_tests): Call it.
* vec.h (class auto_delete_vec): New class template.
(auto_delete_vec<T>::~auto_delete_vec): New dtor.

From-SVN: r280027

sbitmap.h: add operator const_sbitmap to auto_sbitmap

gcc/ChangeLog:
* sbitmap.h (auto_sbitmap): Add operator const_sbitmap.

From-SVN: r280026

RISC-V: Disable use of TLS copy relocs.

Musl and lld don't support TLS copy relocs, and don't want to add support
for this feature which is unique to RISC-V.  Only GNU ld and glibc support
them.  In the pasbi discussion, people have pointed out various problems
with using them, so we are deprecating them.  There doesn't seem to be an
ABI break from dropping them so this patch modifies gcc to stop creating
them.  I'm using an ifdef for now in case a problem turns up and the code
has to be re-enabled.  The plan is to add an initial to local exec
relaxation as a replacement, though this has not been defined or
implemented yet.

gcc/
* config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
use of TLS_MODEL_LOCAL_EXEC when not pic.

From-SVN: r280025

Daily bump.

From-SVN: r280024

Add TARGET_EXPR_DIRECT_INIT_P sanity check.

* cp-gimplify.c (cp_gimplify_expr) [TARGET_EXPR]: Check
TARGET_EXPR_DIRECT_INIT_P.
* constexpr.c (cxx_eval_constant_expression): Likewise.

From-SVN: r280019

PR c++/91369 - constexpr destructor and member initializer.

Previously it didn't matter whether we looked through a TARGET_EXPR in
constexpr evaluation, but now that we have constexpr destructors it does.
On IRC I mentioned the idea of clearing TARGET_EXPR_CLEANUP in
digest_nsdmi_init, but since this initialization is expressed by an
INIT_EXPR, it's better to handle all INIT_EXPR, not just those for a member
initializer.

* constexpr.c (cxx_eval_store_expression): Look through TARGET_EXPR
when not preevaluating.

From-SVN: r280018

Remove constexpr support for DECL_BY_REFERENCE.

Since we switched to doing constexpr evaluation on pre-GENERIC trees,
we don't have to handle DECL_BY_REFERENCE.

* constexpr.c (cxx_eval_call_expression): Remove DECL_BY_REFERENCE
support.

From-SVN: r280017

* gcc.dg/Wstringop-overflow-27.c: Make testnames unique.

From-SVN: r280016

hash-map-tests.c: fix memory leak

This commit makes "make selftest-valgrind" clean by fixing this leak:

4 bytes in 1 blocks are definitely lost in loss record 1 of 734
   at 0x483AB1A: calloc (vg_replace_malloc.c:762)
   by 0x261DBE0: xcalloc (xmalloc.c:162)
   by 0x2538C46: selftest::test_map_of_strings_to_int() (hash-map-tests.c:87)
   by 0x253ABD2: selftest::hash_map_tests_c_tests() (hash-map-tests.c:307)
   by 0x24A885B: selftest::run_tests() (selftest-run-tests.c:65)
   by 0x1373D80: toplev::run_self_tests() (toplev.c:2339)
   by 0x1373FA7: toplev::main(int, char**) (toplev.c:2421)
   by 0x2550EFF: main (main.c:39)

gcc/ChangeLog:
* hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
memory leak.

From-SVN: r280015

libstdc++: Fix error handling in filesystem::remove_all (PR93201)

When recursing into a directory, any errors that occur while removing a
directory entry are ignored, because the subsequent increment of the
directory iterator clears the error_code object.

This fixes that bug by checking the result of each recursive operation
before incrementing. This is a change in observable behaviour, because
previously other directory entries would still be removed even if one
(or more) couldn't be removed due to errors. Now the operation stops on
the first error, which is what the code intended to do all along. The
standard doesn't specify what happens in this case (because the order
that the entries are processed is unspecified anyway).

It also improves the error reporting so that the name of the file that
could not be removed is included in the filesystem_error exception. This
is done by introducing a new helper type for reporting errors with
additional context and a new function that uses that type. Then the
overload of std::filesystem::remove_all that throws an exception can use
the new function to ensure any exception contains the additional
information.

For std::experimental::filesystem::remove_all just fix the bug where
errors are ignored.

PR libstdc++/93201
* src/c++17/fs_ops.cc (do_remove_all): New function implementing more
detailed error reporting for remove_all. Check result of recursive
call before incrementing iterator.
(remove_all(const path&), remove_all(const path&, error_code&)): Use
do_remove_all.
* src/filesystem/ops.cc (remove_all(const path&, error_code&)): Check
result of recursive call before incrementing iterator.
* testsuite/27_io/filesystem/operations/remove_all.cc: Check errors
are reported correctly.
* testsuite/experimental/filesystem/operations/remove_all.cc: Likewise.

From-SVN: r280014

Add missing { dg-require-effective-target fpic } to aarch64 tests

2020-01-08  Joel Brobecker  <brobecker@adacore.com>
          Olivier Hainque  <hainque@adacore.com>

testsuite/
* g++.target/aarch64/sve/tls_2.C: Add missing
{ dg-require-effective-target fpic } directive.
* gcc.target/aarch64/noplt_2.c: Likewise.
* gcc.target/aarch64/noplt_3.c: Likewise.
* gcc.target/aarch64/pic-constantpool1.c: Likewise.
* gcc.target/aarch64/pic-small.c: Likewise.
* gcc.target/aarch64/pic-symrefplus.c: Likewise.
* gcc.target/aarch64/pr66912.c: Likewise.
* gcc.target/aarch64/sve/tls_1.c: Likewise.
* gcc.target/aarch64/sve/tls_preserve_1.c: Likewise.
* gcc.target/aarch64/sve/tls_preserve_2.c: Likewise.
* gcc.target/aarch64/sve/tls_preserve_3.c: Likewise.
* gcc.target/aarch64/tlsie_tiny_1.c: Likewise.
* gcc.target/aarch64/tlsle12_1.c: Likewise.
* gcc.target/aarch64/tlsle12_tiny_1.c: Likewise.
* gcc.target/aarch64/tlsle24_1.c: Likewise.
* gcc.target/aarch64/tlsle24_tiny_1.c: Likewise.
* gcc.target/aarch64/tlsle32_1.c: Likewise.
* gcc.target/aarch64/tlsle_sizeadj_small_1.c: Likewise.
* gcc.target/aarch64/tlsle_sizeadj_tiny_1.c: Likewise.

Co-Authored-By: Olivier Hainque <hainque@adacore.com>
From-SVN: r280013

re PR target/93187 (ICE in extract_insn, at recog.c:2294)

PR target/93187
* config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
*stack_protect_set_3 peephole2): Also check that the second
insns source is general_operand.

* g++.dg/opt/pr93187.C: New test.

From-SVN: r280012

re PR target/93174 (ICE building glibc __sha512_process_block for i686)

PR target/93174
* config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
predicate for output operand instead of register_operand.
(addcarry<mode>, addcarry<mode>_1): Likewise.  Add alternative with
memory destination and non-memory operands[2].

* gcc.c-torture/compile/pr93174.c: New test.

From-SVN: r280011

relax aarch64 stack-clash tests depedence on alloca.h

2020-01-06  Olivier Hainque  <hainque@adacore.com>
Alexandre Oliva  <oliva@adacore.com>

* gcc.target/aarch64/stack-check-alloca.h: Remove
#include alloca.h. #define alloca __builtin_alloca
instead.
* gcc.target/aarch64/stack-check-alloca-1.c: Add
{ dg-require-effective-target alloca }.
* gcc.target/aarch64/stack-check-alloca-2.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-3.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-4.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-5.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-6.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-7.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-8.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-9.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-10.c: Likewise.

Co-Authored-By: Alexandre Oliva <oliva@adacore.com>
From-SVN: r280010

Use cgraph_node::dump_{asm_},name where possible.

2020-01-08  Martin Liska  <mliska@suse.cz>

* cgraph.c (cgraph_node::dump): Use ::dump_name or
::dump_asm_name instead of (::name or ::asm_name).
* cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
* cgraphunit.c (walk_polymorphic_call_targets): Likewise.
(analyze_functions): Likewise.
(expand_all_functions): Likewise.
* ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
(propagate_bits_across_jump_function): Likewise.
(dump_profile_updates): Likewise.
(ipcp_store_bits_results): Likewise.
(ipcp_store_vr_results): Likewise.
* ipa-devirt.c (dump_targets): Likewise.
* ipa-fnsummary.c (analyze_function_body): Likewise.
* ipa-hsa.c (check_warn_node_versionable): Likewise.
(process_hsa_functions): Likewise.
* ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
(set_alias_uids): Likewise.
* ipa-inline-transform.c (save_inline_function_body): Likewise.
* ipa-inline.c (recursive_inlining): Likewise.
(inline_to_all_callers_1): Likewise.
(ipa_inline): Likewise.
* ipa-profile.c (ipa_propagate_frequency_1): Likewise.
(ipa_propagate_frequency): Likewise.
* ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
(remove_described_reference): Likewise.
* ipa-pure-const.c (worse_state): Likewise.
(check_retval_uses): Likewise.
(analyze_function): Likewise.
(propagate_pure_const): Likewise.
(propagate_nothrow): Likewise.
(dump_malloc_lattice): Likewise.
(propagate_malloc): Likewise.
(pass_local_pure_const::execute): Likewise.
* ipa-visibility.c (optimize_weakref): Likewise.
(function_and_variable_visibility): Likewise.
* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
(ipa_discover_variable_flags): Likewise.
* lto-streamer-out.c (output_function): Likewise.
(output_constructor): Likewise.
* tree-inline.c (copy_bb): Likewise.
* tree-ssa-structalias.c (ipa_pta_execute): Likewise.
* varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
2020-01-08  Martin Liska  <mliska@suse.cz>

* lto-partition.c (add_symbol_to_partition_1): Use ::dump_name or
::dump_asm_name instead of (::name or ::asm_name).
(lto_balanced_map): Likewise.
(promote_symbol): Likewise.
(rename_statics): Likewise.
* lto.c (lto_wpa_write_files): Likewise.
2020-01-08  Martin Liska  <mliska@suse.cz>

* gcc.dg/ipa/ipa-icf-1.c: Update expected scanned output.
* gcc.dg/ipa/ipa-icf-10.c: Likewise.
* gcc.dg/ipa/ipa-icf-11.c: Likewise.
* gcc.dg/ipa/ipa-icf-12.c: Likewise.
* gcc.dg/ipa/ipa-icf-13.c: Likewise.
* gcc.dg/ipa/ipa-icf-16.c: Likewise.
* gcc.dg/ipa/ipa-icf-18.c: Likewise.
* gcc.dg/ipa/ipa-icf-2.c: Likewise.
* gcc.dg/ipa/ipa-icf-20.c: Likewise.
* gcc.dg/ipa/ipa-icf-21.c: Likewise.
* gcc.dg/ipa/ipa-icf-23.c: Likewise.
* gcc.dg/ipa/ipa-icf-25.c: Likewise.
* gcc.dg/ipa/ipa-icf-26.c: Likewise.
* gcc.dg/ipa/ipa-icf-27.c: Likewise.
* gcc.dg/ipa/ipa-icf-3.c: Likewise.
* gcc.dg/ipa/ipa-icf-35.c: Likewise.
* gcc.dg/ipa/ipa-icf-36.c: Likewise.
* gcc.dg/ipa/ipa-icf-37.c: Likewise.
* gcc.dg/ipa/ipa-icf-38.c: Likewise.
* gcc.dg/ipa/ipa-icf-5.c: Likewise.
* gcc.dg/ipa/ipa-icf-7.c: Likewise.
* gcc.dg/ipa/ipa-icf-8.c: Likewise.
* gcc.dg/ipa/ipa-icf-merge-1.c: Likewise.
* gcc.dg/ipa/pr64307.c: Likewise.
* gcc.dg/ipa/pr90555.c: Likewise.
* gcc.dg/ipa/propmalloc-1.c: Likewise.
* gcc.dg/ipa/propmalloc-2.c: Likewise.
* gcc.dg/ipa/propmalloc-3.c: Likewise.

From-SVN: r280009

libgomp.texi: Fix typos, use https (actual change)

From-SVN: r280008

libgomp.texi: Fix typos, use https.

From-SVN: r280007

re PR tree-optimization/93199 (Compile time hog in sink_clobbers)

2020-01-08  Richard Biener  <rguenther@suse.de>

PR middle-end/93199
* tree-eh.c (sink_clobbers): Update virtual operands for
the first and last stmt only.  Add a dry-run capability.
(pass_lower_eh_dispatch::execute): Perform clobber sinking
after CFG manipulations and in RPO order to catch all
secondary opportunities reliably.

From-SVN: r280006

re PR target/93182 ([avr] Add -nodevicespecs option.)

PR target/93182
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.

From-SVN: r280005

re PR other/92997 (gcc.dg/torture/ftrapv-1.c fails starting with r279523)

2020-01-08  Richard Biener  <rguenther@suse.de>

PR testsuite/92997
* gcc.dg/torture/ftrapv-1.c (iaddv): Use noipa attribute.

From-SVN: r280003

* gcc/doc/install.texi: Typo.

From-SVN: r280002

re PR tree-optimization/93199 (Compile time hog in sink_clobbers)

2019-01-08  Richard Biener  <rguenther@suse.de>

PR middle-end/93199
c/
* gimple-parser.c (c_parser_parse_gimple_body): Remove __PHI IFN
permanently.

* gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
* tree-ssa-loop-im.c (move_computations_worker): Properly adjust
virtual operand, also updating SSA use.
* gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
Update stmt after resetting virtual operand.
(tree_loop_interchange::move_code_to_inner_loop): Likewise.

* gimple-iterator.c (gsi_remove): When not removing the stmt
permanently do not delink immediate uses or mark the stmt modified.

From-SVN: r280000

Replace node->name/node->order with node->dump_name.

2020-01-08  Martin Liska  <mliska@suse.cz>

* ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
(ipa_call_context::estimate_size_and_time): Likewise.
(inline_analyze_function): Likewise.
2020-01-08  Martin Liska  <mliska@suse.cz>

* lto-partition.c (lto_balanced_map): Use symtab_node::dump_name.

From-SVN: r279999

Use dump_asm_name for Callers/Calls in dump.

2020-01-08  Martin Liska  <mliska@suse.cz>

* cgraph.c (cgraph_node::dump): Use systematically
dump_asm_name.

From-SVN: r279998

Add -nodevicespecs option for avr.

gcc/
Add -nodevicespecs option for avr.

PR target/93182
* config/avr/avr.opt (-nodevicespecs): New driver option.
* config/avr/driver-avr.c (avr_devicespecs_file): Only issue
"-specs=device-specs/..." if that option is not set.
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.

From-SVN: r279995

Implement 64-bit double functions.

gcc/
PR target/92055
* config.gcc (tm_defines) [target=avr]: Support --with-libf7,
--with-double-comparison.
* doc/install.texi: Document them.
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
<WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
<WITH_DOUBLE_COMPARISON>: New built-in defines.
* doc/invoke.texi (AVR Built-in Macros): Document them.
* config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
* config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
* config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
libgcc/
PR target/92055
* config.host (tmake_file) [target=avr]: Add t-libf7,
t-libf7-math, t-libf7-math-symbols as specified by --with-libf7=.
* config/avr/t-avrlibc: Don't copy libgcc.a if there are modules
depending on sizeof (double) or sizeof (long double).
* config/avr/libf7: New folder.
libgcc/config/avr/libf7/
PR target/92055
* t-libf7: New file.
* t-libf7-math: New file.
* t-libf7-math-symbols: New file.
* libf7-common.mk: New file.
* libf7-asm-object.mk: New file.
* libf7-c-object.mk: New file.
* asm-defs.h: New file.
* libf7.h: New file.
* libf7.c: New file.
* libf7-asm.sx: New file.
* libf7-array.def: New file.
* libf7-const.def: New file.
* libf7-constdef.h: New file.
* f7renames.sh: New script.
* f7wraps.sh: New script.
* f7-renames.h: New generated file.
* f7-wraps.h: New generated file.

From-SVN: r279994

arm: Fix rmprofile multilibs when architecture includes +mp or +sec (PR target/93188)

When only the rmprofile multilibs are built, compiling for armv7-a
should select the generic v7 multilibs.  This used to work before +sec
and +mp were added to the architecture options but it was broken by
that update.  This patch fixes those variants and adds some tests to
ensure that they remain fixed ;-)

PR target/93188
* config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
when only building rm-profile multilibs.

* gcc.target/arm/multilib.exp: Add new tests for rm-profile only.

From-SVN: r279993

whitespace

From-SVN: r279989