yosys.git
5 years agoRun muxpack and muxcover in synth_xilinx
Eddie Hung [Thu, 6 Jun 2019 21:43:08 +0000 (14:43 -0700)]
Run muxpack and muxcover in synth_xilinx

5 years agoRemove abc_flop attributes for now
Eddie Hung [Thu, 6 Jun 2019 21:35:38 +0000 (14:35 -0700)]
Remove abc_flop attributes for now

5 years agoMerge remote-tracking branch 'origin/eddie/muxpack' into xc7mux
Eddie Hung [Thu, 6 Jun 2019 21:22:10 +0000 (14:22 -0700)]
Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux

5 years agoFix and test for balanced case
Eddie Hung [Thu, 6 Jun 2019 21:21:34 +0000 (14:21 -0700)]
Fix and test for balanced case

5 years agoMerge remote-tracking branch 'origin/eddie/muxpack' into xc7mux
Eddie Hung [Thu, 6 Jun 2019 21:06:59 +0000 (14:06 -0700)]
Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux

5 years agoFix warnings
Eddie Hung [Thu, 6 Jun 2019 21:01:42 +0000 (14:01 -0700)]
Fix warnings

5 years agoSupport cascading $pmux.A with $mux.A and $mux.B
Eddie Hung [Thu, 6 Jun 2019 20:51:22 +0000 (13:51 -0700)]
Support cascading $pmux.A with $mux.A and $mux.B

5 years agoMore cleanup
Eddie Hung [Thu, 6 Jun 2019 19:56:34 +0000 (12:56 -0700)]
More cleanup

5 years agoFix spacing
Eddie Hung [Thu, 6 Jun 2019 19:46:42 +0000 (12:46 -0700)]
Fix spacing

5 years agoNon chain user check using next_sig
Eddie Hung [Thu, 6 Jun 2019 19:44:50 +0000 (12:44 -0700)]
Non chain user check using next_sig

5 years agoAdd non exclusive test
Eddie Hung [Thu, 6 Jun 2019 19:44:06 +0000 (12:44 -0700)]
Add non exclusive test

5 years agoMove muxpack from passes/techmap to passes/opt
Eddie Hung [Thu, 6 Jun 2019 19:15:13 +0000 (12:15 -0700)]
Move muxpack from passes/techmap to passes/opt

5 years agoUpdate doc
Eddie Hung [Thu, 6 Jun 2019 19:11:59 +0000 (12:11 -0700)]
Update doc

5 years agoAdd to CHANGELOG
Eddie Hung [Thu, 6 Jun 2019 19:04:42 +0000 (12:04 -0700)]
Add to CHANGELOG

5 years agoOne more and tidy up
Eddie Hung [Thu, 6 Jun 2019 19:03:44 +0000 (12:03 -0700)]
One more and tidy up

5 years agoAdd a few more special case tests
Eddie Hung [Thu, 6 Jun 2019 18:59:41 +0000 (11:59 -0700)]
Add a few more special case tests

5 years agoAdd tests, fix for !=
Eddie Hung [Thu, 6 Jun 2019 18:54:38 +0000 (11:54 -0700)]
Add tests, fix for !=

5 years agoMissing file
Eddie Hung [Thu, 6 Jun 2019 18:03:45 +0000 (11:03 -0700)]
Missing file

5 years agoInitial adaptation of muxpack from shregmap
Eddie Hung [Thu, 6 Jun 2019 17:51:02 +0000 (10:51 -0700)]
Initial adaptation of muxpack from shregmap

5 years agoMerge pull request #1060 from antmicro/parsing_attr_on_port_conn
Clifford Wolf [Thu, 6 Jun 2019 10:34:05 +0000 (12:34 +0200)]
Merge pull request #1060 from antmicro/parsing_attr_on_port_conn

Added support for parsing attributes on port connections.

5 years agoMerge pull request #1073 from whitequark/ecp5-diamond-iob
David Shah [Thu, 6 Jun 2019 10:22:49 +0000 (11:22 +0100)]
Merge pull request #1073 from whitequark/ecp5-diamond-iob

ECP5: implement most Diamond I/O buffer primitives

5 years agoECP5: implement all Diamond I/O buffer primitives.
whitequark [Thu, 6 Jun 2019 10:03:03 +0000 (10:03 +0000)]
ECP5: implement all Diamond I/O buffer primitives.

5 years agoMerge pull request #1071 from YosysHQ/eddie/fix_1070
Clifford Wolf [Thu, 6 Jun 2019 04:50:12 +0000 (06:50 +0200)]
Merge pull request #1071 from YosysHQ/eddie/fix_1070

Fix typo in opt_rmdff causing register to be incorrectly removed

5 years agoMerge pull request #1072 from YosysHQ/eddie/fix_1069
Clifford Wolf [Thu, 6 Jun 2019 04:49:07 +0000 (06:49 +0200)]
Merge pull request #1072 from YosysHQ/eddie/fix_1069

Error out if no top module given before 'sim'

5 years agoMissing doc for -tech xilinx in shregmap
Eddie Hung [Wed, 5 Jun 2019 21:21:44 +0000 (14:21 -0700)]
Missing doc for -tech xilinx in shregmap

5 years agoError out if no top module given before 'sim'
Eddie Hung [Wed, 5 Jun 2019 21:16:24 +0000 (14:16 -0700)]
Error out if no top module given before 'sim'

5 years agoFix typo in opt_rmdff
Eddie Hung [Wed, 5 Jun 2019 21:08:14 +0000 (14:08 -0700)]
Fix typo in opt_rmdff

5 years agoshregmap -tech xilinx_static to handle INIT
Eddie Hung [Wed, 5 Jun 2019 19:55:59 +0000 (12:55 -0700)]
shregmap -tech xilinx_static to handle INIT

5 years agoContinue support for ShregmapTechXilinx7Static
Eddie Hung [Wed, 5 Jun 2019 19:33:55 +0000 (12:33 -0700)]
Continue support for ShregmapTechXilinx7Static

5 years agoUpdate abc attributes on FD*E_1
Eddie Hung [Wed, 5 Jun 2019 19:33:40 +0000 (12:33 -0700)]
Update abc attributes on FD*E_1

5 years agoCleanup
Eddie Hung [Wed, 5 Jun 2019 19:28:46 +0000 (12:28 -0700)]
Cleanup

5 years agoCall shregmap -tech xilinx_static
Eddie Hung [Wed, 5 Jun 2019 19:28:26 +0000 (12:28 -0700)]
Call shregmap -tech xilinx_static

5 years agoRevert "Move ff_map back after ABC for shregmap"
Eddie Hung [Wed, 5 Jun 2019 18:53:06 +0000 (11:53 -0700)]
Revert "Move ff_map back after ABC for shregmap"

This reverts commit 9b9bd4e19f3da363eb3c90ef27ace282716d2e06.

5 years agoAdd -tech xilinx_static
Eddie Hung [Wed, 5 Jun 2019 18:14:14 +0000 (11:14 -0700)]
Add -tech xilinx_static

5 years agoRefactor to ShregmapTechXilinx7Static
Eddie Hung [Wed, 5 Jun 2019 18:08:08 +0000 (11:08 -0700)]
Refactor to ShregmapTechXilinx7Static

5 years agoshregmap -tech xilinx_dynamic to work -params and -enpol
Eddie Hung [Wed, 5 Jun 2019 17:21:57 +0000 (10:21 -0700)]
shregmap -tech xilinx_dynamic to work -params and -enpol

5 years agoMerge pull request #1067 from YosysHQ/clifford/fix1065
Eddie Hung [Wed, 5 Jun 2019 16:59:05 +0000 (09:59 -0700)]
Merge pull request #1067 from YosysHQ/clifford/fix1065

Suppress driver-driver conflict warning for unknown cell types

5 years agoMerge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung [Wed, 5 Jun 2019 16:56:57 +0000 (09:56 -0700)]
Merge remote-tracking branch 'origin/master' into xc7mux

5 years agoMerge remote-tracking branch 'origin/clifford/fix1065' into xc7mux
Eddie Hung [Wed, 5 Jun 2019 16:56:51 +0000 (09:56 -0700)]
Merge remote-tracking branch 'origin/clifford/fix1065' into xc7mux

5 years agoFixed memory leak.
Maciej Kurc [Wed, 5 Jun 2019 08:42:43 +0000 (10:42 +0200)]
Fixed memory leak.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
5 years agoMerge pull request #1066 from YosysHQ/clifford/fix1056
Clifford Wolf [Wed, 5 Jun 2019 08:37:39 +0000 (10:37 +0200)]
Merge pull request #1066 from YosysHQ/clifford/fix1056

Remove yosys_banner() from python wrapper init

5 years agoMajor rewrite of wire selection in setundef -init
Clifford Wolf [Wed, 5 Jun 2019 08:26:48 +0000 (10:26 +0200)]
Major rewrite of wire selection in setundef -init

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoIndent fix
Clifford Wolf [Wed, 5 Jun 2019 07:53:06 +0000 (09:53 +0200)]
Indent fix

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #999 from jakobwenzel/setundefInitFix
Clifford Wolf [Wed, 5 Jun 2019 07:50:15 +0000 (09:50 +0200)]
Merge pull request #999 from jakobwenzel/setundefInitFix

initialize more registers in setundef -init

5 years agoFix typo in fmcombine log message, fixes #1063
Clifford Wolf [Wed, 5 Jun 2019 07:26:44 +0000 (09:26 +0200)]
Fix typo in fmcombine log message, fixes #1063

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoSuppress driver-driver conflict warning for unknown cell types, fixes #1065
Clifford Wolf [Wed, 5 Jun 2019 07:14:12 +0000 (09:14 +0200)]
Suppress driver-driver conflict warning for unknown cell types, fixes #1065

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoRemove yosys_banner() from python wrapper init, fixes #1056
Clifford Wolf [Wed, 5 Jun 2019 06:57:33 +0000 (08:57 +0200)]
Remove yosys_banner() from python wrapper init, fixes #1056

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoRename shregmap -tech xilinx -> xilinx_dynamic
Eddie Hung [Tue, 4 Jun 2019 21:34:36 +0000 (14:34 -0700)]
Rename shregmap -tech xilinx -> xilinx_dynamic

5 years agoAdd log_assert to ensure no loops
Eddie Hung [Tue, 4 Jun 2019 19:01:25 +0000 (12:01 -0700)]
Add log_assert to ensure no loops

5 years agoOnly toposort builtin and abc types
Eddie Hung [Tue, 4 Jun 2019 18:56:58 +0000 (11:56 -0700)]
Only toposort builtin and abc types

5 years agoAdd space between -D and _ABC
Eddie Hung [Tue, 4 Jun 2019 18:54:08 +0000 (11:54 -0700)]
Add space between -D and _ABC

5 years agoAdd (* abc_flop_q *) to brams_bb.v
Eddie Hung [Tue, 4 Jun 2019 18:53:51 +0000 (11:53 -0700)]
Add (* abc_flop_q *) to brams_bb.v

5 years agoFix name clash
Eddie Hung [Tue, 4 Jun 2019 16:56:36 +0000 (09:56 -0700)]
Fix name clash

5 years agoAdd mux_map.v for wide mux
Eddie Hung [Tue, 4 Jun 2019 16:51:47 +0000 (09:51 -0700)]
Add mux_map.v for wide mux

5 years agoMerge pull request #1062 from tux3/patch-1
Clifford Wolf [Tue, 4 Jun 2019 12:37:10 +0000 (14:37 +0200)]
Merge pull request #1062 from tux3/patch-1

README.md: Missing formatting for <tag>

5 years agoREADME.md: Missing formatting for <tag>
Tux3 [Tue, 4 Jun 2019 08:45:41 +0000 (10:45 +0200)]
README.md: Missing formatting for <tag>

5 years agoMoved tests that fail with Icarus Verilog to /tests/various. Those tests are just...
Maciej Kurc [Tue, 4 Jun 2019 08:42:42 +0000 (10:42 +0200)]
Moved tests that fail with Icarus Verilog to /tests/various. Those tests are just for parsing Verilog.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
5 years agoMove ff_map back after ABC for shregmap
Eddie Hung [Tue, 4 Jun 2019 06:43:23 +0000 (23:43 -0700)]
Move ff_map back after ABC for shregmap

5 years agoRespect -nocarry
Eddie Hung [Tue, 4 Jun 2019 06:42:30 +0000 (23:42 -0700)]
Respect -nocarry

5 years agoFix pmux2shiftx logic
Eddie Hung [Tue, 4 Jun 2019 06:29:45 +0000 (23:29 -0700)]
Fix pmux2shiftx logic

5 years agoMerge mistake
Eddie Hung [Tue, 4 Jun 2019 06:19:22 +0000 (23:19 -0700)]
Merge mistake

5 years agoMerge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung [Tue, 4 Jun 2019 06:07:08 +0000 (23:07 -0700)]
Merge remote-tracking branch 'origin/master' into xc7mux

5 years agoMerge pull request #1061 from YosysHQ/eddie/techmap_and_arith_map
Eddie Hung [Tue, 4 Jun 2019 03:23:37 +0000 (20:23 -0700)]
Merge pull request #1061 from YosysHQ/eddie/techmap_and_arith_map

Execute techmap and arith_map simultaneously

5 years agoTypo
Eddie Hung [Tue, 4 Jun 2019 03:21:41 +0000 (20:21 -0700)]
Typo

5 years agoRemove extra newline
Eddie Hung [Tue, 4 Jun 2019 03:04:47 +0000 (20:04 -0700)]
Remove extra newline

5 years agoIS_C_INVERTED
Eddie Hung [Tue, 4 Jun 2019 02:45:56 +0000 (19:45 -0700)]
IS_C_INVERTED

5 years agoExecute techmap and arith_map simultaneously
Eddie Hung [Tue, 4 Jun 2019 02:36:09 +0000 (19:36 -0700)]
Execute techmap and arith_map simultaneously

5 years agoFix `ifndef
Eddie Hung [Mon, 3 Jun 2019 19:37:02 +0000 (12:37 -0700)]
Fix `ifndef

5 years agoMake SB_LUT4 a whitebox, SB_DFF a blackbox (for now)
Eddie Hung [Mon, 3 Jun 2019 19:34:55 +0000 (12:34 -0700)]
Make SB_LUT4 a whitebox, SB_DFF a blackbox (for now)

5 years agoAssert that box_unique_id is indeed unique
Eddie Hung [Mon, 3 Jun 2019 19:33:47 +0000 (12:33 -0700)]
Assert that box_unique_id is indeed unique

5 years agoRemove dupe
Eddie Hung [Mon, 3 Jun 2019 19:32:20 +0000 (12:32 -0700)]
Remove dupe

5 years agoSkip internal modules when generating box_unique_id
Eddie Hung [Mon, 3 Jun 2019 19:31:23 +0000 (12:31 -0700)]
Skip internal modules when generating box_unique_id

5 years agoWhen creating new holes cell, inherit parameters too
Eddie Hung [Mon, 3 Jun 2019 19:30:54 +0000 (12:30 -0700)]
When creating new holes cell, inherit parameters too

5 years agoOoopsie
Eddie Hung [Mon, 3 Jun 2019 16:33:42 +0000 (09:33 -0700)]
Ooopsie

5 years agoConsistent with xilinx
Eddie Hung [Mon, 3 Jun 2019 16:23:43 +0000 (09:23 -0700)]
Consistent with xilinx

5 years agoAdded tests for attributes
Maciej Kurc [Mon, 3 Jun 2019 07:12:51 +0000 (09:12 +0200)]
Added tests for attributes

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
5 years agoOnly support Symbiotic EDA flavored Verific
Clifford Wolf [Sun, 2 Jun 2019 08:14:50 +0000 (10:14 +0200)]
Only support Symbiotic EDA flavored Verific

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd flops as blackboxes
Eddie Hung [Sat, 1 Jun 2019 01:11:46 +0000 (18:11 -0700)]
Add flops as blackboxes

5 years agoAdd FD*E_1 -> FD*E techmap rules
Eddie Hung [Sat, 1 Jun 2019 01:11:24 +0000 (18:11 -0700)]
Add FD*E_1 -> FD*E techmap rules

5 years agoTechmap flops before ABC again
Eddie Hung [Sat, 1 Jun 2019 01:10:25 +0000 (18:10 -0700)]
Techmap flops before ABC again

5 years agoparse_xaiger to cope with flops
Eddie Hung [Sat, 1 Jun 2019 01:06:36 +0000 (18:06 -0700)]
parse_xaiger to cope with flops

5 years agoABC9 to understand flops
Eddie Hung [Fri, 31 May 2019 22:23:33 +0000 (15:23 -0700)]
ABC9 to understand flops

5 years agoMerge branch 'xaig' into xc7mux
Eddie Hung [Fri, 31 May 2019 20:03:03 +0000 (13:03 -0700)]
Merge branch 'xaig' into xc7mux

5 years agoThrow out unused code inherited from abc
Eddie Hung [Fri, 31 May 2019 19:50:11 +0000 (12:50 -0700)]
Throw out unused code inherited from abc

5 years agoAdded support for parsing attributes on port connections.
Maciej Kurc [Fri, 31 May 2019 10:24:12 +0000 (12:24 +0200)]
Added support for parsing attributes on port connections.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
5 years agoFix "tee" handling of log_streams
Clifford Wolf [Fri, 31 May 2019 07:28:51 +0000 (09:28 +0200)]
Fix "tee" handling of log_streams

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix issue where keep signal became PI, but also box was adding CI driver
Eddie Hung [Thu, 30 May 2019 23:03:22 +0000 (16:03 -0700)]
Fix issue where keep signal became PI, but also box was adding CI driver

5 years agoread_xaiger() to name box signals
Eddie Hung [Thu, 30 May 2019 23:02:40 +0000 (16:02 -0700)]
read_xaiger() to name box signals

5 years agoFix spelling
Eddie Hung [Thu, 30 May 2019 22:50:47 +0000 (15:50 -0700)]
Fix spelling

5 years agoRemove whitebox attribute from DRAMs for now
Eddie Hung [Thu, 30 May 2019 20:07:29 +0000 (13:07 -0700)]
Remove whitebox attribute from DRAMs for now

5 years agoDo not re-sort box_module ports
Eddie Hung [Thu, 30 May 2019 19:26:51 +0000 (12:26 -0700)]
Do not re-sort box_module ports

5 years agoRemove whitespace
Eddie Hung [Thu, 30 May 2019 19:25:21 +0000 (12:25 -0700)]
Remove whitespace

5 years agoRevert "Re-enable &dc2"
Eddie Hung [Thu, 30 May 2019 18:41:50 +0000 (11:41 -0700)]
Revert "Re-enable &dc2"

This reverts commit 8c58c728a79954603289abf3520139da0a9bbb26.

5 years agoDo not double count LUT1s
Eddie Hung [Thu, 30 May 2019 18:32:14 +0000 (11:32 -0700)]
Do not double count LUT1s

5 years agoCarry in/out to be the last input/output for chains to be preserved
Eddie Hung [Thu, 30 May 2019 08:23:36 +0000 (01:23 -0700)]
Carry in/out to be the last input/output for chains to be preserved

5 years agoEnable Verific flag veri_elaborate_top_level_modules_having_interface_ports, fixes...
Clifford Wolf [Thu, 30 May 2019 08:03:54 +0000 (10:03 +0200)]
Enable Verific flag veri_elaborate_top_level_modules_having_interface_ports, fixes #1055

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #1057 from mmicko/fix_478
Clifford Wolf [Thu, 30 May 2019 07:58:51 +0000 (09:58 +0200)]
Merge pull request #1057 from mmicko/fix_478

Aded one more load of .conf to support change of prefix

5 years agoRe-enable &dc2
Eddie Hung [Thu, 30 May 2019 07:42:41 +0000 (00:42 -0700)]
Re-enable &dc2

5 years agoReduce -W to 160
Eddie Hung [Thu, 30 May 2019 06:01:46 +0000 (23:01 -0700)]
Reduce -W to 160

5 years agoSome more realistic delays...
Eddie Hung [Thu, 30 May 2019 05:55:34 +0000 (22:55 -0700)]
Some more realistic delays...