lkcl [Thu, 29 Sep 2022 22:44:22 +0000 (23:44 +0100)]
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 20:05:57 +0000 (21:05 +0100)]
shuffle eamples around to fit more words on pages
lkcl [Thu, 29 Sep 2022 19:47:49 +0000 (20:47 +0100)]
veerakumar_r [Thu, 29 Sep 2022 16:02:09 +0000 (17:02 +0100)]
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 11:30:09 +0000 (12:30 +0100)]
mention idea of reserving 25% only of PO9 for non-Vectorised uses
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 11:18:26 +0000 (12:18 +0100)]
whitespace
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 11:18:03 +0000 (12:18 +0100)]
add bigint examples
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 08:45:52 +0000 (09:45 +0100)]
replace image bug #907
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 08:45:39 +0000 (09:45 +0100)]
fix reporting in remapmatrix.py
Jacob Lifshay [Thu, 29 Sep 2022 03:08:47 +0000 (20:08 -0700)]
rename madded->maddedu for consistency with PowerISA maddhdu instruction
Jacob Lifshay [Thu, 29 Sep 2022 03:02:58 +0000 (20:02 -0700)]
rename divrem2du->divmod2du for consistency with PowerISA mod* instructions
lkcl [Wed, 28 Sep 2022 16:24:04 +0000 (17:24 +0100)]
lkcl [Wed, 28 Sep 2022 16:21:49 +0000 (17:21 +0100)]
lkcl [Wed, 28 Sep 2022 01:10:35 +0000 (02:10 +0100)]
lkcl [Tue, 27 Sep 2022 15:27:41 +0000 (16:27 +0100)]
Luke Kenneth Casson Leighton [Tue, 27 Sep 2022 10:48:37 +0000 (11:48 +0100)]
add 10-bit SAR ADC
Jacob Lifshay [Mon, 26 Sep 2022 21:57:12 +0000 (14:57 -0700)]
pcdec. max bits handled for 1 code is 5 bits, not 6
Jacob Lifshay [Mon, 26 Sep 2022 21:56:17 +0000 (14:56 -0700)]
pcdec.: swap RA/RB to match openpower-isa.git
lkcl [Mon, 26 Sep 2022 15:03:50 +0000 (16:03 +0100)]
lkcl [Sun, 25 Sep 2022 20:42:05 +0000 (21:42 +0100)]
lkcl [Sun, 25 Sep 2022 18:21:40 +0000 (19:21 +0100)]
lkcl [Sun, 25 Sep 2022 12:56:40 +0000 (13:56 +0100)]
lkcl [Sun, 25 Sep 2022 09:39:56 +0000 (10:39 +0100)]
lkcl [Sun, 25 Sep 2022 09:36:09 +0000 (10:36 +0100)]
lkcl [Sun, 25 Sep 2022 09:04:44 +0000 (10:04 +0100)]
lkcl [Sun, 25 Sep 2022 09:00:50 +0000 (10:00 +0100)]
lkcl [Sun, 25 Sep 2022 08:59:00 +0000 (09:59 +0100)]
lkcl [Sun, 25 Sep 2022 08:55:41 +0000 (09:55 +0100)]
lkcl [Sun, 25 Sep 2022 04:03:22 +0000 (05:03 +0100)]
lkcl [Sun, 25 Sep 2022 01:47:55 +0000 (02:47 +0100)]
lkcl [Sun, 25 Sep 2022 01:34:51 +0000 (02:34 +0100)]
lkcl [Sun, 25 Sep 2022 01:30:22 +0000 (02:30 +0100)]
lkcl [Sun, 25 Sep 2022 01:24:37 +0000 (02:24 +0100)]
lkcl [Sun, 25 Sep 2022 01:22:15 +0000 (02:22 +0100)]
lkcl [Sun, 25 Sep 2022 00:58:16 +0000 (01:58 +0100)]
lkcl [Sun, 25 Sep 2022 00:26:51 +0000 (01:26 +0100)]
lkcl [Sun, 25 Sep 2022 00:22:46 +0000 (01:22 +0100)]
lkcl [Sun, 25 Sep 2022 00:20:20 +0000 (01:20 +0100)]
lkcl [Sun, 25 Sep 2022 00:15:05 +0000 (01:15 +0100)]
lkcl [Sun, 25 Sep 2022 00:05:04 +0000 (01:05 +0100)]
lkcl [Sat, 24 Sep 2022 23:50:46 +0000 (00:50 +0100)]
lkcl [Sat, 24 Sep 2022 23:46:25 +0000 (00:46 +0100)]
lkcl [Sat, 24 Sep 2022 23:35:23 +0000 (00:35 +0100)]
lkcl [Sat, 24 Sep 2022 23:25:45 +0000 (00:25 +0100)]
lkcl [Sat, 24 Sep 2022 23:19:47 +0000 (00:19 +0100)]
lkcl [Sat, 24 Sep 2022 23:15:49 +0000 (00:15 +0100)]
lkcl [Sat, 24 Sep 2022 23:14:38 +0000 (00:14 +0100)]
lkcl [Sat, 24 Sep 2022 23:11:45 +0000 (00:11 +0100)]
lkcl [Sat, 24 Sep 2022 22:58:35 +0000 (23:58 +0100)]
lkcl [Sat, 24 Sep 2022 20:29:37 +0000 (21:29 +0100)]
lkcl [Sat, 24 Sep 2022 20:19:25 +0000 (21:19 +0100)]
lkcl [Sat, 24 Sep 2022 10:47:32 +0000 (11:47 +0100)]
lkcl [Sat, 24 Sep 2022 09:30:37 +0000 (10:30 +0100)]
lkcl [Sat, 24 Sep 2022 09:25:42 +0000 (10:25 +0100)]
lkcl [Fri, 23 Sep 2022 22:45:50 +0000 (23:45 +0100)]
lkcl [Fri, 23 Sep 2022 13:53:03 +0000 (14:53 +0100)]
lkcl [Fri, 23 Sep 2022 13:43:11 +0000 (14:43 +0100)]
lkcl [Fri, 23 Sep 2022 13:36:41 +0000 (14:36 +0100)]
lkcl [Fri, 23 Sep 2022 13:30:26 +0000 (14:30 +0100)]
lkcl [Fri, 23 Sep 2022 12:45:10 +0000 (13:45 +0100)]
lkcl [Fri, 23 Sep 2022 12:35:33 +0000 (13:35 +0100)]
Jacob Lifshay [Fri, 23 Sep 2022 03:36:39 +0000 (20:36 -0700)]
link to pseudo-code in openpower-isa.git
Jacob Lifshay [Thu, 22 Sep 2022 23:11:51 +0000 (16:11 -0700)]
apply pseudo-code corrections
lkcl [Thu, 22 Sep 2022 22:00:44 +0000 (23:00 +0100)]
lkcl [Thu, 22 Sep 2022 21:56:17 +0000 (22:56 +0100)]
lkcl [Thu, 22 Sep 2022 16:48:08 +0000 (17:48 +0100)]
lkcl [Thu, 22 Sep 2022 16:47:16 +0000 (17:47 +0100)]
lkcl [Thu, 22 Sep 2022 16:42:47 +0000 (17:42 +0100)]
Luke Kenneth Casson Leighton [Thu, 22 Sep 2022 13:46:31 +0000 (14:46 +0100)]
change to zdimsz for DCT/FFT "stride"
lkcl [Thu, 22 Sep 2022 12:11:48 +0000 (13:11 +0100)]
lkcl [Wed, 21 Sep 2022 23:32:42 +0000 (00:32 +0100)]
lkcl [Wed, 21 Sep 2022 23:27:16 +0000 (00:27 +0100)]
Jacob Lifshay [Wed, 21 Sep 2022 23:13:40 +0000 (16:13 -0700)]
add more compression formats that use prefix-codes
Jacob Lifshay [Wed, 21 Sep 2022 22:41:55 +0000 (15:41 -0700)]
add description of prefix-code decode
programmerjake [Wed, 21 Sep 2022 21:45:09 +0000 (22:45 +0100)]
fix spelling
Jacob Lifshay [Wed, 21 Sep 2022 20:43:23 +0000 (13:43 -0700)]
add initial draft of prefix-code (like huffman code) dec/enc instructions
lkcl [Wed, 21 Sep 2022 14:14:21 +0000 (15:14 +0100)]
Luke Kenneth Casson Leighton [Wed, 21 Sep 2022 14:13:30 +0000 (15:13 +0100)]
mention ydimsz in FFT/DCT for "stride"
Luke Kenneth Casson Leighton [Wed, 21 Sep 2022 14:09:27 +0000 (15:09 +0100)]
whitespace
lkcl [Wed, 21 Sep 2022 13:43:44 +0000 (14:43 +0100)]
lkcl [Wed, 21 Sep 2022 13:31:38 +0000 (14:31 +0100)]
lkcl [Wed, 21 Sep 2022 13:30:25 +0000 (14:30 +0100)]
lkcl [Wed, 21 Sep 2022 13:17:15 +0000 (14:17 +0100)]
lkcl [Wed, 21 Sep 2022 13:05:26 +0000 (14:05 +0100)]
lkcl [Wed, 21 Sep 2022 12:46:40 +0000 (13:46 +0100)]
lkcl [Tue, 20 Sep 2022 17:57:31 +0000 (18:57 +0100)]
lkcl [Tue, 20 Sep 2022 16:33:36 +0000 (17:33 +0100)]
lkcl [Tue, 20 Sep 2022 16:30:58 +0000 (17:30 +0100)]
lkcl [Tue, 20 Sep 2022 12:44:20 +0000 (13:44 +0100)]
lkcl [Tue, 20 Sep 2022 12:28:54 +0000 (13:28 +0100)]
lkcl [Tue, 20 Sep 2022 11:51:28 +0000 (12:51 +0100)]
Luke Kenneth Casson Leighton [Tue, 20 Sep 2022 11:24:21 +0000 (12:24 +0100)]
add motivation as 3D CPU-GPU-VPU ISA
lkcl [Mon, 19 Sep 2022 23:05:50 +0000 (00:05 +0100)]
Luke Kenneth Casson Leighton [Mon, 19 Sep 2022 22:51:38 +0000 (23:51 +0100)]
clarify vertical-first on REMAP
lkcl [Mon, 19 Sep 2022 22:29:19 +0000 (23:29 +0100)]
lkcl [Mon, 19 Sep 2022 22:21:32 +0000 (23:21 +0100)]
lkcl [Mon, 19 Sep 2022 22:16:57 +0000 (23:16 +0100)]
lkcl [Mon, 19 Sep 2022 22:13:10 +0000 (23:13 +0100)]
lkcl [Mon, 19 Sep 2022 22:11:26 +0000 (23:11 +0100)]
Luke Kenneth Casson Leighton [Mon, 19 Sep 2022 15:13:08 +0000 (16:13 +0100)]
clarify binary-incompatibility paragraph
projects / libreriscv.git / log