Luke Kenneth Casson Leighton [Tue, 30 Oct 2018 07:53:07 +0000 (07:53 +0000)]
modify debug statement on WRITE_FRD to display hex of number
Luke Kenneth Casson Leighton [Tue, 30 Oct 2018 06:09:50 +0000 (06:09 +0000)]
on scalar redirected reg, break hardware loop at first dest-store
Luke Kenneth Casson Leighton [Tue, 30 Oct 2018 06:09:20 +0000 (06:09 +0000)]
on scalar operation, sign-extend / zero-extend to full reg width
Luke Kenneth Casson Leighton [Tue, 30 Oct 2018 02:55:22 +0000 (02:55 +0000)]
down-convert floating-point 32-bit to fp 16-bit then return 16-bit uint
this to be used just before MMU store
Luke Kenneth Casson Leighton [Tue, 30 Oct 2018 01:14:06 +0000 (01:14 +0000)]
add sv_proc_t f32 conversions when elwidth=16bit
Luke Kenneth Casson Leighton [Tue, 30 Oct 2018 00:45:15 +0000 (00:45 +0000)]
set elwidth (carry through) from MMU
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 14:10:13 +0000 (14:10 +0000)]
morph conversion of floating-point for storing, through sv_proc_t
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 10:08:52 +0000 (10:08 +0000)]
add explicit get of data inside sv_freg_t, float32_t etc.
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 09:54:21 +0000 (09:54 +0000)]
add redirector operators for sv_freg_t to uint32 and uint64
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 06:39:41 +0000 (06:39 +0000)]
redirect store insns through sv_proc_t for elwidth adjustment
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 06:31:25 +0000 (06:31 +0000)]
override and redirect mmu store functions to sv_proc_t
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 06:07:37 +0000 (06:07 +0000)]
remove unneeded commented-out code
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 04:22:25 +0000 (04:22 +0000)]
remove unnecessary function for mmu elwidth load
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 04:16:59 +0000 (04:16 +0000)]
fix niggles in offset calculation for LD with elwidth
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 02:17:10 +0000 (02:17 +0000)]
add in addrmode
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 02:00:17 +0000 (02:00 +0000)]
starting to put in addr_mode
Luke Kenneth Casson Leighton [Mon, 29 Oct 2018 01:50:15 +0000 (01:50 +0000)]
redirect READ_REG to add addr_mode
Luke Kenneth Casson Leighton [Sun, 28 Oct 2018 20:01:45 +0000 (20:01 +0000)]
dynamically redirect mmu load into single sv_proc_t::mmu_load fn
Luke Kenneth Casson Leighton [Sun, 28 Oct 2018 15:24:07 +0000 (15:24 +0000)]
adjust mmu load to take reg_spec_t so that proper offset-adjustments can be made
the adding of the immediate plus the relevant offset to the relevant
register needs to be calculated before the load takes place. algorithm
is slightly different from the one used in rv_add
Luke Kenneth Casson Leighton [Sun, 28 Oct 2018 13:16:14 +0000 (13:16 +0000)]
redirect mmu load function(s) through sv_proc_t
Luke Kenneth Casson Leighton [Sun, 28 Oct 2018 00:06:22 +0000 (01:06 +0100)]
move mmu macros to cc file
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 22:53:29 +0000 (23:53 +0100)]
Updating python files and riscv for calling from any directory.
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 08:03:34 +0000 (09:03 +0100)]
redirect float128_t through sv_float128_t class instead of typedef
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 07:40:15 +0000 (08:40 +0100)]
replace sv_float64_t typedef with class derived from sv_regbase_t
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 07:19:54 +0000 (08:19 +0100)]
redirect freg through getter macro, to keep elwidth state
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 06:50:08 +0000 (07:50 +0100)]
add sv_float32_t override, use explicit float32_t typecast for now
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 06:20:24 +0000 (07:20 +0100)]
replace freg_t typedef with actual sv_freg_t class derived from sv_regbase_t
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 06:07:59 +0000 (07:07 +0100)]
READ_FREG not to return an alternative type
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 04:14:28 +0000 (05:14 +0100)]
redirect freg_t to sv_freg_t
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 04:03:23 +0000 (05:03 +0100)]
put in typedef sv_floatNN_t
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 03:48:31 +0000 (04:48 +0100)]
add f128 sv_proc_t redirect
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 03:41:53 +0000 (04:41 +0100)]
add f32 redirects in sv_proc_t
Luke Kenneth Casson Leighton [Sat, 27 Oct 2018 03:38:37 +0000 (04:38 +0100)]
add f64 redirection to sv_proc_t
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 06:57:42 +0000 (07:57 +0100)]
forgot to mask off data being written within element
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 05:46:27 +0000 (06:46 +0100)]
add debug printfs
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 03:27:32 +0000 (04:27 +0100)]
add max elwidth resolver on add operation
result now respects the element width of the 2 source operands
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 03:16:12 +0000 (04:16 +0100)]
add to_elwidth function, not complete: needs to use source elwidths
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 03:12:39 +0000 (04:12 +0100)]
sign/zero-extend result as well
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 03:09:43 +0000 (04:09 +0100)]
alter operation width based on max bitwidth, and sign/zero-extend
Luke Kenneth Casson Leighton [Fri, 26 Oct 2018 01:43:21 +0000 (02:43 +0100)]
pass in sign-extend argument for use in non-default bitwidth
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 23:57:56 +0000 (00:57 +0100)]
add variable bitwidth on read/write regs
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 09:10:50 +0000 (10:10 +0100)]
break register down in non-default elwidth case
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 08:55:46 +0000 (09:55 +0100)]
add isvec to reg_spec_t, bit of cleanup
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 08:28:33 +0000 (09:28 +0100)]
redirect DO_WRITE_FREG and READ_FREG and others
no longer adding the offset onto the register in sv_insn_t,
now to be done in sv_proc_t WRITE_REG/READ_REG, where the
element width can be examined (finally)
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 07:30:41 +0000 (08:30 +0100)]
overload READ_REG
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 06:34:17 +0000 (07:34 +0100)]
remove offset argument from predicated fn, offset now stored in reg_spec_t
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 06:28:49 +0000 (07:28 +0100)]
make reg_spec_t offset a pointer, sometimes it needs to be NULL
Luke Kenneth Casson Leighton [Thu, 25 Oct 2018 05:36:06 +0000 (06:36 +0100)]
use reg_spec_t which passes reg + offset into sv_proc_t
Luke Kenneth Casson Leighton [Wed, 24 Oct 2018 04:39:20 +0000 (05:39 +0100)]
make common function for getting bitwidth
Luke Kenneth Casson Leighton [Tue, 23 Oct 2018 05:13:53 +0000 (06:13 +0100)]
add type signed identification, add lh/sh to insn ld/store types
Luke Kenneth Casson Leighton [Tue, 23 Oct 2018 05:11:32 +0000 (06:11 +0100)]
add type store categorisation
Luke Kenneth Casson Leighton [Sun, 21 Oct 2018 08:14:21 +0000 (09:14 +0100)]
calculate src bitwidth - very time-consuming, optimise later
Luke Kenneth Casson Leighton [Sun, 21 Oct 2018 07:53:58 +0000 (08:53 +0100)]
move sv_insn_t constructor to c file
Luke Kenneth Casson Leighton [Sat, 20 Oct 2018 09:21:51 +0000 (10:21 +0100)]
shuffle to calculate actual bitwidth
Luke Kenneth Casson Leighton [Sat, 20 Oct 2018 01:13:28 +0000 (02:13 +0100)]
make sv_regbase_t public
Luke Kenneth Casson Leighton [Sat, 20 Oct 2018 01:11:09 +0000 (02:11 +0100)]
add sign-extension bitwidth macros
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 23:56:34 +0000 (00:56 +0100)]
split out sv_reg_t elwidth into separate base class
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 23:51:44 +0000 (00:51 +0100)]
fixed memory corruption due to use of auto on load_uint64, put elwidth back
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 23:51:15 +0000 (00:51 +0100)]
stop using auto in mmu.h macro, use type##_t
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 23:37:59 +0000 (00:37 +0100)]
whoops load_uint64 with auto returned sv_reg_t not uint64_t
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 22:46:00 +0000 (23:46 +0100)]
const& on more sv_sreg_t usage
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 22:44:00 +0000 (23:44 +0100)]
const sv_mmu_t functions
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 22:40:15 +0000 (23:40 +0100)]
stop addr++ in interactive loop
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 22:25:08 +0000 (23:25 +0100)]
use const& for operators in sv_reg_t
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 22:18:20 +0000 (23:18 +0100)]
make 2-op rv* const
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 22:11:43 +0000 (23:11 +0100)]
temporarily comment out setting of elwidth
sv_reg_t seems to be being typecast somewhere, probably to a uint64_t,
and accessing the elwidth corrupts memory
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 13:52:15 +0000 (14:52 +0100)]
redirect obtaining registers through a common function, get_intreg
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 13:44:09 +0000 (14:44 +0100)]
redirect through element width, obtain elwidth from CSR reg tables
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 12:20:59 +0000 (13:20 +0100)]
remove more get_data calls
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 12:19:58 +0000 (13:19 +0100)]
remove more get_data calls
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 12:17:51 +0000 (13:17 +0100)]
remove unneeded get_data calls
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 12:17:37 +0000 (13:17 +0100)]
add sv_mmu.h
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 11:22:53 +0000 (12:22 +0100)]
clean up sv_reg_t class
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 10:58:25 +0000 (11:58 +0100)]
use class-based sv_reg_t and sv_sreg_t
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 08:35:12 +0000 (09:35 +0100)]
bring in new version of sv_reg.h
Luke Kenneth Casson Leighton [Fri, 19 Oct 2018 08:33:27 +0000 (09:33 +0100)]
provide sv_reg_t overrides of more functions so that sv_reg_t can be a class
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:53:53 +0000 (23:53 +0100)]
put sv_mmu override class in place
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:43:38 +0000 (23:43 +0100)]
fix debug printfs
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:40:47 +0000 (23:40 +0100)]
srrl srli srai etc
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:38:55 +0000 (23:38 +0100)]
slli
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:38:33 +0000 (23:38 +0100)]
sll
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:38:06 +0000 (23:38 +0100)]
jalr, mul, rem
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:31:58 +0000 (23:31 +0100)]
fmv/mvlq/fsq
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:30:04 +0000 (23:30 +0100)]
div, fcvt
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:28:24 +0000 (23:28 +0100)]
divuw
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:27:24 +0000 (23:27 +0100)]
divu
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:26:40 +0000 (23:26 +0100)]
div
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:24:25 +0000 (23:24 +0100)]
csrs
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:23:06 +0000 (23:23 +0100)]
csrrc
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:22:07 +0000 (23:22 +0100)]
c_srli
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:21:18 +0000 (23:21 +0100)]
c_slli c_srai
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:18:51 +0000 (23:18 +0100)]
c_lui
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:17:49 +0000 (23:17 +0100)]
c_jalr
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:17:04 +0000 (23:17 +0100)]
c_jal
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:16:24 +0000 (23:16 +0100)]
c_beqz
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:15:14 +0000 (23:15 +0100)]
addi4spn
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:14:36 +0000 (23:14 +0100)]
redirect sreg_t casts through function
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:12:00 +0000 (23:12 +0100)]
typedef on sv_reg_t to reg_t (and signed variant)
still working on redirecting everything through a planned class
that can be polymorphic overloaded... eventually
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 22:11:08 +0000 (23:11 +0100)]
use unsigned long shift on sv csr setting
Luke Kenneth Casson Leighton [Thu, 18 Oct 2018 17:14:36 +0000 (18:14 +0100)]
forgot to set clroffset