Wilco Dijkstra [Tue, 24 Oct 2017 16:58:02 +0000 (16:58 +0000)]
PR60580: Fix frame pointer option magic
To fix PR60580 simplify the logic in aarch64_override_options_after_change_1 ().
If the frame pointer is enabled, set it to a special value that behaves similar
to frame pointer omission. If we don't do this all leaf functions will get a
frame pointer even if flag_omit_leaf_frame_pointer is set.
If flag_omit_frame_pointer has this special value, we must force the frame
pointer if not in a leaf function. We also need to force it in a leaf function
if flag_omit_frame_pointer is not set or if LR is used.
Doing this allows both -fomit-frame-pointer and -fomit-leaf-frame-pointer to be
independently set and changed in each function with the expected behaviour.
gcc/
PR middle-end/60580
* config/aarch64/aarch64.c (aarch64_frame_pointer_required)
Check special value of flag_omit_frame_pointer.
(aarch64_can_eliminate): Likewise.
(aarch64_override_options_after_change_1): Simplify handling of
-fomit-frame-pointer and -fomit-leaf-frame-pointer.
From-SVN: r254052
Paolo Carlini [Tue, 24 Oct 2017 16:41:05 +0000 (16:41 +0000)]
re PR c++/80991 (ICE with __is_trivially_constructible in template)
/cp
2017-10-24 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/80991
* pt.c (value_dependent_expression_p, [TRAIT_EXPR]): Handle
a TREE_LIST as TRAIT_EXPR_TYPE2.
/testsuite
2017-10-24 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/80991
* g++.dg/ext/is_trivially_constructible5.C: New.
From-SVN: r254051
Rainer Orth [Tue, 24 Oct 2017 16:30:44 +0000 (16:30 +0000)]
Fix gcc.target/i386/387-ficom-[12].c on Solaris
* gcc.target/i386/387-ficom-1.c: Allow for ficomp without s
suffix.
* gcc.target/i386/387-ficom-2.c: Likewise.
From-SVN: r254050
Rainer Orth [Tue, 24 Oct 2017 16:29:20 +0000 (16:29 +0000)]
Fix gcc.target/i386/cet-sjlj-3.c on Solaris
* gcc.target/i386/cet-sjlj-3.c: Allow for emtpy user label prefix
in setjmp call.
From-SVN: r254049
Richard Biener [Tue, 24 Oct 2017 13:51:45 +0000 (13:51 +0000)]
re PR tree-optimization/82697 (Wrong optimization with aliasing and "if")
2017-10-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/82697
* tree-ssa-phiopt.c (cond_store_replacement): Use alias-set
zero for conditional load and unconditional store.
* gcc.dg/torture/pr82697.c: New testcase.
From-SVN: r254047
Mukesh Kapoor [Tue, 24 Oct 2017 13:49:13 +0000 (13:49 +0000)]
re PR c++/82307 (unscoped enum-base incorrect cast)
/cp
2017-10-24 Mukesh Kapoor <mukesh.kapoor@oracle.com>
Paolo Carlini <paolo.carlini@oracle.com>
PR c++/82307
* cvt.c (type_promotes_to): Implement C++17, 7.6/4, about unscoped
enumeration type whose underlying type is fixed.
/testsuite
2017-10-24 Mukesh Kapoor <mukesh.kapoor@oracle.com>
Paolo Carlini <paolo.carlini@oracle.com>
PR c++/82307
* g++.dg/cpp0x/enum35.C: New.
* g++.dg/cpp0x/enum36.C: Likewise.
Co-Authored-By: Paolo Carlini <paolo.carlini@oracle.com>
From-SVN: r254046
Jonathan Wakely [Tue, 24 Oct 2017 13:18:59 +0000 (14:18 +0100)]
Avoid -Wattribute-alias warnings for long double compat symbols
* config/locale/gnu/c_locale.cc [_GLIBCXX_LONG_DOUBLE_COMPAT]: Ignore
-Wattribute-alias warnings.
* src/c++11/istream-inst.cc: Likewise.
* src/c++11/locale-inst.cc: Likewise.
* src/c++11/ostream-inst.cc: Likewise.
* src/c++11/wlocale-inst.cc: Likewise.
* src/c++98/hash-long-double-tr1-aux.cc: Likewise.
From-SVN: r254045
Jonathan Wakely [Tue, 24 Oct 2017 13:18:52 +0000 (14:18 +0100)]
Refactor std::basic_string_view members and add noexcept
* include/bits/string_view.tcc (find_first_of, find_last_of)
(find_first_not_of, find_last_not_of): Add noexcept.
* include/std/string_view (basic_string_view(const _CharT*))
(basic_string_view(const _CharT*, size_type))
(front, back, remove_prefix, remove_suffix, find, rfind)
(find_first_of, find_first_not_of): Add noexcept.
(at(size_type), _S_compare(size_type, size_type)): Replace conditional
expressions with if statements.
(copy(_CharT*, size_type, size_type), substr(size_type, size_type)):
Use _M_check for length checks.
(compare(basic_string_view)): Reformat.
(_M_check(size_type, const char)): Add noexcept(false).
(_M_limit(size_type, size_type)): Use noexcept not _GLIBCXX_NOEXCEPT.
From-SVN: r254044
H.J. Lu [Tue, 24 Oct 2017 12:50:03 +0000 (12:50 +0000)]
Add bootstrap-cet.mk to bootstrap GCC with Intel CET
Bootstrap GCC with Intel CET by configuring GCC with
--with-build-config="bootstrap-cet bootstrap-debug"
Tested on Linux/i686 and Linux/x86-64.
config/
* bootstrap-cet.mk: New file.
gcc/
* doc/install.texi: Document bootstrap-cet.
From-SVN: r254043
Alan Modra [Tue, 24 Oct 2017 12:45:01 +0000 (23:15 +1030)]
PR82687, g++.dg/asan/default-options-1.C fails with PR82575 fix
The problem with making discarded symbols hidden is that the
non-default visibility is sticky. When symbols other than the
__gnu_lto ones are discarded that turns out to be a bad idea.
PR lto/82687
PR lto/82575
* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
Only make __gnu_lto symbols hidden. Delete outdated comment.
Silence ISO C warning.
From-SVN: r254042
Jonathan Wakely [Tue, 24 Oct 2017 11:28:40 +0000 (12:28 +0100)]
PR libstdc++/82685 add 'noexcept' to string_view literals
PR libstdc++/82685
* include/experimental/string_view (operator""sv): Add noexcept.
* include/std/string_view (operator""sv): Likewise.
From-SVN: r254041
H.J. Lu [Tue, 24 Oct 2017 10:52:50 +0000 (10:52 +0000)]
i386: Don't insert ENDBR at function entrance when called directly
There is no need to insert ENDBR instruction at function entrance if
function is only called directly.
gcc/
PR target/82659
* config/i386/i386.c (rest_of_insert_endbranch): Don't insert
ENDBR instruction at function entrance if function is only
called directly.
gcc/testsuite/
PR target/82659
* gcc.target/i386/cet-label-2.c: New test.
* gcc.target/i386/cet-sjlj-4.c: Likewise.
* gcc.target/i386/cet-sjlj-5.c: Likewise.
* gcc.target/i386/cet-switch-3.c: Likewise.
* gcc.target/i386/pr82659-1.c: Likewise.
* gcc.target/i386/pr82659-2.c: Likewise.
* gcc.target/i386/pr82659-3.c: Likewise.
* gcc.target/i386/pr82659-4.c: Likewise.
* gcc.target/i386/pr82659-5.c: Likewise.
* gcc.target/i386/pr82659-6.c: Likewise.
From-SVN: r254040
Jakub Jelinek [Tue, 24 Oct 2017 10:44:56 +0000 (12:44 +0200)]
re PR rtl-optimization/82628 (wrong code at -Os on x86_64-linux-gnu in the 32-bit mode)
PR target/82628
* config/i386/i386.md (addcarry<mode>, subborrow<mode>): Change
patterns to better describe from which operation the CF is computed.
(addcarry<mode>_0, subborrow<mode>_0): New patterns.
* config/i386/i386.c (ix86_expand_builtin) <case handlecarry>: Pass
one LTU with [DT]Imode and another one with [SD]Imode. If arg0
is 0, use _0 suffixed expanders instead of emitting a comparison
before it.
From-SVN: r254039
Sergey Shalnov [Tue, 24 Oct 2017 10:34:55 +0000 (10:34 +0000)]
Avoid 512-bit mode MOV for prefer-avx256 option in Intel AVX512 configuration
gcc/
* config/i386/i386.md(*movsf_internal, *movdf_internal):
Avoid 512-bit AVX modes for TARGET_PREFER_AVX256.
From-SVN: r254038
Eric Botcazou [Tue, 24 Oct 2017 07:26:52 +0000 (07:26 +0000)]
re PR middle-end/82569 (failure in 177.mesa cpu2000 test case after r253530)
PR middle-end/82569
* tree-outof-ssa.h (always_initialized_rtx_for_ssa_name_p): Delete.
* expr.c (expand_expr_real_1) <expand_decl_rtl>: Revert latest change.
* loop-iv.c (iv_get_reaching_def): Likewise.
* cfgexpand.c (expand_one_ssa_partition): Initialize the RTX if the
variable is promoted and the partition contains undefined values.
From-SVN: r254037
Richard Biener [Tue, 24 Oct 2017 07:02:48 +0000 (07:02 +0000)]
re PR tree-optimization/82672 ([GRAPHITE] ICE in verify_gimple_in_cfg)
2017-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/82672
* graphite-isl-ast-to-gimple.c (graphite_copy_stmts_from_block):
Fold the stmt if we propagated into it.
* gfortran.dg/graphite/pr82672.f90: New testcase.
From-SVN: r254036
Sandra Loosemore [Tue, 24 Oct 2017 02:39:11 +0000 (22:39 -0400)]
cdx-branch.c: Fix broken test.
2017-10-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
* gcc.target/nios2/cdx-branch.c: Fix broken test.
* gcc.target/nios2/lo-addr-bypass.c: New.
* gcc.target/nios2/lo-addr-char.c: New.
* gcc.target/nios2/lo-addr-int.c: New.
* gcc.target/nios2/lo-addr-pic.c: New.
* gcc.target/nios2/lo-addr-short.c: New.
* gcc.target/nios2/lo-addr-tls.c: New.
* gcc.target/nios2/lo-addr-uchar.c: New.
* gcc.target/nios2/lo-addr-ushort.c: New.
* gcc.target/nios2/lo-addr-volatile.c: New.
From-SVN: r254035
Sandra Loosemore [Tue, 24 Oct 2017 02:37:02 +0000 (22:37 -0400)]
nios2.c (nios2_rtx_costs): Make costs better reflect reality.
2017-10-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/nios2/nios2.c (nios2_rtx_costs): Make costs better
reflect reality.
(nios2_address_cost): Define.
(nios2_legitimize_address): Recognize (exp + constant) directly.
(TARGET_ADDRESS_COST): Define.
From-SVN: r254034
Sandra Loosemore [Tue, 24 Oct 2017 02:35:50 +0000 (22:35 -0400)]
nios2-protos.h (nios2_large_constant_p): Declare.
2017-10-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/nios2/nios2-protos.h (nios2_large_constant_p): Declare.
(nios2_symbolic_memory_operand_p): Declare.
(nios2_split_large_constant): Declare.
(nios2_split_symbolic_memory_operand): Declare.
* config/nios2/nios2.c: Adjust includes.
(nios2_symbolic_constant_allowed): New.
(nios2_symbolic_constant_p): New.
(nios2_plus_symbolic_constant_p): New.
(nios2_valid_addr_expr_p): Recognize addresses involving
symbolic constants.
(nios2_legitimate_address_p): Likewise, also LO_SUM.
(nios2_symbolic_memory_operand_p): New.
(nios2_large_constant_p): New.
(nios2_split_large_constant): New.
(nios2_split_plus_large_constant): New.
(nios2_split_symbolic_memory_operand): New.
(nios2_legitimize_address): Code refactoring. Handle addresses
involving symbolic constants.
(nios2_emit_move_sequence): Likewise.
(nios2_print_operand): Improve error output.
(nios2_print_operand_address): Handle LO_SUM.
(nios2_cdx_narrow_form_p): Likewise.
* config/nios2/nios2.md (movqi_internal): Add splitter for memory
operands involving symbolic constants.
(movhi_internal, movsi_internal): Likewise.
(zero_extendhisi2, zero_extendqi<mode>2): Likewise.
(extendhisi2, extendqi<mode>2): Likewise.
From-SVN: r254033
Sandra Loosemore [Tue, 24 Oct 2017 02:24:34 +0000 (22:24 -0400)]
tree-pass.h (PROP_rtl_split_insns): Define.
2017-10-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* tree-pass.h (PROP_rtl_split_insns): Define.
* recog.c (pass_data_split_all_insns): Provide PROP_rtl_split_insns.
From-SVN: r254032
Sandra Loosemore [Tue, 24 Oct 2017 02:00:34 +0000 (22:00 -0400)]
nios2.c (TARGET_LRA_P): Don't override.
2017-10-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/nios2/nios2.c (TARGET_LRA_P): Don't override.
From-SVN: r254031
GCC Administrator [Tue, 24 Oct 2017 00:16:15 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r254030
Paolo Carlini [Mon, 23 Oct 2017 21:37:59 +0000 (21:37 +0000)]
re PR c++/80449 (ICE reporting failed partial class template specialization class template argument deduction)
/cp
2017-10-23 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/80449
* semantics.c (finish_compound_literal): Check do_auto_deduction
return value for error_mark_node.
/testsuite
2017-10-23 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/80449
* g++.dg/cpp1z/class-deduction46.C: New.
From-SVN: r254026
Jakub Jelinek [Mon, 23 Oct 2017 20:39:59 +0000 (22:39 +0200)]
re PR debug/82630 (Bogus DW_AT_GNU_call_site_value)
PR debug/82630
* target.def (const_not_ok_for_debug_p): Default to
default_const_not_ok_for_debug_p instead of hook_bool_rtx_false.
* targhooks.h (default_const_not_ok_for_debug_p): New declaration.
* targhooks.c (default_const_not_ok_for_debug_p): New function.
* dwarf2out.c (const_ok_for_output_1): Only reject UNSPECs for
which targetm.const_not_ok_for_debug_p returned true.
* config/arm/arm.c (arm_const_not_ok_for_debug_p): Return true
for UNSPECs.
* config/powerpcspe/powerpcspe.c (rs6000_const_not_ok_for_debug_p):
Likewise.
* config/rs6000/rs6000.c (rs6000_const_not_ok_for_debug_p): Likewise.
* config/i386/i386.c (ix86_delegitimize_address_1): Don't delegitimize
UNSPEC_GOTOFF with addend into addend - _GLOBAL_OFFSET_TABLE_ + symbol
if !base_term_p.
(ix86_const_not_ok_for_debug_p): New function.
(i386_asm_output_addr_const_extra): Handle UNSPEC_GOTOFF.
(TARGET_CONST_NOT_OK_FOR_DEBUG_P): Redefine.
* g++.dg/guality/pr82630.C: New test.
From-SVN: r254025
David Malcolm [Mon, 23 Oct 2017 20:25:58 +0000 (20:25 +0000)]
Add INCLUDE_UNIQUE_PTR and use it (PR bootstrap/82610)
gcc/ChangeLog:
PR bootstrap/82610
* system.h: Conditionally include "unique-ptr.h" if
INCLUDE_UNIQUE_PTR is defined.
* unique-ptr-tests.cc: Remove include of "unique-ptr.h" in favor
of defining INCLUDE_UNIQUE_PTR before including "system.h".
include/ChangeLog:
* unique-ptr.h: Make include of <memory> conditional on C++11 or
later.
From-SVN: r254024
Jason Merrill [Mon, 23 Oct 2017 19:06:37 +0000 (15:06 -0400)]
PR c++/77369 - wrong noexcept handling in C++14 and below
* tree.c (strip_typedefs): Canonicalize TYPE_RAISES_EXCEPTIONS.
From-SVN: r254022
Jason Merrill [Mon, 23 Oct 2017 19:06:32 +0000 (15:06 -0400)]
* g++.dg/opt/pr82577: Fix for C++17.
From-SVN: r254021
Uros Bizjak [Mon, 23 Oct 2017 19:01:38 +0000 (21:01 +0200)]
re PR target/82662 (ifcvt is not performed on double-word compare)
PR target/82662
* gcc.target/i386/pr82662.c: New test.
From-SVN: r254020
Sebastian Perta [Mon, 23 Oct 2017 17:54:02 +0000 (17:54 +0000)]
rl78.md: New define_expand "subdi3".
* config/rl78/rl78.md: New define_expand "subdi3".
* config/rl78/subdi3.S: New assembly file.
* config/rl78/t-rl78: Added subdi3.S to LIB2ADD.
From-SVN: r254019
Sebastian Perta [Mon, 23 Oct 2017 17:30:22 +0000 (13:30 -0400)]
Forgot to add the new file :-P 2017-10-13 Sebastian Perta <sebastian.perta@renesas.com>
Forgot to add the new file :-P
2017-10-13 Sebastian Perta <sebastian.perta@renesas.com>
* config/rl78/adddi3.S: New assembly file.
* config/rl78/t-rl78: Added adddi3.S to LIB2ADD.
From-SVN: r254016
Marek Polacek [Mon, 23 Oct 2017 17:03:11 +0000 (17:03 +0000)]
re PR c/82681 (c-warn.c:1218: typo in warning message)
PR c/82681
* c-warn.c (warnings_for_convert_and_check): Fix typos.
* gcc.dg/c90-const-expr-11.c: Fix typos in dg-warning.
* gcc.dg/overflow-warn-5.c: Likewise.
* gcc.dg/overflow-warn-8.c: Likewise.
From-SVN: r254014
H.J. Lu [Mon, 23 Oct 2017 15:49:19 +0000 (15:49 +0000)]
i386: Skip DF_REF_INSN if DF_REF_INSN_INFO is false
We should check DF_REF_INSN_INFO before accessing DF_REF_INSN.
gcc/
PR target/82673
* config/i386/i386.c (ix86_finalize_stack_frame_flags): Skip
DF_REF_INSN if DF_REF_INSN_INFO is false.
gcc/testsuite/
PR target/82673
* gcc.target/i386/pr82673.c: New test.
From-SVN: r254013
Jan Hubicka [Mon, 23 Oct 2017 15:10:09 +0000 (17:10 +0200)]
i386.c (dimode_scalar_chain::compute_convert_gain): Use xmm_move instead of sse_move.
* i386.c (dimode_scalar_chain::compute_convert_gain): Use
xmm_move instead of sse_move.
(sse_store_index): New function.
(ix86_register_move_cost): Be more sensible about mismatch stall;
model AVX moves correctly; make difference between sse->integer and
integer->sse.
(ix86_builtin_vectorization_cost): Model correctly aligned and unaligned
moves; make difference between SSE and AVX.
* i386.h (processor_costs): Remove sse_move; add xmm_move, ymm_move
and zmm_move. Increase size of sse load and store tables;
add unaligned load and store tables; add ssemmx_to_integer.
* x86-tune-costs.h: Update all entries according to real
move latencies from Agner Fog's manual and chip documentation.
From-SVN: r254012
Jakub Jelinek [Mon, 23 Oct 2017 14:58:23 +0000 (16:58 +0200)]
re PR rtl-optimization/82628 (wrong code at -Os on x86_64-linux-gnu in the 32-bit mode)
PR target/82628
* config/i386/predicates.md (x86_64_dwzext_immediate_operand): New.
* config/i386/constraints.md (Wf): New constraint.
* config/i386/i386.md (UNSPEC_SBB): New unspec.
(cmp<dwi>_doubleword): Removed.
(sub<mode>3_carry_ccc, *sub<mode>3_carry_ccc_1): New patterns.
(sub<mode>3_carry_ccgz): Use unspec instead of compare.
* config/i386/i386.c (ix86_expand_branch) <case E_TImode>: Don't
expand with cmp<dwi>_doubleword. For LTU and GEU use
sub<mode>3_carry_ccc instead of sub<mode>3_carry_ccgz and use CCCmode.
From-SVN: r254011
Jakub Jelinek [Mon, 23 Oct 2017 14:10:36 +0000 (16:10 +0200)]
common.opt (gcolumn-info): Enable by default.
* common.opt (gcolumn-info): Enable by default.
* doc/invoke.texi (gcolumn-info): Document new default.
* lib/scanasm.exp (dg-function-on-line): Accept optional column info.
* gcc.dg/debug/dwarf2/pr53948.c: Likewise.
* g++.dg/debug/dwarf2/pr77363.C: Likewise.
* gcc.dg/debug/dwarf2/asm-line1.c: Add -gno-column-info to dg-options.
* gcc.dg/debug/dwarf2/discriminator.c: Likewise.
* g++.dg/debug/dwarf2/typedef6.C: Likewise.
From-SVN: r254010
Richard Biener [Mon, 23 Oct 2017 13:49:24 +0000 (13:49 +0000)]
re PR tree-optimization/82672 ([GRAPHITE] ICE in verify_gimple_in_cfg)
2017-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/82672
* graphite-isl-ast-to-gimple.c (graphite_copy_stmts_from_block):
Fold the stmt if we propagated into it.
* gfortran.dg/graphite/pr82672.f90: New testcase.
From-SVN: r254009
Jonathan Wakely [Mon, 23 Oct 2017 12:11:22 +0000 (13:11 +0100)]
Implement C++17 Filesystem library
Based on Filesystem TS implementation, with the changes applied by:
- P0219R1 Relative Paths for Filesystem
- P0317R1 Directory Entry Caching for Filesystem
- P0492R2 Resolution of C++17 National Body Comments
Where appropriate code is shared between the TS and C++17
implementations.
* include/Makefile.am: Add new headers for C++17 filesystem library.
* include/Makefile.in: Regenerate.
* include/bits/fs_dir.h: New header, based on Filesystem TS code in
include/experimental/bits directory.
* include/bits/fs_fwd.h: Likewise.
* include/bits/fs_ops.h: Likewise.
* include/bits/fs_path.h: Likewise.
* include/experimental/bits/fs_dir.h: Rename Doxygen group.
* include/experimental/bits/fs_fwd.h: Likewise.
* include/experimental/bits/fs_ops.h: Likewise.
* include/experimental/bits/fs_path.h: Likewise.
* include/experimental/filesystem (filesystem_error::_M_gen_what):
Remove inline definition.
* include/precompiled/stdc++.h: Add <filesystem> to precompiled
header.
* include/std/filesystem: New header.
* python/libstdcxx/v6/printers.py: Enable printer for std::filesystem
paths.
* src/filesystem/Makefile.am: Add new files. Compile as C++17.
* src/filesystem/Makefile.in: Regenerate.
* src/filesystem/cow-dir.cc: Update comment.
* src/filesystem/cow-ops.cc: Likewise.
* src/filesystem/cow-path.cc: Likewise.
* src/filesystem/cow-std-dir.cc: New file.
* src/filesystem/cow-std-ops.cc: New file.
* src/filesystem/cow-std-path.cc: New file.
* src/filesystem/dir-common.h (_Dir_base, get_file_type): New header
for common code.
* src/filesystem/dir.cc (_Dir): Derive from _Dir_base.
(open_dir): Move to _Dir_base constructor.
(get_file_type): Move to dir-common.h.
(recurse): Move to _Dir_base::should_recurse.
* src/filesystem/ops-common.h: New header for common code.
* src/filesystem/ops.cc (is_set, make_file_type, make_file_status)
(is_not_found_errno, file_time, do_copy_file): Move to ops-common.h.
* src/filesystem/path.cc (filesystem_error::_M_gen_what): Define.
* src/filesystem/std-dir.cc: New file, based on Filesystem TS code.
* src/filesystem/std-ops.cc: Likewise.
* src/filesystem/std-dir.cc: Likewise.
* testsuite/27_io/filesystem/iterators/directory_iterator.cc: New
test.
* testsuite/27_io/filesystem/iterators/pop.cc: New test.
* testsuite/27_io/filesystem/iterators/recursive_directory_iterator.cc:
New test.
* testsuite/27_io/filesystem/operations/absolute.cc: New test.
* testsuite/27_io/filesystem/operations/canonical.cc: New test.
* testsuite/27_io/filesystem/operations/copy.cc: New test.
* testsuite/27_io/filesystem/operations/copy_file.cc: New test.
* testsuite/27_io/filesystem/operations/create_directories.cc: New
test.
* testsuite/27_io/filesystem/operations/create_directory.cc: New test.
* testsuite/27_io/filesystem/operations/create_symlink.cc: New test.
* testsuite/27_io/filesystem/operations/current_path.cc: New test.
* testsuite/27_io/filesystem/operations/equivalent.cc: New test.
* testsuite/27_io/filesystem/operations/exists.cc: New test.
* testsuite/27_io/filesystem/operations/file_size.cc: New test.
* testsuite/27_io/filesystem/operations/is_empty.cc: New test.
* testsuite/27_io/filesystem/operations/last_write_time.cc: New test.
* testsuite/27_io/filesystem/operations/permissions.cc: New test.
* testsuite/27_io/filesystem/operations/proximate.cc: New test.
* testsuite/27_io/filesystem/operations/read_symlink.cc: New test.
* testsuite/27_io/filesystem/operations/relative.cc: New test.
* testsuite/27_io/filesystem/operations/remove_all.cc: New test.
* testsuite/27_io/filesystem/operations/space.cc: New test.
* testsuite/27_io/filesystem/operations/status.cc: New test.
* testsuite/27_io/filesystem/operations/symlink_status.cc: New test.
* testsuite/27_io/filesystem/operations/temp_directory_path.cc: New
test.
* testsuite/27_io/filesystem/operations/weakly_canonical.cc: New test.
* testsuite/27_io/filesystem/path/append/path.cc: New test.
* testsuite/27_io/filesystem/path/assign/assign.cc: New test.
* testsuite/27_io/filesystem/path/assign/copy.cc: New test.
* testsuite/27_io/filesystem/path/compare/compare.cc: New test.
* testsuite/27_io/filesystem/path/compare/path.cc: New test.
* testsuite/27_io/filesystem/path/compare/strings.cc: New test.
* testsuite/27_io/filesystem/path/concat/path.cc: New test.
* testsuite/27_io/filesystem/path/concat/strings.cc: New test.
* testsuite/27_io/filesystem/path/construct/copy.cc: New test.
* testsuite/27_io/filesystem/path/construct/default.cc: New test.
* testsuite/27_io/filesystem/path/construct/locale.cc: New test.
* testsuite/27_io/filesystem/path/construct/range.cc: New test.
* testsuite/27_io/filesystem/path/construct/string_view.cc: New test.
* testsuite/27_io/filesystem/path/decompose/extension.cc: New test.
* testsuite/27_io/filesystem/path/decompose/filename.cc: New test.
* testsuite/27_io/filesystem/path/decompose/parent_path.cc: New test.
* testsuite/27_io/filesystem/path/decompose/relative_path.cc: New
test.
* testsuite/27_io/filesystem/path/decompose/root_directory.cc: New
test.
* testsuite/27_io/filesystem/path/decompose/root_name.cc: New test.
* testsuite/27_io/filesystem/path/decompose/root_path.cc: New test.
* testsuite/27_io/filesystem/path/decompose/stem.cc: New test.
* testsuite/27_io/filesystem/path/generation/normal.cc: New test.
* testsuite/27_io/filesystem/path/generation/proximate.cc: New test.
* testsuite/27_io/filesystem/path/generation/relative.cc: New test.
* testsuite/27_io/filesystem/path/generic/generic_string.cc: New test.
* testsuite/27_io/filesystem/path/itr/traversal.cc: New test.
* testsuite/27_io/filesystem/path/modifiers/clear.cc: New test.
* testsuite/27_io/filesystem/path/modifiers/make_preferred.cc: New
test.
* testsuite/27_io/filesystem/path/modifiers/remove_filename.cc: New
test.
* testsuite/27_io/filesystem/path/modifiers/replace_extension.cc: New
test.
* testsuite/27_io/filesystem/path/modifiers/replace_filename.cc: New
test.
* testsuite/27_io/filesystem/path/modifiers/swap.cc: New test.
* testsuite/27_io/filesystem/path/native/string.cc: New test.
* testsuite/27_io/filesystem/path/nonmember/hash_value.cc: New test.
* testsuite/27_io/filesystem/path/query/empty.cc: New test.
* testsuite/27_io/filesystem/path/query/has_extension.cc: New test.
* testsuite/27_io/filesystem/path/query/has_filename.cc: New test.
* testsuite/27_io/filesystem/path/query/has_parent_path.cc: New test.
* testsuite/27_io/filesystem/path/query/has_relative_path.cc: New
test.
* testsuite/27_io/filesystem/path/query/has_root_directory.cc: New
test.
* testsuite/27_io/filesystem/path/query/has_root_name.cc: New test.
* testsuite/27_io/filesystem/path/query/has_root_path.cc: New test.
* testsuite/27_io/filesystem/path/query/has_stem.cc: New test.
* testsuite/27_io/filesystem/path/query/is_relative.cc: New test.
* testsuite/experimental/filesystem/path/construct/string_view.cc:
Define USE_FILESYSTEM_TS.
* testsuite/util/testsuite_fs.h: Allow use with C++17 paths as well
as Filesystem TS.
From-SVN: r254008
Richard Biener [Mon, 23 Oct 2017 12:01:11 +0000 (12:01 +0000)]
tree-ssa-pre.c (bitmap_remove_from_set): Rename to...
2017-10-23 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c (bitmap_remove_from_set): Rename to...
(bitmap_remove_expr_from_set): ... this. All callers call this
for non-constant values.
(bitmap_set_subtract): Rename to...
(bitmap_set_subtract_expressions): ... this. Adjust and
optimize.
(bitmap_set_contains_value): Remove superfluous check.
(bitmap_set_replace_value): Inline into single caller ...
(bitmap_value_replace_in_set): ... here and simplify.
(dependent_clean): Merge into ...
(clean): ... this using an overload. Adjust.
(prune_clobbered_mems): Adjust.
(compute_antic_aux): Likewise.
(compute_partial_antic_aux): Likewise.
From-SVN: r254007
Paolo Carlini [Mon, 23 Oct 2017 11:39:20 +0000 (11:39 +0000)]
re PR c++/77555 (unused inline function in-function static variable accessed from outside leads to linker error)
2017-10-23 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/77555
* g++.dg/torture/pr77555.C: New.
From-SVN: r254006
Richard Biener [Mon, 23 Oct 2017 11:14:40 +0000 (11:14 +0000)]
re PR tree-optimization/82129 (ICE in compute_antic, at tree-ssa-pre.c:2447)
2017-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/82129
Revert
2017-08-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/81181
* tree-ssa-pre.c (compute_antic_aux): Defer clean() to ...
(compute_antic): ... end of iteration here.
From-SVN: r254005
Jonathan Wakely [Mon, 23 Oct 2017 11:10:28 +0000 (12:10 +0100)]
PR libstdc++/82644 document IS 29124 support
Also fix declarations of special functions in C++17, to import them into
the global namespace in <math.h>, and to prevent defining the
non-standard hypergeometric functions in strict mode.
PR libstdc++/82644
* doc/xml/manual/intro.xml: Include new section.
* doc/xml/manual/status_cxxis29124.xml: New section on IS 29124
status.
* include/bits/specfun.h [__STRICT_ANSI__] (hyperg, hypergf, hypergl)
(conf_hyperg, conf_hypergf, conf_hypergl): Don't declare.
* include/c_compatibility/math.h: Import special functions into
global namespace for C++17.
* testsuite/26_numerics/headers/cmath/82644.cc: New test.
* testsuite/26_numerics/headers/cmath/functions_global_c++17.cc: New
test.
From-SVN: r254004
Richard Sandiford [Mon, 23 Oct 2017 09:48:31 +0000 (09:48 +0000)]
Convert STARTING_FRAME_OFFSET to a hook
I took the documentation of the FRAME_GROWS_DOWNWARD behaviour from the
version that was in most header files, since the one in the manual seemed
less clear.
The patch deliberately keeps FIRST_PARM_OFFSET(FNDECL) in
microblaze_starting_frame_offset; this seems to be a port-local
convention and takes advantage of the fact that FIRST_PARM_OFFSET
doesn't read FNDECL.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* target.def (starting_frame_offset): New hook.
* doc/tm.texi (STARTING_FRAME_OFFSET): Remove in favor of...
(TARGET_STARTING_FRAME_OFFSET): ...this new hook.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_hwi_void_0): Declare.
* hooks.c (hook_hwi_void_0): New function.
* doc/rtl.texi: Refer to TARGET_STARTING_FRAME_OFFSET instead of
STARTING_FRAME_OFFSET.
* builtins.c (expand_builtin_setjmp_receiver): Likewise.
* reload1.c (reload): Likewise.
* cfgexpand.c (expand_used_vars): Use targetm.starting_frame_offset
instead of STARTING_FRAME_OFFSET.
* function.c (try_fit_stack_local): Likewise.
(assign_stack_local_1): Likewise
(instantiate_virtual_regs): Likewise.
* rtlanal.c (rtx_addr_can_trap_p_1): Likewise.
* config/avr/avr.md (nonlocal_goto_receiver): Likewise.
* config/aarch64/aarch64.h (STARTING_FRAME_OFFSET): Delete.
* config/alpha/alpha.h (STARTING_FRAME_OFFSET): Likewise.
* config/arc/arc.h (STARTING_FRAME_OFFSET): Likewise.
* config/arm/arm.h (STARTING_FRAME_OFFSET): Likewise.
* config/bfin/bfin.h (STARTING_FRAME_OFFSET): Likewise.
* config/c6x/c6x.h (STARTING_FRAME_OFFSET): Likewise.
* config/cr16/cr16.h (STARTING_FRAME_OFFSET): Likewise.
* config/cris/cris.h (STARTING_FRAME_OFFSET): Likewise.
* config/fr30/fr30.h (STARTING_FRAME_OFFSET): Likewise.
* config/frv/frv.h (STARTING_FRAME_OFFSET): Likewise.
* config/ft32/ft32.h (STARTING_FRAME_OFFSET): Likewise.
* config/h8300/h8300.h (STARTING_FRAME_OFFSET): Likewise.
* config/i386/i386.h (STARTING_FRAME_OFFSET): Likewise.
* config/ia64/ia64.h (STARTING_FRAME_OFFSET): Likewise.
* config/m32c/m32c.h (STARTING_FRAME_OFFSET): Likewise.
* config/m68k/m68k.h (STARTING_FRAME_OFFSET): Likewise.
* config/mcore/mcore.h (STARTING_FRAME_OFFSET): Likewise.
* config/mn10300/mn10300.h (STARTING_FRAME_OFFSET): Likewise.
* config/moxie/moxie.h (STARTING_FRAME_OFFSET): Likewise.
* config/msp430/msp430.h (STARTING_FRAME_OFFSET): Likewise.
* config/nds32/nds32.h (STARTING_FRAME_OFFSET): Likewise.
* config/nios2/nios2.h (STARTING_FRAME_OFFSET): Likewise.
* config/nvptx/nvptx.h (STARTING_FRAME_OFFSET): Likewise.
* config/pdp11/pdp11.h (STARTING_FRAME_OFFSET): Likewise.
* config/riscv/riscv.h (STARTING_FRAME_OFFSET): Likewise.
* config/rl78/rl78.h (STARTING_FRAME_OFFSET): Likewise.
* config/rx/rx.h (STARTING_FRAME_OFFSET): Likewise.
* config/s390/s390.h (STARTING_FRAME_OFFSET): Likewise.
* config/sh/sh.h (STARTING_FRAME_OFFSET): Likewise.
* config/sparc/sparc.c (sparc_compute_frame_size): Likewise.
* config/sparc/sparc.h (STARTING_FRAME_OFFSET): Likewise.
* config/spu/spu.h (STARTING_FRAME_OFFSET): Likewise.
* config/stormy16/stormy16.h (STARTING_FRAME_OFFSET): Likewise.
* config/tilegx/tilegx.h (STARTING_FRAME_OFFSET): Likewise.
* config/tilepro/tilepro.h (STARTING_FRAME_OFFSET): Likewise.
* config/v850/v850.h (STARTING_FRAME_OFFSET): Likewise.
* config/visium/visium.h (STARTING_FRAME_OFFSET): Likewise.
* config/avr/avr.h (STARTING_FRAME_OFFSET): Likewise.
* config/avr/avr-protos.h (avr_starting_frame_offset): Likewise.
* config/avr/avr.c (avr_starting_frame_offset): Make static and
return a HOST_WIDE_INT.
(avr_builtin_setjmp_frame_value): Use it instead of
STARTING_FRAME_OFFSET.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/epiphany/epiphany.h (STARTING_FRAME_OFFSET): Delete.
* config/epiphany/epiphany.c (epiphany_starting_frame_offset):
New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/iq2000/iq2000.h (STARTING_FRAME_OFFSET): Delete.
* config/iq2000/iq2000.c (iq2000_starting_frame_offset): New function.
(TARGET_CONSTANT_ALIGNMENT): Redefine.
* config/lm32/lm32.h (STARTING_FRAME_OFFSET): Delete.
* config/lm32/lm32.c (lm32_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/m32r/m32r.h (STARTING_FRAME_OFFSET): Delete.
* config/m32r/m32r.c (m32r_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/microblaze/microblaze.h (STARTING_FRAME_OFFSET): Delete.
* config/microblaze/microblaze.c (microblaze_starting_frame_offset):
New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/mips/mips.h (STARTING_FRAME_OFFSET): Delete.
* config/mips/mips.c (mips_compute_frame_info): Refer to
TARGET_STARTING_FRAME_OFFSET instead of STARTING_FRAME_OFFSET.
(mips_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/mmix/mmix.h (STARTING_FRAME_OFFSET): Delete.
* config/mmix/mmix-protos.h (mmix_starting_frame_offset): Delete.
* config/mmix/mmix.c (mmix_starting_frame_offset): Make static
and return a HOST_WIDE_INT.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
(mmix_initial_elimination_offset): Refer to
TARGET_STARTING_FRAME_OFFSET instead of STARTING_FRAME_OFFSET.
* config/pa/pa.h (STARTING_FRAME_OFFSET): Delete.
* config/pa/pa.c (pa_starting_frame_offset): New function.
(pa_compute_frame_size): Use it instead of STARTING_FRAME_OFFSET.
(pa_expand_prologue): Likewise.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/powerpcspe/aix.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/powerpcspe/darwin.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/powerpcspe/powerpcspe.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/powerpcspe/powerpcspe.c (TARGET_STARTING_FRAME_OFFSET):
Redefine.
(rs6000_starting_frame_offset): New function.
* config/rs6000/aix.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/rs6000/darwin.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/rs6000/rs6000.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/rs6000/rs6000.c (TARGET_STARTING_FRAME_OFFSET): Refine.
(rs6000_starting_frame_offset): New function.
* config/vax/elf.h (STARTING_FRAME_OFFSET): Delete.
* config/vax/vax.h (STARTING_FRAME_OFFSET): Delete.
* config/vax/vax.c (vax_starting_frame_offset): New function.
(vax_expand_prologue): Use it instead of STARTING_FRAME_OFFSET.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/xtensa/xtensa.h (STARTING_FRAME_OFFSET): Delete.
* config/xtensa/xtensa.c (xtensa_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* system.h (STARTING_FRAME_OFFSET): Poison.
From-SVN: r254003
Richard Sandiford [Mon, 23 Oct 2017 09:40:51 +0000 (09:40 +0000)]
Use SCALAR_TYPE_MODE in vect_create_epilog_for_reduction
This follows on from similar changes a couple of months ago and
is needed when general modes have variable size.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
SCALAR_TYPE_MODE instead of TYPE_MODE.
From-SVN: r254002
Richard Sandiford [Mon, 23 Oct 2017 09:38:30 +0000 (09:38 +0000)]
Use SCALAR_INT_TYPE_MODE in loc_list_from_tree_1
This follows on from similar changes a couple of months ago and
is needed when general modes have variable size.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* dwarf2out.c (loc_list_from_tree_1): Use SCALAR_INT_TYPE_MODE
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254001
Richard Sandiford [Mon, 23 Oct 2017 09:36:12 +0000 (09:36 +0000)]
Use scalar_int/float_mode in brig_langhook_type_for_mode
This follows on from similar changes a couple of months ago and
is needed when general modes have variable size.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
gcc/brig/
* brig-lang.c (brig_langhook_type_for_mode): Use scalar_int_mode
and scalar_float_mode.
From-SVN: r254000
Richard Sandiford [Mon, 23 Oct 2017 09:32:31 +0000 (09:32 +0000)]
Use scalar_mode in expand_shift_1
Since this function handles scalar and vector shifts:
machine_mode scalar_mode = mode;
if (VECTOR_MODE_P (mode))
scalar_mode = GET_MODE_INNER (mode);
is equivalent to:
scalar_mode = GET_MODE_INNER (mode);
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expmed.c (expand_shift_1): Use scalar_mode for scalar_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253999
Richard Biener [Mon, 23 Oct 2017 09:20:14 +0000 (09:20 +0000)]
re PR tree-optimization/82129 (ICE in compute_antic, at tree-ssa-pre.c:2447)
2017-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/82129
* tree-ssa-pre.c (bitmap_set_and): Remove.
(compute_antic_aux): Compute ANTIC_OUT intersection in a way
canonicalizing expressions in the set to those with lowest
ID rather than taking that from the first edge.
* gcc.dg/torture/pr82129.c: New testcase.
From-SVN: r253998
Richard Sandiford [Mon, 23 Oct 2017 06:07:26 +0000 (06:07 +0000)]
Fix HWI + -unsigned in combine.c
rtx_equal_for_field_assignment_p had:
x = adjust_address_nv (x, GET_MODE (y),
-subreg_lowpart_offset (GET_MODE (x),
GET_MODE (y)));
But subreg_lowpart_offset returns an unsigned int and
adjust_address_nv takes a HWI, so a subreg offset of 4 would
give a memory offset of 0x00000000fffffffffc.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* combine.c (rtx_equal_for_field_assignment_p): Use
byte_lowpart_offset.
From-SVN: r253997
GCC Administrator [Mon, 23 Oct 2017 00:16:14 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r253996
Jan Hubicka [Sun, 22 Oct 2017 22:09:47 +0000 (22:09 +0000)]
i386.c (ix86_builtin_vectorization_cost): Use existing rtx_cost latencies instead of having separate table...
* i386.c (ix86_builtin_vectorization_cost): Use existing rtx_cost
latencies instead of having separate table; make difference between
integer and float costs.
* i386.h (processor_costs): Remove scalar_stmt_cost,
scalar_load_cost, scalar_store_cost, vec_stmt_cost, vec_to_scalar_cost,
scalar_to_vec_cost, vec_align_load_cost, vec_unalign_load_cost,
vec_store_cost.
* x86-tune-costs.h: Remove entries which has been removed in
procesor_costs from all tables; make cond_taken_branch_cost
and cond_not_taken_branch_cost COST_N_INSNS based.
From-SVN: r253993
Richard Sandiford [Sun, 22 Oct 2017 21:41:57 +0000 (21:41 +0000)]
SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn
This is needed by the later SVE LAST reductions, where an 8-bit
or 16-bit result is zero- rather than sign-extended to 32 bits.
I think it could occur in other situations too.
2017-09-19 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* internal-fn.c (expand_direct_optab_fn): Don't assign directly
to a SUBREG_PROMOTED_VAR.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253992
Richard Sandiford [Sun, 22 Oct 2017 21:39:29 +0000 (21:39 +0000)]
Make more use of GET_MODE_UNIT_PRECISION
This patch is like the earlier GET_MODE_UNIT_SIZE one,
but for precisions rather than sizes. There is one behavioural
change in expand_debug_expr: we shouldn't use lowpart subregs
for non-scalar truncations, since that would just reinterpret
some of the scalars and drop the rest. (This probably doesn't
trigger in practice.) Using TRUNCATE is fine for scalars,
since simplify_gen_unary knows when a subreg can be used.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_PRECISION.
(expand_debug_source_expr): Likewise.
* combine.c (combine_simplify_rtx): Likewise.
* cse.c (fold_rtx): Likewise.
* optabs.c (expand_float): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253991
Richard Sandiford [Sun, 22 Oct 2017 21:11:01 +0000 (21:11 +0000)]
Make more use of HWI_COMPUTABLE_MODE_P
This patch uses HWI_COMPUTABLE_MODE_P (X) instead of
GET_MODE_PRECISION (X) <= HOST_BITS_PER_WIDE_INT in cases
where X also needs to be a scalar integer.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
(record_promoted_value): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* ree.c (update_reg_equal_equiv_notes): Likewise.
(combine_set_extension): Likewise.
* rtlanal.c (low_bitmask_len): Likewise.
* simplify-rtx.c (neg_const_int): Likewise.
(simplify_binary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253990
Richard Sandiford [Sun, 22 Oct 2017 21:07:50 +0000 (21:07 +0000)]
Make more use of subreg_size_lowpart_offset
This patch uses subreg_size_lowpart_offset in places that open-coded
the calculation. The reload use (and the LRA one that was based on it)
seemed to ignore the BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN case; it's not
obvious whether that was deliberate or an oversight.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* lra-spills.c (assign_mem_slot): Use subreg_size_lowpart_offset.
* regcprop.c (maybe_mode_change): Likewise.
* reload1.c (alter_reg): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253989
Richard Sandiford [Sun, 22 Oct 2017 21:04:02 +0000 (21:04 +0000)]
Add wide_int version of inchash::hash::add_wide_int
This patch adds an inchash hasher for wide_int-based types.
It means that hash_tree no longer hashes TREE_INT_CST_EXT_NUNITS,
but that was redundant with hashing the type.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* inchash.h (inchash::hash::add_wide_int): New function.
* lto-streamer-out.c (hash_tree): Use it.
From-SVN: r253988
Richard Sandiford [Sun, 22 Oct 2017 20:42:06 +0000 (20:42 +0000)]
Rename inchash::hash::add_wide_int
The name inchash::add_wide_int is a bit misleading, since it sounds
like it's hashing a wide_int. This patch renames it to add_hwi instead.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* inchash.h (inchash::hash::add_wide_int): Rename to...
(inchash::hash::add_hwi): ...this.
* ipa-devirt.c (hash_odr_vtable): Update accordingly.
(polymorphic_call_target_hasher::hash): Likewise.
* ipa-icf.c (sem_function::get_hash, sem_function::init): Likewise.
(sem_item::add_expr, sem_item::add_type, sem_variable::get_hash)
(sem_item_optimizer::update_hash_by_addr_refs): Likewise.
* lto-streamer-out.c (hash_tree): Likewise.
* optc-save-gen.awk: Likewise.
* tree.c (add_expr): Likewise.
From-SVN: r253987
Uros Bizjak [Sun, 22 Oct 2017 19:04:36 +0000 (21:04 +0200)]
re PR target/52451 (gcc w/i387 float generates fucom rather than fcom for floating point comparsons)
PR target/52451
* config/i386/i386.c (ix86_fp_compare_mode): Return CCFPmode
for ordered inequality comparisons even with TARGET_IEEE_FP.
testsuite/ChangeLog:
PR target/52451
* gcc.dg/torture/pr52451.c: New test.
From-SVN: r253986
Uros Bizjak [Sun, 22 Oct 2017 18:05:17 +0000 (20:05 +0200)]
re PR rtl-optimization/82628 (wrong code at -Os on x86_64-linux-gnu in the 32-bit mode)
PR target/82628
* config/i386/i386.md (cmp<dwi>_doubleword): New pattern.
* config/i386/i386.c (ix86_expand_branch) <case E_TImode>:
Expand with cmp<dwi>_doubleword.
testsuite/ChangeLog:
PR target/82628
* gcc.dg/torture/pr82628.c: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r253985
Igor Tsimbalist [Sun, 22 Oct 2017 16:32:08 +0000 (18:32 +0200)]
Move 2 tests from c-c++-common/ to gcc.target/i386/ directory.
* c-c++-common/attr-nocf-check-1a.c: Remove test.
* c-c++-common/attr-nocf-check-3a.c: Likewise.
* gcc.target/i386/attr-nocf-check-1a.c: Add test.
* gcc.target/i386/attr-nocf-check-3a.c: Likewise.
From-SVN: r253984
GCC Administrator [Sun, 22 Oct 2017 00:16:14 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r253982
Igor Tsimbalist [Sat, 21 Oct 2017 21:33:41 +0000 (23:33 +0200)]
Add x86 tests for Intel CET implementation.
gcc/testsuite/
* c-c++-common/attr-nocf-check-1.c: Shorten a cheking message.
* c-c++-common/attr-nocf-check-3.c: Likewise.
* c-c++-common/fcf-protection-1.c: Add x86 specific message.
* c-c++-common/fcf-protection-2.c: Likewise.
* c-c++-common/fcf-protection-3.c: Likewise.
* c-c++-common/fcf-protection-5.c: Likewise.
* c-c++-common/attr-nocf-check-1a.c: New test.
* c-c++-common/attr-nocf-check-3a.c: Likewise.
* g++.dg/cet-notrack-1.C: Likewise.
* gcc.target/i386/cet-intrin-1.c: Likewise.
* gcc.target/i386/cet-intrin-10.c: Likewise.
* gcc.target/i386/cet-intrin-2.c: Likewise.
* gcc.target/i386/cet-intrin-3.c: Likewise.
* gcc.target/i386/cet-intrin-4.c: Likewise.
* gcc.target/i386/cet-intrin-5.c: Likewise.
* gcc.target/i386/cet-intrin-6.c: Likewise.
* gcc.target/i386/cet-intrin-7.c: Likewise.
* gcc.target/i386/cet-intrin-8.c: Likewise.
* gcc.target/i386/cet-intrin-9.c: Likewise.
* gcc.target/i386/cet-label.c: Likewise.
* gcc.target/i386/cet-notrack-1a.c: Likewise.
* gcc.target/i386/cet-notrack-1b.c: Likewise.
* gcc.target/i386/cet-notrack-2a.c: Likewise.
* gcc.target/i386/cet-notrack-2b.c: Likewise.
* gcc.target/i386/cet-notrack-3.c: Likewise.
* gcc.target/i386/cet-notrack-4a.c: Likewise.
* gcc.target/i386/cet-notrack-4b.c: Likewise.
* gcc.target/i386/cet-notrack-5a.c: Likewise.
* gcc.target/i386/cet-notrack-5b.c: Likewise.
* gcc.target/i386/cet-notrack-6a.c: Likewise.
* gcc.target/i386/cet-notrack-6b.c: Likewise.
* gcc.target/i386/cet-notrack-7.c: Likewise.
* gcc.target/i386/cet-property-1.c: Likewise.
* gcc.target/i386/cet-property-2.c: Likewise.
* gcc.target/i386/cet-rdssp-1.c: Likewise.
* gcc.target/i386/cet-sjlj-1.c: Likewise.
* gcc.target/i386/cet-sjlj-2.c: Likewise.
* gcc.target/i386/cet-sjlj-3.c: Likewise.
* gcc.target/i386/cet-switch-1.c: Likewise.
* gcc.target/i386/cet-switch-2.c: Likewise.
* lib/target-supports.exp (check_effective_target_cet): New
proc.
From-SVN: r253979
Igor Tsimbalist [Sat, 21 Oct 2017 21:16:32 +0000 (23:16 +0200)]
Add x86 CET documentation.
gcc/doc/
* extend.texi: Add x86 specific to 'nocf_check' attribute.
List CET intrinsics.
* invoke.texi: Add -mcet, -mibt, -mshstk options. Add x86
specific to -fcf-protection option.
From-SVN: r253978
Igor Tsimbalist [Sat, 21 Oct 2017 21:09:53 +0000 (23:09 +0200)]
Update x86 backend to enable Intel CET.
All platforms except i386 will report the error and do no
instrumentation with -finstrument-control-flow option. i386
will provide the implementation based on a specification
published by Intel for a new technology called Control-flow
Enforcement Technology (CET). The spec is available at
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
The implementation in this patch:
1) enables Control-flow Enforcement Technology (CET), published by
Intel. This part introduces i386 specific options -mcet, -mibt and
-mshstk, new instructions and intrinsics;
2) provides support for -fcf-protection option and 'nocf_check'
attribute by doing needed code instrumentation, which is based on
CET features.
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET): New.
(OPTION_MASK_ISA_SHSTK_SET): Likewise.
(OPTION_MASK_ISA_IBT_UNSET): Likewise.
(OPTION_MASK_ISA_SHSTK_UNSET): Likewise.
(ix86_handle_option): Add -mibt, -mshstk, -mcet handling.
* config.gcc (extra_headers): Add cetintrin.h for x86 targets.
(extra_objs): Add cet.o for Linux/x86 targets.
(tmake_file): Add i386/t-cet for Linux/x86 targets.
* config/i386/cet.c: New file.
* config/i386/cetintrin.h: Likewise.
* config/i386/t-cet: Likewise.
* config/i386/cpuid.h (bit_SHSTK): New.
(bit_IBT): Likewise.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect and
pass IBT and SHSTK bits.
* config/i386/i386-builtin-types.def
(VOID_FTYPE_UNSIGNED_PVOID): New.
(VOID_FTYPE_UINT64_PVOID): Likewise.
* config/i386/i386-builtin.def: Add CET intrinsics.
* config/i386/i386-c.c (ix86_target_macros_internal): Add
OPTION_MASK_ISA_IBT, OPTION_MASK_ISA_SHSTK handling.
* config/i386/i386-passes.def: Add pass_insert_endbranch pass.
* config/i386/i386-protos.h (make_pass_insert_endbranch): New
prototype.
* config/i386/i386.c (rest_of_insert_endbranch): New.
(pass_data_insert_endbranch): Likewise.
(pass_insert_endbranch): Likewise.
(make_pass_insert_endbranch): Likewise.
(ix86_notrack_prefixed_insn_p): Likewise.
(ix86_target_string): Add -mibt, -mshstk flags.
(ix86_option_override_internal): Add flag_cf_protection
processing.
(ix86_valid_target_attribute_inner_p): Set OPT_mibt, OPT_mshstk.
(ix86_print_operand): Add 'notrack' prefix output.
(ix86_init_mmx_sse_builtins): Add CET intrinsics.
(ix86_expand_builtin): Expand CET intrinsics.
(x86_output_mi_thunk): Add 'endbranch' instruction.
* config/i386/i386.h (TARGET_IBT): New.
(TARGET_IBT_P): Likewise.
(TARGET_SHSTK): Likewise.
(TARGET_SHSTK_P): Likewise.
* config/i386/i386.md (unspecv): Add UNSPECV_NOP_RDSSP,
UNSPECV_INCSSP, UNSPECV_SAVEPREVSSP, UNSPECV_RSTORSSP,
UNSPECV_WRSS, UNSPECV_WRUSS, UNSPECV_SETSSBSY, UNSPECV_CLRSSBSY.
(builtin_setjmp_setup): New pattern.
(builtin_longjmp): Likewise.
(rdssp<mode>): Likewise.
(incssp<mode>): Likewise.
(saveprevssp): Likewise.
(rstorssp): Likewise.
(wrss<mode>): Likewise.
(wruss<mode>): Likewise.
(setssbsy): Likewise.
(clrssbsy): Likewise.
(nop_endbr): Likewise.
* config/i386/i386.opt: Add -mcet, -mibt, -mshstk and -mcet-switch
options.
* config/i386/immintrin.h: Include <cetintrin.h>.
* config/i386/linux-common.h
(file_end_indicate_exec_stack_and_cet): New prototype.
(TARGET_ASM_FILE_END): New.
From-SVN: r253977
Jan Hubicka [Sat, 21 Oct 2017 11:53:33 +0000 (13:53 +0200)]
pr79683.c: Disable costmodel.
* gcc.target/i386/pr79683.c: Disable costmodel.
* i386.c (ix86_builtin_vectorization_cost): Use existing rtx_cost
latencies instead of having separate table; make difference between
integer and float costs.
* i386.h (processor_costs): Remove scalar_stmt_cost,
scalar_load_cost, scalar_store_cost, vec_stmt_cost, vec_to_scalar_cost,
scalar_to_vec_cost, vec_align_load_cost, vec_unalign_load_cost,
vec_store_cost.
* x86-tune-costs.h: Remove entries which has been removed in
procesor_costs from all tables; make cond_taken_branch_cost
and cond_not_taken_branch_cost COST_N_INSNS based.
Index: testsuite/gcc.target/i386/pr79683.c
===================================================================
--- testsuite/gcc.target/i386/pr79683.c (revision 253957)
+++ testsuite/gcc.target/i386/pr79683.c (working copy)
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O3 -msse2" } */
+/* { dg-options "-O3 -msse2 -fvect-cost-model=unlimited" } */
struct s {
__INT64_TYPE__ a;
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 253957)
+++ config/i386/i386.c (working copy)
@@ -44051,37 +44051,61 @@ static int
ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
tree vectype, int)
{
+ bool fp = false;
+ machine_mode mode = TImode;
+ if (vectype != NULL)
+ {
+ fp = FLOAT_TYPE_P (vectype);
+ mode = TYPE_MODE (vectype);
+ }
+
switch (type_of_cost)
{
case scalar_stmt:
- return ix86_cost->scalar_stmt_cost;
+ return fp ? ix86_cost->addss : COSTS_N_INSNS (1);
case scalar_load:
- return ix86_cost->scalar_load_cost;
+ /* load/store costs are relative to register move which is 2. Recompute
+ it to COSTS_N_INSNS so everything have same base. */
+ return COSTS_N_INSNS (fp ? ix86_cost->sse_load[0]
+ : ix86_cost->int_load [2]) / 2;
case scalar_store:
- return ix86_cost->scalar_store_cost;
+ return COSTS_N_INSNS (fp ? ix86_cost->sse_store[0]
+ : ix86_cost->int_store [2]) / 2;
case vector_stmt:
- return ix86_cost->vec_stmt_cost;
+ return ix86_vec_cost (mode,
+ fp ? ix86_cost->addss : ix86_cost->sse_op,
+ true);
case vector_load:
- return ix86_cost->vec_align_load_cost;
+ return ix86_vec_cost (mode,
+ COSTS_N_INSNS (ix86_cost->sse_load[2]) / 2,
+ true);
case vector_store:
- return ix86_cost->vec_store_cost;
+ return ix86_vec_cost (mode,
+ COSTS_N_INSNS (ix86_cost->sse_store[2]) / 2,
+ true);
case vec_to_scalar:
- return ix86_cost->vec_to_scalar_cost;
-
case scalar_to_vec:
- return ix86_cost->scalar_to_vec_cost;
+ return ix86_vec_cost (mode, ix86_cost->sse_op, true);
+ /* We should have separate costs for unaligned loads and gather/scatter.
+ Do that incrementally. */
case unaligned_load:
- case unaligned_store:
case vector_gather_load:
+ return ix86_vec_cost (mode,
+ COSTS_N_INSNS (ix86_cost->sse_load[2]),
+ true);
+
+ case unaligned_store:
case vector_scatter_store:
- return ix86_cost->vec_unalign_load_cost;
+ return ix86_vec_cost (mode,
+ COSTS_N_INSNS (ix86_cost->sse_store[2]),
+ true);
case cond_branch_taken:
return ix86_cost->cond_taken_branch_cost;
@@ -44091,10 +44115,11 @@ ix86_builtin_vectorization_cost (enum ve
case vec_perm:
case vec_promote_demote:
- return ix86_cost->vec_stmt_cost;
+ return ix86_vec_cost (mode,
+ ix86_cost->sse_op, true);
case vec_construct:
- return ix86_cost->vec_stmt_cost * (TYPE_VECTOR_SUBPARTS (vectype) - 1);
+ return ix86_vec_cost (mode, ix86_cost->sse_op, false);
default:
gcc_unreachable ();
Index: config/i386/i386.h
===================================================================
--- config/i386/i386.h (revision 253957)
+++ config/i386/i386.h (working copy)
@@ -277,18 +277,6 @@ struct processor_costs {
parallel. See also
ix86_reassociation_width. */
struct stringop_algs *memcpy, *memset;
- const int scalar_stmt_cost; /* Cost of any scalar operation, excluding
- load and store. */
- const int scalar_load_cost; /* Cost of scalar load. */
- const int scalar_store_cost; /* Cost of scalar store. */
- const int vec_stmt_cost; /* Cost of any vector operation, excluding
- load, store, vector-to-scalar and
- scalar-to-vector operation. */
- const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */
- const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */
- const int vec_align_load_cost; /* Cost of aligned vector load. */
- const int vec_unalign_load_cost; /* Cost of unaligned vector load. */
- const int vec_store_cost; /* Cost of vector store. */
const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer
cost model. */
const int cond_not_taken_branch_cost;/* Cost of not taken branch for
Index: config/i386/x86-tune-costs.h
===================================================================
--- config/i386/x86-tune-costs.h (revision 253958)
+++ config/i386/x86-tune-costs.h (working copy)
@@ -79,17 +79,8 @@ struct processor_costs ix86_size_cost =
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
ix86_size_memcpy,
ix86_size_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 1, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 1, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_BYTES (1), /* cond_taken_branch_cost. */
+ COSTS_N_BYTES (1), /* cond_not_taken_branch_cost. */
};
/* Processor costs (relative to an add) */
@@ -167,17 +158,8 @@ struct processor_costs i386_cost = { /*
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
i386_memcpy,
i386_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs i486_memcpy[2] = {
@@ -256,17 +238,8 @@ struct processor_costs i486_cost = { /*
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
i486_memcpy,
i486_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs pentium_memcpy[2] = {
@@ -343,17 +316,8 @@ struct processor_costs pentium_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
pentium_memcpy,
pentium_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static const
@@ -423,17 +387,8 @@ struct processor_costs lakemont_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
pentium_memcpy,
pentium_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
/* PentiumPro has optimized rep instructions for blocks aligned by 8 bytes
@@ -518,17 +473,8 @@ struct processor_costs pentiumpro_cost =
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
pentiumpro_memcpy,
pentiumpro_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs geode_memcpy[2] = {
@@ -605,17 +551,8 @@ struct processor_costs geode_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
geode_memcpy,
geode_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs k6_memcpy[2] = {
@@ -694,17 +631,8 @@ struct processor_costs k6_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
k6_memcpy,
k6_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
/* For some reason, Athlon deals better with REP prefix (relative to loops)
@@ -784,17 +712,8 @@ struct processor_costs athlon_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
athlon_memcpy,
athlon_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
/* K8 has optimized REP instruction for medium sized blocks, but for very
@@ -883,17 +802,8 @@ struct processor_costs k8_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
k8_memcpy,
k8_memset,
- 4, /* scalar_stmt_cost. */
- 2, /* scalar load_cost. */
- 2, /* scalar_store_cost. */
- 5, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 2, /* vec_align_load_cost. */
- 3, /* vec_unalign_load_cost. */
- 3, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 2, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */
};
/* AMDFAM10 has optimized REP instruction for medium sized blocks, but for
@@ -989,17 +899,8 @@ struct processor_costs amdfam10_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
amdfam10_memcpy,
amdfam10_memset,
- 4, /* scalar_stmt_cost. */
- 2, /* scalar load_cost. */
- 2, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 2, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 2, /* vec_store_cost. */
- 2, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
/* BDVER1 has optimized REP instruction for medium sized blocks, but for
@@ -1097,17 +998,8 @@ const struct processor_costs bdver1_cost
1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
bdver1_memcpy,
bdver1_memset,
- 6, /* scalar_stmt_cost. */
- 4, /* scalar load_cost. */
- 4, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 4, /* vec_align_load_cost. */
- 4, /* vec_unalign_load_cost. */
- 4, /* vec_store_cost. */
- 4, /* cond_taken_branch_cost. */
- 2, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (4), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */
};
/* BDVER2 has optimized REP instruction for medium sized blocks, but for
@@ -1206,17 +1098,8 @@ const struct processor_costs bdver2_cost
1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
bdver2_memcpy,
bdver2_memset,
- 6, /* scalar_stmt_cost. */
- 4, /* scalar load_cost. */
- 4, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 4, /* vec_align_load_cost. */
- 4, /* vec_unalign_load_cost. */
- 4, /* vec_store_cost. */
- 4, /* cond_taken_branch_cost. */
- 2, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (4), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */
};
@@ -1306,17 +1189,8 @@ struct processor_costs bdver3_cost = {
1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
bdver3_memcpy,
bdver3_memset,
- 6, /* scalar_stmt_cost. */
- 4, /* scalar load_cost. */
- 4, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 4, /* vec_align_load_cost. */
- 4, /* vec_unalign_load_cost. */
- 4, /* vec_store_cost. */
- 4, /* cond_taken_branch_cost. */
- 2, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (4), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */
};
/* BDVER4 has optimized REP instruction for medium sized blocks, but for
@@ -1405,17 +1279,8 @@ struct processor_costs bdver4_cost = {
1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
bdver4_memcpy,
bdver4_memset,
- 6, /* scalar_stmt_cost. */
- 4, /* scalar load_cost. */
- 4, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 4, /* vec_align_load_cost. */
- 4, /* vec_unalign_load_cost. */
- 4, /* vec_store_cost. */
- 4, /* cond_taken_branch_cost. */
- 2, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (4), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */
};
@@ -1524,17 +1389,8 @@ struct processor_costs znver1_cost = {
4, 4, 3, 6, /* reassoc int, fp, vec_int, vec_fp. */
znver1_memcpy,
znver1_memset,
- 6, /* scalar_stmt_cost. */
- 4, /* scalar load_cost. */
- 4, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 4, /* vec_align_load_cost. */
- 4, /* vec_unalign_load_cost. */
- 4, /* vec_store_cost. */
- 4, /* cond_taken_branch_cost. */
- 2, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (4), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */
};
/* BTVER1 has optimized REP instruction for medium sized blocks, but for
@@ -1624,17 +1480,8 @@ const struct processor_costs btver1_cost
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
btver1_memcpy,
btver1_memset,
- 4, /* scalar_stmt_cost. */
- 2, /* scalar load_cost. */
- 2, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 2, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 2, /* vec_store_cost. */
- 2, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs btver2_memcpy[2] = {
@@ -1721,17 +1568,8 @@ const struct processor_costs btver2_cost
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
btver2_memcpy,
btver2_memset,
- 4, /* scalar_stmt_cost. */
- 2, /* scalar load_cost. */
- 2, /* scalar_store_cost. */
- 6, /* vec_stmt_cost. */
- 0, /* vec_to_scalar_cost. */
- 2, /* scalar_to_vec_cost. */
- 2, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 2, /* vec_store_cost. */
- 2, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (2), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs pentium4_memcpy[2] = {
@@ -1809,17 +1647,8 @@ struct processor_costs pentium4_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
pentium4_memcpy,
pentium4_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs nocona_memcpy[2] = {
@@ -1900,17 +1729,8 @@ struct processor_costs nocona_cost = {
1, 1, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
nocona_memcpy,
nocona_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs atom_memcpy[2] = {
@@ -1989,17 +1809,8 @@ struct processor_costs atom_cost = {
2, 2, 2, 2, /* reassoc int, fp, vec_int, vec_fp. */
atom_memcpy,
atom_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs slm_memcpy[2] = {
@@ -2078,17 +1889,8 @@ struct processor_costs slm_cost = {
1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
slm_memcpy,
slm_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 4, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
static stringop_algs intel_memcpy[2] = {
@@ -2167,17 +1969,8 @@ struct processor_costs intel_cost = {
1, 4, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
intel_memcpy,
intel_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 4, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
/* Generic should produce code tuned for Core-i7 (and newer chips)
@@ -2265,17 +2058,8 @@ struct processor_costs generic_cost = {
1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */
generic_memcpy,
generic_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
/* core_cost should produce code tuned for Core familly of CPUs. */
@@ -2366,16 +2150,7 @@ struct processor_costs core_cost = {
1, 4, 2, 2, /* reassoc int, fp, vec_int, vec_fp. */
core_memcpy,
core_memset,
- 1, /* scalar_stmt_cost. */
- 1, /* scalar load_cost. */
- 1, /* scalar_store_cost. */
- 1, /* vec_stmt_cost. */
- 1, /* vec_to_scalar_cost. */
- 1, /* scalar_to_vec_cost. */
- 1, /* vec_align_load_cost. */
- 2, /* vec_unalign_load_cost. */
- 1, /* vec_store_cost. */
- 3, /* cond_taken_branch_cost. */
- 1, /* cond_not_taken_branch_cost. */
+ COSTS_N_INSNS (3), /* cond_taken_branch_cost. */
+ COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */
};
From-SVN: r253975
Eric Botcazou [Sat, 21 Oct 2017 10:40:08 +0000 (10:40 +0000)]
* gcc-interface/Makefile.in: Remove bogus settings for VxWorks.
From-SVN: r253973
Eric Botcazou [Sat, 21 Oct 2017 10:05:33 +0000 (10:05 +0000)]
Fix typos
From-SVN: r253972
Eric Botcazou [Sat, 21 Oct 2017 09:53:50 +0000 (09:53 +0000)]
utils.c (pad_type_hash): Use hashval_t for hash value.
* gcc-interface/utils.c (pad_type_hash): Use hashval_t for hash value.
(convert): Do not use an unchecked conversion for converting from a
type to another type padding it.
From-SVN: r253971
Paul Thomas [Sat, 21 Oct 2017 09:02:17 +0000 (09:02 +0000)]
re PR fortran/82586 ([PDT] ICE: write_symbol(): bad module symbol)
2017-10-21 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82586
* decl.c (gfc_get_pdt_instance): Remove the error message that
the parameter does not have a corresponding component since
this is now taken care of when the derived type is resolved. Go
straight to error return instead.
(gfc_match_formal_arglist): Make the PDT relevant errors
immediate so that parsing of the derived type can continue.
(gfc_match_derived_decl): Do not check the match status on
return from gfc_match_formal_arglist for the same reason.
* resolve.c (resolve_fl_derived0): Check that each type
parameter has a corresponding component.
PR fortran/82587
* resolve.c (resolve_generic_f): Check that the derived type
can be used before resolving the struture constructor.
PR fortran/82589
* symbol.c (check_conflict): Add the conflicts involving PDT
KIND and LEN attributes.
2017-10-21 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82586
* gfortran.dg/pdt_16.f03 : New test.
* gfortran.dg/pdt_4.f03 : Catch the changed messages.
* gfortran.dg/pdt_8.f03 : Ditto.
PR fortran/82587
* gfortran.dg/pdt_17.f03 : New test.
PR fortran/82589
* gfortran.dg/pdt_18.f03 : New test.
From-SVN: r253970
Eric Botcazou [Sat, 21 Oct 2017 08:25:13 +0000 (08:25 +0000)]
Fix wording
From-SVN: r253969
Jonathan Wakely [Sat, 21 Oct 2017 01:16:43 +0000 (02:16 +0100)]
Fix invalid path::iterator test
* testsuite/experimental/filesystem/path/itr/traversal.cc: Do not
increment past-the-end iterators.
From-SVN: r253967
GCC Administrator [Sat, 21 Oct 2017 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r253966
Jonathan Wakely [Fri, 20 Oct 2017 21:05:11 +0000 (22:05 +0100)]
Update value of __cpp_lib_chrono feature-test macro
* include/std/chrono (__cpp_lib_chrono): Update macro value to
indicate support for P0505R0.
* testsuite/20_util/duration/arithmetic/constexpr_c++17.cc: Check
for updated macro.
From-SVN: r253959
Jan Hubicka [Fri, 20 Oct 2017 20:51:50 +0000 (22:51 +0200)]
* x86-tune-costs.h (intel_cost, generic_cost): Fix move costs.
From-SVN: r253958
Ian Lance Taylor [Fri, 20 Oct 2017 18:34:36 +0000 (18:34 +0000)]
debug/dwarf: support 64-bit DWARF in byte order check
Also fix 64-bit DWARF to read a 64-bit abbrev offset in the
compilation unit.
This is a backport of https://golang.org/cl/71171, which will be in
the Go 1.10 release, to the gofrontend copy. Doing it now because AIX
is pretty much the only system that uses 64-bit DWARF.
Reviewed-on: https://go-review.googlesource.com/72250
From-SVN: r253955
Nathan Sidwell [Fri, 20 Oct 2017 18:30:48 +0000 (18:30 +0000)]
[C++ PATCH] AS_BASETYPE
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01376.html
* class.c (layout_class_type): Cleanup as-base creation, determine
mode here.
(finish_struct_1): ... not here.
From-SVN: r253954
Jonathan Wakely [Fri, 20 Oct 2017 18:02:19 +0000 (19:02 +0100)]
Define __cpp_lib_byte feature-test macro
* include/c_global/cstddef: Define __cpp_lib_byte feature-test macro.
* testsuite/18_support/byte/requirements.cc: Check macro.
From-SVN: r253952
Igor Tsimbalist [Fri, 20 Oct 2017 17:29:02 +0000 (19:29 +0200)]
Add tests for -fcf-protection option and nocf_check attribute.
* c-c++-common/fcf-protection-1.c: New test.
* c-c++-common/fcf-protection-2.c: Likewise.
* c-c++-common/fcf-protection-3.c: Likewise.
* c-c++-common/fcf-protection-4.c: Likewise.
* c-c++-common/fcf-protection-5.c: Likewise.
* c-c++-common/attr-nocf-check-1.c: Likewise.
* c-c++-common/attr-nocf-check-2.c: Likewise.
* c-c++-common/attr-nocf-check-3.c: Likewise.
From-SVN: r253949
Pierre-Marie de Rodat [Fri, 20 Oct 2017 17:02:37 +0000 (17:02 +0000)]
s-osinte__linux.ads (Relative_Timed_Wait): Add variable needed for using monotonic clock.
gcc/ada/
2017-10-20 Doug Rupp <rupp@adacore.com>
* libgnarl/s-osinte__linux.ads (Relative_Timed_Wait): Add variable
needed for using monotonic clock.
* libgnarl/s-taprop__linux.adb: Revert previous monotonic clock
changes.
* libgnarl/s-taprop__linux.adb, s-taprop__posix.adb: Unify and factor
out monotonic clock related functions body.
(Timed_Sleep, Timed_Delay, Montonic_Clock, RT_Resolution,
Compute_Deadline): Move to...
* libgnarl/s-tpopmo.adb: ... here. New separate package body.
2017-10-20 Ed Schonberg <schonberg@adacore.com>
* sem_util.adb (Is_Controlling_Limited_Procedure): Handle properly the
case where the controlling formal is an anonymous access to interface
type.
* exp_ch9.adb (Extract_Dispatching_Call): If controlling actual is an
access type, handle properly the the constructed dereference that
designates the object used in the rewritten synchronized call.
(Parameter_Block_Pack): If the type of the actual is by-copy, its
generated declaration in the parameter block does not need an
initialization even if the type is a null-excluding access type,
because it will be initialized with the value of the actual later on.
(Parameter_Block_Pack): Do not add controlling actual to parameter
block when its type is by-copy.
2017-10-20 Justin Squirek <squirek@adacore.com>
* sem_ch8.adb (Update_Use_Clause_Chain): Add sanity check to verify
scope stack traversal into the context clause.
gcc/testsuite/
2017-10-20 Ed Schonberg <schonberg@adacore.com>
* gnat.dg/sync_iface_call.adb, gnat.dg/sync_iface_call_pkg.ads,
gnat.dg/sync_iface_call_pkg2.adb, gnat.dg/sync_iface_call_pkg2.ads:
New testcase.
From-SVN: r253948
Pierre-Marie de Rodat [Fri, 20 Oct 2017 16:27:32 +0000 (16:27 +0000)]
[multiple changes]
2017-10-20 Bob Duff <duff@adacore.com>
* sinfo.ads: Fix a comment typo.
2017-10-20 Eric Botcazou <ebotcazou@adacore.com>
* doc/gnat_ugn/building_executable_programs_with_gnat.rst (-flto): Add
warning against usage in conjunction with -gnatn.
(-fdump-xref): Delete entry.
* doc/gnat_ugn/gnat_utility_programs.rst (--ext): Remove mention of
-fdump-xref switch.
* gnat_ugn.texi: Regenerate.
2017-10-20 Hristian Kirtchev <kirtchev@adacore.com>
* sem_type.adb, exp_util.adb, sem_util.adb, sem_dim.adb, sem_elab.adb:
Minor reformatting.
From-SVN: r253947
Pierre-Marie de Rodat [Fri, 20 Oct 2017 16:20:40 +0000 (16:20 +0000)]
Add ChangeLog entries, missing from last commit
From-SVN: r253946
Pierre-Marie de Rodat [Fri, 20 Oct 2017 16:05:28 +0000 (16:05 +0000)]
sem_dim.adb (Analyze_Dimension_Binary_Op): Accept with a warning to compare a dimensioned expression with a literal.
gcc/ada/
2017-10-20 Yannick Moy <moy@adacore.com>
* sem_dim.adb (Analyze_Dimension_Binary_Op): Accept with a warning to
compare a dimensioned expression with a literal.
(Dim_Warning_For_Numeric_Literal): Do not issue a warning for the
special value zero.
* doc/gnat_ugn/gnat_and_program_execution.rst: Update description of
dimensionality system in GNAT.
* gnat_ugn.texi: Regenerate.
2017-10-20 Yannick Moy <moy@adacore.com>
* sem_ch6.adb (Analyze_Expression_Function.Freeze_Expr_Types): Remove
inadequate silencing of errors.
* sem_util.adb (Check_Part_Of_Reference): Do not issue an error when
checking the subprogram body generated from an expression function,
when this is done as part of the preanalysis done on expression
functions, as the subprogram body may not yet be attached in the AST.
The error if any will be issued later during the analysis of the body.
(Is_Aliased_View): Trivial rewrite with Is_Formal_Object.
2017-10-20 Arnaud Charlet <charlet@adacore.com>
* sem_ch8.adb (Update_Chain_In_Scope): Add missing [-gnatwu] marker for
warning on ineffective use clause.
2017-10-20 Eric Botcazou <ebotcazou@adacore.com>
* exp_ch11.ads (Warn_If_No_Local_Raise): Declare.
* exp_ch11.adb (Expand_Exception_Handlers): Use Warn_If_No_Local_Raise
to issue the warning on the absence of local raise.
(Possible_Local_Raise): Do not issue the warning for Call_Markers.
(Warn_If_No_Local_Raise): New procedure to issue the warning on the
absence of local raise.
* sem_elab.adb: Add with and use clauses for Exp_Ch11.
(Record_Elaboration_Scenario): Call Possible_Local_Raise in the cases
where a scenario could give rise to raising Program_Error.
* sem_elab.adb: Typo fixes.
* fe.h (Warn_If_No_Local_Raise): Declare.
* gcc-interface/gigi.h (get_exception_label): Change return type.
* gcc-interface/trans.c (gnu_constraint_error_label_stack): Change to
simple vector of Entity_Id.
(gnu_storage_error_label_stack): Likewise.
(gnu_program_error_label_stack): Likewise.
(gigi): Adjust to above changes.
(Raise_Error_to_gnu): Likewise.
(gnat_to_gnu) <N_Goto_Statement>: Set TREE_USED on the label.
(N_Push_Constraint_Error_Label): Push the label onto the stack.
(N_Push_Storage_Error_Label): Likewise.
(N_Push_Program_Error_Label): Likewise.
(N_Pop_Constraint_Error_Label): Pop the label from the stack and issue
a warning on the absence of local raise.
(N_Pop_Storage_Error_Label): Likewise.
(N_Pop_Program_Error_Label): Likewise.
(push_exception_label_stack): Delete.
(get_exception_label): Change return type to Entity_Id and adjust.
* gcc-interface/utils2.c (build_goto_raise): Change type of first
parameter to Entity_Id and adjust. Set TREE_USED on the label.
(build_call_raise): Adjust calls to get_exception_label and also
build_goto_raise.
(build_call_raise_column): Likewise.
(build_call_raise_range): Likewise.
* doc/gnat_ugn/building_executable_programs_with_gnat.rst (-gnatw.x):
Document actual default behavior.
2017-10-20 Piotr Trojanek <trojanek@adacore.com>
* einfo.ads: Minor consistent punctuation in comment. All numbered
items in the comment of Is_Internal are now terminated with a period.
2017-10-20 Piotr Trojanek <trojanek@adacore.com>
* exp_util.adb (Build_Temporary): Mark created temporary entity as
internal.
2017-10-20 Piotr Trojanek <trojanek@adacore.com>
* sem_type.adb (In_Generic_Actual): Simplified.
2017-10-20 Justin Squirek <squirek@adacore.com>
* sem_ch12.adb (Check_Formal_Package_Instance): Add sanity check to
verify a renaming exists for a generic formal before comparing it to
the actual as defaulted formals will not have a renamed_object.
2017-10-20 Javier Miranda <miranda@adacore.com>
* exp_ch6.adb (Replace_Returns): Fix wrong management of
N_Block_Statement nodes.
gcc/testsuite/
2017-10-20 Justin Squirek <squirek@adacore.com>
* gnat.dg/default_pkg_actual.adb, gnat.dg/default_pkg_actual2.adb: New
testcases.
From-SVN: r253945
Pierre-Marie de Rodat [Fri, 20 Oct 2017 15:08:36 +0000 (15:08 +0000)]
exp_aggr.adb (Initialize_Array_Component): Avoid adjusting a component of an array aggregate if...
gcc/ada/
2017-10-20 Bob Duff <duff@adacore.com>
* exp_aggr.adb (Initialize_Array_Component): Avoid adjusting a
component of an array aggregate if it is initialized by a
build-in-place function call.
* exp_ch6.adb (Is_Build_In_Place_Result_Type): Use -gnatd.9 to disable
bip for nonlimited types.
* debug.adb: Document -gnatd.9.
2017-10-20 Bob Duff <duff@adacore.com>
* sem_ch12.adb: Remove redundant setting of Parent.
2017-10-20 Eric Botcazou <ebotcazou@adacore.com>
* sem_ch4.adb (Find_Concatenation_Types): Filter out operators if one
of the operands is a string literal.
2017-10-20 Bob Duff <duff@adacore.com>
* einfo.ads: Comment fix.
2017-10-20 Clement Fumex <fumex@adacore.com>
* switch-c.adb: Remove -gnatwm from the switches triggered by -gnateC.
2017-10-20 Ed Schonberg <schonberg@adacore.com>
* sem_dim.adb (Extract_Power): Accept dimension values that are not
non-negative integers when the dimensioned base type is an Integer
type.
gcc/testsuite/
2017-10-20 Ed Schonberg <schonberg@adacore.com>
* gnat.dg/dimensions.adb, gnat.dg/dimensions.ads: New testcase.
From-SVN: r253941
Bob Duff [Fri, 20 Oct 2017 14:51:32 +0000 (14:51 +0000)]
sinfo.ads, sinfo.adb (Alloc_For_BIP_Return): New flag to indicate that an allocator came from a b-i-p return statement.
2017-10-20 Bob Duff <duff@adacore.com>
* sinfo.ads, sinfo.adb (Alloc_For_BIP_Return): New flag to indicate
that an allocator came from a b-i-p return statement.
* exp_ch4.adb (Expand_Allocator_Expression): Avoid adjusting the return
object of a nonlimited build-in-place function call.
* exp_ch6.adb (Expand_N_Extended_Return_Statement): Set the
Alloc_For_BIP_Return flag on generated allocators.
* sem_ch5.adb (Analyze_Assignment): Move Assert to where it can't fail.
If the N_Assignment_Statement has been transformed into something else,
then Should_Transform_BIP_Assignment won't work.
* exp_ch3.adb (Expand_N_Object_Declaration): A previous revision said,
"Remove Adjust if we're building the return object of an extended
return statement in place." Back out that part of the change, because
the Alloc_For_BIP_Return flag is now used for that.
From-SVN: r253940
Jakub Jelinek [Fri, 20 Oct 2017 14:31:03 +0000 (16:31 +0200)]
i386.md (isa): Remove fma_avx512f.
* config/i386/i386.md (isa): Remove fma_avx512f.
* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
<avx512>_fmadd_<mode>_mask3<round_name>,
<avx512>_fmsub_<mode>_mask<round_name>,
<avx512>_fmsub_<mode>_mask3<round_name>,
<avx512>_fnmadd_<mode>_mask<round_name>,
<avx512>_fnmadd_<mode>_mask3<round_name>,
<avx512>_fnmsub_<mode>_mask<round_name>,
<avx512>_fnmsub_<mode>_mask3<round_name>,
<avx512>_fmaddsub_<mode>_mask<round_name>,
<avx512>_fmaddsub_<mode>_mask3<round_name>,
<avx512>_fmsubadd_<mode>_mask<round_name>,
<avx512>_fmsubadd_<mode>_mask3<round_name>): Remove isa attribute.
(*vec_widen_umult_even_v16si<mask_name>,
*vec_widen_smult_even_v16si<mask_name>): Likewise.
(<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>): Likewise.
From-SVN: r253939
Igor Tsimbalist [Fri, 20 Oct 2017 14:03:07 +0000 (16:03 +0200)]
Add documentation for fcf-protection option and nocf_check attribute
gcc/doc/
* extend.texi: Add 'nocf_check' documentation.
* gimple.texi: Add second parameter to gimple_build_call_from_tree.
* invoke.texi: Add -fcf-protection documentation.
* rtl.texi: Add REG_CALL_NOTRACK documenation.
From-SVN: r253938
Richard Biener [Fri, 20 Oct 2017 13:43:47 +0000 (13:43 +0000)]
re PR tree-optimization/82473 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1524)
2017-10-20 Richard Biener <rguenther@suse.de>
PR tree-optimization/82473
* tree-vect-loop.c (vectorizable_reduction): Properly get at
the largest input type.
* gcc.dg/torture/pr82473.c: New testcase.
From-SVN: r253937
Igor Tsimbalist [Fri, 20 Oct 2017 13:09:38 +0000 (15:09 +0200)]
Add generic part for Intel CET enabling. The spec is available at
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
A proposal is to introduce a target independent flag
-fcf-protection=[none|branch|return|full] with a semantic to
instrument a code to control validness or integrity of control-flow
transfers using jump and call instructions. The main goal is to detect
and block a possible malware execution through transfer the execution
to unknown target address. Implementation could be either software or
target based. Any target platforms can provide their implementation
for instrumentation under this option.
The compiler should instrument any control-flow transfer points in a
program (ex. call/jmp/ret) as well as any landing pads, which are
targets of control-flow transfers.
A new 'nocf_check' attribute is introduced to provide hand tuning
support. The attribute directs the compiler to skip a call to a
function and a function's landing pad from instrumentation. The
attribute can be used for function and pointer to function types,
otherwise it will be ignored.
Currently all platforms except i386 will report the error and do no
instrumentation. i386 will provide the implementation based on a
specification published by Intel for a new technology called
Control-flow Enforcement Technology (CET).
gcc/c-family/
* c-attribs.c (handle_nocf_check_attribute): New function.
(c_common_attribute_table): Add 'nocf_check' handling.
gcc/c/
* gimple-parser.c: Add second argument NULL to
gimple_build_call_from_tree.
gcc/
* attrib.c (comp_type_attributes): Check nocf_check attribute.
* cfgexpand.c (expand_call_stmt): Set REG_CALL_NOCF_CHECK for
call insn.
* combine.c (distribute_notes): Add REG_CALL_NOCF_CHECK handling.
* common.opt: Add fcf-protection flag.
* emit-rtl.c (try_split): Add REG_CALL_NOCF_CHECK handling.
* flag-types.h: Add enum cf_protection_level.
* gimple.c (gimple_build_call_from_tree): Add second parameter.
Add 'nocf_check' attribute propagation to gimple call.
* gimple.h (gf_mask): Add GF_CALL_NOCF_CHECK.
(gimple_build_call_from_tree): Update prototype.
(gimple_call_nocf_check_p): New function.
(gimple_call_set_nocf_check): Likewise.
* gimplify.c: Add second argument to gimple_build_call_from_tree.
* ipa-icf.c: Add nocf_check attribute in statement hash.
* recog.c (peep2_attempt): Add REG_CALL_NOCF_CHECK handling.
* reg-notes.def: Add REG_NOTE (CALL_NOCF_CHECK).
* toplev.c (process_options): Add flag_cf_protection handling.
From-SVN: r253936
Richard Earnshaw [Fri, 20 Oct 2017 12:33:39 +0000 (12:33 +0000)]
[arm] Fix architecture selection when building libatomic with automatic FPU selection
Libatomic builds a few functions for Arm with an explicit -march
option. This option does not specify an FPU, which can lead to
problems when targeting a hard-float or softfp environment since the
architecture appears to be incompatible with the selected ABI.
The fix is simple enough, just add +fp (the minimum floating point
option) to the architecture. We don't use anything from the FP
architecture, so it shouldn't really change anything; and if we are
building for -mfloat-abi=soft the canonicalization process will remove
the unnecessary fp attributes anyway.
* Makefile.am: (IFUNC_OPTIONS): Set the architecture to
-march=armv7-a+fp on Linux/Arm.
* Makefile.in: Regenerated.
From-SVN: r253935
Jan Hubicka [Fri, 20 Oct 2017 12:25:18 +0000 (14:25 +0200)]
* x86-tune-costs.h (core_cost): Fix div, move and sqrt latencies.
From-SVN: r253934
Richard Biener [Fri, 20 Oct 2017 11:21:11 +0000 (11:21 +0000)]
re PR tree-optimization/82603 (ICE in ifcvt_local_dce w/ -O2 -ftree-loop-vectorize)
2017-10-20 Richard Biener <rguenther@suse.de>
PR tree-optimization/82603
* tree-if-conv.c (predicate_mem_writes): Make sure to only
remove false predicated stores.
* gcc.dg/torture/pr82603.c: New testcase.
From-SVN: r253933
Richard Biener [Fri, 20 Oct 2017 10:49:24 +0000 (10:49 +0000)]
2017-10-20 Richard Biener <rguenther@suse.de>
* graphite-isl-ast-to-gimple.c
(translate_isl_ast_to_gimple::graphite_copy_stmts_from_block):
Remove return value and simplify, dump copied stmt after lhs
adjustment.
(translate_isl_ast_to_gimple::translate_isl_ast_node_user):
Reduce dump verbosity.
(gsi_insert_earliest): Likewise.
(translate_isl_ast_to_gimple::copy_bb_and_scalar_dependences): Adjust.
* graphite.c (print_global_statistics): Adjust dumping.
(print_graphite_scop_statistics): Likewise.
(print_graphite_statistics): Do not dump loops here.
(graphite_transform_loops): But here.
From-SVN: r253930
Tom de Vries [Fri, 20 Oct 2017 10:02:49 +0000 (10:02 +0000)]
Reduce stack size in gcc.dg/tree-ssa/ldist-27.c
2017-10-20 Tom de Vries <tom@codesourcery.com>
* gcc.dg/tree-ssa/ldist-27.c: Remove dg-require-stack-size.
(main): Move s ...
(s): ... here.
From-SVN: r253929
Nicolas Roche [Fri, 20 Oct 2017 09:29:35 +0000 (09:29 +0000)]
configure.ac (ACX_PROG_GNAT): Append "libgnat" to the include dir.
* configure.ac (ACX_PROG_GNAT): Append "libgnat" to the include dir.
* configure: Regenerate.
From-SVN: r253928
Jakub Jelinek [Fri, 20 Oct 2017 07:35:48 +0000 (09:35 +0200)]
re PR target/82158 (_Noreturn functions that do return clobber caller's registers on ARM32 (but not other arches))
PR target/82158
* tree-cfg.c (pass_warn_function_return::execute): In noreturn
functions when optimizing replace GIMPLE_RETURN stmts with
calls to __builtin_unreachable ().
* gcc.dg/tree-ssa/noreturn-1.c: New test.
From-SVN: r253926
Jakub Jelinek [Fri, 20 Oct 2017 07:32:35 +0000 (09:32 +0200)]
re PR sanitizer/82595 (bootstrap fails in libsanitizer on powerpc64-unknown-linux-gnu)
PR sanitizer/82595
* config/gnu-user.h (LIBTSAN_EARLY_SPEC): Add libtsan_preinit.o
for -fsanitize=thread link of executables.
(LIBLSAN_EARLY_SPEC): Add liblsan_preinit.o for -fsanitize=leak
link of executables.
* lsan/lsan.h (__lsan_init): Add SANITIZER_INTERFACE_ATTRIBUTE.
* lsan/Makefile.am (nodist_toolexeclib_HEADERS): Add
liblsan_preinit.o.
(lsan_files): Remove lsan_preinit.cc.
(liblsan_preinit.o): New rule.
* lsan/Makefile.in: Regenerated.
From-SVN: r253925
Jakub Jelinek [Fri, 20 Oct 2017 07:30:33 +0000 (09:30 +0200)]
re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
PR target/82370
* config/i386/sse.md (VI248_AVX2, VI248_AVX512BW, VI248_AVX512BW_2):
New mode iterators.
(<shift_insn><mode>3<mask_name>): Change the last of the 3
define_insns for logical vector shifts to use VI248_AVX512BW
iterator instead of VI48_AVX512, remove <mask_mode512bit_condition>
condition, useless isa and prefix attributes. Change the first
2 of these define_insns to ...
(<mask_codefor><shift_insn><mode>3<mask_name>): ... this, new
define_insn for avx512vl.
(<shift_insn><mode>3): ... and this, new define_insn without
masking for non-avx512vl.
* gcc.target/i386/avx-pr82370.c: New test.
* gcc.target/i386/avx2-pr82370.c: New test.
* gcc.target/i386/avx512f-pr82370.c: New test.
* gcc.target/i386/avx512bw-pr82370.c: New test.
* gcc.target/i386/avx512vl-pr82370.c: New test.
* gcc.target/i386/avx512vlbw-pr82370.c: New test.
From-SVN: r253924
Jakub Jelinek [Fri, 20 Oct 2017 07:28:25 +0000 (09:28 +0200)]
re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
PR target/82370
* config/i386/sse.md (*andnot<mode>3,
<mask_codefor><code><mode>3<mask_name>, *<code><mode>3): Split
(=v,v,vm) alternative into (=x,x,xm) and (=v,v,vm), for 128-bit
and 256-bit vectors, the (=x,x,xm) alternative and when mask is
not applied use empty suffix even for TARGET_AVX512VL.
* config/i386/subst.md (mask_prefix3, mask_prefix4): When mask
is applied, supply evex,evex or evex,evex,evex instead of just
evex.
From-SVN: r253923
Julia Koval [Fri, 20 Oct 2017 06:31:33 +0000 (08:31 +0200)]
Add GFNI command line options and macros
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET,
(OPTION_MASK_ISA_GFNI_UNSET): New.
(ix86_handle_option): Handle OPT_mgfni.
* config/i386/cpuid.h (bit_GFNI): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect gfni.
* config/i386/i386-c.c (ix86_target_macros_internal): Define __GFNI__.
* config/i386/i386.c (ix86_target_string): Add -mgfni.
(ix86_valid_target_attribute_inner_p): Add OPT_mgfni.
* config/i386/i386.h (TARGET_GFNI, TARGET_GFNI_P): New.
* config/i386/i386.opt: Add mgfni.
From-SVN: r253922
Orlando Arias [Fri, 20 Oct 2017 04:49:57 +0000 (04:49 +0000)]
msp430.c (msp430_option_override): Disable -fdelete-null-pointer-checks.
* config/msp430/msp430.c (msp430_option_override): Disable
-fdelete-null-pointer-checks.
* doc/invoke.text (-fdelete-null-pointer-checks): Document that.
* lib/target-supports.exp (check_effective_target_keeps_null_pointer_checks):
Add msp430 to the list.
From-SVN: r253921
Paolo Carlini [Fri, 20 Oct 2017 00:30:41 +0000 (00:30 +0000)]
re PR c++/82308 ([C++17] deduction of template arguments results in internal compiler error)
2017-10-19 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/82308
* g++.dg/cpp1z/class-deduction45.C: New.
From-SVN: r253920