openpower-isa.git
2 years agoadd note about bug #884 new reg vector naming convention
Luke Kenneth Casson Leighton [Tue, 5 Jul 2022 17:19:29 +0000 (18:19 +0100)]
add note about bug #884 new reg vector naming convention

2 years agoadd regression test for completely borked value from mulhd
Luke Kenneth Casson Leighton [Tue, 5 Jul 2022 13:04:24 +0000 (14:04 +0100)]
add regression test for completely borked value from mulhd
https://bugs.libre-soc.org/show_bug.cgi?id=855

2 years agotake deepcopy of regs passed in to avoid accidental modification
Luke Kenneth Casson Leighton [Tue, 5 Jul 2022 13:02:29 +0000 (14:02 +0100)]
take deepcopy of regs passed in to avoid accidental modification

2 years agoadd setvl CTR tests, fix CTR mode
Luke Kenneth Casson Leighton [Sat, 2 Jul 2022 17:11:59 +0000 (18:11 +0100)]
add setvl CTR tests, fix CTR mode

2 years agofix setvl CTR mode
Luke Kenneth Casson Leighton [Sat, 2 Jul 2022 16:59:34 +0000 (17:59 +0100)]
fix setvl CTR mode

2 years agosetvl has new CTR mode, making room in encoding needed
Luke Kenneth Casson Leighton [Sat, 2 Jul 2022 16:37:47 +0000 (17:37 +0100)]
setvl has new CTR mode, making room in encoding needed
fixing unit tests

2 years agodo CSV isatables explicitly in sv_analysis.py
Luke Kenneth Casson Leighton [Thu, 30 Jun 2022 11:33:47 +0000 (12:33 +0100)]
do CSV isatables explicitly in sv_analysis.py
for pandoc to pick up

2 years agoexplicit output of opcode_regs_deduped in mdwn table format
Luke Kenneth Casson Leighton [Thu, 30 Jun 2022 11:04:27 +0000 (12:04 +0100)]
explicit output of opcode_regs_deduped in mdwn table format
so as to make it possible to convert to latex with pandoc

2 years agoadd recognition of "sv." to pysvp64asm
Luke Kenneth Casson Leighton [Tue, 28 Jun 2022 16:30:28 +0000 (17:30 +0100)]
add recognition of "sv." to pysvp64asm

2 years agoremove qemu co-simulation, dump output expected results
Luke Kenneth Casson Leighton [Tue, 28 Jun 2022 15:23:38 +0000 (16:23 +0100)]
remove qemu co-simulation, dump output expected results
test/basic_pypowersim

2 years agoadd predicate mask test svstep
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 22:33:06 +0000 (23:33 +0100)]
add predicate mask test svstep

2 years agowhoops svp64.py testing wrong variable on sv.svstep
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 22:13:27 +0000 (23:13 +0100)]
whoops svp64.py testing wrong variable on sv.svstep

2 years agoadd predicated srcstep
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 22:04:29 +0000 (23:04 +0100)]
add predicated srcstep

2 years agomake svstep output srcstep/dststep, basically viota
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 21:56:01 +0000 (22:56 +0100)]
make svstep output srcstep/dststep, basically viota

2 years agorename SVRM *field* to SVrm to avoid a name-clash with
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 17:23:35 +0000 (18:23 +0100)]
rename SVRM *field* to SVrm to avoid a name-clash with
SVRM-*Form*

2 years agosvp64.py: decrement SVd operand
Dmitry Selyutin [Sun, 26 Jun 2022 17:10:19 +0000 (20:10 +0300)]
svp64.py: decrement SVd operand

2 years agosvp64.py: fix ignored field range
Dmitry Selyutin [Sun, 26 Jun 2022 16:06:12 +0000 (19:06 +0300)]
svp64.py: fix ignored field range

2 years agosvp64.py: drop commented code
Dmitry Selyutin [Sun, 26 Jun 2022 15:59:20 +0000 (18:59 +0300)]
svp64.py: drop commented code

2 years agosvp64.py: fix fsins/fcoss X-FORM
Dmitry Selyutin [Sun, 26 Jun 2022 15:42:23 +0000 (18:42 +0300)]
svp64.py: fix fsins/fcoss X-FORM

2 years agoagain fix number of arguments to svremap,
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 09:27:04 +0000 (10:27 +0100)]
again fix number of arguments to svremap,
test_caller_svp64_ldst.py

2 years agowhitespace
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 09:23:49 +0000 (10:23 +0100)]
whitespace

2 years agotest_caller_svstate.py: end-of-loop condition sets CR.SO not CR.EQ
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:59:39 +0000 (09:59 +0100)]
test_caller_svstate.py: end-of-loop condition sets CR.SO not CR.EQ

2 years agosvp64_matrix.py svremap reduce to 7 args from 8 (again)
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:46:32 +0000 (09:46 +0100)]
svp64_matrix.py svremap reduce to 7 args from 8 (again)

2 years agosvremap only takes 7 args not 8, same as in svp64_fft.py
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:35:17 +0000 (09:35 +0100)]
svremap only takes 7 args not 8, same as in svp64_fft.py
fix in svp64_dct.py

2 years agoone too many arguments to svremap in svp64_fft.py test
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:24:46 +0000 (09:24 +0100)]
one too many arguments to svremap in svp64_fft.py test

2 years agowhoops hack-use of DOUBLE2SINGLE in test_caller_transcendentals.py
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:20:41 +0000 (09:20 +0100)]
whoops hack-use of DOUBLE2SINGLE in test_caller_transcendentals.py

2 years agosvp64.py: sync SVRM-Form used for svshape
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:15:12 +0000 (09:15 +0100)]
svp64.py: sync SVRM-Form used for svshape

2 years agosvp64.py: fix svshape and setvl plus couple of oddities
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 08:01:40 +0000 (09:01 +0100)]
svp64.py: fix svshape and setvl plus couple of oddities

* svstep RT,SVi,vf
but the Form is 8 fields
* setvl RT,RA,SVi,vf,vs,ms
the order of those is *different* from the "natural" order in the
SVL-Form

2 years agosvp64.py: add -FORM headers to more functions
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 07:39:23 +0000 (08:39 +0100)]
svp64.py: add -FORM headers to more functions

2 years agosvp64.py: fix bmask entry
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 07:33:42 +0000 (08:33 +0100)]
svp64.py: fix bmask entry

2 years agosvp64.py: group 32-bit instructions into the table
Dmitry Selyutin [Sat, 25 Jun 2022 20:51:29 +0000 (23:51 +0300)]
svp64.py: group 32-bit instructions into the table

The pysvp64asm code became really dirty with the addition of new
instructions, it's almost impossible to keep track of it. Some
instructions were not converted at all, due to incorrect check (all but
setvl/svshape). Some had wrong operand names (fsins, fcoss used RT, RA
operands, and this does not follow the spec). Some instructions had no
SV support, despite the fact they should (fsins).

This all became barely maintainable. From now on, instructions are
grouped into a special table. Ideally we should generate this table
from fields.txt, but there's no time for writing yet another parser.

2 years agosvp64.py: align indentation
Dmitry Selyutin [Sat, 25 Jun 2022 15:57:53 +0000 (18:57 +0300)]
svp64.py: align indentation

2 years agoadd test case for kaivb to jump to 0x2700
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 11:56:59 +0000 (12:56 +0100)]
add test case for kaivb to jump to 0x2700

2 years agoadd TrapTestCase for KAIVB
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 11:39:31 +0000 (12:39 +0100)]
add TrapTestCase for KAIVB
https://bugs.libre-soc.org/show_bug.cgi?id=859

2 years agohmm do expected state in rfid trap case
Luke Kenneth Casson Leighton [Sun, 26 Jun 2022 11:15:14 +0000 (12:15 +0100)]
hmm do expected state in rfid trap case

2 years agocorrect input example for SOF case_3_bmask
Luke Kenneth Casson Leighton [Sat, 25 Jun 2022 20:08:32 +0000 (21:08 +0100)]
correct input example for SOF case_3_bmask

2 years agoAdded sif/sof
Andrey Miroshnikov [Sat, 25 Jun 2022 19:37:02 +0000 (19:37 +0000)]
Added sif/sof

2 years agocorrections to test cases, it is not quite
Luke Kenneth Casson Leighton [Sat, 25 Jun 2022 19:25:43 +0000 (20:25 +0100)]
corrections to test cases, it is not quite
as "obvious" as it looks due to the masking

2 years agoupdate comments in av_cases.py test_1_bmask
Luke Kenneth Casson Leighton [Sat, 25 Jun 2022 19:07:13 +0000 (20:07 +0100)]
update comments in av_cases.py test_1_bmask

2 years agocorrect undefined in av.mdwn bmask
Luke Kenneth Casson Leighton [Sat, 25 Jun 2022 19:01:12 +0000 (20:01 +0100)]
correct undefined in av.mdwn bmask

2 years agoAdded second bmask test case, designed to be multi-test
Andrey Miroshnikov [Fri, 24 Jun 2022 22:14:38 +0000 (22:14 +0000)]
Added second bmask test case, designed to be multi-test

2 years agoadd svindex XO field 101001
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 21:20:47 +0000 (22:20 +0100)]
add svindex XO field 101001

2 years agorename mask to rmm in svindex
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 20:58:26 +0000 (21:58 +0100)]
rename mask to rmm in svindex

2 years agorename mask field to rmm to avoid using "mask" in binutils
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 20:57:35 +0000 (21:57 +0100)]
rename mask field to rmm to avoid using "mask" in binutils
https://libre-soc.org/irclog/%23libre-soc.2022-06-24.log.html#t2022-06-24T20:27:25

2 years agosvp64.py: support svindex instruction
Dmitry Selyutin [Fri, 24 Jun 2022 18:49:23 +0000 (21:49 +0300)]
svp64.py: support svindex instruction

2 years agoadd SVd to fields.txt (SVI-Form)
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 18:29:43 +0000 (19:29 +0100)]
add SVd to fields.txt (SVI-Form)
missed out description

2 years agoadd first bmask unit test
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 14:51:30 +0000 (15:51 +0100)]
add first bmask unit test

2 years agoinvert mode-bits in bmask bm field
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 14:51:02 +0000 (15:51 +0100)]
invert mode-bits in bmask bm field

2 years agobmask does not have Rc=1 variant
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 14:50:40 +0000 (15:50 +0100)]
bmask does not have Rc=1 variant

2 years agosigh, bm not mode argument to bmask
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 14:17:27 +0000 (15:17 +0100)]
sigh, bm not mode argument to bmask
plus the offsets (sub-fields) of bm were completely wrong

2 years agocorrect bmask conversion to binary (wrong instruction used
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 14:12:33 +0000 (15:12 +0100)]
correct bmask conversion to binary (wrong instruction used
as a beginning template)

2 years agoadd bmask to instruction list
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 14:11:42 +0000 (15:11 +0100)]
add bmask to instruction list

2 years agoadd to fields.txt for the svstep instruction
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 11:05:26 +0000 (12:05 +0100)]
add to fields.txt for the svstep instruction
which misses out some fields

2 years agoadd svindex SVI-Form to fields.txt
Luke Kenneth Casson Leighton [Fri, 24 Jun 2022 10:54:25 +0000 (11:54 +0100)]
add svindex SVI-Form to fields.txt

2 years agoadd missed generated csv changes
Jacob Lifshay [Fri, 24 Jun 2022 05:01:36 +0000 (22:01 -0700)]
add missed generated csv changes

2 years agoadd BM2-Form to power_enums.py
Luke Kenneth Casson Leighton [Thu, 23 Jun 2022 16:13:47 +0000 (17:13 +0100)]
add BM2-Form to power_enums.py

2 years agoelse must be on separate line in pseudocode av.mdwn
Luke Kenneth Casson Leighton [Thu, 23 Jun 2022 16:11:59 +0000 (17:11 +0100)]
else must be on separate line in pseudocode av.mdwn

2 years agomissing "Special Registers Altered" on av.mdwn
Luke Kenneth Casson Leighton [Thu, 23 Jun 2022 16:10:10 +0000 (17:10 +0100)]
missing "Special Registers Altered" on av.mdwn

2 years agoAdded bmask, pywriter failing
Andrey Miroshnikov [Thu, 23 Jun 2022 14:55:01 +0000 (14:55 +0000)]
Added bmask, pywriter failing

2 years agoadd SPDX-License-Headers to CSV files
Luke Kenneth Casson Leighton [Thu, 23 Jun 2022 09:53:40 +0000 (10:53 +0100)]
add SPDX-License-Headers to CSV files
(now that comments are possible)
mention provenance from microwatt decode1.vhdl

2 years agoadd explanatory comments on minor_22.csv
Luke Kenneth Casson Leighton [Thu, 23 Jun 2022 09:45:00 +0000 (10:45 +0100)]
add explanatory comments on minor_22.csv

2 years agoadd comment-stripping to get_csv()
Luke Kenneth Casson Leighton [Thu, 23 Jun 2022 09:39:21 +0000 (10:39 +0100)]
add comment-stripping to get_csv()
there have been a lot of situations where comments are needed
including review of new instructions

2 years agoadd BM2 Form for (DRAFT) bmask instruction
Luke Kenneth Casson Leighton [Wed, 22 Jun 2022 14:53:33 +0000 (15:53 +0100)]
add BM2 Form for (DRAFT) bmask instruction

2 years agoAdded pc based on len(lst)
Andrey Miroshnikov [Wed, 22 Jun 2022 16:37:01 +0000 (16:37 +0000)]
Added pc based on len(lst)

2 years agoadd another cprop test, experimenting
Luke Kenneth Casson Leighton [Wed, 22 Jun 2022 14:45:46 +0000 (15:45 +0100)]
add another cprop test, experimenting

2 years agoadd 2nd cprop test to see what happens
Luke Kenneth Casson Leighton [Wed, 22 Jun 2022 14:44:06 +0000 (15:44 +0100)]
add 2nd cprop test to see what happens

2 years agoexpected number of instructions is 1 (therefore PC after running is 4 not 8)
Luke Kenneth Casson Leighton [Wed, 22 Jun 2022 14:41:43 +0000 (15:41 +0100)]
expected number of instructions is 1 (therefore PC after running is 4 not 8)

2 years agoAdded cprop test case, fails atm (not enabled by default)
Andrey Miroshnikov [Wed, 22 Jun 2022 14:38:10 +0000 (15:38 +0100)]
Added cprop test case, fails atm (not enabled by default)

2 years agoModified cprop pseudo-code due to parser bug
Andrey Miroshnikov [Wed, 22 Jun 2022 14:05:48 +0000 (15:05 +0100)]
Modified cprop pseudo-code due to parser bug

2 years agoargh horrible hack that does not work yet for fixing precedence
Luke Kenneth Casson Leighton [Wed, 22 Jun 2022 14:04:04 +0000 (15:04 +0100)]
argh horrible hack that does not work yet for fixing precedence

2 years agoadd X-Form to svp64.py av opcode set
Luke Kenneth Casson Leighton [Wed, 22 Jun 2022 13:26:55 +0000 (14:26 +0100)]
add X-Form to svp64.py av opcode set
(to be able to understand what the heck is going on)

2 years agoAdded cprop to caller, enums, svp64
Andrey Miroshnikov [Wed, 22 Jun 2022 13:07:06 +0000 (14:07 +0100)]
Added cprop to caller, enums, svp64

2 years agoAdded CPROP to powerenums
Andrey Miroshnikov [Wed, 22 Jun 2022 12:44:35 +0000 (13:44 +0100)]
Added CPROP to powerenums

2 years agoAdded entries for cprop, not sure if correct
Andrey Miroshnikov [Wed, 22 Jun 2022 12:06:52 +0000 (13:06 +0100)]
Added entries for cprop, not sure if correct

2 years agoadd absolute-signed-diff next to absolute-unsigned-diff
Luke Kenneth Casson Leighton [Mon, 20 Jun 2022 17:42:26 +0000 (18:42 +0100)]
add absolute-signed-diff next to absolute-unsigned-diff

2 years agorename absadd[us] to absdac[ud]
Luke Kenneth Casson Leighton [Mon, 20 Jun 2022 13:47:14 +0000 (14:47 +0100)]
rename absadd[us] to absdac[ud]
matches descriptions
# DRAFT Absolute Accumulate Signed Difference

2 years agofix minu[.] to be unsigned
Jacob Lifshay [Sun, 19 Jun 2022 21:47:48 +0000 (14:47 -0700)]
fix minu[.] to be unsigned

2 years agoupdate after adding av instructions
Jacob Lifshay [Sun, 19 Jun 2022 21:42:10 +0000 (14:42 -0700)]
update after adding av instructions

2 years agoadd absadds - signed accumulating add. DRAFT
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 19:40:12 +0000 (20:40 +0100)]
add absadds - signed accumulating add. DRAFT
https://bugs.libre-soc.org/show_bug.cgi?id=863

2 years agoadd absadd (unsigned) DRAFT
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 19:34:30 +0000 (20:34 +0100)]
add absadd (unsigned) DRAFT
https://bugs.libre-soc.org/show_bug.cgi?id=863

2 years agoadd absolute-difference DRAFT
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 19:05:54 +0000 (20:05 +0100)]
add absolute-difference DRAFT
https://bugs.libre-soc.org/show_bug.cgi?id=863

2 years agoadd average-add DRAFT pseudocode and CSV
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 18:37:47 +0000 (19:37 +0100)]
add average-add DRAFT pseudocode and CSV
https://bugs.libre-soc.org/show_bug.cgi?id=863

2 years agoadd the rest of min/max DRAFT av opcodes
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 18:14:58 +0000 (19:14 +0100)]
add the rest of min/max DRAFT av opcodes
https://bugs.libre-soc.org/show_bug.cgi?id=863

2 years agoadd maxs DRAFT instruction
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 16:10:21 +0000 (17:10 +0100)]
add maxs DRAFT instruction
https://libre-soc.org/openpower/sv/av_opcodes/

2 years agoextend minor_22.csv bitsel pattern to cover bits 21..31
Luke Kenneth Casson Leighton [Sun, 19 Jun 2022 15:08:03 +0000 (16:08 +0100)]
extend minor_22.csv bitsel pattern to cover bits 21..31

2 years agosv_binutils: drop SVP64_NAME_MAX
Dmitry Selyutin [Fri, 17 Jun 2022 13:51:18 +0000 (13:51 +0000)]
sv_binutils: drop SVP64_NAME_MAX

2 years agosv_binutils: minor naming conventions fixup
Dmitry Selyutin [Fri, 17 Jun 2022 13:50:00 +0000 (13:50 +0000)]
sv_binutils: minor naming conventions fixup

2 years agosv_binutils: rename Entry to Record
Dmitry Selyutin [Fri, 17 Jun 2022 13:47:38 +0000 (13:47 +0000)]
sv_binutils: rename Entry to Record

2 years agosv_binutils: rename Record to Desc
Dmitry Selyutin [Fri, 17 Jun 2022 13:41:32 +0000 (13:41 +0000)]
sv_binutils: rename Record to Desc

2 years agowhoops on an OR rather than an AND
Luke Kenneth Casson Leighton [Fri, 17 Jun 2022 13:20:44 +0000 (14:20 +0100)]
whoops on an OR rather than an AND

2 years agoadd "redirection" of MTSPR/MFSPR into TRAP pipeline for KAIVB
Luke Kenneth Casson Leighton [Fri, 17 Jun 2022 13:14:28 +0000 (14:14 +0100)]
add "redirection" of MTSPR/MFSPR into TRAP pipeline for KAIVB
in PowerDecoderSubset
https://bugs.libre-soc.org/show_bug.cgi?id=859
this reduces a lot of messing about by actually storing KAIVB
directly in the TRAP pipeline which is the only place it is used

2 years agoadd KAIVB SPR 850
Luke Kenneth Casson Leighton [Fri, 17 Jun 2022 12:54:52 +0000 (13:54 +0100)]
add KAIVB SPR 850
https://bugs.libre-soc.org/show_bug.cgi?id=859

2 years agoupdate version to 0.0 to stop unnecessary pip3 installs
Luke Kenneth Casson Leighton [Tue, 14 Jun 2022 14:13:43 +0000 (15:13 +0100)]
update version to 0.0 to stop unnecessary pip3 installs

2 years agoadd version constraints on setup install_requires
Luke Kenneth Casson Leighton [Tue, 14 Jun 2022 14:11:36 +0000 (15:11 +0100)]
add version constraints on setup install_requires

2 years agomedia/Makefile: switch to explicit LE toolchain
Dmitry Selyutin [Wed, 8 Jun 2022 17:53:49 +0000 (17:53 +0000)]
media/Makefile: switch to explicit LE toolchain

2 years agosvp64.py: simplify core script translation
Dmitry Selyutin [Wed, 8 Jun 2022 12:31:46 +0000 (12:31 +0000)]
svp64.py: simplify core script translation

2 years agomp3_0: update assembly listing
Dmitry Selyutin [Wed, 8 Jun 2022 11:52:44 +0000 (11:52 +0000)]
mp3_0: update assembly listing

2 years agosvp64.py: fix stdin/stdout modus operandi
Dmitry Selyutin [Mon, 6 Jun 2022 19:30:42 +0000 (19:30 +0000)]
svp64.py: fix stdin/stdout modus operandi

2 years agosvp64.py: switch print statements to logger
Dmitry Selyutin [Mon, 6 Jun 2022 18:27:50 +0000 (18:27 +0000)]
svp64.py: switch print statements to logger

2 years agosv_binutils: consider RA0 operand
Dmitry Selyutin [Wed, 1 Jun 2022 19:56:13 +0000 (19:56 +0000)]
sv_binutils: consider RA0 operand