Steve Reinhardt [Mon, 17 Mar 2008 07:08:28 +0000 (03:08 -0400)]
Fix a few Packet memory leaks.
--HG--
extra : convert_revision :
00db19f0698c0786f0dff561eea9217860a5a05a
Steve Reinhardt [Mon, 17 Mar 2008 07:07:38 +0000 (03:07 -0400)]
Restructure bus timing calcs to cope with pkt being deleted by target.
--HG--
extra : convert_revision :
db8497e73a44f2a06aab121e797e88b4c0c31330
Steve Reinhardt [Sat, 15 Mar 2008 12:03:55 +0000 (05:03 -0700)]
Fix subtle cache bug where read could return stale data
if a prior write miss arrived while an even earlier
read miss was still outstanding.
--HG--
extra : convert_revision :
4924e145829b2ecf4610b88d33f4773510c6801a
Ali Saidi [Sun, 16 Mar 2008 02:20:09 +0000 (22:20 -0400)]
Simpoints: Fix regression bug/Don't set process.simpoint, if simpoint doesn't exist
--HG--
extra : convert_revision :
c156c49668815755c4c788f807e8eba32151aa24
Gabe Black [Fri, 7 Mar 2008 02:09:15 +0000 (21:09 -0500)]
Merge
--HG--
extra : convert_revision :
ec5f41b2007ade15f6f4c4a1533e50f9cba2798e
Gabe Black [Fri, 7 Mar 2008 01:37:28 +0000 (20:37 -0500)]
X86: Refine the local APIC.
--HG--
extra : convert_revision :
2789c54ed555fed2f2a333fcc7dc6454f294ebf2
Vilas Sridharan [Thu, 6 Mar 2008 05:27:09 +0000 (00:27 -0500)]
O3CPU: Don't call dumpInsts if DEBUG is not defined
--HG--
extra : convert_revision :
3194bde4c624d118969bfbf92282539963a72245
Gabe Black [Sat, 1 Mar 2008 05:05:12 +0000 (00:05 -0500)]
X86: Don't map the local APIC into the physical address space in SE mode.
--HG--
extra : convert_revision :
b7103974b12130bbf43583c4cb5294b808add208
Ali Saidi [Fri, 29 Feb 2008 23:08:49 +0000 (18:08 -0500)]
Added tag m5_2.0_beta4 for changeset
cad8c2b5d2ec
--HG--
extra : convert_revision :
3012e3c0393b8fd2f83e3532172269a27c0bbb04
Ali Saidi [Fri, 29 Feb 2008 22:59:45 +0000 (17:59 -0500)]
Added tag m5_2.0_beta5 for changeset
fb826c79a385
--HG--
extra : convert_revision :
13e2a028aaf899e2f314e6053266168b274e20fd
Lisa Hsu [Fri, 29 Feb 2008 06:49:36 +0000 (01:49 -0500)]
Error out if -s is used without --caches (instead of saying you must specify a
CPU).
--HG--
extra : convert_revision :
a3b2bfbe7e037146ac08dd08834bf255da692506
Ali Saidi [Fri, 29 Feb 2008 06:23:18 +0000 (01:23 -0500)]
Configs: Make sure options don't conflict
--HG--
extra : convert_revision :
dc9b91cf1d8e33c5e68d7faeb45dbe3e7038d14c
Ali Saidi [Fri, 29 Feb 2008 01:39:01 +0000 (20:39 -0500)]
Configs: Fix some bugs we introduced in the simpoints code
--HG--
extra : convert_revision :
ef22c11cb3242903a484fc05dc0f96d3e5f9af72
Steve Reinhardt [Wed, 27 Feb 2008 23:18:56 +0000 (18:18 -0500)]
Automated merge with ssh://daystrom.m5sim.org//repo/m5
--HG--
extra : convert_revision :
f4bcd342e7abb86ca83840b723e6ab0b861ecf5b
Steve Reinhardt [Wed, 27 Feb 2008 23:17:37 +0000 (18:17 -0500)]
Update outputs for quick tests to reflect fixed cache stats.
Will update long tests later.
--HG--
extra : convert_revision :
79f66b5761a574f0c8049c1c771c353b42942993
Korey Sewell [Wed, 27 Feb 2008 22:50:29 +0000 (17:50 -0500)]
Add comments in code to describe bug conditions.
This should help if somebody gets to the bug
fix before me (or someone else)...
--HG--
extra : convert_revision :
0ae64c58ef4f7b02996f31e9e9e6bfad344719e2
Korey Sewell [Wed, 27 Feb 2008 21:53:08 +0000 (16:53 -0500)]
Fix Load/Store Queue squashing after a SMT thread is removed but ensuring
you are squashing from the current instruction # causing the thread exit.
--HG--
extra : convert_revision :
ccbeece7dd1d5fee43f30ab19370908972113473
Korey Sewell [Wed, 27 Feb 2008 21:48:33 +0000 (16:48 -0500)]
Fix offset in removeThread() function so that float registers start freeing up
from the right point (#32 usually) instead of restarting at 0 and double-freeing.
Commented out assert line in free_list.hh that will check for when double-free condition
goes bad.
--HG--
extra : convert_revision :
08d5f9b6a874736e487d101e85c22aaa67bf59ae
Steve Reinhardt [Wed, 27 Feb 2008 06:03:28 +0000 (22:03 -0800)]
Revamp cache timing access mshr check to make stats sane again.
--HG--
extra : convert_revision :
37009b8ee536807073b5a5ca07ed1d097a496aea
Rick Strong [Wed, 27 Feb 2008 05:35:09 +0000 (00:35 -0500)]
Configs: Make using Simpoints easier with some config files that support them easily
--HG--
extra : convert_revision :
0f21829306eb68b332f03da410e6c341c8595bdd
Gabe Black [Wed, 27 Feb 2008 04:39:53 +0000 (23:39 -0500)]
X86: Put in initial implementation of the local APIC.
--HG--
extra : convert_revision :
1708a93d96b819e64ed456c75dbb5325ac8114a8
Gabe Black [Wed, 27 Feb 2008 04:39:22 +0000 (23:39 -0500)]
X86: Implement the INVLPG instruction and the TIA microop.
--HG--
extra : convert_revision :
31db1ee082f6c3ca5443cba1eb335e408661ead2
Gabe Black [Wed, 27 Feb 2008 04:38:51 +0000 (23:38 -0500)]
TLB: Make a TLB base class and put a virtual demapPage function in it.
--HG--
extra : convert_revision :
cc0e62a5a337fd5bf332ad33bed61c0d505a936f
Gabe Black [Wed, 27 Feb 2008 04:38:01 +0000 (23:38 -0500)]
X86: Get PCI config space to work, and adjust address space prefix numbering scheme.
--HG--
extra : convert_revision :
2b382f478ee8cde3a35aa4c105196f200bc7afa6
Steve Reinhardt [Wed, 27 Feb 2008 04:17:26 +0000 (20:17 -0800)]
Cache: better comments particularly regarding writeback situation.
--HG--
extra : convert_revision :
59ff9ee63ee0fec5a7dfc27b485b737455ccf362
Ali Saidi [Tue, 26 Feb 2008 22:28:31 +0000 (17:28 -0500)]
Update make release, README, and RELEASE_NOTES for b5
--HG--
extra : convert_revision :
a4958e934f599bff24b251507da7c266c89430fc
Gabe Black [Tue, 26 Feb 2008 07:20:40 +0000 (02:20 -0500)]
Bus: Update the stats for the recent bus fix.
--HG--
extra : convert_revision :
dc29f7b5e6fa30a50305193cb0e5aed942f7e407
Gabe Black [Tue, 26 Feb 2008 07:20:08 +0000 (02:20 -0500)]
Bus: Fix the bus timing to be more realistic.
--HG--
extra : convert_revision :
acd70dc98ab840e55b114706fbb6afb2a95e54bc
Vilas Sridharan [Fri, 22 Feb 2008 22:48:10 +0000 (17:48 -0500)]
add instruction count fast forwaing and max instruction options
--HG--
extra : convert_revision :
8fe45e512229cdc3e0dcd23e3e5c54516c445d0f
Stephen Hines [Tue, 19 Feb 2008 21:42:32 +0000 (16:42 -0500)]
Added ARM_SE as a build option.
--HG--
extra : convert_revision :
905e3acfa58bd14f8101e29dadc0de71d23a79cc
Steve Reinhardt [Sat, 16 Feb 2008 19:58:37 +0000 (14:58 -0500)]
Update stats for new writeback behavior.
--HG--
extra : convert_revision :
3e932b5773f5fb9a119822d5bf497f61e9409c14
Steve Reinhardt [Sat, 16 Feb 2008 19:58:03 +0000 (14:58 -0500)]
Make L2+ caches allocate new block for writeback misses
instead of forwarding down the line.
--HG--
extra : convert_revision :
b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
Steve Reinhardt [Sat, 16 Feb 2008 18:53:12 +0000 (13:53 -0500)]
Update stats for some unknown minor x86 changes
(assuming someone just forgot to do this... tsk tsk).
--HG--
extra : convert_revision :
303d7bbf5e2c892d5f4498a9de2e2b82496ccd0e
Ali Saidi [Thu, 14 Feb 2008 21:14:35 +0000 (16:14 -0500)]
CPU: move the PC Events code to a place where the code won't be executed multiple times if an instruction faults.
--HG--
extra : convert_revision :
19c8e46a4eea206517be7ed4131ab9df0fe00e68
Ali Saidi [Thu, 14 Feb 2008 21:13:50 +0000 (16:13 -0500)]
Configs: Change Simulation.py to return a subclass of the CPU models rather than the original class. Without this changes elsewhere in the config script (e.g. the DriveSys frequency can change the TestSys frequency.
--HG--
extra : convert_revision :
f972207c616590a60a6e103daa5de469cf124b44
Ali Saidi [Mon, 11 Feb 2008 17:35:28 +0000 (12:35 -0500)]
Update copyright dates
--HG--
extra : convert_revision :
547e7ddff6b8005a9eaad60970bc51984e84fcd1
Steve Reinhardt [Mon, 11 Feb 2008 16:31:26 +0000 (08:31 -0800)]
Automated merge with file:/home/stever/hg/m5-orig
--HG--
extra : convert_revision :
86a55cd98a9704f756a70aa0cbd2820cf92c821d
Steve Reinhardt [Mon, 11 Feb 2008 16:04:01 +0000 (08:04 -0800)]
EXTRAS now points to src instead of needing 'src' subdir.
--HG--
extra : convert_revision :
8e7e4516ace8c7852eeea3c479bfd567839a8061
Steve Reinhardt [Mon, 11 Feb 2008 15:47:44 +0000 (07:47 -0800)]
Wait to set BUILD_DIR until *after* env is copied.
--HG--
extra : convert_revision :
03153e7aaa1fb2a435900eab08a98ec1a6ce62db
Nicolas Zea [Mon, 11 Feb 2008 00:41:03 +0000 (19:41 -0500)]
Bus: Only update port cache when there is an item to update it with.
--HG--
extra : convert_revision :
84848fd48bb9e6693a0518c862364142b1969aa8
Ali Saidi [Mon, 11 Feb 2008 00:32:12 +0000 (19:32 -0500)]
IGbE: Fix a couple of bugs.
--HG--
extra : convert_revision :
a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca
Steve Reinhardt [Sun, 10 Feb 2008 22:45:25 +0000 (14:45 -0800)]
Fix #include lines for renamed cache files.
--HG--
extra : convert_revision :
b5008115dc5b34958246608757e69a3fa43b85c5
Steve Reinhardt [Sun, 10 Feb 2008 22:15:42 +0000 (14:15 -0800)]
Rename cache files for brevity and consistency with rest of tree.
--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision :
ff7a35cc155a8d80317563c45cebe405984eac62
Stephen Hines [Wed, 6 Feb 2008 21:32:40 +0000 (16:32 -0500)]
Make the Event::description() a const function
--HG--
extra : convert_revision :
c7768d54d3f78685e93920069f5485083ca989c0
Stephen Hines [Wed, 6 Feb 2008 04:44:13 +0000 (23:44 -0500)]
Add base ARM code to M5
--HG--
extra : convert_revision :
d811bf87d1a0bfc712942ecd3db1b48fc75257af
Steve Reinhardt [Wed, 6 Feb 2008 01:43:45 +0000 (17:43 -0800)]
Cleaned up os.path imports a bit.
--HG--
extra : convert_revision :
ee75bf9abd249ab053e804739cc50972475cd5b6
Steve Reinhardt [Wed, 6 Feb 2008 01:40:08 +0000 (17:40 -0800)]
Make EXTRAS work for SConsopts too.
Requires pushing source files down into 'src' subdir relative
to directory listed in EXTRAS.
--HG--
extra : convert_revision :
ca04adc3e24c60bd3e7b63ca5770b31333d76729
Gabe Black [Wed, 23 Jan 2008 20:28:54 +0000 (15:28 -0500)]
X86: Put an SMBios/DMI table in memory.
This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.
--HG--
extra : convert_revision :
c1610c0dfa211b7e0d091a04133695d84f500a1c
Gabe Black [Wed, 23 Jan 2008 13:18:27 +0000 (08:18 -0500)]
X86: Optomize the bit scanning instruction microassembly a little. More can be done.
--HG--
extra : convert_revision :
3cf6e972f0e41e3529a633ecbb31289e1bd17f0f
Gabe Black [Tue, 22 Jan 2008 05:10:33 +0000 (00:10 -0500)]
X86: Implement and attach the BSR and BSF instructions.
--HG--
extra : convert_revision :
be7e11980092e5d1baff0e05d4ec910305966908
Gabe Black [Mon, 21 Jan 2008 21:27:40 +0000 (16:27 -0500)]
X86: Fill out group17 in the decoder.
--HG--
extra : convert_revision :
66ab9c0fc3086f66e3d6d82d47964ecf406c3a8a
Gabe Black [Mon, 21 Jan 2008 09:32:34 +0000 (04:32 -0500)]
X86: Use the existing boot_osflags instead of duplicating it.
--HG--
extra : convert_revision :
e04e438d7d261a61c52b946c23cd126ed648814a
Ali Saidi [Wed, 16 Jan 2008 16:11:55 +0000 (11:11 -0500)]
Update long o3 regressions for o3 change in previous changeset
--HG--
extra : convert_revision :
00242105076eb4466cce21038858f2b9d20b2fe2
Steve Reinhardt [Tue, 15 Jan 2008 18:13:08 +0000 (13:13 -0500)]
Update O3 ref outputs: very minor stats change due to previous cset.
(from Steve on behalf of m5test).
--HG--
extra : convert_revision :
696efdaa3dd7680dfc9c797a6a46a5053238c7d2
Ke Meng [Mon, 14 Jan 2008 16:47:32 +0000 (11:47 -0500)]
The reason is that the event is supposed to put the instructions ready to execute for next cycle. And the FUCompletion event has a lower priority than CPU tick event. It is called after the iew->tick() for current cycle has already been executed and the issueToExecuteQueue has already advanced this time. And assume the issueToExecuteLatency is 1, to catch up, the increasement should be made at access(-1) instead of access(0). Otherwise I found it could increase the actual op_latency of the instructions to execute by 1 cycle and potentially put the simulated CPU into a permanent idle state.
Signed-off by: Ali Saidi <saidi@eecs.umich.edu>
--HG--
extra : convert_revision :
dafc16814383e8e8f8320845edf6ab2bcfed1e1d
Gabe Black [Sat, 12 Jan 2008 11:41:32 +0000 (06:41 -0500)]
X86: Redo the bit test instructions.
--HG--
extra : convert_revision :
433c2a9f3675ed02f3be5ce759a440f2686d2ccd
Gabe Black [Sat, 12 Jan 2008 11:40:55 +0000 (06:40 -0500)]
X86: Fix the wrmsr instruction.
--HG--
extra : convert_revision :
12bc7e71226ebafb8eedadf6a3db82929e15e722
Gabe Black [Sat, 12 Jan 2008 11:40:10 +0000 (06:40 -0500)]
X86: Make the effective segment base shadow the regular one, not the selector.
--HG--
extra : convert_revision :
498c7c16d664c784b196885b1f35c3c6386c9cfc
Gabe Black [Sat, 12 Jan 2008 11:39:15 +0000 (06:39 -0500)]
X86: Make the IO ports work using extra physical address lines. Add a serial port.
--HG--
extra : convert_revision :
a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6
Gabe Black [Sat, 12 Jan 2008 11:37:35 +0000 (06:37 -0500)]
X86: Fix the general IO instructions dataSize.
--HG--
extra : convert_revision :
9774a52cb6a8e7632d1b1dc0706e5791cc18d238
Geoffrey Blake [Sun, 6 Jan 2008 05:19:45 +0000 (00:19 -0500)]
Temporary fix for ll/sc bug see flyspray task for more info:
http://www.m5sim.org/flyspray/task/197
Signed-off by: Ali Saidi <saidi@eecs.umich.edu>
--HG--
extra : convert_revision :
cdeece7e3163de9abf2c6c7435f1bc93570fab81
Steve Reinhardt [Wed, 2 Jan 2008 23:35:09 +0000 (15:35 -0800)]
Very minor memtest regression stats changes from recent coherence bug fixes.
--HG--
extra : convert_revision :
5e7f8ce91ea8f98e6503ac9e10aae68c62f9e510
Steve Reinhardt [Wed, 2 Jan 2008 23:22:38 +0000 (15:22 -0800)]
Add ReadRespWithInvalidate to handle multi-level coherence situation
where we defer a response to a read from a far-away cache A, then later
defer a ReadExcl from a cache B on the same bus as us. We'll assert
MemInhibit in both cases, but in the latter case MemInhibit will keep
the invalidation from reaching cache A. This special response tells
cache A that it gets the block to satisfy its read, but must immediately
invalidate it.
--HG--
extra : convert_revision :
f85c8b47bb30232da37ac861b50a6539dc81161b
Steve Reinhardt [Wed, 2 Jan 2008 23:18:33 +0000 (15:18 -0800)]
Mark cache-to-cache MSHRs as downstreamPending when necessary.
Don't mark upstream MSHR as pending if downstream MSHR is already in service.
--HG--
extra : convert_revision :
e1c135ff00217291db58ce8a06ccde34c403d37f
Steve Reinhardt [Wed, 2 Jan 2008 22:42:42 +0000 (14:42 -0800)]
Don't DPRINTF in the middle of a PrintReq.
--HG--
extra : convert_revision :
6358c014d14a19a34111c39827b05987507544bb
Steve Reinhardt [Wed, 2 Jan 2008 22:42:24 +0000 (14:42 -0800)]
Bug fix: functional cache port now needs otherPort set.
--HG--
extra : convert_revision :
fb007df73a77535a5dba19341f7b0b32e8c99548
Steve Reinhardt [Wed, 2 Jan 2008 21:46:22 +0000 (13:46 -0800)]
Additional comments and helper functions for PrintReq.
--HG--
extra : convert_revision :
7eadf9b7db8c0289480f771271b6efe2400006d4
Steve Reinhardt [Wed, 2 Jan 2008 20:20:15 +0000 (12:20 -0800)]
Add functional PrintReq command for memory-system debugging.
--HG--
extra : convert_revision :
73b753e57c355b7e6873f047ddc8cb371c3136b7
Steve Reinhardt [Wed, 2 Jan 2008 20:15:48 +0000 (12:15 -0800)]
Fix formatting and comments in cache_impl.hh
--HG--
extra : convert_revision :
26d71cca5420ad03e16bf174e15dabe7f902da41
Gabe Black [Tue, 1 Jan 2008 23:20:08 +0000 (18:20 -0500)]
SPARC: Fix a bug where the TLB would match against the wrong entries.
--HG--
extra : convert_revision :
631b3b6a1416121b54bd9717ca1cdccdd5b8a1eb
Ali Saidi [Tue, 18 Dec 2007 06:52:57 +0000 (01:52 -0500)]
Checkpointing: Fix a bug in the simulation script when restoring without standard switch and change some ifs to work with the default port since every port is now connected to something.
--HG--
extra : convert_revision :
72507cf13e58465291b0dce6322e853bee5a2b89
Ali Saidi [Sun, 16 Dec 2007 08:48:13 +0000 (03:48 -0500)]
CPU: Update where the simple cpus read their cpu id from the thread context to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.
--HG--
extra : convert_revision :
4f2801967a271b43817d88e147c2f80c4480b2c3
Steve Reinhardt [Tue, 11 Dec 2007 18:41:30 +0000 (10:41 -0800)]
Fix minor bug in util/style.py
--HG--
extra : convert_revision :
d37accc884c2967d87dd267debab5afeb8b6ed85
Gabe Black [Mon, 3 Dec 2007 22:33:33 +0000 (14:33 -0800)]
X86: Update the parser reference output which has mysteriously changed again?
--HG--
extra : convert_revision :
9b1439096509633d6e9b5bc0c661608f40a63c5f
Gabe Black [Mon, 3 Dec 2007 22:32:56 +0000 (14:32 -0800)]
X86: Please excuse my dear Aunt Sally. (precedence bug)
--HG--
extra : convert_revision :
9ad4f31e7a962c3177896bcbfb93e2e54720d117
Gabe Black [Sun, 2 Dec 2007 09:46:38 +0000 (01:46 -0800)]
X86: Make sure the memory index is calculated using the address size for bit test instructions.
--HG--
extra : convert_revision :
9634675857dae53b5e79e49267c864a0265afde1
Gabe Black [Sun, 2 Dec 2007 09:46:29 +0000 (01:46 -0800)]
X86: Fix a copy/paste mistake where the bit test instructions were using an immediate where they should use a register.
--HG--
extra : convert_revision :
b0ee80e4c7fdb58a1eb85b3bcc82a0cdaa93330a
Gabe Black [Sun, 2 Dec 2007 09:46:14 +0000 (01:46 -0800)]
X86: Make the page not present panic more descriptive.
--HG--
extra : convert_revision :
9360e47adb61e164ac218f2ea231eaa60bf3229d
Gabe Black [Sun, 2 Dec 2007 08:04:31 +0000 (00:04 -0800)]
X86: Start setting up the real mode data structure.
--HG--
extra : convert_revision :
ba6d4939d4d58da5586655c83f1617f47dc7e359
Gabe Black [Sun, 2 Dec 2007 08:02:51 +0000 (00:02 -0800)]
X86: Make the 0xA0-0xA3 versions of mov use the right sized immediates.
--HG--
extra : convert_revision :
a702403de29772618abb5bd5c5555279d91bdd59
Gabe Black [Sun, 2 Dec 2007 07:11:23 +0000 (23:11 -0800)]
X86: Add in a missing "break".
--HG--
extra : convert_revision :
2e48d8b0292bc3b78e4caa27dec20113d40e7d74
Gabe Black [Sun, 2 Dec 2007 07:10:42 +0000 (23:10 -0800)]
X86: Actually do something for the MiscRegFile clear function.
--HG--
extra : convert_revision :
36f8abaa9d09700d8ba9e09b4a10fa4dce580f36
Gabe Black [Sun, 2 Dec 2007 07:09:56 +0000 (23:09 -0800)]
X86: Move startup code to the system object to initialize a Linux system.
--HG--
extra : convert_revision :
a4796c79f41aa8b8f38bf2f628bee8f1b3af64be
Gabe Black [Sun, 2 Dec 2007 07:07:41 +0000 (23:07 -0800)]
X86: Add a missing microcode file to the sconscript.
--HG--
extra : convert_revision :
6da8a67e07bada169abf7f10aded8a90d4e63eae
Gabe Black [Sun, 2 Dec 2007 07:06:52 +0000 (23:06 -0800)]
X86: Fix a copy paste error in the bts microcode.
--HG--
extra : convert_revision :
c4ac007d35ac13211f9816f1104c84f2b447ddba
Gabe Black [Sun, 2 Dec 2007 07:06:03 +0000 (23:06 -0800)]
X86: Implement mov from control register.
--HG--
extra : convert_revision :
c8280f0686a3ae6d5c405327540ad15a3a5531f9
Gabe Black [Sun, 2 Dec 2007 07:05:01 +0000 (23:05 -0800)]
X86: First crack at far returns. This is grossly approximate.
--HG--
extra : convert_revision :
23da0338af1f7663ae5ddf2289fb45dd32f37c42
Gabe Black [Sun, 2 Dec 2007 07:03:39 +0000 (23:03 -0800)]
X86: Reorganize segmentation and implement segment selector movs.
--HG--
extra : convert_revision :
553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
Gabe Black [Sun, 2 Dec 2007 07:01:56 +0000 (23:01 -0800)]
X86: Make the "fault" microop predicated.
--HG--
extra : convert_revision :
ded34133afcd6af1f55b8991b82bad45258069d3
Gabe Black [Sun, 2 Dec 2007 07:01:31 +0000 (23:01 -0800)]
X86: Implement the LIDT instruction.
--HG--
extra : convert_revision :
380515e985318311632e00b13000585afb052e3b
Gabe Black [Sun, 2 Dec 2007 07:01:17 +0000 (23:01 -0800)]
X86: Implement the lgdt instruction.
--HG--
extra : convert_revision :
d1698a82df3c57cc9bbf8d5d190f271bfc7cb2e4
Gabe Black [Sun, 2 Dec 2007 07:00:58 +0000 (23:00 -0800)]
X86: Implement wrbase and wrlimit for loading pseudo descriptors.
--HG--
extra : convert_revision :
fe03c4aed95ef12773e80cdb3d9cff68a2b20f02
Gabe Black [Sun, 2 Dec 2007 07:00:15 +0000 (23:00 -0800)]
X86: Separate the effective seg base and the "hidden" seg base.
--HG--
extra : convert_revision :
5fcb8d94dbab7a7d6fe797277a5856903c885ad4
Gabe Black [Sat, 1 Dec 2007 00:49:27 +0000 (16:49 -0800)]
SPARC: Fixes for invalidateAll and demapAll in the SPARC TLBs.
--HG--
extra : convert_revision :
8de6c60b0e3e725eac11047a9d9888097dd359ff
Gabe Black [Fri, 30 Nov 2007 04:20:18 +0000 (20:20 -0800)]
SPARC: Fix 32 bit register window flushing endian conversion.
--HG--
extra : convert_revision :
be91d6fecb44a85e983343704a098b456948af8a
Gabe Black [Thu, 29 Nov 2007 08:00:26 +0000 (00:00 -0800)]
SPARC: Fix the initial stack to match what the Linux kernel does.
--HG--
extra : convert_revision :
a4451710d8463e52227fd8f760ab737ea8f404b5
Gabe Black [Thu, 29 Nov 2007 08:00:02 +0000 (00:00 -0800)]
SPARC: Combine the 64 and 32 bit process initialization code.
Alignment is done as it was for 32 bit processes.
--HG--
extra : convert_revision :
9368ad40dcc7911f8fc7ec1468c6a28aa92d196f
Ali Saidi [Thu, 29 Nov 2007 05:23:14 +0000 (00:23 -0500)]
merge, no manual changes
--HG--
extra : convert_revision :
6d6b744bbdfb09e7c3092368870a4f372241f9e8
Rick Strong [Thu, 29 Nov 2007 05:22:46 +0000 (00:22 -0500)]
Serialization: Fix serialization of file descriptors. Make sure open
file descriptors are reopened and the file pointer is in the same
place as when the checkpoint occured.
Signed-off by: Ali Saidi
--HG--
extra : convert_revision :
d9d2cd388c9c02f60e1269d6845891c35f94fc47
Gabe Black [Wed, 28 Nov 2007 22:39:19 +0000 (14:39 -0800)]
Make ports that aren't connected to anything fail more gracefully.
--HG--
extra : convert_revision :
3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc