mesa: release references to image textures when a context is destroyed

When a texture is still bound as an image and the context it was bound in
is destroyed but not the texture, then the texture will still hold the
resource and will not be freed when it is finally destroyed. Hence, release
these references when the context is destroyed.

This leak was triggered by virglrenderer:
https://gitlab.freedesktop.org/virgl/virglrenderer/issues/86

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: release tokens after creating the shader program

ureg_get_tokens clears the reference to the tokens, and create_compute_state makes
a copy, hence the tokens must be explicitely released.

Fixes: Direct leak of 256 byte(s) in 1 object(s) allocated from:
    #0 0x7ff729cf3c60 in realloc (/usr/lib64/gcc/x86_64-pc-linux-gnu/7.3.0/libasan.so+0xdbc60)
    #1 0x7ff721b1240c in tokens_expand ../../samba/mesa/src/gallium/auxiliary/tgsi/tgsi_ureg.c:234
    #2 0x7ff721b1c9c0 in get_tokens ../../samba/mesa/src/gallium/auxiliary/tgsi/tgsi_ureg.c:257
    #3 0x7ff721b1c9c0 in copy_instructions ../../samba/mesa/src/gallium/auxiliary/tgsi/tgsi_ureg.c:2040
    #4 0x7ff721b1c9c0 in ureg_finalize ../../samba/mesa/src/gallium/auxiliary/tgsi/tgsi_ureg.c:2090
    #5 0x7ff721b1e919 in ureg_get_tokens ../../samba/mesa/src/gallium/auxiliary/tgsi/tgsi_ureg.c:2167
    #6 0x7ff721f8b35a in si_create_dma_compute_shader ../../samba/mesa/src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c:219
    #7 0x7ff722043ed9 in si_compute_do_clear_or_copy ../../samba/mesa/src/gallium/drivers/radeonsi/si_compute_blit.c:156
    #8 0x7ff7220448d3 in si_clear_buffer ../../samba/mesa/src/gallium/drivers/radeonsi/si_compute_blit.c:247
    #9 0x7ff7220350e8 in vi_dcc_clear_level ../../samba/mesa/src/gallium/drivers/radeonsi/si_clear.c:274

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

isl: assert that Gen8+ don't have bit6_swizzling

v2: Rewrite the condition to more clearly match the comment. (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: skip bit6 swizzle detection in Gen8+

It is always false on Gen8+.  Also, move the variable definition near
its use.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: skip bit6 swizzle detection in Gen8+

It is always false on Gen8+.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

nir: keep the phi order when splitting blocks

All things being equal is better to keep the original order.  Since
the new block is empty, push the phis in order to tail.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Daniel Schürmann <daniel.schuermann@campus.tu-berlin.de>

nv50,nvc0: add explicit settings for recent caps

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 19.0 <mesa-stable@lists.freedesktop.org>

panfrost: Implement Midgard shader toolchain

This patch implements the free Midgard shader toolchain: the assembler,
the disassembler, and the NIR-based compiler. The assembler is a
standalone inaccessible Python script for reference purposes. The
disassembler and the compiler are implemented in C, accessible via the
standalone `midgard_compiler` binary. Later patches will use these
interfaces from the driver for online compilation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

panfrost: Initial stub for Panfrost driver

This patch adds an initial stub for the Gallium driver, containing
simple screen functions and the majority of the driver headers but no
actual functionality. It further adds the winsys glue for linking in
this stub driver via kmsro on Rockchip/Amlogic boards.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

radeonsi: fix crashing performance counters (division by zero)

Fixes: e2b9329f17 "radeonsi: move remaining perfcounter code into si_perfcounter.c"

radeonsi: handle render_condition_enable in si_compute_clear_render_target

radeonsi: use compute for clear_render_target when possible

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: Set pipe_image_view::shader_access in PBO readpixels.

Commit 8b626a22b24089edf90cb1b06e5b1895bb36c61b introduced a new
pipe_image_view::shader_access field, indicating the access mode
specified in the shader.  st/mesa's built-in PBO download shader
creates a write-only image buffer, so we should flag it as such.

Nobody uses this field yet (Iris will), so we don't need to backport
this fix to stable branches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.

Align with kernel commits:

5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Fix VK_EXT_transform_feedback working with varyings packed in PSIZ

Transform feedback did not set correct SO_DECL.ComponentMask for
varyings packed in VARYING_SLOT_PSIZ:
 gl_Layer         - VARYING_SLOT_LAYER    in VARYING_SLOT_PSIZ.y
 gl_ViewportIndex - VARYING_SLOT_VIEWPORT in VARYING_SLOT_PSIZ.z
 gl_PointSize     - VARYING_SLOT_PSIZ     in VARYING_SLOT_PSIZ.w

Fixes: 36ee2fd61c8f94 "anv: Implement the basic form of VK_EXT_transform_feedback"
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

radv: Handle VK_ATTACHMENT_UNUSED in CmdClearAttachment

From the Vulkan 1.0.98 spec for vkCmdClearAttachments:

"If any attachment to be cleared in the current subpass is VK_ATTACHMENT_UNUSED,
then the clear has no effect on that attachment."

"If the aspectMask member of any element of pAttachments contains
VK_IMAGE_ASPECT_COLOR_BIT, then the colorAttachment member of that
element must either refer to a color attachment which is VK_ATTACHMENT_UNUSED,
or must be a valid color attachment."

"If the aspectMask member of any element of pAttachments contains
VK_IMAGE_ASPECT_DEPTH_BIT, then the current subpass' depth/stencil attachment
must either be VK_ATTACHMENT_UNUSED, or must have a depth component"

"If the aspectMask member of any element of pAttachments contains
VK_IMAGE_ASPECT_STENCIL_BIT, then the current subpass' depth/stencil attachment
must either be VK_ATTACHMENT_UNUSED, or must have a stencil component"

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

anv: Handle VK_ATTACHMENT_UNUSED in colorAttachment

From the Vulkan 1.0.98 spec for vkCmdClearAttachments:

"If the aspectMask member of any element of pAttachments contains
VK_IMAGE_ASPECT_COLOR_BIT, then the colorAttachment member of that
element must either refer to a color attachment which is VK_ATTACHMENT_UNUSED,
or must be a valid color attachment."

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

radv: don't flush src stages when dstStageMask == BOTTOM_OF_PIPE

Original patch by Fredrik Höglund.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: do not set preserveAttachments for internal render passes

We don't use that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: drop useless checks when resolving subpass color attachments

The Vulkan spec says:
   "If pResolveAttachments is not NULL, for each resolve attachment
    that does not have the value VK_ATTACHMENT_UNUSED, the
    corresponding color attachment must not have the value
    VK_ATTACHMENT_UNUSED."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: execute external subpass barriers after ending subpasses

Outgoing dependencies (ie. external) should happen after the subpass.
This doesn't change anything for subpass resolves as we already
make sure that attachments are shader readable.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: accumulate all ingoing external dependencies to the first subpass

In case two or more subpasses declare ingoing external dependencies.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: handle subpass dependencies correctly

The different masks should be accumulated. For example if two
subpasses declare an outgoing dependency (ie. dst ==
VK_SUBPASS_EXTERNAL).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: track if subpasses have color attachments

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_render_pass_add_subpass_dep() helper

To share common code that handles subpass dependencies.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: move some render pass things to radv_render_pass_compile()

radv_render_pass_compile() is common to vkCreateRenderPass()
and vkCreateRenderPass2().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: handle final layouts at end of every subpass and render pass

That shouldn't change anything as we check if the last
subpass id is the final subpass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: determine the last subpass id for every attachments

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: use the new attachments array when starting subpasses

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: store the list of attachments for every subpass

This reworks how the depth stencil attachment is used for
simplicity. This also introduces radv_render_pass_compile()
helper that will be used for further optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: move subpass image transitions to radv_cmd_buffer_begin_subpass()

Instead of doing them in radv_cmd_buffer_set_subpass().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_cmd_buffer_begin_subpass() helper

To unify some code in BeginRenderPass() and NextSubpass().
Based on Intel ANV driver.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: remove useless MAYBE_UNUSED in CmdBeginRenderPass()

Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: remove unused radv_render_pass_attachment::view_mask

Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: bail out when no image transitions will be performed

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

meson: drop the xcb-xrandr version requirement

autotools doesn't have any requirement. This fixes meson on Ubuntu 16.04.

Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

wsi/display: add comment

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Keith Packard <keithp@keithp.com>

relnotes: Add VK_EXT_buffer_device_address

anv: Implement VK_EXT_buffer_device_address

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/fs: Implement nir_intrinsic_global_atomic_*

eviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/fs: Use SENDS for A64 writes on gen9+

eviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/fs: Implement load/store_global with A64 untyped messages

eviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/fs: Do the grf127 hack on SIMD8 instructions in SIMD16 mode

Previously, we only applied the fix to shaders with a dispatch mode of
SIMD8 but the code it relies on for SIMD16 mode only applies to SIMD16
instructions.  If you have a SIMD8 instruction in a SIMD16 shader,
neither would trigger and the restriction could still be hit.

Fixes: 232ed8980217dd "i965/fs: Register allocator shoudn't use grf127..."
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/fs: Properly handle 64-bit types in LOAD_PAYLOAD

By just assigning dst.type to src[i].type, we ensure that the offset at
the end of the loop actually offsets it by the right number of
registers.  Otherwise, we'll get into a case where we copy with a Q type
and then offset with a D type and things get out of sync.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/fs/cse: Split create_copy_instr into three cases

Previously, we tried to combine all cases where the instruction being
CSE'd writes to more than one MOV worth of registers into one case with
a bit of special casing for LOAD_PAYLOAD.  This commit splits things so
that LOAD_PAYLOAD is entirely it's own case.  This makes tweaking the
LOAD_PAYLOAD case simpler in the next commit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/nir: Add global support to lower_mem_access_bit_sizes

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/fs: Fix memory corruption when compiling a CS

Missing check for shader stage in the fs_visitor would corrupt the
cs_prog_data.push information and trigger crashes / corruption later
when uploading the CS state.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

spirv: Support LocalSizeId and LocalSizeHintId execution modes

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

spirv: Handle OpExecutionModeId

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

spirv: Handle constants and types before execution modes

We already defer handling the actual execution modes until after we've
created the shader.  This just moves it a tiny bit further so we
actually have constants and types and can handle OpExecutionModeId.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

spirv: Rework handling of spec constant workgroup size built-ins

Instead of handling it as part of the handling of constant instructions,
just stash the vtn_value when we see the decoration and handle it
explicitly later.  This will let us re-order handling of constant
instructions without breaking the Vulkan SPIR-V requirement that
decorating a specialization constant as the WorkgroupSize built-in
overrides the workgroup size set as an execution mode.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

spirv: Replace vtn_constant_value with vtn_constant_uint

The uint version is less typing, supports different bit sizes, and is
probably a bit more safe because we're actually verifying that the
SPIR-V value is an integer scalar constant.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

radv: fix build

Fixes: 9b9ccee4d64 ("radv: take LDS into account for compute shader occupancy stats")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: take LDS into account for compute shader occupancy stats

Ported from d205faeb6c96.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac/radv/radeonsi: add ac_get_num_physical_sgprs() helper

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

docs: add GL_EXT_texture_compression_s3tc_srgb to release notes

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

st/mesa: expose EXT_texture_compression_s3tc_srgb

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

i965: Set flag for EXT_texture_compression_s3tc_srgb

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

mesa/main: Expose EXT_texture_compression_s3tc_srgb

Required for the following test:

bin/compressedteximage GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT

pass when emulating GL on GLES.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

st/glsl_to_nir: remove dead local variables

Without this we do not end up with a deterministic NIR because
temporary register variables are added in random order. NIR must
be deterministic because we use it to produce a sha for the
radeonsi backends disk cache.

This fixes the shader cache for a bunch of shaders.

Another positive is that this results in a large reduction in the
size of the NIR that the state tracker stores to the disk cache.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

meson: remove -std=c++11 from intel/tools

for meson all C++ code is already compiled as C++11, so it's
unnecessary. It's also the wrong way to do this, if we really needed
this the correct way is to set:

```meson
executable(
  ...
  override_options : ['cpp_std=c++11'],
)
```

Which ensures not only that the correct syntax for the current
compiler is used, but also that meson doesn't create arguments like
`-std=c++14 ... -std=c++11`

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: fix style in intel/tools

The `:` in options should always have one space before and after `foo
: bar`, and lists do not get spaces around the braces: `[foo]` not `[
foo ]`

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: remove build_by_default : true

Which is and has always been the default. This is largely an artifact
of how the building of these tools was controlled when the meson build
was originally created.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

docs: update calendar, add news item and link release notes for 18.3.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add sha256 checksums for 18.3.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7475d7727f172387ac3d069887f3095dcb884649)

docs: add release notes for 18.3.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 190a79f462710f04d67eaefe498ef6ae5b7f5b1a)
[Emil: drop VERSION hunk]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
 Conflicts:
VERSION

st/mesa: Fix topogun-1.06-orc-84k-resize.trace crash

We need to initialize all fields in rs->prim explicitly while
creating new rastpos stage.

Fixes: bac8534267 ("st/mesa: allow glDrawElements to work with GL_SELECT
feedback")

v2: Initializing all fields in rs->prim as per Ilia.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

android,autotools,i965: Fix location of float64_glsl.h

Android.mk and autotools disagree about where generated files should
go, which wasn't a problem until we wanted to build a dist
tarball. This corrects the problem by changing the output and include
paths to be the same on android and autotools (meson already has the
correct include path).

Fixes: 7d7b30835cfb9eb89beca9fb8593d0954f79b84d
       ("automake: Fix path to generated source")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

gallium: allow more PIPE_RESOURCE_ driver flags

radeonsi has 8 and will probably have 9 soon.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

v3d: Fix image_load_store clamping of signed integer stores.

This was copy-and-paste fail, that oddly showed up in the CTS's
reinterprets of r32f, rgba8, and srgba8 to rgba8i, but not r32ui and r32i
to rgba8i or reinterprets to other signed int formats.

Fixes: 6281f26f064a ("v3d: Add support for shader_image_load_store.")

mesa: Skip partial InvalidateFramebuffer of packed depth/stencil.

One of the CTS cases tries to invalidate just stencil of packed
depth/stencil, and we incorrectly lost the depth contents.

Fixes dEQP-GLES3.functional.fbo.invalidate.whole.unbind_read_stencil
Fixes: 0c42b5f3cb90 ("mesa: wire up InvalidateFramebuffer")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

freedreno: more fixing release tarball

Fixes: aa0fed10d35 freedreno: move ir3 to common location
Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: fix release tarball

Fixes: b4476138d5a freedreno: move drm to common location
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>

docs: make bugs.html easier to find

Thanks to Yann Kervran for the report and suggestions.

Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

virgl: ARB_query_buffer_object support

v1.1: fix size define.

Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>

virgl: enable elapsed time queries

GL underneath always has GL_TIME_ELAPSED so always enable these.

Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>

automake: Add --enable-autotools to distcheck flags

Fixes: e68777c87ceed02ab199b32f941778c3cf97c794
       ("autotools: Deprecate the use of autotools")
Reviewed-by: Matt Turner <mattst88@gmail.com>

radeonsi: fix a comment typo in si_fine_fence_set

r600: add -Wstrict-overflow=0 to meson to silence the warning

same as radeonsi

winsys/amdgpu: remove amdgpu_drm.h definitions

trivial

radeonsi: unify error paths in si_texture_create_object

radeonsi: merge & rename texture BO metadata functions

radeonsi: enable dithered alpha-to-coverage for better quality

same as AMDVLK.

GL_NV_alpha_to_coverage_dither_control allows controlling this behavior.
The default is implementation-dependent.

gallium: wrap u_screen in extern "C" for c++

Some drivers (notabily SWR) are written in C++, and as such they need
access to C headers with extern "C". So lets add that.

mesa/core: Enable EXT_texture_sRGB_R8 also for desktop GL

As of Nov/30/2018 the extension is also valid for OpenGL >= 1.2, so
enable it accordingly and also add the required view class entry.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv/winsys: fix hash when adding internal buffers

This fixes serious stuttering in Shadow Of The Tomb Raider.

Fixes: 50fd253bd6e ("radv/winsys: Add priority handling during submit.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

mesa: expose NV_conditional_render on GLES

The extension spec has been updated to include GLES 2 support, so let's
enable it there.

v2: fixup ABI-check as well

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

v3d: Fix leak in resource setup error path

Reported by Coverity: in the case of unsupported modifier request, the
code does not jump to the “fail” label to destroy the acquired resource.

CID: 1435704
Signed-off-by: Ernestas Kulik <ernestas.kulik@gmail.com>
Fixes: 45bb8f295710 ("broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.")

vc4: Fix leak in HW queries error path

Reported by Coverity: in the case where there exist hardware and
non-hardware queries, the code does not jump to err_free_query and leaks
the query.

CID: 1430194
Signed-off-by: Ernestas Kulik <ernestas.kulik@gmail.com>
Fixes: 9ea90ffb98fb ("broadcom/vc4: Add support for HW perfmon")

v3d: Fix a release build set-but-unused compiler warning.

v3d: Always enable the NEON utile load/store code.

I can't imagine the new HW block being paired with a v6 CPU, so don't
bother with the CPU detection that vc4 had to do.

Improves 1024x1024 TexImage on my 7278 by 47.3229% +/- 0.679632%

vc4: Declare the last cpu pointer as being modified in NEON asm.

Earlier commit addressed 7 of the 8 instances available.

v2: Rebase patch back to master (by anholt)

Cc: Carsten Haitzler (Rasterman) <raster@rasterman.com>
Cc: Eric Anholt <eric@anholt.net>
Fixes: 300d3ae8b14 ("vc4: Declare the cpu pointers as being modified in NEON asm.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: Add relnotes stub for 19.1

bump version for 19.0 branch

automake: Add include dir for nir src directory

Fixes: 6281f26f064ada36b57d45feb68d8e7d783198c9
       ("v3d: Add support for shader_image_load_store.")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

automake: Add float64.glsl to dist tarball

Fixes: b63a1f8e40b6705d6a1d806fbd38dcd197d4229b
       ("glsl: Create file to contain software fp64 functions")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

automake: Fix path to generated source

Fixes: b63a1f8e40b6705d6a1d806fbd38dcd197d4229b
       ("glsl: Create file to contain software fp64 functions")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

nir: Optimize double-precision lower_round_even()

Use the trick of adding and then subtracting 2**52 (52 is the number of
explicit mantissa bits a double-precision floating-point value has) to
implement round-to-even.

Cuts the number of instructions on SKL of the piglit test
fs-roundEven-double.shader_test from 109 to 21.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

ac: use the correct LLVM processor name on Raven2

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

v3d: Fix the autotools build.

Noticed while looking at the gitlab-CI MR.