yosys.git
5 years agoMerge remote-tracking branch 'origin/pmux2shiftx' into xc7srl
Eddie Hung [Sat, 20 Apr 2019 17:44:01 +0000 (10:44 -0700)]
Merge remote-tracking branch 'origin/pmux2shiftx' into xc7srl

5 years agoMerge remote-tracking branch 'origin' into xc7srl
Eddie Hung [Sat, 20 Apr 2019 17:41:43 +0000 (10:41 -0700)]
Merge remote-tracking branch 'origin' into xc7srl

5 years agoMerge pull request #942 from YosysHQ/clifford/fix931
Clifford Wolf [Sat, 20 Apr 2019 08:05:35 +0000 (10:05 +0200)]
Merge pull request #942 from YosysHQ/clifford/fix931

Improve proc full_case detection and handling

5 years agoImprove "show" handling of 0/1/X/Z padding
Clifford Wolf [Fri, 19 Apr 2019 22:37:43 +0000 (00:37 +0200)]
Improve "show" handling of 0/1/X/Z padding

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoChange "ne" to "neq" in btor2 output
Clifford Wolf [Fri, 19 Apr 2019 19:17:12 +0000 (21:17 +0200)]
Change "ne" to "neq" in btor2 output

we need to do this because they changed the parser:
https://github.com/Boolector/btor2tools/commit/e97fc9cedabadeec4f621de22096e514f862c690

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd tests/aiger/.gitignore
Clifford Wolf [Fri, 19 Apr 2019 12:04:12 +0000 (14:04 +0200)]
Add tests/aiger/.gitignore

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoSpelling fixes
Eddie Hung [Thu, 11 Apr 2019 22:09:13 +0000 (15:09 -0700)]
Spelling fixes

5 years agoUpdate to ABC 3709744
Clifford Wolf [Thu, 18 Apr 2019 16:51:36 +0000 (18:51 +0200)]
Update to ABC 3709744

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #917 from YosysHQ/eddie/fix_retime
Eddie Hung [Thu, 18 Apr 2019 17:56:41 +0000 (10:56 -0700)]
Merge pull request #917 from YosysHQ/eddie/fix_retime

Retime by default when abc -dff

5 years agoFix abc's remap_name to not ignore [^0-9] when extracting sid
Eddie Hung [Thu, 18 Apr 2019 16:55:03 +0000 (09:55 -0700)]
Fix abc's remap_name to not ignore [^0-9] when extracting sid

5 years agoABC to call retime all the time
Eddie Hung [Thu, 18 Apr 2019 15:46:41 +0000 (08:46 -0700)]
ABC to call retime all the time

5 years agoRevert "synth_* with -retime option now calls abc with -D 1 as well"
Eddie Hung [Thu, 18 Apr 2019 14:59:16 +0000 (07:59 -0700)]
Revert "synth_* with -retime option now calls abc with -D 1 as well"

This reverts commit 9a6da9a79a22e984ee3eec02caa230b66f10e11a.

5 years agoMerge branch 'master' into eddie/fix_retime
Eddie Hung [Thu, 18 Apr 2019 14:57:17 +0000 (07:57 -0700)]
Merge branch 'master' into eddie/fix_retime

5 years agoImprove proc full_case detection and handling, fixes #931
Clifford Wolf [Thu, 18 Apr 2019 13:07:43 +0000 (15:07 +0200)]
Improve proc full_case detection and handling, fixes #931

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoUpdate to ABC d1b6413
Clifford Wolf [Wed, 17 Apr 2019 11:51:34 +0000 (13:51 +0200)]
Update to ABC d1b6413

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #939 from YosysHQ/revert895
Eddie Hung [Tue, 16 Apr 2019 18:59:21 +0000 (11:59 -0700)]
Merge pull request #939 from YosysHQ/revert895

Revert #895 (mux-to-shiftx optimisation)

5 years agoRevert #895
Eddie Hung [Tue, 16 Apr 2019 18:07:51 +0000 (11:07 -0700)]
Revert #895

5 years agoMerge pull request #937 from YosysHQ/revert-932-eddie/fixdlatch
Eddie Hung [Tue, 16 Apr 2019 01:39:20 +0000 (18:39 -0700)]
Merge pull request #937 from YosysHQ/revert-932-eddie/fixdlatch

Revert "Recognise default entry in case even if all cases covered (fix for #931)"

5 years agoRevert "Recognise default entry in case even if all cases covered (fix for #931)"
Eddie Hung [Tue, 16 Apr 2019 00:52:45 +0000 (17:52 -0700)]
Revert "Recognise default entry in case even if all cases covered (fix for #931)"

5 years agoMerge pull request #936 from YosysHQ/README-fix-quotes
Eddie Hung [Mon, 15 Apr 2019 19:22:05 +0000 (12:22 -0700)]
Merge pull request #936 from YosysHQ/README-fix-quotes

README: fix some incorrect quoting

5 years agoREADME: fix some incorrect quoting.
whitequark [Mon, 15 Apr 2019 14:29:46 +0000 (14:29 +0000)]
README: fix some incorrect quoting.

5 years agoMerge pull request #928 from litghost/add_xc7_sim_models
Eddie Hung [Fri, 12 Apr 2019 18:52:45 +0000 (11:52 -0700)]
Merge pull request #928 from litghost/add_xc7_sim_models

Add additional cells sim models for core 7-series primitives.

5 years agoRemove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra.
Keith Rothman [Fri, 12 Apr 2019 16:30:49 +0000 (09:30 -0700)]
Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
5 years agoMerge pull request #933 from dh73/master
Clifford Wolf [Fri, 12 Apr 2019 12:57:36 +0000 (14:57 +0200)]
Merge pull request #933 from dh73/master

Fixing issues in CycloneV cell sim

5 years agoMerge pull request #932 from YosysHQ/eddie/fixdlatch
Clifford Wolf [Fri, 12 Apr 2019 12:57:01 +0000 (14:57 +0200)]
Merge pull request #932 from YosysHQ/eddie/fixdlatch

Recognise default entry in case even if all cases covered (fix for #931)

5 years agoFixing issues in CycloneV cell sim
Diego [Fri, 12 Apr 2019 00:59:03 +0000 (19:59 -0500)]
Fixing issues in CycloneV cell sim

5 years agoFix ordering of when to insert zero index
Eddie Hung [Thu, 11 Apr 2019 23:25:59 +0000 (16:25 -0700)]
Fix ordering of when to insert zero index

5 years agoMore unused
Eddie Hung [Thu, 11 Apr 2019 23:20:43 +0000 (16:20 -0700)]
More unused

5 years agoRemove unused
Eddie Hung [Thu, 11 Apr 2019 23:18:01 +0000 (16:18 -0700)]
Remove unused

5 years agoFixes
Eddie Hung [Thu, 11 Apr 2019 23:17:09 +0000 (16:17 -0700)]
Fixes

5 years agoWIP
Eddie Hung [Thu, 11 Apr 2019 22:52:04 +0000 (15:52 -0700)]
WIP

5 years agoSpelling fixes
Eddie Hung [Thu, 11 Apr 2019 22:09:13 +0000 (15:09 -0700)]
Spelling fixes

5 years agoAdd default entry to testcase
Eddie Hung [Thu, 11 Apr 2019 22:03:40 +0000 (15:03 -0700)]
Add default entry to testcase

5 years agoRecognise default entry in case even if all cases covered (#931)
Eddie Hung [Thu, 11 Apr 2019 19:34:51 +0000 (12:34 -0700)]
Recognise default entry in case even if all cases covered (#931)

5 years agosynth_* with -retime option now calls abc with -D 1 as well
Eddie Hung [Wed, 10 Apr 2019 15:32:53 +0000 (08:32 -0700)]
synth_* with -retime option now calls abc with -D 1 as well

5 years agoRevert "abc -dff now implies "-D 0" otherwise retiming doesn't happen"
Eddie Hung [Wed, 10 Apr 2019 15:31:40 +0000 (08:31 -0700)]
Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen"

This reverts commit 19271bd996a79cb4be1db658fcf18227ee0a1dff.

5 years agoRevert ""&nf -D 0" fails => use "-D 1" instead"
Eddie Hung [Wed, 10 Apr 2019 15:31:35 +0000 (08:31 -0700)]
Revert ""&nf -D 0" fails => use "-D 1" instead"

This reverts commit 3c253818cab2013dc4db55732d3e21cfa0dc3f19.

5 years agoMerge remote-tracking branch 'origin/master' into eddie/fix_retime
Eddie Hung [Wed, 10 Apr 2019 15:23:00 +0000 (08:23 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/fix_retime

5 years agoFix LUT6_2 definition.
Keith Rothman [Tue, 9 Apr 2019 18:43:19 +0000 (11:43 -0700)]
Fix LUT6_2 definition.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
5 years agoAdd additional cells sim models for core 7-series primatives.
Keith Rothman [Tue, 9 Apr 2019 16:01:53 +0000 (09:01 -0700)]
Add additional cells sim models for core 7-series primatives.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
5 years agoFix a few typos
Eddie Hung [Mon, 8 Apr 2019 23:46:33 +0000 (16:46 -0700)]
Fix a few typos

5 years ago$_XILINX_SHREG_ to preserve src attribute
Eddie Hung [Mon, 8 Apr 2019 23:24:20 +0000 (16:24 -0700)]
$_XILINX_SHREG_ to preserve src attribute

5 years agoUpdate CHANGELOG
Eddie Hung [Mon, 8 Apr 2019 23:22:07 +0000 (16:22 -0700)]
Update CHANGELOG

5 years agoMerge branch 'undo_pr895' into xc7srl
Eddie Hung [Mon, 8 Apr 2019 23:07:52 +0000 (16:07 -0700)]
Merge branch 'undo_pr895' into xc7srl

5 years agoUndo #895 by instead setting an attribute
Eddie Hung [Mon, 8 Apr 2019 23:05:24 +0000 (16:05 -0700)]
Undo #895 by instead setting an attribute

5 years agoCope with undoing #895
Eddie Hung [Mon, 8 Apr 2019 22:57:07 +0000 (15:57 -0700)]
Cope with undoing #895

5 years agoMerge pull request #919 from YosysHQ/multiport_transp
Clifford Wolf [Mon, 8 Apr 2019 19:14:05 +0000 (21:14 +0200)]
Merge pull request #919 from YosysHQ/multiport_transp

memory_bram: Fix multiport make_transp

5 years agoRevert "Remove handling for $pmux, since #895"
Eddie Hung [Mon, 8 Apr 2019 19:01:06 +0000 (12:01 -0700)]
Revert "Remove handling for $pmux, since #895"

This reverts commit aa693d5723ef1438d42cd35a26673703b1eff79f.

5 years agomemory_bram: Fix multiport make_transp
David Shah [Sun, 7 Apr 2019 15:56:31 +0000 (16:56 +0100)]
memory_bram: Fix multiport make_transp

Signed-off-by: David Shah <dave@ds0.me>
5 years agoCall shregmap twice -- once for variable, another for fixed
Eddie Hung [Sat, 6 Apr 2019 00:35:49 +0000 (17:35 -0700)]
Call shregmap twice -- once for variable, another for fixed

5 years agoMerge branch 'eddie/fix_retime' into xc7srl
Eddie Hung [Fri, 5 Apr 2019 23:30:17 +0000 (16:30 -0700)]
Merge branch 'eddie/fix_retime' into xc7srl

5 years agoAdd retime test
Eddie Hung [Fri, 5 Apr 2019 23:28:46 +0000 (16:28 -0700)]
Add retime test

5 years agoFix S0 -> S1
Eddie Hung [Fri, 5 Apr 2019 23:28:14 +0000 (16:28 -0700)]
Fix S0 -> S1

5 years agoMove dffinit til after abc
Eddie Hung [Fri, 5 Apr 2019 23:20:43 +0000 (16:20 -0700)]
Move dffinit til after abc

5 years agoMerge branch 'eddie/fix_retime' into xc7srl
Eddie Hung [Fri, 5 Apr 2019 22:46:18 +0000 (15:46 -0700)]
Merge branch 'eddie/fix_retime' into xc7srl

5 years agoMove techamp t:$_DFF_?N? to before abc call
Eddie Hung [Fri, 5 Apr 2019 22:39:05 +0000 (15:39 -0700)]
Move techamp t:$_DFF_?N? to before abc call

5 years agoRetry
Eddie Hung [Fri, 5 Apr 2019 22:31:54 +0000 (15:31 -0700)]
Retry

5 years ago"&nf -D 0" fails => use "-D 1" instead
Eddie Hung [Fri, 5 Apr 2019 22:30:19 +0000 (15:30 -0700)]
"&nf -D 0" fails => use "-D 1" instead

5 years agoResolve @daveshah1 comment, update synth_xilinx help
Eddie Hung [Fri, 5 Apr 2019 22:15:13 +0000 (15:15 -0700)]
Resolve @daveshah1 comment, update synth_xilinx help

5 years agosynth_xilinx to techmap FFs after abc call, otherwise -retime fails
Eddie Hung [Fri, 5 Apr 2019 21:43:06 +0000 (14:43 -0700)]
synth_xilinx to techmap FFs after abc call, otherwise -retime fails

5 years agoabc -dff now implies "-D 0" otherwise retiming doesn't happen
Eddie Hung [Fri, 5 Apr 2019 21:42:25 +0000 (14:42 -0700)]
abc -dff now implies "-D 0" otherwise retiming doesn't happen

5 years agotechmap inside map_cells stage
Eddie Hung [Fri, 5 Apr 2019 19:55:52 +0000 (12:55 -0700)]
techmap inside map_cells stage

5 years agoAdd "read_ilang -lib"
Clifford Wolf [Fri, 5 Apr 2019 15:31:49 +0000 (17:31 +0200)]
Add "read_ilang -lib"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdded missing argument checking to "mutate" command
Clifford Wolf [Thu, 4 Apr 2019 16:10:10 +0000 (18:10 +0200)]
Added missing argument checking to "mutate" command

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge branch 'map_cells_before_map_luts' into xc7srl
Eddie Hung [Thu, 4 Apr 2019 15:13:34 +0000 (08:13 -0700)]
Merge branch 'map_cells_before_map_luts' into xc7srl

5 years agoMissing techmap entry in help
Eddie Hung [Thu, 4 Apr 2019 15:13:10 +0000 (08:13 -0700)]
Missing techmap entry in help

5 years agoUse soft-logic, not LUT3 instantiation
Eddie Hung [Thu, 4 Apr 2019 15:10:40 +0000 (08:10 -0700)]
Use soft-logic, not LUT3 instantiation

5 years agoMerge branch 'map_cells_before_map_luts' into xc7srl
Eddie Hung [Thu, 4 Apr 2019 14:54:42 +0000 (07:54 -0700)]
Merge branch 'map_cells_before_map_luts' into xc7srl

5 years agosynth_xilinx to map_cells before map_luts
Eddie Hung [Thu, 4 Apr 2019 14:48:13 +0000 (07:48 -0700)]
synth_xilinx to map_cells before map_luts

5 years agoCleanup comments
Eddie Hung [Thu, 4 Apr 2019 14:41:40 +0000 (07:41 -0700)]
Cleanup comments

5 years agot:$dff* -> t:$dff t:$dffe
Eddie Hung [Thu, 4 Apr 2019 14:39:19 +0000 (07:39 -0700)]
t:$dff* -> t:$dff t:$dffe

5 years agoRemove handling for $pmux, since #895
Eddie Hung [Wed, 3 Apr 2019 15:35:32 +0000 (08:35 -0700)]
Remove handling for $pmux, since #895

5 years ago-nosrl meant when -nobram
Eddie Hung [Wed, 3 Apr 2019 15:28:07 +0000 (08:28 -0700)]
-nosrl meant when -nobram

5 years agoRemove duplicate STARTUPE2
Eddie Hung [Wed, 3 Apr 2019 15:14:09 +0000 (08:14 -0700)]
Remove duplicate STARTUPE2

5 years agoDisable shregmap in synth_xilinx if -retime
Eddie Hung [Wed, 3 Apr 2019 14:14:20 +0000 (07:14 -0700)]
Disable shregmap in synth_xilinx if -retime

5 years agoAdd changelog entry
Eddie Hung [Wed, 3 Apr 2019 14:05:28 +0000 (07:05 -0700)]
Add changelog entry

5 years agoMerge pull request #913 from smunaut/fix_proc_mux
Eddie Hung [Wed, 3 Apr 2019 13:27:41 +0000 (06:27 -0700)]
Merge pull request #913 from smunaut/fix_proc_mux

proc_mux: Fix crash when trying to optimize non-existant mux to shiftx

5 years agoproc_mux: Fix crash when trying to optimize non-existant mux to shiftx
Sylvain Munaut [Wed, 3 Apr 2019 12:50:12 +0000 (14:50 +0200)]
proc_mux: Fix crash when trying to optimize non-existant mux to shiftx

last_mux_cell can be NULL ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
5 years agoMerge remote-tracking branch 'origin/master' into xc7srl
Eddie Hung [Wed, 3 Apr 2019 10:36:11 +0000 (03:36 -0700)]
Merge remote-tracking branch 'origin/master' into xc7srl

5 years agoMerge pull request #912 from YosysHQ/bram_addr_en
Clifford Wolf [Wed, 3 Apr 2019 08:00:18 +0000 (10:00 +0200)]
Merge pull request #912 from YosysHQ/bram_addr_en

memory_bram: Consider read enable for address expansion register

5 years agoMerge pull request #910 from ucb-bar/memupdates
Clifford Wolf [Wed, 3 Apr 2019 07:59:11 +0000 (09:59 +0200)]
Merge pull request #910 from ucb-bar/memupdates

Refine memory support to deal with general Verilog memory definitions.

5 years agomemory_bram: Consider read enable for address expansion register
David Shah [Tue, 2 Apr 2019 18:47:50 +0000 (19:47 +0100)]
memory_bram: Consider read enable for address expansion register

Signed-off-by: David Shah <dave@ds0.me>
5 years agoMerge pull request #895 from YosysHQ/pmux2shiftx
Eddie Hung [Tue, 2 Apr 2019 07:16:14 +0000 (00:16 -0700)]
Merge pull request #895 from YosysHQ/pmux2shiftx

RFC: Add a pmux-to-shiftx optimisation to proc_mux

5 years agoRefine memory support to deal with general Verilog memory definitions.
Jim Lawson [Mon, 1 Apr 2019 22:02:12 +0000 (15:02 -0700)]
Refine memory support to deal with general Verilog memory definitions.

5 years agoMerge pull request #907 from YosysHQ/clifford/fix906
Clifford Wolf [Fri, 29 Mar 2019 23:09:42 +0000 (00:09 +0100)]
Merge pull request #907 from YosysHQ/clifford/fix906

Build Verilog parser with -DYYMAXDEPTH=100000

5 years agoBuild Verilog parser with -DYYMAXDEPTH=100000, fixes #906
Clifford Wolf [Fri, 29 Mar 2019 15:32:44 +0000 (16:32 +0100)]
Build Verilog parser with -DYYMAXDEPTH=100000, fixes #906

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #901 from trcwm/libertyfixes
Clifford Wolf [Thu, 28 Mar 2019 08:32:05 +0000 (09:32 +0100)]
Merge pull request #901 from trcwm/libertyfixes

Libertyfixes: accept superfluous ; at end of group.

5 years agoMerge pull request #903 from YosysHQ/bram_reset_transp
Clifford Wolf [Thu, 28 Mar 2019 08:30:48 +0000 (09:30 +0100)]
Merge pull request #903 from YosysHQ/bram_reset_transp

memory_bram: Reset make_transp when growing read ports

5 years agomemory_bram: Reset make_transp when growing read ports
David Shah [Wed, 27 Mar 2019 17:19:14 +0000 (17:19 +0000)]
memory_bram: Reset make_transp when growing read ports

Signed-off-by: David Shah <dave@ds0.me>
5 years agoLiberty file parser now accepts superfluous ;
Niels Moseley [Wed, 27 Mar 2019 14:17:58 +0000 (15:17 +0100)]
Liberty file parser now accepts superfluous ;

5 years agoLiberty file parser now accepts superfluous ;
Niels Moseley [Wed, 27 Mar 2019 14:16:19 +0000 (15:16 +0100)]
Liberty file parser now accepts superfluous ;

5 years agoLiberty file parser now accepts superfluous ;
Niels Moseley [Wed, 27 Mar 2019 14:15:53 +0000 (15:15 +0100)]
Liberty file parser now accepts superfluous ;

5 years agoAdd "read -verific" and "read -noverific"
Clifford Wolf [Wed, 27 Mar 2019 13:03:35 +0000 (14:03 +0100)]
Add "read -verific" and "read -noverific"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd "rename -output"
Clifford Wolf [Wed, 27 Mar 2019 12:47:42 +0000 (13:47 +0100)]
Add "rename -output"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove "rename" help message
Clifford Wolf [Wed, 27 Mar 2019 12:33:26 +0000 (13:33 +0100)]
Improve "rename" help message

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd "cutpoint -undef"
Clifford Wolf [Tue, 26 Mar 2019 15:01:14 +0000 (16:01 +0100)]
Add "cutpoint -undef"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd "hdlname" attribute
Clifford Wolf [Tue, 26 Mar 2019 13:51:35 +0000 (14:51 +0100)]
Add "hdlname" attribute

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix "verific -extnets" for more complex situations
Clifford Wolf [Tue, 26 Mar 2019 13:17:46 +0000 (14:17 +0100)]
Fix "verific -extnets" for more complex situations

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agosynth_xilinx to use shregmap with -minlen 3
Eddie Hung [Mon, 25 Mar 2019 20:18:55 +0000 (13:18 -0700)]
synth_xilinx to use shregmap with -minlen 3

5 years agoMerge remote-tracking branch 'origin/master' into xc7srl
Eddie Hung [Mon, 25 Mar 2019 20:17:22 +0000 (13:17 -0700)]
Merge remote-tracking branch 'origin/master' into xc7srl