mesa.git
5 years agoglsl/nir: ftrunc for native_integers=false float to int cast
Jonathan Marek [Mon, 12 Nov 2018 22:00:08 +0000 (17:00 -0500)]
glsl/nir: ftrunc for native_integers=false float to int cast

out_type in the default cast case is always GLSL_TYPE_FLOAT, so we get a
mov otherwise.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoglsl/nir: int constants as float for native_integers=false
Jonathan Marek [Mon, 12 Nov 2018 18:08:50 +0000 (13:08 -0500)]
glsl/nir: int constants as float for native_integers=false

All alu instructions emitted with native_integers=false expect float
(or bool in some cases) constants, so this change is necessary.

This will cause changes with some intrinsics which had integer sources,
such as nir_intrinsic_load_uniform. Apparently it might cause issues with
some opt passes, but perhaps those don't apply in OpenGL ES 2.0 cases?

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agointel/peephole_ffma: Fix swizzle propagation
Jason Ekstrand [Wed, 17 Oct 2018 16:34:32 +0000 (11:34 -0500)]
intel/peephole_ffma: Fix swizzle propagation

The num_components value passed into get_mul_for_src is used to only
compose the parts of the swizzle that we know will be used so we don't
compose invalid swizzle components.  However, we had a bug where we
passed the number of components of the add all the way through.  For the
given source, we need the number of components read from that source.
In the case where we have a narrow add, say 2 components, that is
sourced from a chain of wider instructions, we may not compose all the
swizzles.  All we really need to do is pass through the right number of
components at each level.

Fixes: 2231cf0ba3a "nir: Fix output swizzle in get_mul_for_src"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agonir: Allow a non-existent sampler deref in nir_lower_samplers_as_deref
Kenneth Graunke [Thu, 10 Jan 2019 19:10:13 +0000 (11:10 -0800)]
nir: Allow a non-existent sampler deref in nir_lower_samplers_as_deref

GL_ARB_gl_spirv does not provide a sampler deref for e.g. texelFetch(),
so we can't assume that both are present and identical.  Simply lower
each if it is present.

Fixes regressions in GL_ARB_gl_spirv tests since I switched everyone to
using this pass.  Thanks to Alejandro Piñeiro for catching these.

Fixes: f003859f97c nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Alejandro Piñeiro <apinheiro@igalia.com>
5 years agotravis: avoid using unset llvm-config
Eric Engestrom [Wed, 2 Jan 2019 12:28:48 +0000 (12:28 +0000)]
travis: avoid using unset llvm-config

Fixes the following errors:
  usage: which [-as] program ...
  /Users/travis/.travis/job_stages: line 110: --version: command not found

... caused by the use of an undefined $LLVM_CONFIG

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoegl: remove unused include
Eric Engestrom [Wed, 16 May 2018 13:18:02 +0000 (14:18 +0100)]
egl: remove unused include

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoegl: add missing includes
Eric Engestrom [Wed, 16 May 2018 13:17:30 +0000 (14:17 +0100)]
egl: add missing includes

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoanv/pipeline_cache: fix incorrect guards for NIR cache
Iago Toral Quiroga [Fri, 11 Jan 2019 10:41:01 +0000 (11:41 +0100)]
anv/pipeline_cache: fix incorrect guards for NIR cache

Fixes: f6aa9f718516 'anv/pipeline_cache: Add support for caching NIR'
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoblorp: Pass the batch to lookup/upload_shader instead of context
Kenneth Graunke [Wed, 9 Jan 2019 23:15:49 +0000 (15:15 -0800)]
blorp: Pass the batch to lookup/upload_shader instead of context

This will allow drivers to pin shader buffers if necessary.

i965 and anv do not need to do this today, but iris will.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoblorp: Add blorp_get_surface_address to the driver interface.
Kenneth Graunke [Wed, 9 Jan 2019 21:31:18 +0000 (13:31 -0800)]
blorp: Add blorp_get_surface_address to the driver interface.

Currently, BLORP expects drivers to provide two functions for dealing
with buffers: blorp_emit_reloc and blorp_surface_reloc.  Both record a
relocation and combine the BO address and offset into a full 64-bit
address.  Traditionally, blorp_surface_reloc has written that combined
address to an implicitly-known buffer where surface states are stored.
(In contrast, blorp_emit_reloc returns the value.)

The upcoming Iris driver stores surface states in multiple buffers,
which makes it impossible for blorp_surface_reloc to write the combined
address - it only takes an offset, not the actual buffer to write to.

This commit adds a third function, blorp_get_surface_address, which
combines and returns an address, which is then passed to ISL's surface
state fill functions.  Softpin-only drivers can return a real address
here and skip writing it in blorp_surface_reloc.  Relocation-based
drivers are have options.  They can simply return 0 from the new
function, and continue writing the address from blorp_surface_reloc.
Or, they can return a presumed address from blorp_get_surface_address,
and have other relocation processing write the real value later.

For now, i965 and anv simply return 0.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agodocs: fix gallium screen cap docs
Ilia Mirkin [Thu, 27 Dec 2018 01:57:18 +0000 (20:57 -0500)]
docs: fix gallium screen cap docs

Make sure that the next line starts with spaces so that bullets are
maintained throughout, add `` around a few more special tokens, and fix
SAMPLE_COUNT_TEXTURE -> SAMPLE_COUNT.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agoglsl: Make invariant outputs in ES fragment shader not to cause error
Danylo Piliaiev [Wed, 5 Sep 2018 12:26:48 +0000 (15:26 +0300)]
glsl: Make invariant outputs in ES fragment shader not to cause error

In all GLSL ES versions output variables in fragment shader are allowed
to be invariant.

 From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 1.00 spec:
 "Only the following variables may be declared as invariant:
   ...
   - Built-in special variables output from the fragment shader."

 From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 3.00 spec:
 "Only variables output from a shader can be candidates for invariance."

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107842

5 years agoanv/pipeline: Cache the pre-lowered NIR
Jason Ekstrand [Fri, 12 Oct 2018 22:54:41 +0000 (17:54 -0500)]
anv/pipeline: Cache the pre-lowered NIR

This adds a second level of caching for the pre-lowered NIR that's only
based off of the shader module, entrypoint and specialization constants.
This is enough for spirv_to_nir as well as our first round of lowering
and optimization.  Caching at this level should allow for faster shader
recompiles due to state changes.

The NIR caching does not get serialized to disk via either the
VkPipelineCache serialization mechanism or the transparent on-disk
cache.  We could but it's usually not that expensive to fall back to
SPIR-V for the odd cache miss especially if it only happens once for
several misses and it simplifies the cache.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoanv/pipeline_cache: Add support for caching NIR
Jason Ekstrand [Fri, 12 Oct 2018 22:40:21 +0000 (17:40 -0500)]
anv/pipeline_cache: Add support for caching NIR

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoanv/pipeline: Hash shader modules and spec constants separately
Jason Ekstrand [Fri, 12 Oct 2018 22:01:24 +0000 (17:01 -0500)]
anv/pipeline: Hash shader modules and spec constants separately

The stuff hashed by anv_pipeline_hash_shader is exactly the inputs to
anv_shader_compile_to_nir so it can be used for NIR caching.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agocompiler/types: Serialize/deserialize subpass input types correctly
Jason Ekstrand [Sat, 13 Oct 2018 00:03:30 +0000 (19:03 -0500)]
compiler/types: Serialize/deserialize subpass input types correctly

They have glsl_sampler_dim enum values of 8 and 9 which don't work when
you & them with 0x7.  Fortunately, we have plenty of bits.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoanv/pipeline: Move wpos and input attachment lowering to lower_nir
Jason Ekstrand [Wed, 29 Aug 2018 21:40:05 +0000 (16:40 -0500)]
anv/pipeline: Move wpos and input attachment lowering to lower_nir

This lets us make anv_pipeline_compile_to_nir take a device instead of a
pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoi965: Compile fp64 funcs only if we do not have 64-bit hardware support
Matt Turner [Thu, 10 Jan 2019 23:14:35 +0000 (15:14 -0800)]
i965: Compile fp64 funcs only if we do not have 64-bit hardware support

Brown bag fix...

5 years agoanv/pipeline: Constant fold after apply_pipeline_layout
Jason Ekstrand [Thu, 10 Jan 2019 07:47:14 +0000 (01:47 -0600)]
anv/pipeline: Constant fold after apply_pipeline_layout

Thanks to the new NIR load_descriptor intrinsic added by the UBO/SSBO
lowering series, we weren't getting UBO pushing because the UBO range
detection pass couldn't see the constants it needed.  This fixes that
problem with a quick round of constant folding.  Because we're folding
we no longer need to go out of our way to generate constants when we
lower the vulkan_resource_index intrinsic and we can make it a bit
simpler.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agofreedreno/a6xx: fix 3d+tiled layout
Rob Clark [Thu, 3 Jan 2019 15:10:28 +0000 (10:10 -0500)]
freedreno/a6xx: fix 3d+tiled layout

The last round of fixing 3d layer+level layout skipped the tiled case,
since tiled texture support was not in place yet.  This finishes the
job.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: move tile_mode to sampler-view CSO
Rob Clark [Thu, 3 Jan 2019 14:27:58 +0000 (09:27 -0500)]
freedreno/a6xx: move tile_mode to sampler-view CSO

This is known when the CSO is created, so no need to patch it in later.

Also, it seems like smaller textures where the first level is small
enough to be linear, it seems like we should set linear tile mode.

See: dEQP-GLES3.functional.texture.format.unsized.rgb_unsigned_byte_3d_pot

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: separate stencil restore/resolve fixes
Rob Clark [Thu, 10 Jan 2019 13:32:51 +0000 (08:32 -0500)]
freedreno/a6xx: separate stencil restore/resolve fixes

Previously we'd use format/etc from the primary (z32) buffer for the
stencil (s8), due to confusion about rsc vs psurf.  Rework this to drop
extra arg and push down handling of separate stencil case (and make sure
we take the fmt from the right place).

This doesn't completely fix separate-stencil, but at least it avoids the
GPU scribbling over random other cmdstream buffers and causing a bunch
of bogus fails in dEQP.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: make cmdstream bo's read-only to GPU
Rob Clark [Wed, 9 Jan 2019 18:03:43 +0000 (13:03 -0500)]
freedreno: make cmdstream bo's read-only to GPU

If nothing else, this will make problems with cmdstream getting blit
over with pixels easier to track down (ie. faults when it first happens
rather than strange failures later from corrupted cmdstream when a
stateobj is later reused).

(NOTE this somewhat depends on the kernel supporting the flag, and the
iommu implementation.  But the worst case is just that the cmdstream
ends up writeable as before.)

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agoetnaviv: fix typo in cflush_all description
Guido Günther [Mon, 7 Jan 2019 14:00:00 +0000 (15:00 +0100)]
etnaviv: fix typo in cflush_all description

Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agoradv: remove a few more unnecessary KHR suffixes
Eric Engestrom [Wed, 9 Jan 2019 12:11:48 +0000 (12:11 +0000)]
radv: remove a few more unnecessary KHR suffixes

Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
5 years agonir: fix copy-paste error in nir_lower_constant_initializers
Rhys Perry [Thu, 10 Jan 2019 11:23:04 +0000 (11:23 +0000)]
nir: fix copy-paste error in nir_lower_constant_initializers

Fixes: 393b59e0772e7bf0426bdf61c740752c4e09dde1
    ('nir: Rework nir_lower_constant_initializers() to handle functions')
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agodocs: complete the calendar and release schedule documentation
Andres Gomez [Mon, 7 Jan 2019 17:04:34 +0000 (19:04 +0200)]
docs: complete the calendar and release schedule documentation

As suggested by Emil Velikov.

Cc: Dylan Baker <dylan.c.baker@intel.com>
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
5 years agoglsl/linker: specify proper direction in location aliasing error
Andres Gomez [Mon, 7 Jan 2019 14:11:44 +0000 (16:11 +0200)]
glsl/linker: specify proper direction in location aliasing error

The check for location aliasing was always asuming output variables
but this validation is also called for input variables.

Fixes: e2abb75b0e4 ("glsl/linker: validate explicit locations for SSO programs")
Cc: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agoeditorconfig: Add max_line_length property
Andres Gomez [Mon, 7 Jan 2019 13:49:00 +0000 (15:49 +0200)]
editorconfig: Add max_line_length property

The property is supported by the most of the editors, but not all:
https://github.com/editorconfig/editorconfig/wiki/EditorConfig-Properties#max_line_length

Cc: Eric Engestrom <eric@engestrom.ch>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agointel/isl: move tiled_memcpy static libs from i965 to isl
Tapani Pälli [Mon, 17 Dec 2018 12:17:15 +0000 (14:17 +0200)]
intel/isl: move tiled_memcpy static libs from i965 to isl

Patch moves intel_tiled_memcpy[_sse41] libraries to isl, renames some
functions and types and makes the required build system changes for
meson, automake and Android. No functional changes are introduced.

v2: code cleanups, move isl_get_memcpy_type to i965 (Jason)
v3: move isl_mem_copy_fn to priv header, cleanups (Jason, Dylan)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Enable 64-bit GLSL extensions
Matt Turner [Thu, 18 Oct 2018 16:51:51 +0000 (09:51 -0700)]
i965: Enable 64-bit GLSL extensions

Now that we have software implementations of ARB_gpu_shader_int64 and
ARB_gpu_shader_fp64 we can unconditionally enable these extensions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Compile fp64 software routines and lower double-ops
Matt Turner [Mon, 10 Dec 2018 19:06:16 +0000 (11:06 -0800)]
i965: Compile fp64 software routines and lower double-ops

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Heap-allocate temporary storage
Matt Turner [Mon, 10 Dec 2018 19:50:55 +0000 (11:50 -0800)]
intel/compiler: Heap-allocate temporary storage

Shaders containing software implementations of double-precision
operations can be very large such that we cannot stack-allocate
an array of grf_count*16.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Expand size of the 'nr' field
Matt Turner [Mon, 10 Dec 2018 19:48:54 +0000 (11:48 -0800)]
intel/compiler: Expand size of the 'nr' field

Shaders containing software implementations of double-precision
operations can be very large such that we have more the 2^16 virtual
registers during optimization.

Move the 'nr' field to the union containing the immediate storage and
expand it to 32-bits.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Prevent warnings in the following patch
Matt Turner [Mon, 10 Dec 2018 22:49:49 +0000 (14:49 -0800)]
intel/compiler: Prevent warnings in the following patch

The next patch replaces an unsigned bitfield with a plain unsigned,
which triggers gcc to begin warning on signed/unsigned comparisons.

Keeping this patch separate from the actual move allows bisectablity and
generates no additional warnings temporarily.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Rearrange code to avoid future problems
Matt Turner [Wed, 12 Dec 2018 06:04:42 +0000 (22:04 -0800)]
intel/compiler: Rearrange code to avoid future problems

A follow on commit will move nr to the same union as the immediate
data, so we should assert these invariants before we overwrite the nr
field.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Avoid false positive assertions
Matt Turner [Mon, 10 Dec 2018 19:42:44 +0000 (11:42 -0800)]
intel/compiler: Avoid false positive assertions

A follow on patch will move the 'nr' field to the union containing the
immediate field, so prepare by checking that we're only testing these
assertions if the .file is correct.

The assertions with != ARF were kind of silly to begin with because the
<128 check is specifically only for things in the GRF.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Split 64-bit MOV-indirects if needed
Matt Turner [Tue, 27 Nov 2018 19:20:20 +0000 (11:20 -0800)]
intel/compiler: Split 64-bit MOV-indirects if needed

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/compiler: Lower 64-bit MOV/SEL operations
Matt Turner [Thu, 11 Oct 2018 16:55:38 +0000 (09:55 -0700)]
intel/compiler: Lower 64-bit MOV/SEL operations

5 years agonir: Unset metadata debug bit if no progress made
Matt Turner [Mon, 10 Sep 2018 21:31:29 +0000 (14:31 -0700)]
nir: Unset metadata debug bit if no progress made

NIR metadata validation verifies that the debug bit was unset (by a call
to nir_metadata_preserve) if a NIR optimization pass made progress on
the shader. With the expectation that the NIR shader consists of only a
single main function, it has been safe to call nir_metadata_preserve()
iff progress was made.

However, most optimization passes calculate progress per-function and
then return the union of those calculations. In the case that an
optimization pass makes progress only on a subset of the functions in
the shader metadata validation will detect the debug bit is still set on
any unchanged functions resulting in a failed assertion.

This patch offers a quick solution (short of a larger scale refactoring
which I do not wish to undertake as part of this series) that simply
unsets the debug bit on unchanged functions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Add lowering support for 64-bit operations to software
Matt Turner [Mon, 10 Dec 2018 19:05:02 +0000 (11:05 -0800)]
nir: Add lowering support for 64-bit operations to software

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Create nir_builder in nir_lower_doubles_impl()
Matt Turner [Mon, 7 Jan 2019 23:35:31 +0000 (15:35 -0800)]
nir: Create nir_builder in nir_lower_doubles_impl()

We're going to use it more in a future patch, and this avoids a lot of
gross code.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Add and set info::uses_64bit
Matt Turner [Mon, 10 Dec 2018 19:01:39 +0000 (11:01 -0800)]
nir: Add and set info::uses_64bit

Will be used to communicate that a shader uses 64-bit operations to the
concerned lowering passes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Implement lowering of 64-bit shift operations
Matt Turner [Fri, 13 Jul 2018 00:22:16 +0000 (17:22 -0700)]
nir: Implement lowering of 64-bit shift operations

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Wire up int64 lowering functions
Matt Turner [Thu, 11 Oct 2018 17:16:25 +0000 (10:16 -0700)]
nir: Wire up int64 lowering functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Add some more int64 lowering helpers
Jason Ekstrand [Fri, 24 Feb 2017 05:40:55 +0000 (21:40 -0800)]
nir: Add some more int64 lowering helpers

[mattst88]: Found in an old branch of Jason's.

Jason implemented: inot, iand, ior, iadd, isub, ineg, iabs, compare,
                   imin, imax, umin, umax
Matt implemented:  ixor, bcsel, b2i, i2b, i2i8, i2i16, i2i32, i2i64,
                   u2u8, u2u16, u2u32, u2u64, and fixed ilt

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
5 years agonir: Tag entrypoint for easy recognition by nir_shader_get_entrypoint()
Matt Turner [Thu, 6 Sep 2018 18:12:24 +0000 (11:12 -0700)]
nir: Tag entrypoint for easy recognition by nir_shader_get_entrypoint()

We're going to have multiple functions, so nir_shader_get_entrypoint()
needs to do something a little smarter.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Rework nir_lower_constant_initializers() to handle functions
Matt Turner [Wed, 9 Jan 2019 03:49:14 +0000 (19:49 -0800)]
nir: Rework nir_lower_constant_initializers() to handle functions

Previously it assumed that only a single function (the entrypoint)
existed and attempted to lower constant initializers of shader outputs
for each function, for instance.

5 years agoglsl: Add "built-in" functions to do fp32_to_int64(fp32)
Sagar Ghuge [Tue, 11 Dec 2018 20:58:36 +0000 (12:58 -0800)]
glsl: Add "built-in" functions to do fp32_to_int64(fp32)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do fp32_to_uint64(fp32)
Sagar Ghuge [Tue, 11 Dec 2018 21:39:32 +0000 (13:39 -0800)]
glsl: Add "built-in" functions to do fp32_to_uint64(fp32)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do fp64_to_int64(fp64)
Sagar Ghuge [Tue, 11 Dec 2018 19:25:19 +0000 (11:25 -0800)]
glsl: Add "built-in" functions to do fp64_to_int64(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add utility function to round and pack int64_t value
Sagar Ghuge [Tue, 11 Dec 2018 19:19:38 +0000 (11:19 -0800)]
glsl: Add utility function to round and pack int64_t value

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do fp64_to_uint64(fp64)
Sagar Ghuge [Fri, 7 Dec 2018 23:07:57 +0000 (15:07 -0800)]
glsl: Add "built-in" functions to do fp64_to_uint64(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add utility function to round and pack uint64_t value
Sagar Ghuge [Fri, 7 Dec 2018 23:05:39 +0000 (15:05 -0800)]
glsl: Add utility function to round and pack uint64_t value

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do int64_to_fp32(int64_t)
Sagar Ghuge [Thu, 6 Dec 2018 06:37:18 +0000 (22:37 -0800)]
glsl: Add "built-in" functions to do int64_to_fp32(int64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do uint64_to_fp32(uint64_t)
Sagar Ghuge [Thu, 6 Dec 2018 01:02:42 +0000 (17:02 -0800)]
glsl: Add "built-in" functions to do uint64_to_fp32(uint64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do int64_to_fp64(int64_t)
Sagar Ghuge [Mon, 3 Dec 2018 20:09:38 +0000 (12:09 -0800)]
glsl: Add "built-in" functions to do int64_to_fp64(int64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to do uint64_to_fp64(uint64_t)
Sagar Ghuge [Fri, 30 Nov 2018 19:50:44 +0000 (11:50 -0800)]
glsl: Add "built-in" functions to do uint64_to_fp64(uint64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
5 years agoglsl: Add "built-in" functions to convert bool to double
Matt Turner [Fri, 9 Nov 2018 06:12:16 +0000 (22:12 -0800)]
glsl: Add "built-in" functions to convert bool to double

And vice versa.

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
5 years agoglsl: Add "built-in" functions to do ffract(fp64)
Matt Turner [Fri, 9 Nov 2018 06:05:56 +0000 (22:05 -0800)]
glsl: Add "built-in" functions to do ffract(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
5 years agoglsl: Add "built-in" function to do ffloor(fp64)
Matt Turner [Fri, 9 Nov 2018 05:59:42 +0000 (21:59 -0800)]
glsl: Add "built-in" function to do ffloor(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
5 years agoglsl: Add "built-in" functions to do fmin/fmax(fp64)
Matt Turner [Fri, 9 Nov 2018 05:34:05 +0000 (21:34 -0800)]
glsl: Add "built-in" functions to do fmin/fmax(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
5 years agoglsl: Add "built-in" functions to do ffma(fp64)
Matt Turner [Wed, 31 Oct 2018 04:48:01 +0000 (21:48 -0700)]
glsl: Add "built-in" functions to do ffma(fp64)

Definitely not actually a fused-multiply add.

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
5 years agoglsl: Add "built-in" functions to do round(fp64)
Elie Tournier [Fri, 11 Aug 2017 13:29:48 +0000 (14:29 +0100)]
glsl: Add "built-in" functions to do round(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do trunc(fp64)
Elie Tournier [Fri, 11 Aug 2017 13:09:01 +0000 (14:09 +0100)]
glsl: Add "built-in" functions to do trunc(fp64)

v2: use mix.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do sqrt(fp64)
Elie Tournier [Wed, 9 Aug 2017 22:44:18 +0000 (23:44 +0100)]
glsl: Add "built-in" functions to do sqrt(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do fp32_to_fp64(fp32)
Elie Tournier [Wed, 9 Aug 2017 22:11:08 +0000 (23:11 +0100)]
glsl: Add "built-in" functions to do fp32_to_fp64(fp32)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do fp64_to_fp32(fp64)
Elie Tournier [Wed, 9 Aug 2017 21:36:28 +0000 (22:36 +0100)]
glsl: Add "built-in" functions to do fp64_to_fp32(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do int_to_fp64(int)
Elie Tournier [Wed, 9 Aug 2017 16:39:23 +0000 (17:39 +0100)]
glsl: Add "built-in" functions to do int_to_fp64(int)

v2: use mix
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do fp64_to_int(fp64)
Elie Tournier [Wed, 9 Aug 2017 13:22:47 +0000 (14:22 +0100)]
glsl: Add "built-in" functions to do fp64_to_int(fp64)

v2: use mix

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do uint_to_fp64(uint)
Elie Tournier [Wed, 9 Aug 2017 10:41:13 +0000 (11:41 +0100)]
glsl: Add "built-in" functions to do uint_to_fp64(uint)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do fp64_to_uint(fp64)
Elie Tournier [Tue, 8 Aug 2017 18:13:45 +0000 (19:13 +0100)]
glsl: Add "built-in" functions to do fp64_to_uint(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do mul(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 17:12:42 +0000 (18:12 +0100)]
glsl: Add "built-in" functions to do mul(fp64, fp64)

v2: use mix
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do add(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 14:39:58 +0000 (15:39 +0100)]
glsl: Add "built-in" functions to do add(fp64, fp64)

v2: use mix and findMSB to optimise.
v3: [Sagar] Fix zFrac0 == 0u case in __normalizeRoundAndPackFloat64

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do lt(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 13:42:56 +0000 (14:42 +0100)]
glsl: Add "built-in" functions to do lt(fp64, fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add utility function to extract 64-bit sign
Elie Tournier [Tue, 8 Aug 2017 13:28:48 +0000 (14:28 +0100)]
glsl: Add utility function to extract 64-bit sign

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoglsl: Add "built-in" functions to do eq/ne(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 13:23:26 +0000 (14:23 +0100)]
glsl: Add "built-in" functions to do eq/ne(fp64, fp64)

5 years agoglsl: Add "built-in" function to do sign(fp64)
Elie Tournier [Tue, 8 Aug 2017 13:12:35 +0000 (14:12 +0100)]
glsl: Add "built-in" function to do sign(fp64)

v2: use mix.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" functions to do neg(fp64)
Elie Tournier [Tue, 8 Aug 2017 12:55:30 +0000 (13:55 +0100)]
glsl: Add "built-in" functions to do neg(fp64)

v2: use mix.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Add "built-in" function to do abs(fp64)
Elie Tournier [Tue, 8 Aug 2017 12:39:18 +0000 (13:39 +0100)]
glsl: Add "built-in" function to do abs(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
5 years agoglsl: Create file to contain software fp64 functions
Matt Turner [Thu, 15 Nov 2018 18:18:12 +0000 (10:18 -0800)]
glsl: Create file to contain software fp64 functions

The following patches will add implementations of various
double-precision operations to this file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoglsl: Add utility to convert text files to C strings
Ian Romanick [Tue, 23 Oct 2018 23:01:12 +0000 (16:01 -0700)]
glsl: Add utility to convert text files to C strings

Will be used to convert the .glsl source file containing software fp64
routines to a .h file that can be included while building the compiler.

This commit contains two squashed together: the first from Ian adding
the utility (with the existing title), and the second from Dylan making
the code both python2 and python3 compatible.

This is somewhat modeled after the xxd utility that comes with Vim.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
xxd.py: Make python2 and 3 compatible

This makes use of unicode_literals, so that undecorated strings are
considered text (python2 unicode, python3 str) and not bytes in python2
and text in python3. It makes use of io.open, which provides python2
with python3's open behavior (it's an alias in python3), in particular
support for the 't' and 'b' option. Finally, it decorates all of the
string literals with the 'b' prefix, so that python interprets them as
bytes.

I've removed the stdin and stdout options, as python2 always requires
these to be bytes, but python3 always treats them as text (there is a
way to get at the underlying bytes buffer, but that's even more
complexity), and makes the input files required arguments.

In the meson we use the '@INPUT@' shorthand instead of listing each
input, as meson will expand that to [prog_python, '@INPUT0@', @INPUT1@,
..., @OUTPUT@, ...]

5 years agoglsl: Copy function out to temp if we don't directly ref a variable
Timothy Arceri [Mon, 9 Apr 2018 04:40:40 +0000 (14:40 +1000)]
glsl: Copy function out to temp if we don't directly ref a variable

Otherwise we can end up with IR that looks like this:

    (
      (declare (temporary ) vec4 f@8)
      (assign  (xyzw) (var_ref f@8)  (var_ref f) )
      (call f16  ((swiz y (var_ref f@8) )))

      (assign  (xyzw) (var_ref f)  (var_ref f@8) )
    ))

When we really need:

      (declare (temporary ) float inout_tmp)
      (assign  (x) (var_ref inout_tmp)  (swiz y (var_ref f) ))
      (call f16  ((var_ref inout_tmp) ))

      (assign  (y) (var_ref f)  (swiz y (swiz xxxx (var_ref inout_tmp) )))
      (declare (temporary ) void void_var)

The GLSL IR function inlining code seemed to produce correct code
even without this but we need the correct IR for GLSL IR -> NIR to
be able to understand whats going on.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoglsl: Add function support to glsl_to_nir
Matt Turner [Mon, 10 Dec 2018 18:58:43 +0000 (10:58 -0800)]
glsl: Add function support to glsl_to_nir

Based on a patch from Tim Arceri, but I had to substantially rewrite it
as a result of the NIR derefs rework.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.
Francisco Jerez [Fri, 7 Dec 2018 22:03:51 +0000 (14:03 -0800)]
intel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.

These are broken on a future platform, but it turns out we don't need
to fix them, since they're just type-converting moves with strided
source.  Kill them.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.
Francisco Jerez [Fri, 7 Dec 2018 23:40:43 +0000 (15:40 -0800)]
intel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Remove existing lower_conversions pass.
Francisco Jerez [Sat, 8 Dec 2018 07:56:27 +0000 (23:56 -0800)]
intel/fs: Remove existing lower_conversions pass.

It's redundant with the functionality provided by lower_regioning now.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Introduce regioning lowering pass.
Francisco Jerez [Sat, 29 Dec 2018 12:00:13 +0000 (04:00 -0800)]
intel/fs: Introduce regioning lowering pass.

This legalization pass is meant to handle situations where the source
or destination regioning controls of an instruction are unsupported by
the hardware and need to be lowered away into separate instructions.
This should be more reliable and future-proof than the current
approach of handling CHV/BXT restrictions manually all over the
visitor.  The same mechanism is leveraged to lower unsupported type
conversions easily, which obsoletes the lower_conversions pass.

v2: Give conditional modifiers the same treatment as predicates for
    SEL instructions in lower_dst_modifiers() (Iago).  Special-case a
    couple of other instructions with inconsistent conditional mod
    semantics in lower_dst_modifiers() (Curro).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Constify fs_inst::can_do_source_mods().
Francisco Jerez [Sat, 29 Dec 2018 09:41:09 +0000 (01:41 -0800)]
intel/fs: Constify fs_inst::can_do_source_mods().

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.
Francisco Jerez [Fri, 7 Dec 2018 22:26:23 +0000 (14:26 -0800)]
intel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.

Currently the visitor attempts to enforce the regioning restrictions
that apply to double-precision instructions on CHV/BXT at NIR-to-i965
translation time.  It is possible though for the copy propagation pass
to violate this restriction if a strided move is propagated into one
of the affected instructions.  I've only reproduced this issue on a
future platform but it could affect CHV/BXT too under the right
conditions.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/eu/gen7: Fix brw_MOV() with DF destination and strided source.
Francisco Jerez [Fri, 7 Dec 2018 22:05:52 +0000 (14:05 -0800)]
intel/eu/gen7: Fix brw_MOV() with DF destination and strided source.

I triggered this bug while prototyping code for a future platform on
IVB.  Could be a problem today though if a strided move is
copy-propagated into a type-converting move with DF destination.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Fix bug in lower_simd_width while splitting an instruction which was alread...
Francisco Jerez [Fri, 7 Dec 2018 22:15:50 +0000 (14:15 -0800)]
intel/fs: Fix bug in lower_simd_width while splitting an instruction which was already split.

This seems to be a problem in combination with the lower_regioning
pass introduced by a future commit, which can modify a SIMD-split
instruction causing its execution size to become illegal again.  A
subsequent call to lower_simd_width() would hit this bug on a future
platform.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Implement quad swizzles on ICL+.
Francisco Jerez [Thu, 6 Dec 2018 22:11:34 +0000 (14:11 -0800)]
intel/fs: Implement quad swizzles on ICL+.

Align16 is no longer a thing, so a new implementation is provided
using Align1 instead.  Not all possible swizzles can be represented as
a single Align1 region, but some fast paths are provided for
frequently used swizzles that can be represented efficiently in Align1
mode.

Fixes ~90 subgroup quad swap Vulkan CTS tests.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agointel/fs: Handle source modifiers in lower_integer_multiplication().
Francisco Jerez [Sat, 29 Dec 2018 09:44:00 +0000 (01:44 -0800)]
intel/fs: Handle source modifiers in lower_integer_multiplication().

lower_integer_multiplication() implements 32x32-bit multiplication on
some platforms by bit-casting one of the 32-bit sources into two
16-bit unsigned integer portions.  This can give incorrect results if
the original instruction specified a source modifier.  Fix it by
emitting an additional MOV instruction implementing the source
modifiers where necessary.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
5 years agoanv/pipeline: remove unnecessary null-pointer check
Andrii Simiklit [Wed, 9 Jan 2019 13:39:45 +0000 (15:39 +0200)]
anv/pipeline: remove unnecessary null-pointer check

Looks like it is impossible that 'last' variable is a null
because at least the get_vs_prog_data shouldn't return a null pointer.
So this check is unnecessary starts from commit:
99d497c5b691 "anv/pipeline: Replace get_fs_input_map with ..."

This small issue is found by cppcheck.

Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agost/va: Return correct status from vlVaQuerySurfaceStatus
Indrajit Das [Thu, 3 Jan 2019 09:06:33 +0000 (14:36 +0530)]
st/va: Return correct status from vlVaQuerySurfaceStatus

This ensures that during encoding, applications can get
the correct status of the surface before submitting
more operations on the same.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
5 years agoRevert "llvmpipe: Always return some fence in flush (v2)"
Roland Scheidegger [Wed, 9 Jan 2019 16:25:52 +0000 (17:25 +0100)]
Revert "llvmpipe: Always return some fence in flush (v2)"

This reverts commit f6a6da8131383d8eeee07cd59326a70f4b15866b.

With this commit we see massive amounts of asserts triggering
in lp_fence_wait(), assert(f->issued), for instance with libgl_xlib
state tracker and piglit. Not entirely sure if the assert could
just be removed.

5 years agost/mesa: don't leak pipe_surface if pipe_context is not current
Marek Olšák [Tue, 8 Jan 2019 16:12:05 +0000 (11:12 -0500)]
st/mesa: don't leak pipe_surface if pipe_context is not current

We have found some pipe_surface leaks internally.

This is the same code as surface_destroy in radeonsi.
Ideally, surface_destroy would be in pipe_screen.

Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agost/mesa: don't reference pipe_surface locally in PBO code
Marek Olšák [Tue, 8 Jan 2019 15:47:31 +0000 (10:47 -0500)]
st/mesa: don't reference pipe_surface locally in PBO code

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agost/mesa: unify window-system renderbuffer initialization
Marek Olšák [Tue, 8 Jan 2019 15:44:29 +0000 (10:44 -0500)]
st/mesa: unify window-system renderbuffer initialization

Reviewed-by: Brian Paul <brianp@vmware.com>