Daily bump.

libbacktrace: add Mach-O 64-bit FAT support

libbacktrace/:
* macho.c (MACH_O_MH_MAGIC_FAT_64): Define.
(MACH_O_MH_CIGAM_FAT_64): Define.
(struct macho_fat_arch_64): Define.
(macho_add_fat): Add and use is_64 parameter.
(macho_add): Recognize 64-bit fat files.

doc: Switch valgrind.com to https

gcc/ChangeLog:
* doc/install.texi (Configuration): Switch valgrind.com to https.

libstdc++: Add deduction guide for std::ranges::join_view [LWG 3474]

This implements the proposed resolution for LWG 3474.

libstdc++-v3/ChangeLog:

* include/std/ranges (join_view): Add deduction guide (LWG 3474).
* testsuite/std/ranges/adaptors/join_lwg3474.cc: New test.

libstdc++: Fix std::indirectly_readable ambiguity [LWG 3446]

This implements the proposed resolution of LWG 3446. I'm also adding
another new constrained specialization which isn't proposed by 3446, to
resolve the ambiguity when a type has both value_type and element_type
but denoting different types.

libstdc++-v3/ChangeLog:

* include/bits/iterator_concepts.h (indirectly_readable): Add
partial specializations to resolve ambiguities (LWG 3446).
* testsuite/24_iterators/associated_types/readable.traits.cc:
Check types with both value_type and element_type.

libstdc++: Fix iota_view::size() to avoid overflow

This avoids the overflow that occurs when negating the most negative
value of an integral type.

Also prevent returning signed int when the values have lower rank and
promote to int.

libstdc++-v3/ChangeLog:

* include/std/ranges (ranges::iota_view::size()): Perform all
calculations in the right unsigned types.
* testsuite/std/ranges/iota/size.cc: New test.

libstdc++: Make variant_npos conversions explicit [PR 96766]

libstdc++-v3/ChangeLog:

PR libstdc++/96766
* include/std/variant (_Variant_storage): Replace implicit
conversions from size_t to __index_type with explicit casts.

libstdc++: Fix 30_threads/packaged_task/cons/alloc.cc regression

libstdc++-v3/ChangeLog:

* testsuite/30_threads/packaged_task/cons/alloc.cc: Run for
C++11 and skip for C++17 or later.

c++: overload dumper

I frequently need to look at overload sets, and debug_node spews more
information than is useful, most of the time.  Here's a dumper for
overloads, that just tells you their full name and where they came from.

gcc/cp
* ptree.c (debug_overload): New.

Fortran  :  get_environment_variable runtime error PR96486

Runtime error occurs when the type of the value argument is
character(0):  "Zero-length string passed as value...".
The status argument, intent(out), will contain -1 if the value
of the environment is too large to fit in the value argument, this
is the case if the type is character(0) so there is no reason to
produce a runtime error if the value argument is zero length.

2020-08-24  Mark Eggleston  <markeggleston@gcc.gnu.org>

libgfortran/

PR fortran/96486
* intrinsics/env.c: If value_len is > 0 blank the string.
Copy the result only if its length is > 0.

2020-08-24  Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/testsuite/

PR fortran/96486
* gfortran.dg/pr96486.f90: New test.

arm: Fix -mpure-code support/-mslow-flash-data for armv8-m.base [PR94538]

armv8-m.base (cortex-m23) has the movt instruction, so we need to
disable the define_split to generate a constant in this case,
otherwise we get incorrect insn constraints as described in PR94538.

We also need to fix the pure-code alternative for thumb1_movsi_insn
because the assembler complains with instructions like
movs r0, #:upper8_15:1234
(Internal error in md_apply_fix)
We now generate movs r0, 4 instead.

2020-08-24  Christophe Lyon  <christophe.lyon@linaro.org>

PR target/94538
gcc/
* config/arm/thumb1.md: Disable set-constant splitter when
TARGET_HAVE_MOVT.
(thumb1_movsi_insn): Fix -mpure-code
alternative.

PR target/94538
gcc/testsuite/
* gcc.target/arm/pure-code/pr94538-1.c: New test.
* gcc.target/arm/pure-code/pr94538-2.c: New test.

SLP: support entire BB.

gcc/ChangeLog:

* tree-vect-data-refs.c (dr_group_sort_cmp): Work on
data_ref_pair.
(vect_analyze_data_ref_accesses): Work on groups.
(vect_find_stmt_data_reference): Add group_id argument and fill
up dataref_groups vector.
* tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
arguments.
(vect_analyze_loop_2): Likewise.
* tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
(vect_slp_bb_region): Likewise.
(vect_slp_region): Likewise.
(vect_slp_bb):Work on the entire BB.
* tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
argument.
(vect_find_stmt_data_reference): Likewise.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/bb-slp-38.c: Adjust pattern as now we only process
a single vectorization and now 2 partial.
* gcc.dg/vect/bb-slp-45.c: New test.

Add missing vn_reference_t::punned initialization

gcc/ChangeLog:

PR tree-optimization/96597
* tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
initialization of ::punned.
(vn_reference_insert): Use consistently false instead of 0.
(vn_reference_insert_pieces): Likewise.

Fix libstdc++ testsuite to handle VxWorks gthreads implementation

When implementing the support for gthreads in VxWorks, we stumbled on
a problem in the testsuite. In the libstdc++ testsuite, we
indiscriminately add the `-pthread` switch to the tests that require
linking against the pthread library. In certain cases, such as
VxWorks, the gthread interface relies on the system native threads
lilbrary and the `-pthread` switch does not exist.

This patch adds a condition for the use of the `-pthread` switch. It
adds it only if the target supports it. The patch also adds
`dg-require-gthreads` in tests that were lacking it.

for libstdc++-v3/ChangeLog

* testsuite/20_util/shared_ptr/atomic/3.cc: Do not require POSIX
threads and add -pthread only on targets supporting them.
* testsuite/20_util/shared_ptr/thread/default_weaktoshared.cc:
Likewise.
* testsuite/20_util/shared_ptr/thread/mutex_weaktoshared.cc:
Likewise.
* testsuite/30_threads/async/42819.cc: Likewise.
* testsuite/30_threads/async/49668.cc: Likewise.
* testsuite/30_threads/async/54297.cc: Likewise.
* testsuite/30_threads/async/any.cc: Likewise.
* testsuite/30_threads/async/async.cc: Likewise.
* testsuite/30_threads/async/except.cc: Likewise.
* testsuite/30_threads/async/launch.cc: Likewise.
* testsuite/30_threads/async/lwg2021.cc: Likewise.
* testsuite/30_threads/async/sync.cc: Likewise. : Likewise.
* testsuite/30_threads/call_once/39909.cc: Likewise.
* testsuite/30_threads/call_once/49668.cc: Likewise.
* testsuite/30_threads/call_once/60497.cc: Likewise.
* testsuite/30_threads/call_once/call_once1.cc: Likewise.
* testsuite/30_threads/call_once/dr2442.cc: Likewise.
* testsuite/30_threads/condition_variable/54185.cc: Likewise.
* testsuite/30_threads/condition_variable/cons/1.cc: Likewise.
* testsuite/30_threads/condition_variable/members/1.cc: Likewise.
* testsuite/30_threads/condition_variable/members/2.cc: Likewise.
* testsuite/30_threads/condition_variable/members/3.cc: Likewise.
* testsuite/30_threads/condition_variable/members/53841.cc: Likewise.
* testsuite/30_threads/condition_variable/members/68519.cc: Likewise.
* testsuite/30_threads/condition_variable/native_handle/typesizes.cc:
Likewise.
* testsuite/30_threads/condition_variable_any/50862.cc: Likewise.
* testsuite/30_threads/condition_variable_any/53830.cc: Likewise.
* testsuite/30_threads/condition_variable_any/cond.cc: Likewise.
* testsuite/30_threads/condition_variable_any/cons/1.cc: Likewise.
* testsuite/30_threads/condition_variable_any/members/1.cc: Likewise.
* testsuite/30_threads/condition_variable_any/members/2.cc: Likewise.
* testsuite/30_threads/future/cons/move.cc: Likewise.
* testsuite/30_threads/future/members/45133.cc: Likewise.
* testsuite/30_threads/future/members/get.cc: Likewise.
* testsuite/30_threads/future/members/get2.cc: Likewise.
* testsuite/30_threads/future/members/share.cc: Likewise.
* testsuite/30_threads/future/members/valid.cc: Likewise.
* testsuite/30_threads/future/members/wait.cc: Likewise.
* testsuite/30_threads/future/members/wait_for.cc: Likewise.
* testsuite/30_threads/future/members/wait_until.cc: Likewise.
* testsuite/30_threads/lock/1.cc: Likewise.
* testsuite/30_threads/lock/2.cc: Likewise.
* testsuite/30_threads/lock/3.cc: Likewise.
* testsuite/30_threads/lock/4.cc: Likewise.
* testsuite/30_threads/mutex/cons/1.cc: Likewise.
* testsuite/30_threads/mutex/dest/destructor_locked.cc: Likewise.
* testsuite/30_threads/mutex/lock/1.cc: Likewise.
* testsuite/30_threads/mutex/native_handle/1.cc: Likewise.
* testsuite/30_threads/mutex/native_handle/typesizes.cc: Likewise.
* testsuite/30_threads/mutex/try_lock/1.cc: Likewise.
* testsuite/30_threads/mutex/try_lock/2.cc: Likewise.
* testsuite/30_threads/mutex/unlock/1.cc: Likewise.
* testsuite/30_threads/mutex/unlock/2.cc: Likewise.
* testsuite/30_threads/packaged_task/49668.cc: Likewise.
* testsuite/30_threads/packaged_task/60564.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/1.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/2.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/3.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/56492.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/alloc.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/move.cc: Likewise.
* testsuite/30_threads/packaged_task/cons/move_assign.cc: Likewise.
* testsuite/30_threads/packaged_task/members/at_thread_exit.cc:
Likewise.
* testsuite/30_threads/packaged_task/members/get_future.cc: Likewise.
* testsuite/30_threads/packaged_task/members/get_future2.cc: Likewise.
* testsuite/30_threads/packaged_task/members/invoke.cc: Likewise.
* testsuite/30_threads/packaged_task/members/invoke2.cc: Likewise.
* testsuite/30_threads/packaged_task/members/invoke3.cc: Likewise.
* testsuite/30_threads/packaged_task/members/invoke4.cc: Likewise.
* testsuite/30_threads/packaged_task/members/invoke5.cc: Likewise.
* testsuite/30_threads/packaged_task/members/reset.cc: Likewise.
* testsuite/30_threads/packaged_task/members/reset2.cc: Likewise.
* testsuite/30_threads/packaged_task/members/swap.cc: Likewise.
* testsuite/30_threads/packaged_task/members/valid.cc: Likewise.
* testsuite/30_threads/promise/60966.cc: Likewise.
* testsuite/30_threads/promise/cons/1.cc: Likewise.
* testsuite/30_threads/promise/cons/alloc.cc: Likewise.
* testsuite/30_threads/promise/cons/move.cc: Likewise.
* testsuite/30_threads/promise/cons/move_assign.cc: Likewise.
* testsuite/30_threads/promise/members/at_thread_exit.cc: Likewise.
* testsuite/30_threads/promise/members/at_thread_exit2.cc: Likewise.
* testsuite/30_threads/promise/members/get_future.cc: Likewise.
* testsuite/30_threads/promise/members/get_future2.cc: Likewise.
* testsuite/30_threads/promise/members/set_exception.cc: Likewise.
* testsuite/30_threads/promise/members/set_exception2.cc: Likewise.
* testsuite/30_threads/promise/members/set_value.cc: Likewise.
* testsuite/30_threads/promise/members/set_value2.cc: Likewise.
* testsuite/30_threads/promise/members/set_value3.cc: Likewise.
* testsuite/30_threads/promise/members/swap.cc: Likewise.
* testsuite/30_threads/recursive_mutex/cons/1.cc: Likewise.
* testsuite/30_threads/recursive_mutex/dest/destructor_locked.cc:
Likewise.
* testsuite/30_threads/recursive_mutex/lock/1.cc: Likewise.
* testsuite/30_threads/recursive_mutex/native_handle/1.cc: Likewise.
* testsuite/30_threads/recursive_mutex/native_handle/typesizes.cc:
Likewise.
* testsuite/30_threads/recursive_mutex/try_lock/1.cc: Likewise.
* testsuite/30_threads/recursive_mutex/try_lock/2.cc: Likewise.
* testsuite/30_threads/recursive_mutex/unlock/1.cc: Likewise.
* testsuite/30_threads/recursive_mutex/unlock/2.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/cons/1.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/dest/destructor_locked.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/lock/1.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/lock/2.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/native_handle/1.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/native_handle/typesizes.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock/1.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock/2.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock_for/1.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock_for/2.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock_for/3.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock_until/1.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/try_lock_until/2.cc:
Likewise.
* testsuite/30_threads/recursive_timed_mutex/unlock/1.cc: Likewise.
* testsuite/30_threads/recursive_timed_mutex/unlock/2.cc: Likewise.
* testsuite/30_threads/shared_future/cons/move.cc: Likewise.
* testsuite/30_threads/shared_future/members/45133.cc: Likewise.
* testsuite/30_threads/shared_future/members/get.cc: Likewise.
* testsuite/30_threads/shared_future/members/get2.cc: Likewise.
* testsuite/30_threads/shared_future/members/valid.cc: Likewise.
* testsuite/30_threads/shared_future/members/wait.cc: Likewise.
* testsuite/30_threads/shared_future/members/wait_for.cc: Likewise.
* testsuite/30_threads/shared_future/members/wait_until.cc: Likewise.
* testsuite/30_threads/shared_lock/cons/1.cc: Likewise.
* testsuite/30_threads/shared_lock/cons/2.cc: Likewise.
* testsuite/30_threads/shared_lock/cons/3.cc: Likewise.
* testsuite/30_threads/shared_lock/cons/4.cc: Likewise.
* testsuite/30_threads/shared_lock/cons/5.cc: Likewise.
* testsuite/30_threads/shared_lock/cons/6.cc: Likewise.
* testsuite/30_threads/shared_lock/locking/1.cc: Likewise.
* testsuite/30_threads/shared_lock/locking/2.cc: Likewise.
* testsuite/30_threads/shared_lock/locking/3.cc: Likewise.
* testsuite/30_threads/shared_lock/locking/4.cc: Likewise.
* testsuite/30_threads/shared_lock/modifiers/1.cc: Likewise.
* testsuite/30_threads/shared_mutex/cons/1.cc: Likewise.
* testsuite/30_threads/shared_mutex/try_lock/1.cc: Likewise.
* testsuite/30_threads/shared_mutex/try_lock/2.cc: Likewise.
* testsuite/30_threads/shared_mutex/unlock/1.cc: Likewise.
* testsuite/30_threads/shared_timed_mutex/cons/1.cc: Likewise.
* testsuite/30_threads/shared_timed_mutex/try_lock/1.cc: Likewise.
* testsuite/30_threads/shared_timed_mutex/try_lock/2.cc: Likewise.
* testsuite/30_threads/shared_timed_mutex/try_lock/3.cc: Likewise.
* testsuite/30_threads/shared_timed_mutex/unlock/1.cc: Likewise.
* testsuite/30_threads/this_thread/1.cc: Likewise.
* testsuite/30_threads/this_thread/sleep_for-mt.cc: Likewise.
* testsuite/30_threads/this_thread/sleep_until-mt.cc: Likewise.
* testsuite/30_threads/thread/cons/1.cc: Likewise.
* testsuite/30_threads/thread/cons/2.cc: Likewise.
* testsuite/30_threads/thread/cons/3.cc: Likewise.
* testsuite/30_threads/thread/cons/4.cc: Likewise.
* testsuite/30_threads/thread/cons/49668.cc: Likewise.
* testsuite/30_threads/thread/cons/5.cc: Likewise.
* testsuite/30_threads/thread/cons/6.cc: Likewise.
* testsuite/30_threads/thread/cons/7.cc: Likewise.
* testsuite/30_threads/thread/cons/8.cc: Likewise.
* testsuite/30_threads/thread/cons/9.cc: Likewise.
* testsuite/30_threads/thread/cons/moveable.cc: Likewise.
* testsuite/30_threads/thread/cons/terminate.cc: Likewise.
* testsuite/30_threads/thread/members/1.cc: Likewise.
* testsuite/30_threads/thread/members/2.cc: Likewise.
* testsuite/30_threads/thread/members/3.cc: Likewise.
* testsuite/30_threads/thread/members/4.cc: Likewise.
* testsuite/30_threads/thread/members/5.cc: Likewise.
* testsuite/30_threads/thread/members/hardware_concurrency.cc:
Likewise.
* testsuite/30_threads/thread/native_handle/typesizes.cc: Likewise.
* testsuite/30_threads/thread/swap/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/cons/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/dest/destructor_locked.cc:
Likewise.
* testsuite/30_threads/timed_mutex/lock/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/native_handle/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/native_handle/typesizes.cc:
Likewise.
* testsuite/30_threads/timed_mutex/try_lock/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock/2.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock_for/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock_for/2.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock_for/3.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock_until/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock_until/2.cc: Likewise.
* testsuite/30_threads/timed_mutex/try_lock_until/57641.cc: Likewise.
* testsuite/30_threads/timed_mutex/unlock/1.cc: Likewise.
* testsuite/30_threads/timed_mutex/unlock/2.cc: Likewise.
* testsuite/30_threads/try_lock/1.cc: Likewise.
* testsuite/30_threads/try_lock/2.cc: Likewise.
* testsuite/30_threads/try_lock/3.cc: Likewise.
* testsuite/30_threads/try_lock/4.cc: Likewise.
* testsuite/30_threads/unique_lock/cons/1.cc: Likewise.
* testsuite/30_threads/unique_lock/cons/2.cc: Likewise.
* testsuite/30_threads/unique_lock/cons/3.cc: Likewise.
* testsuite/30_threads/unique_lock/cons/4.cc: Likewise.
* testsuite/30_threads/unique_lock/cons/5.cc: Likewise.
* testsuite/30_threads/unique_lock/cons/6.cc: Likewise.
* testsuite/30_threads/unique_lock/locking/1.cc: Likewise.
* testsuite/30_threads/unique_lock/locking/2.cc: Likewise.
* testsuite/30_threads/unique_lock/locking/3.cc: Likewise.
* testsuite/30_threads/unique_lock/locking/4.cc: Likewise.
* testsuite/30_threads/unique_lock/modifiers/1.cc: Likewise.

reorg.c (fill_slots_from_thread): Improve for TARGET_FLAGS_REGNUM

This handles TARGET_FLAGS_REGNUM clobbering insns as delay-slot
fillers using a method similar to that in commit 33c2207d3fda,
where care was taken for fill_simple_delay_slots to allow such
insns when scanning for delay-slot fillers *backwards* (before
the insn).

A TARGET_FLAGS_REGNUM target is typically a former cc0 target.
For cc0 targets, insns don't mention clobbering cc0, so the
clobbers are mentioned in the "resources" only as a special
entity and only for compare-insns and branches, where the cc0
value matters.

In contrast, with TARGET_FLAGS_REGNUM, most insns clobber it and
the register liveness detection in reorg.c / resource.c treats
that as a blocker (for other insns mentioning it, i.e. most)
when looking for delay-slot-filling candidates.  This means that
when comparing core and performance for a delay-slot cc0 target
before and after the de-cc0 conversion, the inability to fill a
delay slot after conversion manifests as a regression.  This was
one such case, for CRIS, with random_bitstring in
gcc.c-torture/execute/arith-rand-ll.c as well as the target
libgcc division function.

After this, all known performance regressions compared to cc0
are fixed.

gcc:
PR target/93372
* reorg.c (fill_slots_from_thread): Allow trial insns that clobber
TARGET_FLAGS_REGNUM as delay-slot fillers.

gcc/testsuite:
PR target/93372
* gcc.target/cris/pr93372-47.c: New test.

Daily bump.

x86: Add target("general-regs-only") function attribute

gcc/

PR target/96744
* config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
(IX86_ATTR_IX86_NO): Likewise.
(ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
(ix86_valid_target_attribute_inner_p): Handle general-regs-only,
ix86_opt_ix86_yes and ix86_opt_ix86_no.
(ix86_option_override_internal): Check opts->x_ix86_target_flags
instead of opts->x_ix86_target_flags.
* doc/extend.texi: Document target("general-regs-only") function
attribute.

gcc/testsuite/

PR target/96744
* gcc.target/i386/pr96744-1.c: New test.
* gcc.target/i386/pr96744-2.c: Likewise.
* gcc.target/i386/pr96744-3a.c: Likewise.
* gcc.target/i386/pr96744-3b.c: Likewise.
* gcc.target/i386/pr96744-4.c: Likewise.
* gcc.target/i386/pr96744-5.c: Likewise.
* gcc.target/i386/pr96744-6.c: Likewise.
* gcc.target/i386/pr96744-7.c: Likewise.
* gcc.target/i386/pr96744-8a.c: Likewise.
* gcc.target/i386/pr96744-8b.c: Likewise.
* gcc.target/i386/pr96744-9.c: Likewise.

Changed to STOP 1 in unlimited_polymorphic_31.f03.

2020-08-23  Paul Thomas  <pault@gcc.gnu.org>

gcc/testsuite/
PR fortran/92785
* gfortran.dg/unlimited_polymorphic_31.f03: Change to stop 1.

Adding option -g to pr96737.f90.

2020-08-23  Paul Thomas  <pault@gcc.gnu.org>

gcc/testsuite/
PR fortran/96737
* gfortran.dg/pr96737.f90: Add option -g.

This patch fixes PR96737. See the explanatory comment in the testcase.

2020-08-23  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/96737
* trans-types.c (gfc_get_derived_type): Derived types that are
used in submodules are not compatible with TYPE_CANONICAL from
any of the global namespaces.

gcc/testsuite/
PR fortran/96737
* gfortran.dg/pr96737.f90: New test.

Daily bump.

analyzer: fix NULL deref false positives [PR94851]

PR analyzer/94851 reports various false "NULL dereference" diagnostics.
The first case (comment #1) affects GCC 10.2 but no longer affects
trunk; I believe it was fixed by the state rewrite of
r11-2694-g808f4dfeb3a95f50f15e71148e5c1067f90a126d.

The patch adds a regression test for this case.

The other cases (comment #3 and comment #4) still affect trunk.
In both cases, the && in a conditional is optimized to bitwise &
  _1 = p_4 != 0B;
  _2 = p_4 != q_6(D);
  _3 = _1 & _2;
and the analyzer fails to fold this for the case where one (or both) of
the conditionals is false, and thus erroneously considers the path where
"p" is non-NULL despite being passed a NULL value.

Fix this by implementing folding for this case.

gcc/analyzer/ChangeLog:
PR analyzer/94851
* region-model-manager.cc
(region_model_manager::maybe_fold_binop): Fold bitwise "& 0" to 0.

gcc/testsuite/ChangeLog:
PR analyzer/94851
* gcc.dg/analyzer/pr94851-1.c: New test.
* gcc.dg/analyzer/pr94851-3.c: New test.
* gcc.dg/analyzer/pr94851-4.c: New test.

analyzer: simplify store::eval_alias

I have followup patches that add new conditions to store::eval_alias.
Rather than duplicate all conditions for symmetry, split it up and
call it on both (A, B) and (B, A).

gcc/analyzer/ChangeLog:
* store.cc (store::eval_alias): Make const.  Split out 2nd half
into store::eval_alias_1 and call it twice for symmetry, avoiding
test duplication.
(store::eval_alias_1): New function, split out from the above.
* store.h (store::eval_alias): Make const.
(store::eval_alias_1): New decl.

analyzer: simplify region_model::push_frame

region_model::push_frame was binding arguments for both the default SSA
name for each parameter, and the underlying parameter.

Simplify the generated states by only binding the default SSA name if
it exists, or the parameter if there is no default SSA name.

gcc/analyzer/ChangeLog:
* region-model.cc (region_model::push_frame): Bind the default
SSA name for each parm if it exists, falling back to the parm
itself otherwise, rather than doing both.

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/malloc-ipa-8-double-free.c: Drop
-fanalyzer-verbose-state-changes.

libgccjit: Update comments for gcc_jit_context_new_rvalue_from* functions

gcc/jit/ChangeLog

2020-08-06  Andrea Corallo  <andrea.corallo@arm.com>

* libgccjit.c:
(gcc_jit_context_new_rvalue_from_int)
(gcc_jit_context_new_rvalue_from_long)
(gcc_jit_context_new_rvalue_from_double)
(gcc_jit_context_new_rvalue_from_ptr): Update function heading
comments.

Daily bump.

Update links to Arm docs

gcc/
* doc/extend.texi: Update links to Arm docs.
* doc/invoke.texi: Likewise.

libstdc++: Do not check "cold" name on darwin [PR 96736]

libstdc++-v3/ChangeLog:

PR libstdc++/96736
* testsuite/17_intro/headers/c++1998/all_attributes.cc: Do not
test "cold" on darwin.
* testsuite/17_intro/headers/c++2011/all_attributes.cc:
Likewise.
* testsuite/17_intro/headers/c++2014/all_attributes.cc:
Likewise.
* testsuite/17_intro/headers/c++2017/all_attributes.cc:
Likewise.
* testsuite/17_intro/headers/c++2020/all_attributes.cc:
Likewise.

Using gen_int_mode instead of GEN_INT to avoid ICE caused by type promotion.

2020-07-22  Hongtao Liu  <hongtao.liu@intel.com>

gcc/
PR target/96262
* config/i386/i386-expand.c
(ix86_expand_vec_shift_qihi_constant): Refine.

gcc/testsuite/
* gcc.target/i386/pr96262-1.c: New test.

driver: Fix several memory leaks [PR63854]

This patch fixes several memory leaks in the driver, all of which relate
to the handling of static specs. We introduce functions
set_static_spec_{shared,owned}() which are used to enforce proper memory
management when updating the strings in the static_specs table.

This is achieved by making use of the alloc_p field in the table
entries. Similarly to set_spec(), each time we update an entry, we check
whether alloc_p is set, and free the old value if so. We then set
alloc_p correctly based on whether we "own" this memory or whether we're
just taking a pointer to a shared string which we shouldn't free.

The following table shows the number of leaks found by AddressSanitizer
when running a minimal libgccjit program on AArch64. The test program
does the whole libgccjit compilation cycle in a loop (including acquiring
and releasing the context), and the table below shows the number of leaks
for different iterations of that loop.

+--------------+-----+-----+------+---------------+
| # of runs >  | 1   | 2   | 3    | Leaks per run |
+--------------+-----+-----+------+---------------+
| Before patch | 463 | 940 | 1417 | 477           |
+--------------+-----+-----+------+---------------+
| After patch  | 416 | 846 | 1276 | 430           |
+--------------+-----+-----+------+---------------+

gcc/ChangeLog:

PR jit/63854
* gcc.c (set_static_spec): New.
(set_static_spec_owned): New.
(set_static_spec_shared): New.
(driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
set_static_spec_owned() to take ownership of lto_wrapper_file
such that it gets freed in driver::finalize.
(driver::maybe_run_linker): Use set_static_spec_shared() to
ensure that we don't try and free() the static string "ld",
also ensuring that any previously-allocated string in
linker_name_spec is freed. Likewise with argv0.
(driver::finalize): Use set_static_spec_shared() when resetting
specs that previously had allocated strings; remove if(0)
around call to free().

Allow try_split to split RTX_FRAME_RELATED_P insns

Instead of rejecting RTX_FRAME_RELATED_P insns, allow try_split to split
such insns, provided the split is after reload, and the result of the split
is a single insn.

recog.c:peep2_attempt already splits an RTX_FRAME_RELATED_P insn splitting
to a single insn. This patch refactors existing code copying frame related
info to a separate function (copy_frame_info_to_split_insn) and calls it
from both peep2_attempt and try_split.

2020-08-21  Senthil Kumar Selvaraj  <saaadhu@gcc.gnu.org>

gcc/ChangeLog:

* emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
to split certain RTX_FRAME_RELATED_P insns.
* recog.c (copy_frame_info_to_split_insn): New function.
(peep2_attempt): Split copying of frame related info of
RTX_FRAME_RELATED_P insns into above function and call it.
* recog.h (copy_frame_info_to_split_insn): Declare it.

libstdc++: Skip PSTL tests when installed TBB is too old [PR 96718]

These tests do not actually require TBB, because they only inspect the
feature test macros present in the headers. However, if TBB is installed
then its headers will be included, and the version will be checked. If
the version is too old, compilation fails due to a #error directive.

This change disables the tests if TBB is not present, so that we skip
them instead of failing.

libstdc++-v3/ChangeLog:

PR libstdc++/96718
* testsuite/25_algorithms/pstl/feature_test-2.cc: Require
tbb-backend effective target.
* testsuite/25_algorithms/pstl/feature_test-3.cc: Likewise.
* testsuite/25_algorithms/pstl/feature_test-5.cc: Likewise.
* testsuite/25_algorithms/pstl/feature_test.cc: Likewise.

Enable bitwise operation for type mask.

Enable operator or/xor/and/andn/not for mask register, kxnor is not
enabled since there's no corresponding instruction for general
registers.

gcc/
PR target/88808
* config/i386/i386.c (ix86_preferred_reload_class): Allow
QImode data go into mask registers.
* config/i386/i386.md: (*movhi_internal): Adjust constraints
for mask registers.
(*movqi_internal): Ditto.
(*anddi_1): Support mask register operations
(*and<mode>_1): Ditto.
(*andqi_1): Ditto.
(*andn<mode>_1): Ditto.
(*<code><mode>_1): Ditto.
(*<code>qi_1): Ditto.
(*one_cmpl<mode>2_1): Ditto.
(*one_cmplsi2_1_zext): Ditto.
(*one_cmplqi2_1): Ditto.
(define_peephole2): Move constant 0/-1 directly into mask
registers.
* config/i386/predicates.md (mask_reg_operand): New predicate.
* config/i386/sse.md (define_split): Add post-reload splitters
that would convert "generic" patterns to mask patterns.
(*knotsi_1_zext): New define_insn.

gcc/testsuite/
* gcc.target/i386/bitwise_mask_op-1.c: New test.
* gcc.target/i386/bitwise_mask_op-2.c: New test.
* gcc.target/i386/bitwise_mask_op-3.c: New test.
* gcc.target/i386/avx512bw-pr88465.c: New testcase.
* gcc.target/i386/avx512bw-kunpckwd-1.c: Adjust testcase.
* gcc.target/i386/avx512bw-kunpckwd-3.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-5.c: Ditto.
* gcc.target/i386/avx512f-kmovw-5.c: Ditto.
* gcc.target/i386/pr55342.c: Ditto.

According to instruction_tables.pdf

1. Set cost of movement inside mask registers a bit higher than gpr's.
2. Set cost of movement between mask register and gpr much higher than movement
   inside gpr, but still less equal than load/store.
3. Set cost of mask register load/store a bit higher than gpr load/store.

gcc/
* config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
model.

Enable direct movement between gpr and mask registers in pass_reload.

Changelog
gcc/
* config/i386/i386.c (inline_secondary_memory_needed):
No memory is needed between mask regs and gpr.
(ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
mask regno.
* config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
* config/i386/i386.md: Exclude mask register in
define_peephole2 which is avaiable only for gpr.

gcc/testsuite/
* gcc.target/i386/spill_to_mask-1.c: New tests.
* gcc.target/i386/spill_to_mask-2.c: New tests.
* gcc.target/i386/spill_to_mask-3.c: New tests.
* gcc.target/i386/spill_to_mask-4.c: New tests.

x86: Add cost model for operation of mask registers.

gcc/

PR target/71453
* config/i386/i386.h (struct processor_costs): Add member
mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
mask_move.
* config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
bdver_cost, znver1_cost, znver2_cost, skylake_cost,
btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
Initialize mask_load[3], mask_store[3], mask_move,
integer_to_mask, mask_to_integer for all target costs.
* config/i386/i386.c (ix86_register_move_cost): Using cost
model of mask registers.
(inline_memory_move_cost): Ditto.
(ix86_register_move_cost): Ditto.

analyzer: add regression tests [PR95152]

PR analyzer/95152 reports various ICEs in
region_model::get_or_create_mem_ref.

I removed this function as part of the state rewrite in
r11-2694-g808f4dfeb3a95f50f15e71148e5c1067f90a126d.
I've verified that these two test cases reproduce the issue with 10.2
and don't ICE with trunk; adding them as regression tests.

gcc/testsuite/ChangeLog:
PR analyzer/95152
* gcc.dg/analyzer/pr95152-4.c: New test.
* gcc.dg/analyzer/pr95152-5.c: New test.

Daily bump.

d: Merge upstream dmd 1b5a53d01.

Fixes an ICE in setValue at dmd/dinterpret.c:7046

This was originally seen when running the testsuite for a 16-bit target,
however, it could be reproduced on 32-bit using long[] as well.

Reviewed-on: https://github.com/dlang/dmd/pull/11547

gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd 1b5a53d01.

analyzer: fix infinite recursion ICE on unions [PR96723]

Attempts to store sm-state into a union in C++ triggered an infinite
recursion when trying to generate a representative tree, due to
erroneously trying to use the dtor of the union as a field.

Fix it by filtering out non-FIELD_DECLs when walking TYPE_FIELDs
in region::get_subregions_for_binding.

gcc/analyzer/ChangeLog:
PR analyzer/96723
* region-model-manager.cc
(region_model_manager::get_field_region): Assert that field is a
FIELD_DECL.
* region.cc (region::get_subregions_for_binding): In
union-handling, filter the TYPE_FIELDS traversal to just FIELD_DECLs.

gcc/testsuite/ChangeLog:
PR analyzer/96723
* g++.dg/analyzer/pr96723.C: New test.

libstdc++: Fix typo in ChangeLog

configure: Also check C++11 (flags) for ${build} compiler not only for ${host}

config/ChangeLog:

PR bootstrap/96612
* ax_cxx_compile_stdcxx.m4: Add fourth argument to check also
the CXX_FOR_BUILD compiler.

ChangeLog:

PR bootstrap/96612
* configure.ac: Run AX_CXX_COMPILE_STDCXX also for ${build} compiler,
if not the same as ${host}.
* configure: Regenerate.

libstdc++: Make incrementable<__int128> satisfied in strict mode

This adds specializations of std::incrementable_traits so that 128-bit
integers are always considered incrementable (and therefore usable with
std::ranges::iota_view) even when they don't satisfy std::integral.

libstdc++-v3/ChangeLog:

* include/bits/iterator_concepts.h [__STRICT_ANSI__]
(incrementable_traits<__int128>): Define specialization.
(incrementable_traits<unsigned __int128>): Likewise.
* testsuite/std/ranges/iota/96042.cc: Test iota_view with
__int128.

This patch fixes PRs 96100 and 96101.

2020-08-20  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/96100
PR fortran/96101
* trans-array.c (get_array_charlen): Tidy up the evaluation of
the string length for array constructors. Avoid trailing array
references. Ensure string lengths of deferred length components
are set. For parentheses operator apply string  length to both
the primary expression and the enclosed expression.

gcc/testsuite/
PR fortran/96100
PR fortran/96101
* gfortran.dg/char_length_23.f90: New test.

vxworks: Fix GCC selftests for *-wrs-vxworks7-* targets

Currently when building a cross-compiler targeting arm-wrs-vxworks7, the
self-tests fail unless the VSB_DIR environment variable is set.

This prevents attempts at designating the location of runtime header
files, libraries or startfiles, which would fail on unset environment
variables and aren't needed for such tests.

gcc/ChangeLog:

* config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
VxWorks header files if -fself-test is used.
(STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.

Fix obvious typo were errmsg_len was assigned to errmsg.

gcc/fortran/ChangeLog:

2020-08-20  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/94958
* trans-array.c (gfc_bcast_alloc_comp): Use the correct variable.

arm: Require MVE memory operand for destination of vst1q intrinsic

Previously, the machine description patterns for vst1q accepted a generic memory
operand for the destination, which could lead to an unrecognised builtin when
expanding vst1q* intrinsics. This change fixes the pattern to only accept MVE
memory operands.

gcc/ChangeLog:

PR target/96683
* config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
destination.
(mve_vst1q_<supf><mode>): Likewise.

gcc/testsuite/ChangeLog:

PR target/96683
* gcc.target/arm/mve/intrinsics/vst1q_f16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_s16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_s8.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_u16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_u8.c: New test.

libgomp: adjust nvptx_free callback context checking

Change test for CUDA callback context in nvptx_free() from using
GOMP_PLUGIN_acc_thread () into checking for CUDA_ERROR_NOT_PERMITTED,
for the former only works for OpenACC, but not OpenMP offloading.

2020-08-20  Chung-Lin Tang  <cltang@codesourcery.com>

libgomp/
* plugin/plugin-nvptx.c (nvptx_free):
Change "GOMP_PLUGIN_acc_thread () == NULL" test into check of
CUDA_ERROR_NOT_PERMITTED status for cuMemGetAddressRange. Adjust
comments.

Fortran: Fix OpenMP's 'if(simd:' etc. conditions

gcc/fortran/ChangeLog:

* openmp.c (gfc_match_omp_clauses): Re-order 'if' clause pasing
to avoid creating spurious symbols.

libgomp/ChangeLog:

* testsuite/libgomp.fortran/lastprivate-conditional-10.f90: New test.

testsuite: Remove test for arm32 in arm_soft_ok

There is no reason to check for arm32 when checking for
-mfloat=abi-soft support. Instead this implies skipping some tests
when targetting a thumb-1 cpu, while they pass.

This patch removes the arm32 check, and uses the same skeleton as
arm_softfp_ok and arm_hard_ok.

2020-08-20  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/testsuite/
* lib/target-supports.exp (arm_soft_ok): Remove arm32 check.

testsuite: Skip arm/pure-code tests for arm*-*-uclinuxfdpiceabi

FDPIC it uses PIC code, which is incompatible with -mpure-code, so we
want to skip these tests for arm*-*-uclinuxfdpiceabi.

This patch also fixes a typo where the final closing bracket was
commented out.

2020-08-20  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/testsuite/
* gcc.target/arm/pure-code/pure-code.exp: Skip for
arm*-*-uclinuxfdpiceabi. Fix missing closing bracket.

Fortran  : rejected f0.d edit descriptor PR96436

Zero length f format descriptors are valid for Fortran 95 and
later.  For g format descriptors from Fortran 2008 and later.
Finally for D, E, EN and ES for Fortran 2018 and later.

2020-08-20  Mark Eggleston  <markeggleston@gcc.gnu.org>

libgfortran/

PR fortran/96436
* io/format.c (parse_format_list):  Add new local variable
"standard" to hold the required standard to check. If the
format width is zero select standard depending on descriptor.
Call notification_std using the new standard variable.

2020-08-20  Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/testsuite/

PR fortran/96436
* gfortran.dg/pr96436_1.f90: New test.
* gfortran.dg/pr96436_2.f90: New test.
* gfortran.dg/pr96436_3.f90: New test.
* gfortran.dg/pr96436_4.f90: New test.
* gfortran.dg/pr96436_5.f90: New test.
* gfortran.dg/pr96436_6.f90: New test.
* gfortran.dg/pr96436_7.f90: New test.
* gfortran.dg/pr96436_8.f90: New test.
* gfortran.dg/pr96436_9.f90
* gfortran.dg/pr96436_10.f90

analyzer: fix ICE on vector comparisons [PR96713]

gcc/analyzer/ChangeLog:
PR analyzer/96713
* region-model.cc (region_model::get_gassign_result): For
comparisons, only use eval_condition when the lhs has boolean
type, and use get_or_create_constant_svalue on the boolean
constants directly rather than via get_rvalue.

gcc/testsuite/ChangeLog:
PR analyzer/96713
* gcc.dg/analyzer/pr96713.c: New test.

Daily bump.

c++: Check satisfaction before non-dep convs. [CWG2369]

It's very hard to use concepts to protect a template from hard errors due to
unwanted instantiation if constraints aren't checked until after doing all
substitution and checking of non-dependent conversions.

It was pretty straightforward to insert the satisfaction check into the
logic, but I needed to make the 3-parameter version of
satisfy_declaration_constraints call push_tinst_level like the 2-parameter
version already does.  For simplicity, I also made it add any needed outer
template arguments from the TEMPLATE_DECL to the args.

The testsuite changes are mostly because this change causes unsatisfaction
to cause deduction to fail rather than reject the candidate later in
overload resolution.

gcc/cp/ChangeLog:

DR 2369
* cp-tree.h (push_tinst_level, push_tinst_level_loc): Declare.
* constraint.cc (satisfy_declaration_constraints):
Use add_outermost_template_args and push_tinst_level.
* pt.c (add_outermost_template_args): Handle getting
a TEMPLATE_DECL as the first argument.
(push_tinst_level, push_tinst_level_loc): No longer static.
(fn_type_unification): Check satisfaction before non-dependent
conversions.

gcc/testsuite/ChangeLog:

DR 2369
* g++.dg/concepts/diagnostic10.C: Adjust expexcted errors.
* g++.dg/concepts/diagnostic13.C: Adjust expexcted errors.
* g++.dg/concepts/diagnostic2.C: Adjust expexcted errors.
* g++.dg/concepts/diagnostic3.C: Adjust expexcted errors.
* g++.dg/concepts/diagnostic4.C: Adjust expexcted errors.
* g++.dg/concepts/diagnostic5.C: Adjust expexcted errors.
* g++.dg/concepts/diagnostic9.C: Adjust expexcted errors.
* g++.dg/concepts/expression2.C: Adjust expexcted errors.
* g++.dg/concepts/fn5.C: Adjust expexcted errors.
* g++.dg/concepts/placeholder5.C: Adjust expexcted errors.
* g++.dg/concepts/pr67595.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts-pr78752-2.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts-pr84140.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts-recursive-sat3.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts-requires18.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts-requires19.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts3.C: Adjust expexcted errors.
* g++.dg/cpp2a/concepts-nondep1.C: New test.
* g++.dg/cpp2a/concepts-nondep1a.C: New test.

libstdc++: Make make-unsigned-like-t<__int128> work [PR 96042]

As well as ensuring that numeric_limits<__int128> is defined, we need to
ensure that make-unsigned-like-t and to-unsigned-like work correctly for
128-bit integers in strict mode. This ensures that a subrange created
from an iota_view's iterator and sentinel can represent its size.

Co-authored-by: Patrick Palka <ppalka@redhat.com>
libstdc++-v3/ChangeLog:

2020-08-19  Jonathan Wakely  <jwakely@redhat.com>
    Patrick Palka  <ppalka@redhat.com>

PR libstdc++/96042
* include/bits/range_access.h (__detail::__to_unsigned_like):
Do not use make_unsigned_t<T> in the return type, as it can
result in an error before the integral<T> constraint is checked.
[__STRICT_ANSI__]: Add overloads for 128-bit integer types.
(__detail::__make_unsigned_like_t): Define as the return type
of __to_unsigned_like.
* testsuite/std/ranges/subrange/96042.cc: New test.

analyzer: fix ICE on deref_rvalue on SK_COMPOUND [PR96643]

gcc/analyzer/ChangeLog:
PR analyzer/96643
* region-model.cc (region_model::deref_rvalue): Rather than
attempting to handle all svalue kinds in the switch, only cover
the special cases, and move symbolic-region handling to after
the switch, thus implicitly handling the missing case SK_COMPOUND.

gcc/testsuite/ChangeLog:
PR analyzer/96643
* g++.dg/analyzer/pr96643.C: New test.

analyzer: fix ICE on folding vector 0 [PR96705]

gcc/analyzer/ChangeLog:
* region-model-manager.cc
PR analyzer/96705
(region_model_manager::maybe_fold_binop): Check that we have an
integral type before calling build_int_cst.

gcc/testsuite/ChangeLog:
PR analyzer/96705
* gcc.dg/analyzer/pr96705.c: New test.

analyzer: fix ICE converting float to int [PR96699]

gcc/analyzer/ChangeLog:
PR analyzer/96699
* region-model-manager.cc
(region_model_manager::get_or_create_cast): Use FIX_TRUNC_EXPR for
casting from REAL_TYPE to INTEGER_TYPE.

gcc/testsuite/ChangeLog:
PR analyzer/96699
* gcc.dg/analyzer/pr96699.c: New test.

rs6000, restrict bfloat convert intrinsic to Power 10. Fix BU_P10V macro definitions.

gcc/ChangeLog

    2020-08-19  Carl Love  <cel@us.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
(BU_P10V_4): Remove.
(BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
New definitions for Power 10 Altivec macros.
(VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
expansion BU_P10V_1 with BU_P10V_AV_1.
(VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
BU_P10V_2 with BU_P10V_AV_2.
(VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
BU_P10V_3 with BU_P10V_AV_3.
(VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
BU_P10V_1 with BU_P10V_AV_1.
(XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
(VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
expansion BU_P10V_3 with BU_P10V_VSX_3.
(XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
(XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
BU_P10V_VSX_1. Also change MISC to CONST.
* config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
P10V_BUILTIN_VXXPERMX.
(P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
P10_BUILTIN_XVTLSBB_ONES): Replace with
P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
P10V_BUILTIN_XVTLSBB_ONES respectively.
* config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
P10V_BUILTIN_name.
(P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.

rs6000: Enable more sibcalls when TOC is not preserved

A function compiled with the PC-relative addressing model does not
require r2 to contain a TOC pointer, and does not guarantee that r2
will be preserved for its caller.  Such a function can make sibcalls
without restriction based on TOC preservation rules.  However, a
caller that does preserve r2 cannot make a sibcall to a callee that
does not.

2020-08-19  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
* config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
Sibcalls are always legal when the caller doesn't preserve r2.

gcc/testsuite/
* gcc.target/powerpc/pcrel-sibcall-1.c: Adjust.

libstdc++: Remove deprecated comparison operators for RB trees

These functions were deprecated in GCC 9.1.0 because they are never used
by the library. This patch removes them for GCC 11.

libstdc++-v3/ChangeLog:

* include/bits/stl_tree.h (operator!=, operator>, operator<=)
(operator>=): Remove deprecated functions.

libstdc++: Make __int128 meet integer-class requirements [PR 96042]

Because __int128 can be used as the difference type for iota_view, we
need to ensure that it meets the requirements of an integer-class type.
The requirements in [iterator.concept.winc] p10 include numeric_limits
being specialized and giving meaningful answers. Currently we only
specialize numeric_limits for non-standard integer types in non-strict
modes.  However, nothing prevents us from defining an explicit
specialization for any implementation-defined type, so it doesn't matter
whether std::is_integral<__int128> is true or not.

This patch ensures that the numeric_limits specializations for signed
and unsigned __int128 are defined whenever __int128 is available. It
also makes the __numeric_traits and __int_limits helpers work for
__int128, via a new __gnu_cxx::__is_integer_nonstrict trait.

libstdc++-v3/ChangeLog:

PR libstdc++/96042
* include/ext/numeric_traits.h (__is_integer_nonstrict): New
trait which is true for 128-bit integers even in strict modes.
(__numeric_traits_integer, __numeric_traits): Use
__is_integer_nonstrict instead of __is_integer.
* include/std/limits [__STRICT_ANSI__ && __SIZEOF_INT128__]
(numeric_limits<__int128>, (numeric_limits<unsigned __int128>):
Define.
* testsuite/std/ranges/iota/96042.cc: New test.

i386: Use code_for_ instead of gen_ for parameterized names more.

Some builtins are better expanded to patterns with
parametrized names via code_for_ than gen_ helpers.

No functional changes.

2020-08-19  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:

* config/i386/i386-expand.c (ix86_expand_builtin)
[case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
Rewrite expansion to use code_for_enqcmd.
[case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
Rewrite expansion to use code_for_wrss.
[case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
Rewrite expansion to use code_for_wrss.

tree-optimization/94234 - add pattern for ptr-diff on addresses with same offset

2020-08-19  Feng Xue  <fxue@os.amperecomputing.com>

gcc/
PR tree-optimization/94234
* match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
simplification.

gcc/testsuite/
PR tree-optimization/94234
* gcc.dg/pr94234-1.c: New test.

libstdc++: Mention new macros in comments

libstdc++-v3/ChangeLog:

* include/bits/c++config (_GLIBCXX_DEPRECATED_SUGGEST)
(_GLIBCXX11_DEPRECATED, _GLIBCXX11_DEPRECATED_SUGGEST)
(_GLIBCXX17_DEPRECATED_SUGGEST, _GLIBCXX20_DEPRECATED_SUGGEST):
Add new macros to comment.

libstdc++: integer-class types as per [iterator.concept.winc]

This implements signed and unsigned integer-class types, whose width is
one bit larger than the widest supported signed and unsigned integral
type respectively.  In our case this is either __int128 and unsigned
__int128, or long long and unsigned long long.

Internally, the two integer-class types are represented as a largest
supported unsigned integral type plus one extra bit.  The signed
integer-class type is represented in two's complement form with the
extra bit acting as the sign bit.

libstdc++-v3/ChangeLog:

* include/Makefile.am (bits_headers): Add new header
<bits/max_size_type.h>.
* include/Makefile.in: Regenerate.
* include/bits/iterator_concepts.h
(ranges::__detail::__max_diff_type): Remove definition, replace
with forward declaration of class __max_diff_type.
(__detail::__max_size_type): Remove definition, replace with
forward declaration of class __max_size_type.
(__detail::__is_unsigned_int128, __is_signed_int128)
(__is_int128): New concepts.
(__detail::__is_integer_like): Accept __int128 and unsigned
__int128.
(__detail::__is_signed_integer_like): Accept __int128.
* include/bits/max_size_type.h: New header.
* include/bits/range_access.h: Include <bits/max_size_type.h>.
(__detail::__to_unsigned_like): Two new overloads.
* testsuite/std/ranges/iota/difference_type.cc: New test.
* testsuite/std/ranges/iota/max_size_type.cc: New test.

x86: Detect Rocket Lake and Alder Lake

From arch/x86/include/asm/intel-family.h on Linux kernel master branch:

 #define INTEL_FAM6_ROCKETLAKE           0xA7
 #define INTEL_FAM6_ALDERLAKE            0x97

* common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
Lake and Alder Lake.

libstdc++: Add deprecated attributes to old iostream members

Back in 2017 I removed these prehistoric members (which were deprecated
since C++98) for C++17 mode. But I didn't add deprecated attributes to
most of them, so users didn't get any warning they would be going away.
Apparently some poor souls do actually use some of these names, and so
now that GCC 11 defaults to -std=gnu++17 some code has stopped
compiling.

This adds deprecated attributes to them, so that C++98/03/11/14 code
will get a warning if it uses them. I'll also backport this to the
release branches so that users can find out about the deprecation before
they start using C++17.

In order to give deprecated warnings even in C++98 mode this patch makes
_GLIBCXX_DEPRECATED work even for C++98, adds _GLIBCXX11_DEPRECATED for
the old meaning of _GLIBCXX_DEPRECATED, and adds new macros such as
_GLIBCXX_DEPRECATED_SUGGEST for suggesting alternatives to deprecated
features.

libstdc++-v3/ChangeLog:

* include/bits/c++config (_GLIBCXX_DEPRECATED): Define for all
standard modes.
(_GLIBCXX_DEPRECATED_SUGGEST): New macro for "use 'foo' instead"
message in deprecated warnings.
(_GLIBCXX11_DEPRECATED, _GLIBCXX11_DEPRECATED_SUGGEST): New
macros for marking features derpecated in C++11.
(_GLIBCXX17_DEPRECATED_SUGGEST, _GLIBCXX20_DEPRECATED_SUGGEST):
New macros.
* include/backward/auto_ptr.h (auto_ptr_ref, auto_ptr<void>):
Use _GLIBCXX11_DEPRECATED instead of _GLIBCXX_DEPRECATED.
(auto_ptr): Use _GLIBCXX11_DEPRECATED_SUGGEST.
* include/backward/binders.h (binder1st, binder2nd): Likewise.
* include/bits/ios_base.h (io_state, open_mode, seek_dir)
(streampos, streamoff): Use _GLIBCXX_DEPRECATED_SUGGEST.
* include/std/streambuf (stossc): Replace C++11 attribute
with _GLIBCXX_DEPRECATED_SUGGEST.
* include/std/type_traits (__is_nullptr_t): Use
_GLIBCXX_DEPRECATED_SUGGEST instead of _GLIBCXX_DEPRECATED.
* testsuite/27_io/types/1.cc: Check for deprecated warnings.
Also check for io_state, open_mode and seek_dir typedefs.

libstdc++: assert that type traits are not misused with incomplete types [PR 71579]

libstdc++-v3/ChangeLog:

2020-08-19  Antony Polukhin  <antoshkka@gmail.com>

PR libstdc++/71579
* include/std/type_traits (invoke_result, is_nothrow_invocable_r)
Add static_asserts to make sure that the argument of the type
trait is not misused with incomplete types.
(is_swappable_with, is_nothrow_swappable_with): Add static_asserts
to make sure that the first and second arguments of the type trait
are not misused with incomplete types.
* testsuite/20_util/invoke_result/incomplete_neg.cc: New test.
* testsuite/20_util/is_nothrow_invocable/incomplete_neg.cc: New test.
* testsuite/20_util/is_nothrow_swappable/incomplete_neg.cc: New test.
* testsuite/20_util/is_nothrow_swappable_with/incomplete_neg.cc: New
test.
* testsuite/20_util/is_swappable_with/incomplete_neg.cc: New test.

AArch64: Remove "fndecl && TREE_PUBLIC (fndecl)" in aarch64_init_cumulative_args

This check will prevent the function type check of static funtion or calling
via a funtion pointer. The function type should be checked no matter if the
function has external linkage.

gcc/ChangeLog:

* config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
"fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
type check when calling via a function pointer or when calling a static
function.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/mgeneral-regs_7.c: New test.

testsuite: require c99 runtime for trigonometric optimisation tests

A number of optimisation that simplify trigonometric expressions are only
performed when the compiler knows the target has a C99 libm available.
Since targets like *-elf may not have such a libm, a C99 runtime requirement
is added to these tests.

2020-08-19  Pat Bernardi  <bernardi@adacore.com>

gcc/testsuite/ChangeLog

* gcc.dg/sinatan-2.c: Add dg-require-effective-target c99_runtime.
* gcc.dg/sinhovercosh-1.c: Likewise.
* gcc.dg/tanhbysinh.c: Likewise.

[testsuite, nvptx] Add effective target sync_int_long_stack

The nvptx target currently doesn't support effective target sync_int_long,
although it has support for 32-bit and 64-bit atomic.

When enabling sync_int_long for nvptx, we run into a failure in
gcc.dg/pr86314.c:
...
 nvptx-run: error getting kernel result: operation not supported on \
   global/shared address space
...
due to a ptx restriction:  accesses to local memory are illegal, and the
test-case does an atomic operation on a stack address, which is mapped to
local memory.

Fix this by adding a target sync_int_long_stack, wich returns false for nvptx,
which can be used to mark test-cases that require sync_int_long support for
stack addresses.

Build on nvptx and tested with make check-gcc.

gcc/testsuite/ChangeLog:

PR target/96494
* lib/target-supports.exp (check_effective_target_sync_int_long):
Return 1 for nvptx.
(check_effective_target_sync_int_long_stack): New proc.
* gcc.dg/pr86314.c: Require effective target sync_int_long_stack.

options: Make --help= see overridden values

Options "-Q --help=params" don't show the final values after
target option overriding, instead it emits the default values
in params.opt (without any explicit param settings).

This patch makes it see overridden values.

gcc/ChangeLog:

* opts-global.c (decode_options): Call target_option_override_hook
before it prints for --help=*.

analyzer: consider initializers for globals [PR96651]

PR analyzer/96651 reports a false positive in which a global
that can't have been touched yet is checked in "main".  The analyzer
fails to reject code paths in which the initial value of the global
makes the path condition impossible.

This patch detects cases where the code path begins at the entrypoint
of "main", and extracts values from initializers for globals that
can't have been touched yet, rather than using a symbolic
"INIT_VAL(REG)", fixing the false positive.

gcc/analyzer/ChangeLog:
PR analyzer/96651
* region-model.cc (region_model::called_from_main_p): New.
(region_model::get_store_value): Move handling for globals into...
(region_model::get_initial_value_for_global): ...this new
function, and add logic for extracting values from decl
initializers.
* region-model.h (decl_region::get_svalue_for_constructor): New
decl.
(decl_region::get_svalue_for_initializer): New decl.
(region_model::called_from_main_p): New decl.
(region_model::get_initial_value_for_global): New.
* region.cc (decl_region::maybe_get_constant_value): Move logic
for getting an svalue from a CONSTRUCTOR node to...
(decl_region::get_svalue_for_constructor): ...this new function.
(decl_region::get_svalue_for_initializer): New.
* store.cc (get_svalue_for_ctor_val): Rewrite in terms of
region_model::get_rvalue.
* store.h (binding_cluster::get_map): New accessor.

gcc/testsuite/ChangeLog:
PR analyzer/96651
* gcc.dg/analyzer/pr96651-1.c: New test.
* gcc.dg/analyzer/pr96651-2.c: New test.

analyzer: fix ICE with negative bit offsets [PR96648]

PR analyzer/96648 reports an ICE within get_field_at_bit_offset due
to a negative bit offset, arising due to pointer arithmetic.

This patch replaces an assertion with handling for this case, fixing the
ICE.

gcc/analyzer/ChangeLog:
PR analyzer/96648
* region.cc (get_field_at_bit_offset): Gracefully handle negative
values for bit_offset.

gcc/testsuite/ChangeLog:
PR analyzer/96648
* gcc.dg/analyzer/pr96648.c: New test.

Daily bump.

c++: alias template template_info setting

During the construction of alias templates we can alter its
template_info.  This is really weird, because that's morally immutable
data.  In this case it's ok, but let's not create a duplicate
template_info, and add asserts to make sure it is changing in exactly
the way we expect.

gcc/cp/
* cp-tree.h (SET_TYPE_TEMPLTE_INFO): Do not deal with ALIAS templates.
* pt.c (lookup_template_class_1): Special-case alias template
template_info setting.

rs6000: Rename instruction xvcvbf16sp to xvcvbf16spn

The xvcvbf16sp mnemonic, which was just added in ISA 3.1 has been renamed
to xvcvbf16spn, to make it consistent with the other non-signaling conversion
instructions which all end with "n".  The only use of this instruction is in
an MMA conversion built-in function, so there is little to no compatibility
issue.

gcc/
* config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
xvcvbf16spn.
* config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
* config/rs6000/vsx.md: Likewise.
* doc/extend.texi: Likewise.

gcc/testsuite/
* gcc.target/powerpc/mma-builtin-3.c: Rename xvcvbf16sp to xvcvbf16spn.

aix: Support libsupc++ as a FAT library

Build libstdc++++ static library libsupc++.a as a FAT 32/64 bit library.

libstdc++-v3/ChangeLog:

2020-08-18  David Edelsohn  <dje.gcc@gmail.com>
    Clement Chigot  <clement.chigot@atos.net>

* config/os/aix/t-aix: Add complementary mode object files to
libsupc++.a

c++: Rewrite members for all deduction guides. [PR96199]

After the last patch, it occurred to me that we could run into the
specialization issue with non-alias deduction guides as well, so this patch
extends the rewriting to C++17 mode.

Doing this revealed that we weren't properly pushing into class scope for
normalization.

gcc/cp/ChangeLog:

PR c++/96199
* pt.c (tsubst_aggr_type): Rewrite in C++17, too.
(maybe_dependent_member_ref): Likewise.
(build_deduction_guide): Re-substitute template parms.
* cp-tree.h (struct push_nested_class_guard): New.
* constraint.cc (get_normalized_constraints_from_decl): Use it.

gcc/testsuite/ChangeLog:

PR c++/96199
* g++.dg/cpp1z/class-deduction-spec1.C: New test.

c++: Handle enumerator in C++20 alias CTAD. [PR96199]

To form a deduction guide for an alias template, we substitute the template
arguments from the pattern into the deduction guide for the underlying
class.  In the case of B(A1<X>), that produces B(A1<B<T,1>::X>) -> B<T,1>.
But since an enumerator doesn't have its own template info, and B<T,1> is a
dependent scope, trying to look up B<T,1>::X fails and we crash.  So we need
to produce a SCOPE_REF instead.

And trying to use the members of the template class is wrong for other
members, as well, as it gives a nonsensical result if the class is
specialized.

gcc/cp/ChangeLog:

PR c++/96199
* pt.c (maybe_dependent_member_ref): New.
(tsubst_copy) [CONST_DECL]: Use it.
[VAR_DECL]: Likewise.
(tsubst_aggr_type): Handle nested type.

gcc/testsuite/ChangeLog:

PR c++/96199
* g++.dg/cpp2a/class-deduction-alias4.C: New test.

PR fortran/96613,96686 - Fix type/kind issues, temporaries evaluating MIN/MAX

When evaluating functions of the MIN/MAX variety inline, use a temporary
of appropriate type and kind, and convert to the result type at the end.
In the case of allowing for the GNU extensions to MIN/MAX, derive the
result kind consistently during simplificaton.

Furthermore, the Fortran standard requires type and kind of arguments to
the MIN/MAX intrinsics to all have the same type and kind.  While a GNU
extension accepts kind differences for integer and real arguments which
seems to have been used in legacy code, there is no reason to allow
different character kinds.  We now reject the latter unconditionally.

gcc/fortran/ChangeLog:

* check.c (check_rest): Reject MIN/MAX character arguments of
different kind.
* simplify.c (min_max_choose): The simplification result shall
have the highest kind value of the arguments.
* trans-intrinsic.c (gfc_conv_intrinsic_minmax): Choose type and
kind of intermediate by looking at all arguments, not the result.

gcc/testsuite/ChangeLog:

* gfortran.dg/minmax_char_3.f90: New test.
* gfortran.dg/min_max_kind.f90: New test.
* gfortran.dg/pr96613.f90: New test.

rs6000: unaligned VSX in memcpy/memmove expansion

This patch adds a few new instructions to inline expansion of
memcpy/memmove. Generation of all these are controlled by
the option -mblock-ops-unaligned-vsx which is set on by default if the
target has TARGET_EFFICIENT_UNALIGNED_VSX.
 * unaligned vsx load/store (V2DImode)
 * unaligned vsx pair load/store (POImode) which is also controlled
   by -mblock-ops-vector-pair in case it is not wanted at some point.
   The default for -mblock-ops-vector-pair is for it to be on if the
   target has TARGET_MMA and TARGET_EFFICIENT_UNALIGNED_VSX. This is
   redundant, but nice for the future to clearly specify what is
   required.
 * unaligned vsx lxvl/stxvl but generally only to do the remainder
   of a copy/move we stated with some vsx loads/stores, and also prefer
   to use lb/lh/lw/ld if the remainder is 1/2/4/8 bytes.

Testing of this is actually accomplished by gcc.dg/memcmp-1.c which does
two memcpy() for each memcmp(). If the memcpy() calls don't do the right
thing then the memcmp() will fail unexpectedly.

gcc/ChangeLog:

* config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
Helper function.
(expand_block_move): Add lxvl/stxvl, vector pair, and
unaligned VSX.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Default value for -mblock-ops-vector-pair.
* config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.

Decouple adjust_range_from_scev from vr_values and value_range_equiv.

gcc/ChangeLog:

* vr-values.c (check_for_binary_op_overflow): Change type of store
to range_query.
(vr_values::adjust_range_with_scev): Abstract most of the code...
(range_of_var_in_loop): ...here.  Remove value_range_equiv uses.
(simplify_using_ranges::simplify_using_ranges): Change type of store
to range_query.
* vr-values.h (class range_query): New.
(class simplify_using_ranges): Use range_query.
(class vr_values): Add OVERRIDE to get_value_range.
(range_of_var_in_loop): New.

PR middle-end/96665 - memcmp of a constant string not folded

Related:
PR middle-end/78257 - missing memcmp optimization with constant arrays

gcc/ChangeLog:

PR middle-end/96665
PR middle-end/78257
* expr.c (convert_to_bytes): Replace statically allocated buffer with
a dynamically allocated one of sufficient size.

gcc/testsuite/ChangeLog:

PR middle-end/96665
PR middle-end/78257
* gcc.dg/memcmp-5.c: New test.

Fix PR tree-optimization/96670 - ICE on memchr with an empty initializer.

gcc/ChangeLog:

PR tree-optimization/96670
PR middle-end/78257
* gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
to get it, not string_constant.

gcc/testsuite/ChangeLog:

PR tree-optimization/96670
* gcc.dg/memchr-2.c: New test.
* gcc.dg/memcmp-6.c: New test.

doc: add return type for functions in gimple.texi

gcc/
* doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
(gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.

Update native_encode_expr description.

gcc/ChangeLog:
* fold-const.c (native_encode_expr): Update comment.

i386: Rewrite restore_stack_nonlocal expander [PR96536].

-fcf-protection code in restore_stack_nonlocal uses a branch based on
a clobber result.  The patch adds missing compare and completely
rewrites the expander to use high-level functions in RTL construction.

2020-08-18  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:

PR target/96536
* config/i386/i386.md (restore_stack_nonlocal): Add missing compare
RTX.  Rewrite expander to use high-level functions in RTL construction.

libstdc++: Add "cold" to tests for reserved attribute names

libstdc++-v3/ChangeLog:

* testsuite/17_intro/headers/c++1998/all_attributes.cc: Check
"cold" isn't used in the library. Also check <cxxabi.h>.
* testsuite/17_intro/headers/c++2011/all_attributes.cc:
Likewise.
* testsuite/17_intro/headers/c++2014/all_attributes.cc:
Likewise.
* testsuite/17_intro/headers/c++2017/all_attributes.cc:
Likewise.
* testsuite/17_intro/headers/c++2020/all_attributes.cc:
Likewise.

New tests for PR rtl-optimization/96298.

Tests to confirm PR rtl-optimization is now fixed, remains so.

2020-08-18  Roger Sayle  <roger@nextmovesoftware.com>
    Zdenek Sojka  <zsojka@seznam.cz>

gcc/testsuite/ChangeLog
PR rtl-optimization/96298
* gcc.dg/pr96298.c: New test.
* gcc.target/i386/pr96298.c: New test.

libstdc++: Remove redundant copying of std::async arguments [PR 69724]

As was previously done for std::thread, this removes an unnecessary copy
of an rvalue of type thread::_Invoker. Instead of creating the rvalue
and then moving that into the shared state, the member of the shared
state is initialized directly from the forwarded callable and bound
arguments.

This also slightly simplifies std::thread creation to remove the
_S_make_state helper function.

libstdc++-v3/ChangeLog:

PR libstdc++/69724
* include/std/future (__future_base::_S_make_deferred_state)
(__future_base::_S_make_async_state): Remove.
(__future_base::_Deferred_state): Change constructor to accept a
parameter pack of arguments and forward them to the call
wrapper.
(__future_base::_Async_state_impl): Likewise. Replace lambda
expression with a named member function.
(async): Construct state object directly from the arguments,
instead of using thread::__make_invoker, _S_make_deferred_state
and _S_make_async_state. Move shared state into the returned
future.
* include/std/thread (thread::_Call_wrapper): New alias
template for use by constructor and std::async.
(thread::thread(Callable&&, Args&&...)): Create state object
directly instead of using _S_make_state.
(thread::__make_invoker, thread::__decayed_tuple)
(thread::_S_make_state): Remove.
* testsuite/30_threads/async/69724.cc: New test.

c++: Move hidden-lambda entity lookup checking

Hidden lambda entities only occur in block and class scopes.  There's
no need to check for them on every lookup.  So moving that particular
piece of validation to lookup_name_1, which cares.  Also reordered the
namespace and type checking, as that is also simpler.

gcc/cp/
* name-lookup.c (qualify_lookup): Drop lambda checking here.
Reorder namespace & type checking.
(lookup_name_1): Do hidden lambda checking here.

d: Fix ICE Segmentation fault during RTL pass: expand on armhf/armel/s390x

gcc/d/ChangeLog:

PR d/96301
* decl.cc (DeclVisitor::visit (FuncDeclaration *)): Only return
non-trivial structs by invisible reference.

gcc/testsuite/ChangeLog:

PR d/96301
* gdc.dg/pr96301a.d: New test.
* gdc.dg/pr96301b.d: New test.
* gdc.dg/pr96301c.d: New test.

Don't use pinsr/pextr for struct initialization/extraction.

gcc/
PR target/96562
PR target/93897
* config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
pinsr for TImode.
(ix86_expand_pextr): Don't use pextr for TImode.

gcc/testsuite/
* gcc.target/i386/pr96562-1.c: New test.

c: Fix -Wunused-but-set-* warning with _Generic [PR96571]

The following testcase shows various problems with -Wunused-but-set*
warnings and _Generic construct.  I think it is best to treat the selector
and the ignored expressions as (potentially) read, because when they are
parsed, the vars in there are already marked as TREE_USED.

2020-08-18  Jakub Jelinek  <jakub@redhat.com>

PR c/96571
* c-parser.c (c_parser_generic_selection): Change match_found from bool
to int, holding index of the match.  Call mark_exp_read on the selector
expression and on expressions other than the selected one.

* gcc.dg/Wunused-var-4.c: New test.

Adjust testcase.

Since This testcase is used to check generation of AVX512 vector
comparison, scan-assembler for vmov instruction could be deleted, also
-mprefer-vector-width=512 is added to avoid impact of different
default arch/tune of GCC.

gcc/testsuite
PR target/96574
* gcc.target/i386/pr92865-1.c: Adjust testcase.

analyzer: fix name of local in region_model::get_rvalue_1

gcc/analyzer/ChangeLog:
* region-model.cc (region_model::get_rvalue_1): Fix name of local.

analyzer: fix ICE on unhandled tree codes in get_rvalue_1 [PR96641]

The old implementation of region_model::get_rvalue_1 gracefully handled
tree codes it didn't understand, returning "UNKNOWN", whereas the new
implementation (r11-2694-g808f4dfeb3a95f50f15e71148e5c1067f90a126d) had
an assertion left over from development, leading to ICEs.

This patch restores the old behavior for these cases.

gcc/analyzer/ChangeLog:
PR analyzer/96641
* region-model.cc (region_model::get_rvalue_1): Handle
unrecognized tree codes by returning "UNKNOWN.

gcc/testsuite/ChangeLog:
PR analyzer/96641
* g++.dg/analyzer/pr96641.C: New test.