Kenneth Graunke [Mon, 24 Nov 2014 07:46:39 +0000 (23:46 -0800)]
i965: Make precompile functions accessible from C.
Previously, the prototypes for brw_vs/gs/fs_precompile were scattered
between brw_vs.h (C), brw_gs.h (C), and brw_fs.h (C++ only). Also,
brw_fs_precompile had C++ linkage, while the others were C.
This patch moves all the prototypes to a central location (brw_shader.h)
and makes brw_fs_precompile have C linkage.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 24 Nov 2014 07:26:00 +0000 (23:26 -0800)]
i965: Pass gl_program pointers into precompile functions.
We'd like to do precompiling for ARB vertex and fragment programs,
which only have gl_program structures - gl_shader_program is NULL.
This patch makes the various precompile functions take a gl_program
parameter directly, rather than accessing it via gl_shader_program.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 24 Nov 2014 07:08:10 +0000 (23:08 -0800)]
i965: Move brw->precompile checks out a level.
brw_shader_precompile should just do a precompile; it makes more sense
for the caller to decide whether we should do one. Simpler.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Roland Scheidegger [Mon, 24 Nov 2014 22:38:32 +0000 (23:38 +0100)]
llvmpipe: (trivial) remove redundant util_cpu_detect() call in lp_test_main
Already called earlier.
Roland Scheidegger [Mon, 24 Nov 2014 22:32:12 +0000 (23:32 +0100)]
llvmpipe: fix lp_test_arit denorm handling
llvmpipe disables denorms on purpose (on x86/sse only), because denorms are
generally neither required nor desired for graphic apis (and in case of d3d10,
they are forbidden).
However, this caused some arithmetic tests using denorms to fail on some
systems, because the reference did not generate the same results anymore.
(It did not fail on all systems - behavior of these math functions is sort
of undefined when called with non-standard floating point mode, hence the
result differing depending on implementation and in particular the sse
capabilities.)
So, for the reference, simply flush all (input/output) denorms manually
to zero in this case.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=67672.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Mon, 24 Nov 2014 23:22:25 +0000 (15:22 -0800)]
nouveau: Fix build after STR/BRA opcode dropping.
I missed these while git grepping for users of the dead opcodes. Sigh,
macros.
Eric Anholt [Thu, 13 Nov 2014 00:39:49 +0000 (16:39 -0800)]
mesa: Drop unused NV_fragment_program opcodes.
The extension itself was deleted 2 years ago. There are still some
prog_instruction opcodes from NV_fp that exist because they're used by
ir_to_mesa.cpp, though.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Roamnick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 13 Nov 2014 00:35:05 +0000 (16:35 -0800)]
mesa: Drop unused SFL/STR opcodes.
They're part of NV_vertex_program2, which I'm pretty sure we're never
going to support.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Roamnick <ian.d.romanick@intel.com>
Eric Anholt [Wed, 12 Nov 2014 22:23:59 +0000 (14:23 -0800)]
gallium: Drop the unused CND opcode.
Nothing in the tree generates it.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Wed, 12 Nov 2014 22:51:22 +0000 (14:51 -0800)]
gallium: Drop unused BRA opcode.
Never generated, and implemented in only nvfx vertprog.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Wed, 12 Nov 2014 22:36:19 +0000 (14:36 -0800)]
gallium: Drop the unused SFL/STR opcodes.
Nothing generated them.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Wed, 12 Nov 2014 22:32:13 +0000 (14:32 -0800)]
gallium: Drop the unused RFL opcode.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Wed, 12 Nov 2014 22:30:03 +0000 (14:30 -0800)]
gallium: Drop unused X2D opcode.
Nothing in the tree generates it.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Thu, 13 Nov 2014 18:08:02 +0000 (10:08 -0800)]
gallium: Drop the unused ARA opcode.
Nothing in the tree generated it.
v2: Only drop ARA, not ARR as well.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com> (v2)
Eric Anholt [Wed, 12 Nov 2014 21:27:49 +0000 (13:27 -0800)]
gallium: Drop the unused RCC opcode.
Nothing in the tree generated it.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Wed, 12 Nov 2014 21:13:59 +0000 (13:13 -0800)]
gallium: Drop the NRM and NRM4 opcodes.
They weren't generated in tree, and as far as I know all hardware had to
lower it to a DP, RSQ, MUL.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Anholt [Wed, 12 Nov 2014 21:40:50 +0000 (13:40 -0800)]
ilo: Drop the explicit intialization of gaps in TGSI opcodes.
The nice thing about the good way of initializing arrays like this is that
you don't need to initialize everything in order, or even everything at
all. Taking advantage of that only needs a tiny fixup to deal with the
default NULL value of the pointers.
I haven't dropped the initialization of opcodes that exist and are unsupported.
Eric Anholt [Wed, 12 Nov 2014 21:28:07 +0000 (13:28 -0800)]
r300: Drop the "/* gap */" notes.
This switch statement's code structure isn't dependent on the numbers of
the opcodes at all.
Eric Anholt [Wed, 12 Nov 2014 21:24:59 +0000 (13:24 -0800)]
r600: Drop the "/* gap */" notes.
These are obviously the gaps already, due to the bare numbers with
unsupported implementations.
This makes inserting new gaps less irritating.
Jose Fonseca [Thu, 20 Nov 2014 22:25:30 +0000 (14:25 -0800)]
nine: Drop use of TGSI_OPCODE_CND.
This was the only state tracker emitting it, and hardware was just having
to lower it anyway (or failing to lower it at all).
v2: Extracted from a larger patch by Jose (which also dropped DP2A), fixed
to actually not reference TGSI_OPCODE_CND. Change by anholt.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
Jose Fonseca [Thu, 20 Nov 2014 22:21:04 +0000 (14:21 -0800)]
nine: Don't reference the dead TGSI_OPCODE_NRM.
The translation is lowering it to not using TGSI_OPCODE_NRM, anyway.
v2: Extracted from a larger patch by Jose that also dropped DP2A usage.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
Eric Anholt [Thu, 20 Nov 2014 22:17:07 +0000 (14:17 -0800)]
nine: Don't use the otherwise-dead SFL opcode in an unreachable path.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
Matt Turner [Fri, 21 Nov 2014 23:07:57 +0000 (15:07 -0800)]
i965/gen6/gs: Don't declare a src_reg with struct.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Fri, 21 Nov 2014 23:04:02 +0000 (15:04 -0800)]
i965/disasm: Fix all32h/any32h predicate disassembly.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Fri, 21 Nov 2014 22:53:20 +0000 (14:53 -0800)]
glsl: Fix tautological comparison.
Caught by clang.
warning: comparison of constant -1 with expression of type
'ir_texture_opcode' is always false
[-Wtautological-constant-out-of-range-compare]
if (op == -1)
~~ ^ ~~
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Fri, 21 Nov 2014 22:29:41 +0000 (14:29 -0800)]
util: Prefer atomic intrinsics to inline assembly.
Cuts a little more than 1k of .text size from i915g.
This was previously done in commit
5f66b340 and subsequently reverted in
commit
3661f757 after bug 30514 was filed. I believe the cause of bug
30514 wasn't anything related to cross compiling, but rather that the
toolchain used defaulted to -march=i386, and i386 doesn't have the
CMPXCHG or XADD instructions used to implement the intrinsics.
So we reverted a patch that improved things so that we didn't break
compilation for a platform that never could have worked anyway.
Matt Turner [Fri, 21 Nov 2014 21:50:14 +0000 (13:50 -0800)]
util: Implement assume() for clang.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Matt Turner [Fri, 21 Nov 2014 20:20:53 +0000 (12:20 -0800)]
i965: Don't overwrite the math function with conditional mod.
Ben was asking about the undocumented restriction that the math
instruction cannot use the dependency control hints. I went to reconfirm
and disabled the is_math() check in opt_set_dependency_control() and saw
that the disassembled math instructions with dependency hints had a
bogus math function. We were mistakenly overwriting it by setting an
empty conditional mod.
Unfortunately, this wasn't the cause of the aforementioned problem (I
reproduced it). This bug is benign, since we don't set dependeny hints
on math instructions -- but maybe some day.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Fri, 21 Nov 2014 20:34:22 +0000 (12:34 -0800)]
i965: Assert that math instructions don't have conditional mod.
The math function field is at the same location as conditional mod.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Mon, 10 Nov 2014 22:23:27 +0000 (14:23 -0800)]
glsl: Remove unused ast copy constructors.
These were added in commits
a760c738 and
43757135 to be used in
implementing C-style aggregate initializers (commit
1b0d6aef). Paul
rewrote that code in commit
0da1a2cc to use GLSL types, rather than
AST types, leaving these copy constructors unused.
Tested by making them private and providing no definition.
Matt Turner [Sat, 19 Jul 2014 04:44:38 +0000 (21:44 -0700)]
glapi: Remove dead gl_offsets.py.
Dead since commit
07b85457.
Matt Turner [Sat, 19 Jul 2014 04:37:03 +0000 (21:37 -0700)]
glapi: Remove dead extension_helper.py.
Dead since commit
3d16088f.
Eric Anholt [Fri, 21 Nov 2014 03:44:15 +0000 (19:44 -0800)]
vc4: Fix some inconsistent indentation.
Eric Anholt [Fri, 21 Nov 2014 03:43:07 +0000 (19:43 -0800)]
vc4: Don't forget to actually connect the fence code.
I thought I'd tested this.
Eric Anholt [Fri, 21 Nov 2014 03:41:26 +0000 (19:41 -0800)]
vc4: Add a note about a piece of errata I've learned about.
Right now in my environment I've only got a small CMA area, so this
constraint ends up holding.
Chris Forbes [Mon, 24 Nov 2014 08:44:38 +0000 (21:44 +1300)]
mesa: Fix Get(GL_TRANSPOSE_CURRENT_MATRIX_ARB) to transpose
This was just returning the same value as GL_CURRENT_MATRIX_ARB.
Spotted while investigating something else in apitrace.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Tue, 18 Nov 2014 08:15:05 +0000 (21:15 +1300)]
glsl: Generate unique names for each const array lowered to uniforms
Uniform names (even for hidden uniforms) are required to be unique; some
parts of the compiler assume they can be looked up by name.
Fixes the piglit test: tests/spec/glsl-1.20/linker/array-initializers-1
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Tue, 18 Nov 2014 08:15:06 +0000 (21:15 +1300)]
i965: Handle nested uniform array indexing
When converting a uniform array reference to a pull constant load, the
`reladdr` expression itself may have its own `reladdr`, arbitrarily
deeply. This arises from expressions like:
a[b[x]] where a, b are uniform arrays (or lowered const arrays),
and x is not a constant.
Just iterate the lowering to pull constants until we stop seeing these
nested. For most shaders, there will be only one pass through this loop.
Fixes the piglit test:
tests/spec/glsl-1.20/linker/double-indirect-1.shader_test
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dave Airlie [Wed, 19 Nov 2014 00:17:35 +0000 (10:17 +1000)]
r600g: do all CUBE ALU operations before gradient texture operations (v2.1)
This moves all the CUBE section above the gradients section,
so that the gradient emission happens on one block which
is what sb/hardware expect.
v2: avoid changes to bytecode by using spare temps
v2.1: shame gcc, oh the shame. (uninit var warnings)
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 18 Nov 2014 22:46:03 +0000 (08:46 +1000)]
r600: fix texture gradients instruction emission (v2)
The piglit tests were failing, and it appeared to be SB
optimising out things, but Glenn pointed out the gradients
are meant to be clause local, so we should emit the texture
instructions in the same clause. This moves things around
to always copy to a temp and then emit the texture clauses
for H/V.
v2: Glenn pointed out we could get another ALU fetch in
the wrong place, so load the src gpr earlier as well.
Fixes at least:
./bin/tex-miplevel-selection textureGrad 2D
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 15 Nov 2014 20:43:22 +0000 (15:43 -0500)]
nv50,nvc0: buffer resources can be bound as other things down the line
res->bind is not an indicator of how the resource is currently bound.
buffers can be rebound across different binding points without changing
underlying storage.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Tue, 14 Oct 2014 03:50:17 +0000 (23:50 -0400)]
nv50,nvc0: actually check constbufs for invalidation
The number of vertex buffers has nothing to do with the number of bound
constbufs.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sun, 23 Nov 2014 17:17:26 +0000 (12:17 -0500)]
nv50/ir: set neg modifiers on min/max args
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=86618
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Chris Forbes [Sun, 23 Nov 2014 00:31:10 +0000 (13:31 +1300)]
mesa: Fix function name in GetActiveUniformName error
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Stéphane Marchesin [Sat, 22 Nov 2014 08:11:40 +0000 (00:11 -0800)]
i915g: Fallback copy_render for ZS formats
These don't work out of the box, need more work, maybe with a proxy
format?
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:11:21 +0000 (00:11 -0800)]
i915g: Add back 4444 and 5551 formats
Now that we have the transfers working, we can re-add those formats.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:10:50 +0000 (00:10 -0800)]
i915g: Don't limit blitter to POT textures
Now that we have NPOT support for u_blitter, there is no reason to
limit this any longer.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:10:23 +0000 (00:10 -0800)]
i915g: Align all texture dimensions to the next POT
This creates a usable layout for all NPOT textures. Of course these
still have lots of limitations, but at least we can render to a
level.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:10:00 +0000 (00:10 -0800)]
i915g: Fix typos
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:09:24 +0000 (00:09 -0800)]
i915g: Fix maxlod computation.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:08:56 +0000 (00:08 -0800)]
i915g: Fix offset for level != 0
For NPOT texture layouts, we want to be able to access texture levels
other than 0 directly. Since the hw doesn't support that, We do it by
adding the offset directly.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:08:24 +0000 (00:08 -0800)]
i915g: Don't write constants past I915_MAX_CONSTANT
This happens with glsl-convolution-1, where we have 64 constants. This
doesn't make the test pass (we don't have 64 constants anyway, only
32) but this prevents it from crashing.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Stéphane Marchesin [Sat, 22 Nov 2014 08:07:52 +0000 (00:07 -0800)]
i915g: Don't hardcode array size for phase count
This is an array of temp registers, so use I915_MAX_TEMPORARY for the size.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
David Heidelberg [Sat, 22 Nov 2014 04:29:00 +0000 (04:29 +0000)]
draw: allow LLVM use on non-SSE2 X86 cpus
This patch remove workaround related to LLVM < 3.2 bug.
Original bug has been closed as fixed in 2011.
At this moment gallium requires LLVM 3.3 (2013).
LLVM has been tested without SSE2 support in commit
ca70de9bd20bc4a11b2d2d368e0cc1f49527a947 and removed after requiring
LLVM 3.3 in commit
013ff2fae13da41c2f5619c4698b0a7b5aa6a06d
Original LLVM bug: http://llvm.org/bugs/show_bug.cgi?id=6960
Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Emil Velikov [Sat, 22 Nov 2014 04:26:06 +0000 (04:26 +0000)]
docs: add news item and link release notes for mesa 10.3.4
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 22 Nov 2014 03:51:18 +0000 (03:51 +0000)]
docs: Add sha256 sums for the 10.3.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
72c27d7a3acc40b8a77a277f7cd975fb8e60dca5)
Emil Velikov [Sat, 22 Nov 2014 03:31:01 +0000 (03:31 +0000)]
Add release notes for the 10.3.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
26c8ecd85dade7be5759c4de0b3916fbc186dc43)
Kenneth Graunke [Fri, 21 Nov 2014 08:55:11 +0000 (00:55 -0800)]
i965: Make Gen4-5 push constants call _mesa_load_state_parameters too.
In commit
5e37a2a4a8a, I made the pull constant code stop calling
_mesa_load_state_parameters() when there were no pull parameters.
This worked fine on Gen6+ because the push constant code also called
it if there were any push constants. However, the Gen4-5 push constant
code wasn't doing this. This patch makes it do so, like the Gen6+ code.
A better long term solution would be to make core Mesa just handle this
for us when necessary.
Fixes around 8766 Piglit tests on Ironlake, and probably Gen4 as well.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Ben Widawsky [Fri, 21 Nov 2014 18:47:41 +0000 (10:47 -0800)]
i965/vec4/gen8: Handle the MUL dest hazard exception
Fix one of the few cases where we can't reliable touch the destination hazard
bits. I am explicitly doing this patch individually so it is easy to backport. I
was tempted to do this patch before the previous patch which reorganized the
code, but I believe even doing that first, this is still easy to backport.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ben Widawsky [Fri, 21 Nov 2014 18:47:37 +0000 (10:47 -0800)]
i965/vec4: Extract depctrl hazards
Move this to a separate function so that we can begin to add other little
caveats without making too big a mess.
NOTE: There is some desire to improve this function eventually, but we need to
fix a bug first.
v2:
Use const for the inst for the hazard check (Matt)
Invert safe logic to get rid of the double negative (Matt)
Add PRM reference for predicates (Matt)
Add note about empirical evidence for math (Matt)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:09:10 +0000 (11:09 -0800)]
i965/fs: Remove is_valid_3src().
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:07:01 +0000 (11:07 -0800)]
i965/fs: Remove is_valid_3src() checks from emit_lrp.
The visitor emits MOVs to temporary registers for immediates, so these
never trigger. For further proof, check case ir_triop_fma.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:03:44 +0000 (11:03 -0800)]
i965/fs: Remove unused apply_stride().
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:01:16 +0000 (11:01 -0800)]
i965/fs: Move ip_record class to its one use.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:28:03 +0000 (11:28 -0800)]
i965: Move common fields into backend_instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Wed, 12 Nov 2014 19:28:02 +0000 (11:28 -0800)]
i965: Combine offset/texture_offset fields.
texture_offset was only used by some texturing operations, and offset
was only used by spill/unspill and some URB operations. These fields are
never used at the same time.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Marek Olšák [Thu, 20 Nov 2014 21:16:09 +0000 (22:16 +0100)]
radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodes
So far it has been compiled into pretty ugly code (8 instructions or so
for either opcode).
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Eric Anholt [Thu, 20 Nov 2014 01:39:04 +0000 (17:39 -0800)]
vc4: Update for new kernel ABI with async execution and waits.
Our submits now return immediately and you have to manually wait for
things to complete if you want to (like a normal driver).
Ville Syrjälä [Tue, 1 Jul 2014 23:23:20 +0000 (02:23 +0300)]
i915: Only use TEXCOORDTYPE_VECTOR with cube maps on gen2
Check that the target is GL_TEXTURE_CUBE_MAP before emitting
TEXCOORDTYPE_VECTOR texture coordinates.
I'm not sure if the hardware would like CARTESIAN coordinates
with cube maps, and as I'm too lazy to find out just emit the
VECTOR coordinates for cube maps always. For other targets use
CARTESIAN or HOMOGENOUS depending on the number of texture
coordinates provided.
Fixes rendering of the "electric" background texture in chromium-bsu
main menu. We appear to be provided with three texture coordinates
there (I'm guessing due to the funky texture matrix rotation it does).
So the code would decide to use TEXCOORDTYPE_VECTOR instead of
TEXCOORDTYPE_CARTESIAN even though we're dealing with a 2D texure.
The results weren't what one might expect.
demos/cubemap still works, which hopefully indicates that this doesn't
break things.
Also tested with:
bin/glean -o -v -v -v -t +texCube --quick
bin/cubemap -auto
from piglit.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ben Widawsky [Tue, 18 Nov 2014 20:20:10 +0000 (12:20 -0800)]
i965/disasm: Properly decode branch_ctrl (gen8+)
Add support for decoding the new branch control bit. I saw two things wrong with
the existing code.
1. It didn't bother trying to decode the bit.
- While we do not *intentionally* emit this bit today, I think it's interesting
to see if we somehow ended up with the bit set. It may also be useful in the
future.
2. It seemed to be the wrong bit.
- The docs are pretty poor wrt which bit this actually occupies. To me, it
/looks/ like it should be bit 28. I am not sure where Ken got 30 from. I
verified it should be 28 by looking at the simulator code.
I also added the most basic support for GOTO simply so we don't need to remember
to change the function in the future.
v2:
Move the branch_ctrl check out of the if gen >= 6 check to make it more
readable. (Matt)
ENDIF doesn't have branch_ctrl (Matt + Ken)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
José Fonseca [Wed, 19 Nov 2014 12:04:44 +0000 (12:04 +0000)]
rtasm,translate: Re-enable SSE on Mingw64.
This reverts
f4dd0991719ef3e2606920c5100b372181c60899.
The src/gallium/tests/unit/translate_test.c gives the same results on
MinGW 64-bits as on Linux 64-bits. And since MinGW is often used for
development/testing due to its convenience, it's better not to have this
sort of differences relative to MSVC.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Kenneth Graunke [Fri, 14 Nov 2014 06:50:03 +0000 (22:50 -0800)]
i965: Skip _mesa_load_state_parameters when there are zero parameters.
Saves a tiny bit of CPU overhead.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Fri, 14 Nov 2014 14:46:54 +0000 (15:46 +0100)]
radeonsi: remove unused variable si_state_dsa::db_render_control
Roland Scheidegger [Tue, 18 Nov 2014 22:04:36 +0000 (23:04 +0100)]
llvmpipe: enable PIPE_CAP_TGSI_VS_LAYER_VIEWPORT
No changes required in the driver itself, all handled by draw.
piglit results in a quick run:
skip->pass 7
skip->fail 2
(The new failures in the ARB_fragment_layer_viewport group are expected,
we fail the same if gs doesn't write these outputs regardless of the vs.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 18 Nov 2014 21:46:00 +0000 (22:46 +0100)]
draw: fixes for vertex shaders outputting layer or viewport index
Mostly add a couple cases so we don't just check gs for this.
There's only one gotcha, the built-in vp transform in the llvm vs can't
handle it (this would be fixable though non-trivial due to vp index being
non-constant for the SoA outputs, but we don't use it if there's a gs
neither - the whole clip/vp transform integration there is suboptimal).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Michael Varga [Wed, 12 Nov 2014 19:48:57 +0000 (13:48 -0600)]
st/va: surface: render subpicture
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Michael Varga [Wed, 12 Nov 2014 18:26:57 +0000 (12:26 -0600)]
st/va: subpicture implementation
added BGRA format
create/destroy
set image
associate/deassociate
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Michael Varga [Mon, 3 Nov 2014 16:35:28 +0000 (10:35 -0600)]
st/va: added internal storage for VAImage and BGRA format
When calling vaCreateImage() an internal copy of VAImage is maintained
since the allocation of "image" may not be guaranteed to live long enough.
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Michael Varga [Mon, 27 Oct 2014 15:43:20 +0000 (10:43 -0500)]
st/va: added some calls to handle_table_remove()
In a few locations handles were being added but not removed.
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Chad Versace [Tue, 18 Nov 2014 23:41:35 +0000 (15:41 -0800)]
i965: Fix segfault in WebGL Conformance on Ivybridge
Fixes regression of WebGL Conformance test texture-size-limit [1] on
Ivybridge Mobile GT2 0x0166 with Google Chrome R38.
Regression introduced by
commit
6c044231535b93c5d16404528946cad618d96bd9
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Sun Feb 2 02:58:42 2014 -0800
i965: Bump GL_MAX_CUBE_MAP_TEXTURE_SIZE to 8192.
The test regressed because the pointer offset arithmetic in
intel_miptree_map_gtt() overflows for large textures. The pointer
arithmetic is not 64-bit safe.
[1] https://github.com/KhronosGroup/WebGL/blob/
52f0dc240f04dce31b1b8e2b8107fe2b8332dc90/sdk/tests/conformance/textures/texture-size-limit.html
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=78770
Fixes: Intel CHRMOS-1377
Reported-by: Lu Hua <huax.lu@intel.com>
Reviewed-by: Ian Romanic <ian.d.romanick@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Siavash Eliasi [Sat, 15 Nov 2014 19:02:13 +0000 (22:32 +0330)]
mesa/main: Fix tmp_row memory leak in texstore_rgba_integer.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Jason Ekstrand [Tue, 18 Nov 2014 22:54:12 +0000 (14:54 -0800)]
docs/GL3: Mark GL_ARB_direct_state_access as being started by Laura
Dave Airlie [Tue, 18 Nov 2014 06:44:51 +0000 (16:44 +1000)]
r600g: limit texture offset application to specific types (v2)
For 1D and 2D arrays we don't want the other coordinates being
offset and affecting where we sample. I wrote this patch 6 months
ago but lost it.
Fixes:
./bin/tex-miplevel-selection textureLodOffset 1DArray
./bin/tex-miplevel-selection textureLodOffset 2DArray
./bin/tex-miplevel-selection textureOffset 1DArray
./bin/tex-miplevel-selection textureOffset 1DArrayShadow
./bin/tex-miplevel-selection textureOffset 2DArray
./bin/tex-miplevel-selection textureOffset(bias) 1DArray
./bin/tex-miplevel-selection textureOffset(bias) 2DArray
v2: rewrite to handle more cases and be consistent with code
above.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 18 Nov 2014 04:06:36 +0000 (14:06 +1000)]
r600g: geom shaders: always load texture src regs from inputs
Otherwise we seem to lose the split_gs_inputs and try and
pull from an uninitialised register.
fixes 9 texelFetch geom shader tests.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Eric Anholt [Tue, 18 Nov 2014 20:16:55 +0000 (12:16 -0800)]
vc4: Emit semaphore instructions for new kernel ABI.
Previously, the kernel would dispatch thread 0, wait, then dispatch thread
1. By insisting that the thread contents use semaphores in the right
place, the kernel can sleep for longer by dispatching both threads at
once.
Eric Anholt [Wed, 29 Oct 2014 22:15:29 +0000 (15:15 -0700)]
vc4: Mark a big array as const.
Drops 1kb of code from this inner loop, in exchange for 2.5k of data.
Andres Gomez [Tue, 18 Nov 2014 13:49:00 +0000 (06:49 -0700)]
glsl_compiler: Add binding hash tables to avoid SIGSEVs on linking stage
When using the stand alone compiler, if we try to link a shader with vertex
attributes it will segfault on linking as the binding hash tables are not
included in the shader program. Obviously, we cannot make the linking stage
succeed without the bound attributes but we can prevent the crash and just
let the linker spit its own error.
Reviewed-by: Brian Paul <brianp@vmware.com>
Andres Gomez [Tue, 18 Nov 2014 15:43:35 +0000 (08:43 -0700)]
linker: Add carriage returns on several linker errors
Reviewed-by: Brian Paul <brianp@vmware.com>
Andres Gomez [Tue, 18 Nov 2014 13:49:00 +0000 (06:49 -0700)]
draw: Fixed inline comments
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Tue, 18 Nov 2014 14:22:29 +0000 (15:22 +0100)]
gallivm: fix alignment issue for vertex data fetch
We cannot guarantee that vertex buffers have the necessary alignment for
fetching all AoS members at once (for instance 4x32bit XYZW data). We can
however guarantee that for textures. This did not cause errors for older
llvm versions but it now matters and will cause segfaults if the data
happens to not be aligned. Thus we need to set alignment manually.
(Note that we can't actually really guarantee data to be even element aligned
due to offsets in vertex buffers being bytes and OpenGL allowing this, but
it does not matter for x86 as alignment is only required for sse vectors -
not sure what happens on other archs, however.)
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=85467.
Marek Olšák [Mon, 17 Nov 2014 19:51:56 +0000 (20:51 +0100)]
radeonsi: support gl_FragCoord at integer pixel center
No known benefit for OpenGL, but it doesn't hurt.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Mon, 17 Nov 2014 19:49:11 +0000 (20:49 +0100)]
radeonsi: support per-sample gl_FragCoord
Cc: 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Ilia Mirkin [Sat, 15 Nov 2014 18:29:25 +0000 (13:29 -0500)]
st/mesa: add a fallback for clear_with_quad when no vs_layer
Not all drivers can set gl_Layer from VS. Add a fallback that passes the
instance id from VS to GS, and then uses the GS to set the layer.
Tested by adding
quad_buffers |= clear_buffers;
clear_buffers = 0;
to the st_Clear logic, and forcing set_vertex_shader_layered in all
cases. No piglit regressions (on piglits with 'clear' in the name).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Vinson Lee [Sat, 15 Nov 2014 08:50:15 +0000 (00:50 -0800)]
mesa: Bump version to 10.5.0-devel.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Axel Davy [Mon, 17 Nov 2014 15:58:29 +0000 (16:58 +0100)]
nine: Implement threadpool
DRI_PRIME setups have different issues due the lack of dma-buf fences
support in the drivers. For DRI3 DRI_PRIME, a race can appear, making
tearings visible, or worse showing older content than expected. Until
dma-buf fences are well supported (and by all drivers), an alternative
is to send the buffers to the server only when rendering has finished.
Since waiting the rendering has finished in the main thread has a
performance impact, this patch uses an additional thread to offload the
wait and the sending of the buffers to the server.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Axel Davy [Mon, 17 Nov 2014 15:58:28 +0000 (16:58 +0100)]
nine: Add drirc options (v2)
Implements vblank_mode and throttling, which allows us change default ratio
between framerate and input lag.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Joakim Sindholt [Thu, 4 Aug 2011 13:14:06 +0000 (15:14 +0200)]
nine: Add state tracker nine for Direct3D9 (v3)
Work of Joakim Sindholt (zhasha) and Christoph Bumiller (chrisbmr).
DRI3 port done by Axel Davy (mannerov).
v2: - nine_debug.c: klass extended from 32 chars to 96 (for sure) by glennk
- Nine improvements by Axel Davy (which also fixed some wine tests)
- by Emil Velikov:
- convert to static/shared drivers
- Sort and cleanup the includes
- Use AM_CPPFLAGS for the defines
- Add the linker garbage collector
- Restrict the exported symbols (think llvm)
v3: - small nine fixes
- build system improvements by Emil Velikov
v4: [Emil Velikov]
- Do no link against libudev. No longer needed.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 15:58:26 +0000 (16:58 +0100)]
gallium/auxiliary: add contained and rect checks (v6)
v3: thanks to Brian, improved coding style, also glennk helped spot few
things (unsigned -> int, two constify)
v4: thanks Ilia improved function, dropped u_box_clip_3d
v5: incorporated rest of Gregor proposed changes,clean ups
v6: u_box_clip_2d simplify proposed by Ilia Mirkin
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 19:05:53 +0000 (20:05 +0100)]
gallium/auxiliary: add inc and dec alternative with return (v4)
At this moment we use only zero or positive values.
v2: Implement it for also for Solaris, MSVC assembly
and enable for other combinations.
v3: Replace MSVC assembly by assert + warning during compilation
v4: remove inc and dec with return for MSVC assembly
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 15:58:24 +0000 (16:58 +0100)]
gallium/auxiliary: implement sw_probe_wrapped (v2)
Implement pipe_loader_sw_probe_wrapped which allows to use the wrapped
software renderer backend when using the pipe loader.
v2: - remove unneeded ifdef
- use GALLIUM_PIPE_LOADER_WINSYS_LIBS
- check for CALLOC_STRUCT
thanks to Emil Velikov
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: David Heidelberg <david@ixit.cz>