vc4: Fix a leak of the last color read/write surface on context destroy.

vc4: Fix a memory leak in the simulator case.

We validate per draw call, and need to free the shader per draw call, too.

mesa: remove unneeded #include of colormac.h

Reviewed-by: Matt Turner <mattst88@gmail.com>

radeon/r200: remove unneeded #include of colormac.h

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: remove unneeded #include of colormac.h

Reviewed-by: Matt Turner <mattst88@gmail.com>

i915: remove unneeded #include of colormac.h

Reviewed-by: Matt Turner <mattst88@gmail.com>

i915: Drop broken front_buffer_reading/drawing optimization

Bring the following commit over to i915:
 commit ec542d74578bbef6b55125dd6aba1dc7f5079e65
 Author: Eric Anholt <eric@anholt.net>
 Date:   Mon Mar 3 10:43:10 2014 -0800

    i965: Drop broken front_buffer_reading/drawing optimization.

Not sure if it might fix anything, but since the i965 and i915 used to
share a bunch of that code, it would seem reasonable the same problems
could be present in the i915 code still, and the i965 approach is well
tested by now so bringing it over seems fairly safe.

No piglit regressions on 855.

v2: Rebase on _mesa_is_front_buffer_* refactor.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa/i965: Refactor brw_is_front_buffer_{drawing,reading} to common code

There are multiple similar implementations of these functions, and a
later patch was going to add another.

v2: Move removing intel_framebuffer to a different patch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

st/mesa: Don't override NewFramebuffer just to call _mesa_new_framebuffer

v2: Since state_tracker does not call _mesa_init_driver_functions, we
need to initialize the dd::NewFramebuffer pointer to
_mesa_new_framebuffer here.  Suggested by Brian.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

radeon: Don't override NewFramebuffer just to call _mesa_new_framebuffer

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

i915: Don't override NewFramebuffer just to call _mesa_new_framebuffer

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

i965: Don't override NewFramebuffer just to call _mesa_new_framebuffer

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

i830: Fix culling with user fbos on gen2

Flip the cull bits when rendering to a user fbo on gen2. This
was already done on gen3 (since before git history starts)
but was missing from the gen2 code.

Fixes rendering of the driver+kart model in supertuxkart kart
selection screen.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i915: Adjust line size limits

The hardware can draw lines 0.5 to 7.5 pixels wide. Adjust the limits
to 1.0-7.0. The old limits seems to be from the era when i915 and i965
were sharing this code.

Not really sure if 1.0-7.0 is correct. Maybe it could be 0.5.7.5 as
those are the hw limits, or maybe some combination of the two?

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i915: Enable intel_render path for points

The sub-pixel adjustment for points was killed off in
 commit 60d762aa625095a8c1f9597d8530bb5a6fa61b4c
 Author: Xiang, Haihao <haihao.xiang@intel.com>
 Date:   Wed Jan 2 11:38:51 2008 +0800

    i915: Needn't adjust pixel centers. fix #12944

so if we don't need it in intel_tris.c we don't need it in
intel_render.c either, which means we can allow intel_render.c to render
points.

No apparent regressions on PNV in ES1 or ES2 conformance.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i915: Use COPY_DWORDS for points

The sub-pixel adjustment for points was killed off in
 commit 60d762aa625095a8c1f9597d8530bb5a6fa61b4c
 Author: Xiang, Haihao <haihao.xiang@intel.com>
 Date:   Wed Jan 2 11:38:51 2008 +0800

    i915: Needn't adjust pixel centers. fix #12944

so we can just as well use COPY_DWORDS().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i915: Use _tnl_RenderClippedPolygon and _tnl_RenderClippedLine

_tnl_RenderClippedPolygon and _tnl_RenderClippedLine already do most of
what we want so use them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i915: Handle provoking vertex in intelFastRenderClippedPoly()

intelFastRenderClippedPoly() renders the polygon using triangles. For
polygons the provoking vertex is always the first one, and currently
this function assumes that the provoking vertex for triangles is the
last one. In case the user changed the provoking vertex convention,
the hardware may be configured to treat the first vertex of triangles
as the provoking vertex. So check the convention and emit the triangles
in the appropriate order to avoid having to change the hardware
provoking vertex convention for rendering polygons.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

t_dd_dmatmp: Check provoking vertex convention when rendering quads

When drawing quads using triangles we need to be careful to make
the provoking vertices match when flat shading.

v2: Major rebase on top of Ian's other t_dd_dmatmp.h work.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

t_dd_dmatmp: Disallow flat shading when rendering quad strips via tri strips

When rendering quad strips via tri strips we can't get the provoking
vertex right, so disallow flat shading.

v2: Major rebase on top of Ian's other t_dd_dmatmp.h work.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

t_dd_dmatmp: Allow flat shaded polygons with tri fans

We can allow rendering flat shaded polygons using tri fans if we check
the provoking vertex convention.

v2 (idr): Remove _EXT suffixes from GL_FIRST_VERTEX_CONVENTION.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

t_dd_dmatmp: Replace fprintf with unreachable

From http://lists.freedesktop.org/archives/mesa-dev/2015-May/084883.html:

    "There are no real error cases here, just dead code.
    validate_render() is supposed to make sure we never call these
    functions if the code can't actually render the primitives. The
    fprintf()+return branches should really just contain assert(0) or
    equivalent."

I also rearranged the if-else-block in render_quad_strip_verts to look
more like the other functions.  A future patch is going to change a
bunch of that code anyway.

v2: Make "unreachable" message more descriptive.  Suggested by Iago.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

radeon: Use C99 initializers for primitive arrays

Using C99 initializers for the primitive arrays makes things more
readable.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Use C99 initializers for primitive arrays

Using C99 initializers for the primitive arrays makes things more
readable.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i915: Use C99 initializers for primitive arrays

Using C99 initializers for the primitive arrays makes things more
readable.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

tgsi: add const qualifier to silence warning

Trivial.

glsl: whitespace/formatting/typo fixes in link_uniforms.cpp

main: array stride for unsized arrays of arrays are calculated like records

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>

glsl: add std430 layout support for AoA

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>

docs: Mark GL_ARB_enhanced_layouts as in progress

i965: add EXT_polygon_offset_clamp support to gen4/gen5

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

meta: Update comment about unsupported texture types.

Ken added support for 2DArray (commit ec23d5197e) and 1DArray (commit
14ca61125) last year.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

glx: Drop CRAY support.

It couldn't have worked anyway. There were calls to undefined functions.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

glsl: Remove CSE pass.

With NIR, it actually hurts things.

total instructions in shared programs: 6529329 -> 6528888 (-0.01%)
instructions in affected programs:     14833 -> 14392 (-2.97%)
helped:                                299
HURT:                                  1

In all affected programs I inspected (including the single hurt one) the
pass CSE'd some multiplies and caused some reassociation (e.g., caused
(A * B) * C to be A * (B * C)) when the original intermediate result was
reused elsewhere.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Generalize predicated break pass for use in vec4 backend.

instructions in affected programs:     44204 -> 43762 (-1.00%)
helped:                                221

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

i965/fs: Use backend_instruction in predicated break peephole.

We're not using any fs_inst fields, and the next commit will make the
peephole used by the vec4 backend.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

i965/fs: Remove SNB embedded-comparison support from optimizations.

We never emit IF instructions with an embedded comparison (lost in the
switch to NIR), so this code is not used. If we want to readd support,
we should have a pass that merges a CMP instruction with an IF or a
WHILE instruction after other optimizations have run.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

mesa: Add missing _mm_mfence() before streaming loads.

According to the Intel Software Development Manual (Volume 1: Basic
Architecture, 12.10.3 Streaming Load Hint Instruction):

   Streaming loads may be weakly ordered and may appear to software to
   execute out of order with respect to other memory operations.
   Software must explicitly use fences (e.g. MFENCE) if it needs to
   preserve order among streaming loads or between streaming loads and
   other memory operations.

That is, a memory fence is needed to preserve the order between the GPU
writing the buffer and the streaming loads reading it back.

Reported-by: Joseph Nuzman <joseph.nuzman@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Fix intel_miptree_is_fast_clear_capable()

There are three types of fast clears:
  a. fast depth clears
  b. fast singlesample color clears
  c. fast multisample color clears
Function intel_miptree_is_fast_clear_capable() checks if a miptree
supports fast clears of type (b).

Rename the function to disambiguate what it does:
  old: intel_miptree_is_fast_clear_capable
  new: intel_miptree_supports_non_msrt_fast_clear

The functionally accidentally rejected multisampled color surfaces
because it thought they were singlesample array surfaces. Fix that by
explicitly rejecting surfaces with samples > 1.

This fix would have been needed before we enabled layered fast
singlesample color clears (introduced in gen8), which we want to do
eventually. For now, though, this patch changes no behavior; it just
fixes how the driver chooses its behavior.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/mt: Declare some functions as static

intel_tiling_supports_non_msrt_mcs() and
intel_miptree_is_fast_clear_capable() are not used outside of
intel_mipmap_tree.c.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Make vec4_visitor's destructor virtual

We need a virtual destructor when at least one of the class' methods is virtual.
Failure to do so might lead to undefined behavior when destructing derived classes.
Fixes the following warning:

brw_vec4_gs_visitor.cpp: In function 'const unsigned int* brw::brw_gs_emit(brw_context*, gl_shader_program*, brw_gs_compile*, void*, unsigned int*)':
brw_vec4_gs_visitor.cpp:703:11: warning: deleting object of polymorphic class type 'brw::vec4_gs_visitor' which has non-virtual destructor might cause undefined behaviour [-Wdelete-non-virtual-dtor]
    delete gs;

Curro: This shouldn't be causing any actual bugs at the moment because
gen6_gs_visitor is the only subclass of vec4_visitor destroyed through
a pointer of a base class (vec4_gs_visitor *) and its destructor is
basically the same as its parent's. Anyway it seems sensible to change
this so it doesn't bite us in the future.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

glsl: set glsl error if binding qualifier used on global scope

Fixes following Piglit test:
global-scope-binding-qualifier.frag

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

i965: Assert on the number of combined UBO and SSBO binding table entries

In theory we can't break this assertion since the compiler frontend checks
that we don't exceed any of the individual limits, but it does not hurt to
be extra safe.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Reserve binding table space for SSBO surfaces

These share the space with UBO surfaces but we need to make sure we
allocate enough space for both sets (12 of each)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Define BRW_MAX_SSBO

Instead of using hard-coded values.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Define BRW_MAX_UBO

Instead of using hard-coded values.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Remove more dead visitor/vertex program code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Don't print line numbers with INTEL_DEBUG=optimizer.

The thing you want to do with the output files is diff them, which is
made more difficult by line numbers changing.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

nv30: always go through translate module on big-endian

It seems like things are either coming in slighly wrong, or perhaps
uploaded incorrectly, but either way passing them through the translate
module seems to fix everything. Eventually we should figure out what's
going wrong and fix it "for real", but this should do for now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org

nv30: pretend to have packed texture/surface formats

This puts us in line with what the DDX/DRI2 st are expecting. It also
happens to work... no idea why, but seems better to have it work than to
ask lots of questions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org

st/dri: Use packed RGB formats

Fixes Gallium based DRI drivers failing to load on big endian hosts
because they can't find any matching fbconfigs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71789
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl: reduce memory footprint of uniform_storage struct

The uniform will only be of a single type so store the data for
opaque types in a single array.

Cc: Francisco Jerez <currojerez@riseup.net>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>

i965: Remove shader_prog from vec4_gs_visitor.

Unfortunately it has to stay in gen6_gs_visitor.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Use nir->has_transform_feedback_varyings to avoid shader_prog.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

nir: Add a nir_shader_info::has_transform_feedback_varyings flag.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

nir: Introduce new nir_intrinsic_load_per_vertex_input intrinsics.

Geometry and tessellation shaders process multiple vertices; their
inputs are arrays indexed by the vertex number.  While GLSL makes
this look like a normal array, it can be very different behind the
scenes.

On Intel hardware, all inputs for a particular vertex are stored
together - as if they were grouped into a single struct.  This means
that consecutive elements of these top-level arrays are not contiguous.
In fact, they may sometimes be in completely disjoint memory segments.

NIR's existing load_input intrinsics are awkward for this case, as they
distill everything down to a single offset.  We'd much rather keep the
vertex ID separate, but build up an offset as normal beyond that.

This patch introduces new nir_intrinsic_load_per_vertex_input
intrinsics to handle this case.  They work like ordinary load_input
intrinsics, but have an extra source (src[0]) which represents the
outermost array index.

v2: Rebase on earlier refactors.
v3: Use ssa defs instead of nir_srcs, rebase on earlier refactors.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

nir/lower_io: Make get_io_offset() return a nir_ssa_def * for indirects.

get_io_offset() already walks the dereference chain and discovers
whether or not we have an indirect; we can just return that rather than
computing it a second time via deref_has_indirect().  This means moving
the call a bit earlier.

By returning a nir_ssa_def *, we can pass back both an existence flag
(via NULL checking the pointer) and the value in one parameter.  It
also simplifies the code somewhat.  nir_lower_samplers works in a
similar fashion.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

glsl: fix whitespace

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

radeonsi: enable PIPE_CAP_FORCE_PERSAMPLE_INTERP

Now st/mesa won't generate 2 variants for this state.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: do force_persample_interp in shaders for non-trivial cases

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: implement the simple case of force_persample_interp

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: move SPI_PS_INPUT_ENA/ADDR registers to a separate state

This will be a derived state used for changing center->sample and
centroid->sample at runtime.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

tgsi/scan: add interpolation info into tgsi_shader_info

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

st/mesa: automatically set per-sample interpolation if using SampleID/Pos

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

st/mesa: set force_persample_interp if ARB_sample_shading is used

This is only a half of the work. The next patch will handle
gl_SampleID/SamplePos, which is the other half of ARB_sample_shading.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

gallium: add per-sample interpolation control into rasterizer statOAe

Required by ARB_sample_shading for drivers that don't want a shader variant
in st/mesa.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Roland Scheidegger <sroland@vmware.com>

st/mesa: add ST_DEBUG=precompile support for tessellation shaders

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa: remove Driver.BindImageTexture

Nothing sets it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.DeleteSamplerObject

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.EndCallList

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.BeginCallList

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.EndList

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.NewList

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.NotifySaveBegin

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.SaveFlushVertices

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.FlushVertices

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.BeginVertices

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: remove Driver.BindArrayObject

Nothing sets it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.DeleteArrayObject

Nothing reimplements it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.NewArrayObject

Nothing reimplements it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.Hint

Nothing sets it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.ColorMaskIndexed

Nothing sets it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove some Driver.Blend* hooks

Nothing sets them.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.Accum

Nothing calls it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.ResizeBuffers

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.DeleteShaderProgram

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.NewShaderProgram

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: remove Driver.DeleteShader

Nothing overrides it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

egl/dri2: don't require a context for ClientWaitSync (v2)

The spec doesn't require it. This fixes a crash on Android.

v2: don't set any flags if ctx == NULL
v3: add the spec note

Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Albert Freeman <albertwdfreeman@gmail.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>

st/dri: don't use _ctx in client_wait_sync

Not needed and it can be NULL.

v2: fix dri2_get_fence_from_cl_event - thanks Albert

Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Albert Freeman <albertwdfreeman@gmail.com>

r600g: only do depth-only or stencil-only in-place decompression

instead of always doing both.
Usually, only depth is needed, so stencil decompression is useless.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: only do depth-only or stencil-only in-place decompression

instead of always doing both.
Usually, only depth is needed, so stencil decompression is useless.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium/radeon: add separate stencil level dirty flags

We will only do depth-only or stencil-only decompress blits, whichever is
needed by textures, instead of always doing both.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: dump buffer lists while debugging

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

winsys/radeon: implement cs_get_buffer_list

This is more complicated, because tracking priority_usage needed changing
the relocs_bo type.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

winsys/amdgpu: add winsys function cs_get_buffer_list

For debugging.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium/radeon: stop using "reloc" in a few places

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium/radeon: tell the winsys the exact resource binding types

Use the priority flags and expand them.
This information will be used for debugging.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: add an option for debugging VM faults

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: move dumping the last IB into its own function

v2: indentation fix

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>