re PR libstdc++/66338 (std::forward_as_tuple() issue with single argument)

2016-05-24  Ville Voutilainen  <ville.voutilainen@gmail.com>

PR libstdc++/66338
* include/std/tuple (_TMC): Add a check for _NotSameTuple.
* include/std/tuple (tuple(_UElements&&...)): Remove the separate
check for _NotSameTuple.
* include/std/tuple (_TMCT): New.
* include/std/tuple (tuple(const tuple<_UElements...>&)): Use it.
* include/std/tuple (tuple(tuple<_UElements...>&&)): Likewise.
* include/std/tuple (tuple(allocator_arg_t, const _Alloc&,
      const tuple<_UElements...>&)): Likewise.
* include/std/tuple (tuple(allocator_arg_t, const _Alloc&,
      tuple<_UElements...>&&)): Likewise.
* testsuite/20_util/tuple/cons/66338.cc: New.

From-SVN: r236822

[AArch64] Tie operand 1 to operand 0 in AESMC pattern when AES/AESMC fusion is enabled

* config/aarch64/aarch64.c (aarch64_fusion_enabled_p): New function.
* config/aarch64/aarch64-protos.h (aarch64_fusion_enabled_p): Declare
prototype.
* config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aesmc_op>v16qi):
Add "=w,0" alternative.  Enable it when AES/AESMC fusion is enabled.

From-SVN: r236820

[AArch64] PR target/63596, honor tree-stdarg analysis result to improve VAARG codegen

gcc/
PR target/63596
* config/aarch64/aarch64.c (aarch64_expand_builtin_va_start): Honor
tree-stdarg analysis results.
(aarch64_setup_incoming_varargs): Likewise.

gcc/testsuite/
* gcc.target/aarch64/va_arg_1.c: New testcase.
* gcc.target/aarch64/va_arg_2.c: Likewise.
* gcc.target/aarch64/va_arg_3.c: Likewise.

From-SVN: r236819

[AArch64] Enable tree-stdarg pass for AArch64 by defining counter fields

gcc/
* config/aarch64/aarch64.c (aarch64_build_builtin_va_list): Initialize
va_list_gpr_counter_field and va_list_fpr_counter_field.

gcc/testsuite/
* gcc.dg/tree-ssa/stdarg-2.c: Enable all testcases for AArch64.
* gcc.dg/tree-ssa/stdarg-3.c: Likewise.
* gcc.dg/tree-ssa/stdarg-4.c: Likewise.
* gcc.dg/tree-ssa/stdarg-5.c: Likewise.
* gcc.dg/tree-ssa/stdarg-6.c: Likewise.

From-SVN: r236818

Remove aarch64_cannot_change_mode_class as the underlying issue (PR67609) has been resolved.

Remove aarch64_cannot_change_mode_class as the underlying issue
(PR67609) has been resolved.  This avoids a few unnecessary lane
widening operations like:

faddp   d18, v18.2d
mov     d18, v18.d[0]

    gcc/
PR67609
* config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Remove.
* config/aarch64/aarch64.c
(aarch64_cannot_change_mode_class): Remove function.
* config/aarch64/aarch64-protos.h
(aarch64_cannot_change_mode_class): Remove.

From-SVN: r236817

cfgloop.c (record_niter_bound): Record likely upper bounds.

* cfgloop.c (record_niter_bound): Record likely upper bounds.
(likely_max_stmt_executions_int, get_likely_max_loop_iterations,
get_likely_max_loop_iterations_int): New.
* cfgloop.h (struct loop): Add nb_iterations_likely_upper_bound,
any_likely_upper_bound.
(get_likely_max_loop_iterations_int, get_likely_max_loop_iterations):
Declare.
* cfgloopmanip.c (copy_loop_info): Copy likely upper bounds.
* loop-unroll.c (unroll_loop_constant_iterations): Update likely
upper bound.
(unroll_loop_constant_iterations): Likewise.
(unroll_loop_runtime_iterations): Likewise.
* lto-streamer-in.c (input_cfg): Stream likely upper bounds.
* lto-streamer-out.c (output_cfg): Likewise.
* tree-ssa-loop-ivcanon.c (try_peel_loop): Update likely upper
bounds.
(canonicalize_loop_induction_variables): Dump likely upper bounds.
* tree-ssa-loop-niter.c (record_estimate): Record likely upper bounds.
(likely_max_loop_iterations): New.
(likely_max_loop_iterations_int): New.
(likely_max_stmt_executions): New.
* tree-ssa-loop-niter.h (likely_max_loop_iterations,
likely_max_loop_iterations_int, likely_max_stmt_executions_int,
likely_max_stmt_executions): Declare.

From-SVN: r236816

re PR middle-end/71308 (ICE (segfault) in in gimple_fold_call gimple-fold.c:3060)

PR middle-end/71308
* gimple-fold.c (gimple_fold_call): Check that LHS is not null.

* g++.dg/torture/pr71308.C: New test.

From-SVN: r236815

S/390: Replace rtx_equal_p with reg_overlap_mentioned_p in splitter check.

gcc/ChangeLog:

2016-05-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

* config/s390/s390.md (2x risbg splitters): Use
reg_overlap_mentioned_p instead of rtx_equal_p.

From-SVN: r236814

combine: Take known zero bits into account when checking extraction.

gcc/ChangeLog:

* combine.c (make_compound_operation): Take known zero bits into
account when checking for possible zero_extend.

gcc/testsuite/ChangeLog:

* gcc.dg/zero_bits_compound-1.c: New test.
* gcc.dg/zero_bits_compound-2.c: New test.

From-SVN: r236813

[AArch64] Simplify ashl<mode>3 expander for SHORT modes

* config/aarch64/aarch64.md (ashl<mode>3, SHORT modes):
Use const_int_operand for operand 2 predicate.  Simplify expand code
as a result.

From-SVN: r236812

re PR middle-end/71279 (ICE on trunk gcc with knl target)

gcc/

PR middle-end/71279
* fold-const.c (fold_ternary_loc): Don't fold VEC_COND_EXPR
into comparison.

gcc/testsuite/

PR middle-end/71279
* gcc.dg/pr71279.c: New test.

From-SVN: r236810

[AArch64] Delete obsolete CC_ZESWP and CC_SESWP CC modes

* config/aarch64/aarch64-modes.def (CC_ZESWP, CC_SESWP): Delete.
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Remove condition
that returns CC_SESWPmode and CC_ZESWPmode.
(aarch64_get_condition_code_1): Remove handling of CC_SESWPmode
and CC_SESWPmode.
(aarch64_rtx_costs): Likewise.

From-SVN: r236809

Daily bump.

From-SVN: r236804

rs6000.c (rs6000_emit_p9_fp_minmax): New function for ISA 3.0 min/max support.

[gcc]
2016-05-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): New function
for ISA 3.0 min/max support.
(rs6000_emit_p9_fp_cmove): New function for ISA 3.0 floating point
conditional move support.
(rs6000_emit_cmove): Call rs6000_emit_p9_fp_minmax and
rs6000_emit_p9_fp_cmove if the ISA 3.0 instructions are
available.
* config/rs6000/rs6000.md (SFDF2): New iterator to allow doing
conditional moves where the comparison type is different from move
type.
(fp_minmax): New code iterator for smin/smax.
(minmax): New code attributes for min/max.
(SMINMAX): Likewise.
(smax<mode>3): Combine min, max insns into one insn using the
fp_minmax code iterator.  Add support for ISA 3.0 min/max
instructions that don't need -ffast-math.
(s<minmax><mode>3): Likewise.
(smax<mode>3_vsx): Likewise.
(smin<mode>3): Likewise.
(s<minmax><mode>3_vsx): Likewise.
(smin<mode>3_vsx): Likewise.
(pre-VSX min/max splitters): Likewise.
(s<minmax><mode>3_fpr): Likewise.
(movsfcc): Rewrite floating point conditional moves to combine
SFmode/DFmode into a single insn.
(mov<mode>cc): Likewise.
(movdfcc): Likewise.
(fselsfsf4): Combine FSEL cases into a single insn, using SFDF and
SFDF2 iterators to handle all combinations.
(fseldfsf4): Likewise.
(fsel<SFDF:mode><SFDF2:mode>4): Likewise.
(fseldfdf4): Likewise.
(fselsfdf4): Likewise.
(mov<SFDF:mode><SFDF2:mode>cc_p9): Add support for the ISA 3.0
comparison instructions that set a 0/-1 mask, and use it for
floating point conditional move via XXSEL.
(fpmask<mode>): Likewise.
(xxsel<mode>): Likewise.
* config/rs6000/predicates.md (min_max_operator): Delete, no
longer used.
(fpmask_comparison_operaton): New insn for ISA 3.0 comparison
instructions that generate a 0/-1 mask for use with XXSEL.
* config/rs6000/rs6000.h (TARGET_MINMAX_SF): New helper macros to
say whether floating point min/max is available, either through
FSEL, ISA 2.06 min/max, and ISA 3.0 min/max instrucitons.
(TARGET_MINMAX_DF): Likewise.

[gcc/testsuite]
2016-05-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/p9-minmax-1.c: New tests for ISA 3.0
floating point min/max/comparison instructions.
* gcc.target/powerpc/p9-minmax-2.c: Likewise.

From-SVN: r236795

c-parser.c (c_parser_omp_clause_schedule): Warn if OMP_CLAUSE_SCHEDULE_CHUNK_EXPR is known not to be positive.

* c-parser.c (c_parser_omp_clause_schedule): Warn if
OMP_CLAUSE_SCHEDULE_CHUNK_EXPR is known not to be positive.

* semantics.c (finish_omp_clauses) <case OMP_CLAUSE_SCHEDULE>: Warn
if OMP_CLAUSE_SCHEDULE_CHUNK_EXPR is known not to be positive.

* openmp.c (resolve_omp_clauses): Warn if chunk_size is known not to
be positive.

* c-c++-common/gomp/schedule-1.c: New test.
* gfortran.dg/gomp/schedule-1.f90: New test.

* testsuite/libgomp.c/doacross-1.c (main): Use schedule(static)
instead of invalid schedule(static, 0).
* testsuite/libgomp.c/doacross-2.c (main): Likewise.

From-SVN: r236793

Fix PR c++/70822 (bogus error with parenthesized SCOPE_REF)

gcc/cp/ChangeLog:

PR c++/70822
PR c++/70106
* cp-tree.h (REF_PARENTHESIZED_P): Make this flag apply to
SCOPE_REFs too.
* pt.c (tsubst_qualified_id): If REF_PARENTHESIZED_P is set
on the qualified_id then propagate it to the resulting
expression.
(do_auto_deduction): Check REF_PARENTHESIZED_P on SCOPE_REFs
too.
* semantics.c (force_paren_expr): If given a SCOPE_REF, just set
its REF_PARENTHESIZED_P flag.

gcc/testsuite/ChangeLog:

PR c++/70822
PR c++/70106
* g++.dg/cpp1y/auto-fn32.C: New test.
* g++.dg/cpp1y/paren4.C: New test.

From-SVN: r236792

ira.c bb_loop_depth

PR rtl-optimization/71275
* ira.c (ira): Call loop_optimizer_init to set up bb_loop_depth
for update_equiv_regs and combine_and_move_insns.

From-SVN: r236789

i386.md (*movqi_internal): Use if_then_else or cond RTXes to calculate attribute value.

* config/i386/i386.md (*movqi_internal) <attr "isa">: Use
if_then_else or cond RTXes to calculate attribute value.
* config/i386/mmx.md (*vec_extractv2sf_1) <attr "prefix_rep">: Ditto.
<attr "length_immediate>: Ditto.
(*vec_extractv2sf_1) <attr "length_immediate">: Ditto.
* config/i386/sse.md (sse_loadlps) <attr "length_immediate">: Ditto.
(*vec_concatv2sf_sse4_1) <attr "isa">: Ditto.
<attr "type">: Ditto.
<attr "prefix_data16">: Ditto.
<attr "prefix_extra">: Ditto.
<attr "length_immediate">: Ditto.
<attr "prefix">: Ditto.
(vec_set<mode>_0) <attr "isa">: Ditto.
<attr "prefix_extra">: Ditto.
<attr "length_immediate">: Ditto.
<attr "prefix">: Ditto.
(*vec_interleave_highv2df) <attr "prefix_data16">: Ditto.
(*vec_interleave_lowv2df) <attr "prefix_data16">: Ditto.
(sse2_storelpd) <attr "prefix_data16">: Ditto.
(sse2_loadhpd) <attr "prefix_data16">: Ditto.
(sse2_loadlpd) <attr "prefix_data16">: Ditto.
<attr "length_immediate">: Ditto.
<attr "prefix">: Ditto.
(sse2_movsd) <attr "length_immediate">: Ditto.
<attr "prefix">: Ditto.
(vec_concatv2df)  <attr "isa">: Ditto.
<attr "prefix">: Ditto.
(*vec_extractv4si) <attr "prefix_extra">: Ditto.
(*vec_extractv2di_1) <attr "isa">: Ditto.
<attr "type">: Ditto.
<attr "length_immediate">: Ditto.
<attr "prefix_rex">: Ditto.
<attr "prefix_extra">: Ditto.
(*vec_concatv2si_sse4_1) <attr "type">: Ditto.
<attr "prefix_extra">: Ditto.
<attr "length_immediate">: Ditto.
(vec_concatv2di) <attr "isa">: Ditto.
<attr "prefix_extra">: Ditto.
<attr "length_immediate">: Ditto.
<attr "prefix">: Ditto.

From-SVN: r236787

IVOPTS: make comp_cost in a more c++ fashion.

* tree-ssa-loop-ivopts.c (comp_cost::infinite_cost_p): New
function.
(operator+): Likewise.
(operator-): Likewise.
(comp_cost::operator+=): Likewise.
(comp_cost::operator-=): Likewise.
(comp_cost::operator/=): Likewise.
(comp_cost::operator*=): Likewise.
(operator<): Likewise.
(operator==): Likewise.
(operator<=): Likewise.
(new_cost): Remove.
(infinite_cost_p): Likewise.
(add_costs): Likewise.
(sub_costs): Likewise.
(compare_costs): Likewise.
(set_group_iv_cost): Use the newly introduced functions.
(get_address_cost): Likewise.
(get_shiftadd_cost): Likewise.
(force_expr_to_var_cost): Likewise.
(split_address_cost): Likewise.
(ptr_difference_cost): Likewise.
(difference_cost): Likewise.
(get_computation_cost_at): Likewise.
(determine_group_iv_cost_generic): Likewise.
(determine_group_iv_cost_address): Likewise.
(determine_group_iv_cost_cond): Likewise.
(autoinc_possible_for_pair): Likewise.
(determine_group_iv_costs): Likewise.
(cheaper_cost_pair): Likewise.
(iv_ca_recount_cost): Likewise.
(iv_ca_set_no_cp): Likewise.
(iv_ca_set_cp): Likewise.
(iv_ca_cost): Likewise.
(iv_ca_new): Likewise.
(iv_ca_dump): Likewise.
(iv_ca_narrow): Likewise.
(iv_ca_prune): Likewise.
(iv_ca_replace): Likewise.
(try_add_cand_for): Likewise.
(try_improve_iv_set): Likewise.
(find_optimal_iv_set): Likewise.

From-SVN: r236785

Fix ivopts estimates for internal functions

tree-ssa-loop-ivopts.c:loop_body_includes_call was treating internal
calls such as IFN_SQRT as clobbering all caller-saved registers, which
I don't think is appropriate for any current internal function.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
* tree-ssa-loop-ivopts.c (loop_body_includes_call): Don't assume
that internal functions will clobber all caller-saved registers.

From-SVN: r236780

20060410.c: Xfail on ptx.

* gcc.dg/20060410.c: Xfail on ptx.
* gcc.dg/torture/c99-contract-1.c: Skip on ptx.
* c-c++-common/torture/complex-sign-mixed-add.c: Skip on ptx -O0
* c-c++-common/torture/complex-sign-mixed-sub.c: Skip on ptx -O0
* gcc.c-torture/execute/pr68185.c: Skip on ptx -O0 & Os.
* gcc.c-torture/execute/20020529-1.c: Skip on ptx -00.

From-SVN: r236774

free.asm: Delete.

* config/nvptx/free.asm: Delete.
* config/nvptx/malloc.asm: Delete.
* config/nvptx/realloc.c: Delete.
* t-nvptx: Update.

From-SVN: r236773

oacc-plugin.h (GOMP_PLUGIN_async_unmap_vars): Add int parameter.

2016-05-26  Chung-Lin Tang  <cltang@codesourcery.com>

libgomp/
* oacc-plugin.h (GOMP_PLUGIN_async_unmap_vars): Add int parameter.
* oacc-plugin.c (GOMP_PLUGIN_async_unmap_vars): Add 'int async'
parameter, use to set async stream around call to gomp_unmap_vars,
call gomp_unmap_vars() with 'do_copyfrom' set to true.
* plugin/plugin-nvptx.c (struct ptx_event): Add 'int val' field.
(event_gc): Adjust event handling loop, collect PTX_EVT_ASYNC_CLEANUP
events and call GOMP_PLUGIN_async_unmap_vars() for each of them.
(event_add): Add int parameter, initialize 'val' field when
adding new ptx_event struct.
(nvptx_evec): Adjust event_add() call arguments.
(nvptx_host2dev): Likewise.
(nvptx_dev2host): Likewise.
(nvptx_wait_async): Likewise.
(nvptx_wait_all_async): Likewise.
(GOMP_OFFLOAD_openacc_register_async_cleanup): Add async parameter,
pass to event_add() call.
* oacc-host.c (host_openacc_register_async_cleanup): Add 'int async'
parameter.
* oacc-mem.c (gomp_acc_remove_pointer): Adjust async case to
call openacc.register_async_cleanup_func() hook.
* oacc-parallel.c (GOACC_parallel_keyed): Likewise.
* target.c (gomp_copy_from_async): Delete function.
(gomp_map_vars): Remove async_refcount.
(gomp_unmap_vars): Likewise.
(gomp_load_image_to_device): Likewise.
(omp_target_associate_ptr): Likewise.
* libgomp.h (struct splay_tree_key_s): Remove async_refcount.
(acc_dispatch_t.register_async_cleanup_func): Add int parameter.
(gomp_copy_from_async): Remove.

From-SVN: r236772

GCC expands switch statements in a very simplistic way and tries to use a table...

GCC expands switch statements in a very simplistic way and tries to use a table
expansion even when it is a bad idea for performance or codesize.
GCC typically emits extremely sparse tables that contain mostly default entries
(something which currently cannot be tuned by backends).  Additionally the
computation of the minimum/maximum label offsets is too simplistic so the
tables are often twice as large as necessary.

The cost of a table switch is significant due to the setup overhead, the table
lookup (which due to being sparse and large adds unnecessary cachemisses)
and hard to predict indirect jump.  Therefore it is best to avoid using a table
unless there are many real case labels.

This patch fixes that by setting the default aarch64_case_values_threshold to
16 when the per-CPU tuning is not set.  On SPEC2006 this improves the switch
heavy benchmarks GCC and perlbench both in performance (1-2%) as well as size
(0.5-1% smaller).

    gcc/
* config/aarch64/aarch64.c (aarch64_case_values_threshold):
Return a better case_values_threshold when optimizing.

From-SVN: r236771

SIMD operations like combine prefer to have their operands in FP registers,

so increase the cost of integer registers slightly to avoid unnecessary int<->FP
moves. This improves register allocation of scalar SIMD operations.

        * config/aarch64/aarch64-simd.md (aarch64_combinez):
        Add ? to integer variant.
        (aarch64_combinez_be): Likewise.

From-SVN: r236770

Skip tail call tests on Thumb-1 targets

2016-05-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.dg/plugin/plugin.exp: skip tail call tests for Thumb-1.

From-SVN: r236769

target.c (gomp_device_copy): New function.

libgomp/
2016-05-26  Chung-Lin Tang  <cltang@codesourcery.com>

* target.c (gomp_device_copy): New function.
(gomp_copy_host2dev): Likewise.
(gomp_copy_dev2host): Likewise.
(gomp_free_device_memory): Likewise.
(gomp_map_vars_existing): Adjust to call gomp_copy_host2dev.
(gomp_map_pointer): Likewise.
(gomp_map_vars): Adjust to call gomp_copy_host2dev, handle
NULL value from alloc_func plugin hook.
(gomp_unmap_tgt): Adjust to call gomp_free_device_memory.
(gomp_copy_from_async): Adjust to call gomp_copy_dev2host.
(gomp_unmap_vars): Likewise.
(gomp_update): Adjust to call gomp_copy_dev2host and
gomp_copy_host2dev functions.
(gomp_unload_image_from_device): Handle false value from
unload_image_func plugin hook.
(gomp_init_device): Handle false value from init_device_func
plugin hook.
(gomp_exit_data): Adjust to call gomp_copy_dev2host.
(omp_target_free): Adjust to call gomp_free_device_memory.
(omp_target_memcpy): Handle return values from host2dev_func,
dev2host_func, and dev2dev_func plugin hooks.
(omp_target_memcpy_rect_worker): Likewise.
(gomp_target_fini): Handle false value from fini_device_func
plugin hook.
* libgomp.h (struct gomp_device_descr): Adjust return type of
init_device_func, fini_device_func, unload_image_func, free_func,
dev2host_func,host2dev_func, and dev2dev_func plugin hooks to 'bool'.
* oacc-init.c (acc_shutdown_1): Handle false value from
fini_device_func plugin hook.
* oacc-host.c (host_init_device): Change return type to bool.
(host_fini_device): Likewise.
(host_unload_image): Likewise.
(host_free): Likewise.
(host_dev2host): Likewise.
(host_host2dev): Likewise.
* oacc-mem.c (acc_free): Handle plugin hook fatal error case.
(acc_memcpy_to_device): Likewise.
(acc_memcpy_from_device): Likewise.
(delete_copyout): Add libfnname parameter, handle free_func
hook fatal error case.
(acc_delete): Adjust delete_copyout call.
(acc_copyout): Likewise.
(update_dev_host): Move gomp_mutex_unlock to after
host2dev/dev2host hook calls.

* plugin/plugin-hsa.c (hsa_warn): Adjust 'hsa_error' local variable
to 'hsa_error_msg', for clarity.
(hsa_fatal): Likewise.
(hsa_error): New function.
(init_hsa_context): Change return type to bool, adjust to return
false on error.
(GOMP_OFFLOAD_get_num_devices): Adjust to handle init_hsa_context
return value.
(GOMP_OFFLOAD_init_device): Change return type to bool, adjust to
return false on error.
(get_agent_info): Adjust to return NULL on error.
(destroy_hsa_program): Change return type to bool, adjust to
return false on error.
(GOMP_OFFLOAD_load_image): Adjust to return -1 on error.
(destroy_module): Change return type to bool, adjust to
return false on error.
(GOMP_OFFLOAD_unload_image): Likewise.
(GOMP_OFFLOAD_fini_device): Likewise.
(GOMP_OFFLOAD_alloc): Change to return NULL when called.
(GOMP_OFFLOAD_free): Change to return false when called.
(GOMP_OFFLOAD_dev2host): Likewise.
(GOMP_OFFLOAD_host2dev): Likewise.
(GOMP_OFFLOAD_dev2dev): Likewise.

* plugin/plugin-nvptx.c (CUDA_CALL_ERET): New convenience macro.
(CUDA_CALL): Likewise.
(CUDA_CALL_ASSERT): Likewise.
(map_init): Change return type to bool, use CUDA_CALL* macros.
(map_fini): Likewise.
(init_streams_for_device): Change return type to bool, adjust
call to map_init.
(fini_streams_for_device): Change return type to bool, adjust
call to map_fini.
(select_stream_for_async): Release stream_lock before calls to
GOMP_PLUGIN_fatal, adjust call to map_init.
(nvptx_init): Use CUDA_CALL* macros.
(nvptx_attach_host_thread_to_device): Change return type to bool,
use CUDA_CALL* macros.
(nvptx_open_device): Use CUDA_CALL* macros.
(nvptx_close_device): Change return type to bool, use CUDA_CALL*
macros.
(nvptx_get_num_devices): Use CUDA_CALL* macros.
(link_ptx): Change return type to bool, use CUDA_CALL* macros.
(nvptx_exec): Use CUDA_CALL* macros.
(nvptx_alloc): Use CUDA_CALL* macros.
(nvptx_free): Change return type to bool, use CUDA_CALL* macros.
(nvptx_host2dev): Likewise.
(nvptx_dev2host): Likewise.
(nvptx_wait): Use CUDA_CALL* macros.
(nvptx_wait_async): Likewise.
(nvptx_wait_all): Likewise.
(nvptx_wait_all_async): Likewise.
(nvptx_set_cuda_stream): Adjust order of stream_lock acquire,
use CUDA_CALL* macros, adjust call to map_fini.
(GOMP_OFFLOAD_init_device): Change return type to bool,
adjust code accordingly.
(GOMP_OFFLOAD_fini_device): Likewise.
(GOMP_OFFLOAD_load_image): Adjust calls to
nvptx_attach_host_thread_to_device/link_ptx to handle errors,
use CUDA_CALL* macros.
(GOMP_OFFLOAD_unload_image): Change return type to bool, adjust
return code.
(GOMP_OFFLOAD_alloc): Adjust calls to code to handle error return.
(GOMP_OFFLOAD_free): Change return type to bool, adjust calls to
handle error return.
(GOMP_OFFLOAD_dev2host): Likewise.
(GOMP_OFFLOAD_host2dev): Likewise.
(GOMP_OFFLOAD_openacc_register_async_cleanup): Use CUDA_CALL* macros.
(GOMP_OFFLOAD_openacc_create_thread_data): Likewise.

liboffloadmic/
2016-05-26  Chung-Lin Tang  <cltang@codesourcery.com>

* plugin/libgomp-plugin-intelmic.cpp (offload): Change return type
to bool, adjust return code.
(GOMP_OFFLOAD_init_device): Likewise.
(GOMP_OFFLOAD_fini_device): Likewise.
(get_target_table): Likewise.
(offload_image): Likwise.
(GOMP_OFFLOAD_load_image): Adjust call to offload_image(), change
to return -1 on error.
(GOMP_OFFLOAD_unload_image): Change return type to bool, adjust return
code.
(GOMP_OFFLOAD_alloc): Likewise.
(GOMP_OFFLOAD_free): Likewise.
(GOMP_OFFLOAD_host2dev): Likewise.
(GOMP_OFFLOAD_dev2host): Likewise.
(GOMP_OFFLOAD_dev2dev): Likewise.

From-SVN: r236768

re PR tree-optimization/71280 (ICE on gcc trunk on knl, wsm, ivb and bdw targets)

PR tree-optimization/71280
* gcc.dg/pr71280.c: New test.

From-SVN: r236767

gomp-constants.h (GOMP_VERSION): Increment to 1...

2016-05-26  Chung-Lin Tang  <cltang@codesourcery.com>

include/
* gomp-constants.h (GOMP_VERSION): Increment to 1, add comment to
describe the need for incrementing this macro whenever the plugin
interface is modified.

From-SVN: r236766

sse.md (*vcvtps2ph_store<mask_name>): Use v constraint instead of x constraint.

* config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
instead of x constraint.
(vcvtps2ph256<mask_name>): Likewise.

* gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.

From-SVN: r236765

sse.md (*ssse3_palignr<mode>_perm): Add avx512bw alternative.

* config/i386/sse.md (*ssse3_palignr<mode>_perm): Add avx512bw
alternative.  Formatting fix.

* gcc.target/i386/avx512bw-vpalignr-4.c: New test.
* gcc.target/i386/avx512vl-vpalignr-4.c: New test.

From-SVN: r236764

* config/i386/sse.md
(<mask_codefor>avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Rename
to ...
(avx512vl_shuf_<shuffletype>32x4_1<mask_name>): ... this.
(*avx_vperm_broadcast_v4sf): Use v constraint instead of x.  Use
maybe_evex prefix instead of vex.
(*avx_vperm_broadcast_<mode>): Use v constraint instead of x.  Handle
EXT_REX_SSE_REG_P (op0) case in the splitter.

* gcc.target/i386/avx512vl-vbroadcast-3.c: New test.

From-SVN: r236763

[AArch64, testsuite] Fix vmul_elem_1.c on big-endian

gcc/testsuite/
        * gcc.target/aarch64/simd/vmul_elem_1.c: Force result variables to be
        kept in memory.

From-SVN: r236762

Daily bump.

From-SVN: r236761

re PR tree-optimization/71272 (internal compiler error: in operator[], through tree-ssa-threadupdate.c:1981)

PR tree-optimization/71272
* tree-ssa-threadbackward.c (convert_and_register_jump_thread_path):
Update comments.  Add test for empty path.

PR tree-optimization/71272
* gcc.c-torture/compile/pr71272.c: new test.

From-SVN: r236755

This patch adds support for the vec_cmpne altivec builtins from the Power...

This patch adds support for the vec_cmpne altivec builtins from the Power
Architecture 64-Bit ELF V2 ABI OpenPOWER ABI for Linux Supplement (16 July
2015 Version 1.1). There are many of the builtins that are missing and this
is part of a series of patches to add them.

There aren't instructions for vec_cmpne so the output code is built from other
built-ins that do have instructions which in this case is the following.

vec_cmpneq (va, vb) == vec_nor (vec_cmpeq (va, vb), vec_cmpeq (va, vb))

The new test cases are executable tests which verify that the generated
code produces expected values. C macros were used so that the same
test case could be used for both the signed and unsigned versions of various
basic types. A separate executable test case is used for the long long versions
of vec_cmpne because of some differences in loading and storing the vectors.

[gcc]

2016-05-25  Bill Seurer  <seurer@linux.vnet.ibm.com>

* config/rs6000/altivec.h (vec_cmpne): Add #define for vec_cmpne.
* config/rs6000/rs6000-builtin.def (vec_cmpne): Add vec_cmpne as a
special case builtin.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
code for ALTIVEC_BUILTIN_VEC_CMPNE.
* config/rs6000/rs6000.c (altivec_init_builtins): Add definition
for __builtin_vec_cmpne.

[gcc/testsuite]

2016-05-25  Bill Seurer  <seurer@linux.vnet.ibm.com>

* gcc.target/powerpc/vec-cmpne.c: New test.
* gcc.target/powerpc/vec-cmpne-long.c: New test.

From-SVN: r236753

tree-ssa-phiopt.c (factor_out_conditional_conversion): Remove redundant test and bail out if the type of the new operand is not a...

* tree-ssa-phiopt.c (factor_out_conditional_conversion): Remove
redundant test and bail out if the type of the new operand is not
a GIMPLE register type after stripping a VIEW_CONVERT_EXPR.

From-SVN: r236748

Wduplicated-cond-1.c: Use smaller const literal.

2016-05-25  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

* c-c++-common/Wduplicated-cond-1.c: Use smaller const literal.
* c-c++-common/pr60226.c: Require int32plus.
* gcc.c-torture/execute/pr70602.c: Likewise.
* gcc.dg/Warray-bounds-11.c: Use __SIZE_TYPE__ instead of
unsigned long for malloc arg type.
* gcc.dg/asr_div1.c: Require int32plus.
* gcc.dg/enum-mode-1.c: XFAIL for int16.
* gcc.dg/pie-1.c: Require pie.
* gcc.dg/pie-2.c: Likewise.
* gcc.dg/pr59471.c: Require int32plus.
* gcc.dg/pr59963-2.c: XFAIL for int16.
* gcc.dg/pr60114.c: Require int32plus.
* gcc.dg/pr62090-2.c: Use __SIZE_TYPE__ instead of
unsigned long for typedef of size_t.
* gcc.dg/pr63914.c: Require int32plus.
* gcc.dg/pr64536.c: Require pt32plus.
* gcc.dg/pr65658.c: Likewise.
* gcc.dg/pr67271.c: Require int32plus.
* gcc.dg/pr68112.c: Likewise.
* gcc.dg/pr69071.c: Skip for avr target.
* gcc.dg/pr69973.c: Require int32plus.
* gcc.dg/pr70169.c: Skip for avr target.
* gcc.dg/sso-6.c: Require int32plus.
* gcc.dg/sso-7.c: Likewise.
* gcc.dg/sso-8.c: Likewise.
* gcc.dg/vrp-min-max-2.c: Likewise.

From-SVN: r236741

re PR target/70738 (Add -mgeneral-regs-only option)

PR target/70738
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
(ix86_handle_option) <case OPT_mgeneral_regs_only>: Disable
MPX, MMX, SSE and x87 instructions for -mgeneral-regs-only.
* config/i386/i386.opt (ix86_target_flags): Add new Variable.
(-mgeneral-regs-only): Add new option.
* config/i386/i386.c (ix86_option_override_internal): Don't enable
x87 instructions if only general registers are allowed.
(ix86_target_string): Add ix86_flags argument. Handle additional
flags options through ix86_flags argument.  Update all callers.
* doc/invoke.texi: Document -mgeneral-regs-only.

testsuite/ChangeLog:

PR target/70738
* gcc.target/i386/pr70738-1.c: New test.
* gcc.target/i386/pr70738-2.c: Likewise.
* gcc.target/i386/pr70738-3.c: Likewise.
* gcc.target/i386/pr70738-4.c: Likewise.
* gcc.target/i386/pr70738-5.c: Likewise.
* gcc.target/i386/pr70738-6.c: Likewise.
* gcc.target/i386/pr70738-7.c: Likewise.
* gcc.target/i386/pr70738-8.c: Likewise.
* gcc.target/i386/pr70738-9.c: Likewise.

From-SVN: r236738

Fix comment.

From-SVN: r236737

PR c++/71173 - wrong qualified lookup

PR c++/70522
* cp-tree.h (enum tag_types): Add scope_type.
* parser.c (cp_parser_class_name): Use scope_type.
(prefer_type_arg): Handle scope_type.
(cp_parser_lookup_name): Use prefer_type_arg.
* name-lookup.c (lookup_qualified_name): Change bool is_type_p to
int prefer_type, use lookup_flags.
* name-lookup.h: Adjust.

From-SVN: r236736

* ru.po: Update.

From-SVN: r236732

Fix configure test for sendfile()

* acinclude.m4 (GLIBCXX_CHECK_FILESYSTEM_DEPS): Fix test for sendfile.
* configure: Regenerate.
* config.h.in: Regenerate.

From-SVN: r236730

[RTL ifcvt] PR rtl-optimization/66940: Avoid signed overflow in noce_get_alt_condition

PR rtl-optimization/66940
* ifcvt.c (noce_get_alt_condition): Check that incrementing or
decrementing desired_val will not overflow before performing these
operations.

* gcc.c-torture/execute/pr66940.c: New test.

From-SVN: r236728

AVX-512F: Add vectorizer support builtins

gcc/
* config/i386/i386-builtin-types.def: Add V16SI_FTYPE_V16SF,
V8DF_FTYPE_V8DF_ROUND, V16SF_FTYPE_V16SF_ROUND, V16SI_FTYPE_V16SF_ROUND.
* config/i386/i386.c (enum ix86_builtins): Add
IX86_BUILTIN_CVTPS2DQ512_MASK, IX86_BUILTIN_FLOORPS512,
IX86_BUILTIN_FLOORPD512, IX86_BUILTIN_CEILPS512, IX86_BUILTIN_CEILPD512,
IX86_BUILTIN_TRUNCPS512, IX86_BUILTIN_TRUNCPD512,
IX86_BUILTIN_CVTPS2DQ512, IX86_BUILTIN_VEC_PACK_SFIX512,
IX86_BUILTIN_FLOORPS_SFIX512, IX86_BUILTIN_CEILPS_SFIX512,
IX86_BUILTIN_ROUNDPS_AZ_SFIX512.
(builtin_description bdesc_args): Add __builtin_ia32_floorps512,
__builtin_ia32_ceilps512, __builtin_ia32_truncps512,
__builtin_ia32_floorpd512, __builtin_ia32_ceilpd512,
__builtin_ia32_truncpd512, __builtin_ia32_cvtps2dq512,
__builtin_ia32_vec_pack_sfix512, __builtin_ia32_roundps_az_sfix512,
__builtin_ia32_floorps_sfix512, __builtin_ia32_ceilps_sfix512.
Change IX86_BUILTIN_CVTPS2DQ512 to IX86_BUILTIN_CVTPS2DQ512_MASK for
__builtin_ia32_cvtps2dq512_mask.
(ix86_expand_args_builtin): Handle V8DF_FTYPE_V8DF_ROUND,
V16SF_FTYPE_V16SF_ROUND, V16SI_FTYPE_V16SF_ROUND, V16SI_FTYPE_V16SF.
(ix86_builtin_vectorized_function): Handle builtins mentioned above.
* config/i386/sse.md
(<mask_codefor>avx512f_fix_notruncv16sfv16si<mask_name><round_name>):
Rename to ...
(avx512f_fix_notruncv16sfv16si<mask_name><round_name>): ... this.
(<mask_codefor>avx512f_cvtpd2dq512<mask_name><round_name>): Rename
to ...
(avx512f_cvtpd2dq512<mask_name><round_name>): ... this.
(avx512f_vec_pack_sfix_v8df): New define_expand.
(avx512f_roundpd512): Rename to ...
(avx512f_round<castmode>512): ... this.  Change iterator.
(avx512f_roundps512_sfix): New define_expand.
(round<mode>2_sfix): Change iterator.
gcc/testsuite/
* gcc.target/i386/avx512f-ceil-vec-1.c: New test.
* gcc.target/i386/avx512f-ceil-vec-2.c: New test.
* gcc.target/i386/avx512f-ceilf-sfix-vec-1.c: New test.
* gcc.target/i386/avx512f-ceilf-sfix-vec-2.c: New test.
* gcc.target/i386/avx512f-ceilf-vec-1.c: New test.
* gcc.target/i386/avx512f-ceilf-vec-2.c: New test.
* gcc.target/i386/avx512f-floor-vec-1.c: New test.
* gcc.target/i386/avx512f-floor-vec-2.c: New test.
* gcc.target/i386/avx512f-floorf-sfix-vec-1.c: New test.
* gcc.target/i386/avx512f-floorf-sfix-vec-2.c: New test.
* gcc.target/i386/avx512f-floorf-vec-1.c: New test.
* gcc.target/i386/avx512f-floorf-vec-2.c: New test.
* gcc.target/i386/avx512f-rint-sfix-vec-1.c: New test.
* gcc.target/i386/avx512f-rint-sfix-vec-2.c: New test.
* gcc.target/i386/avx512f-rintf-sfix-vec-1.c: New test.
* gcc.target/i386/avx512f-rintf-sfix-vec-2.c: New test.
* gcc.target/i386/avx512f-round-sfix-vec-1.c: New test.
* gcc.target/i386/avx512f-round-sfix-vec-2.c: New test.
* gcc.target/i386/avx512f-roundf-sfix-vec-1.c: New test.
* gcc.target/i386/avx512f-roundf-sfix-vec-2.c: New test.
* gcc.target/i386/avx512f-trunc-vec-1.c: New test.
* gcc.target/i386/avx512f-trunc-vec-2.c: New test.
* gcc.target/i386/avx512f-truncf-vec-1.c: New test.
* gcc.target/i386/avx512f-truncf-vec-2.c: New test.

From-SVN: r236709

re PR c/71266 (gcc ICE on x86_64-linux-gnu in "store_parm_decls_oldstyle")

PR c/71266
* c-decl.c (store_parm_decls_oldstyle): Skip non-PARM_DECLs.

* gcc.dg/noncompile/old-style-parm-3.c: New test.

From-SVN: r236708

re PR c/71265 (gcc ICE on x86_64-linux-gnu with “seg fault”)

PR c/71265
* c-decl.c (c_make_fname_decl): Don't check seen_error.

* gcc.dg/noncompile/pr71265.c: New test.

From-SVN: r236707

* ru.po: Update.

From-SVN: r236705

msp430.c (msp430_attr): Produce an error if a static interrupt handler is detected.

* config/msp430/msp430.c (msp430_attr): Produce an error if a
static interrupt handler is detected.
* config/msp430/msp430.h (LIB_SPEC): Do not use msp430.ld as the
default linker script.
* config/msp430/msp430.md (movpsihi2_lo): New pattern for loading
the low part of a symbolic pointer.

From-SVN: r236704

crt0.s: Delete.

libgcc/
* config/nvptx/crt0.s: Delete.
* config/nvptx/crt0.c: New.
* t-nvptx: Update.

gcc/testsuite/
* gcc.c-torture/execute/921110-1.c: Fix abort decl.
add missing 2016-05-20  Nathan Sidwell  <nathan@acm.org> entry

From-SVN: r236702

re PR tree-optimization/71261 (Trunk GCC hangs on knl and broadwell targets)

2016-05-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/71261
* tree-if-conv.c (ifcvt_split_def_stmt): Walk uses on the
interesting stmt instead of immediate uses when looking
for the use operand to replace.

* c-c++-common/torture/pr71261.c: New testcase.

From-SVN: r236701

Fix dump output typo

* ipa-inline.c (edge_badness): Use 'w/' instead of 'w'.

From-SVN: r236700

re PR tree-optimization/71264 (ICE in convert_move)

2016-05-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/71264
* tree-vect-stmts.c (vect_init_vector): Properly deal with
vector type val.

* gcc.dg/vect/pr71264.c: New testcase.

From-SVN: r236699

re PR c++/55992 (constexpr static member function not recognised in templated using statement)

2016-05-25  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/55992
* g++.dg/cpp0x/alias-decl-53.C: New.
* g++.dg/cpp0x/alias-decl-54.C: Likewise.

From-SVN: r236698

Remove _GLIBCXX14_USE_CONSTEXPR

* include/bits/c++config (_GLIBCXX14_USE_CONSTEXPR): Remove it.
* include/bits/hashtable_policy.h (_Power2_rehash_policy::_M_next_bkt):
Remove const qualification on function. Replace
_GLIBCXX14_USE_CONSTEXPR on automatic variables with const.
(_Power2_rehash_policy::_M_need_rehash): Remove const qualification.
(_Power2_rehash_policy::_M_next_bkt): Remove mutable specifier.

From-SVN: r236697

re PR tree-optimization/71239 (ICE in operand_equal_p (fold-const.c:2769))

Fix PR tree-optimization/71239.

* g++.dg/pr71239.C: New test.
PR tree-optimization/71239
* tree.c (array_at_struct_end_p): Do not call operand_equal_p
if DECL_SIZE is NULL.

From-SVN: r236696

timevar.def (TV_TREE_LOOP_IFCVT): Add.

2016-05-25  Richard Biener  <rguenther@suse.de>

* timevar.def (TV_TREE_LOOP_IFCVT): Add.
* tree-if-conv.c (pass_data_if_conversion): Use it.

From-SVN: r236695

lambda-generic-static1.C: Use target c++14.

2016-05-24  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/cpp1y/lambda-generic-static1.C: Use target c++14.
* g++.dg/cpp1y/lambda-generic-static2.C: Likewise.

From-SVN: r236694

pr58135.c: Rename to ...

2016-05-25  Richard Biener  <rguenther@suse.de>

* gcc/testsuite/gcc.dg/vect/pr58135.c: Rename to ...
* gcc/testsuite/gcc.dg/vect/bb-slp-pr58135.c: ... this.

From-SVN: r236693

cgraph.c (cgraph_node::get_availability): Fix typo in comment.

* cgraph.c (cgraph_node::get_availability): Fix typo in comment.
* symtab.c (symtab_node::binds_to_current_def_p): Likewise.
* varpool.c (varpool_node::get_availability): Likewise.

From-SVN: r236690

Daily bump.

From-SVN: r236689

* g++.dg/pr65295.C: Use target c++14.

From-SVN: r236683

altivec.md (VNEG iterator): New iterator for VNEGW/VNEGD instructions.

[gcc]
2016-05-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/altivec.md (VNEG iterator): New iterator for
VNEGW/VNEGD instructions.
(p9_neg<mode>2): New insns for ISA 3.0 VNEGW/VNEGD.
(neg<mode>2): Add expander for V2DImode added in ISA 2.06, and
support for ISA 3.0 VNEGW/VNEGD instructions.

[gcc/testsuite]
2016-05-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/p9-vneg.c: New test for ISA 3.0 VNEGW/VNEGD
instructions.

From-SVN: r236679

c-parser.c (c_parser_oacc_declare): Add support for GOMP_MAP_FIRSTPRIVATE_POINTER.

gcc/c/
* c-parser.c (c_parser_oacc_declare): Add support for
GOMP_MAP_FIRSTPRIVATE_POINTER.
* c-typeck.c (handle_omp_array_sections_1): Replace bool is_omp
argument with enum c_omp_region_type ort.
(handle_omp_array_sections): Likewise.  Update call to
handle_omp_array_sections_1.
(c_finish_omp_clauses): Add specific errors and warning messages for
OpenACC.  Use firsrtprivate pointers for OpenACC subarrays.  Update
call to handle_omp_array_sections.

gcc/cp/
* parser.c (cp_parser_oacc_declare): Add support for
GOMP_MAP_FIRSTPRIVATE_POINTER.
* semantics.c (handle_omp_array_sections_1): Replace bool is_omp
argument with enum c_omp_region_type ort.  Don't privatize OpenACC
non-static members.
(handle_omp_array_sections): Replace bool is_omp argument with enum
c_omp_region_type ort.  Update call to handle_omp_array_sections_1.
(finish_omp_clauses): Add specific errors and warning messages for
OpenACC.  Use firsrtprivate pointers for OpenACC subarrays.  Update
call to handle_omp_array_sections.

gcc/
* gimplify.c (omp_notice_variable): Use zero-length arrays for data
pointers inside OACC_DATA regions.
(gimplify_scan_omp_clauses): Prune firstprivate clause associated
with OACC_DATA, OACC_ENTER_DATA and OACC_EXIT data regions.
(gimplify_adjust_omp_clauses): Fix typo in comment.

gcc/testsuite/
* c-c++-common/goacc/data-clause-duplicate-1.c: Adjust test.
* c-c++-common/goacc/deviceptr-1.c: Likewise.
* c-c++-common/goacc/kernels-alias-3.c: Likewise.
* c-c++-common/goacc/kernels-alias-4.c: Likewise.
* c-c++-common/goacc/kernels-alias-5.c: Likewise.
* c-c++-common/goacc/kernels-alias-8.c: Likewise.
* c-c++-common/goacc/kernels-alias-ipa-pta-3.c: Likewise.
* c-c++-common/goacc/pcopy.c: Likewise.
* c-c++-common/goacc/pcopyin.c: Likewise.
* c-c++-common/goacc/pcopyout.c: Likewise.
* c-c++-common/goacc/pcreate.c: Likewise.
* c-c++-common/goacc/pr70688.c: New test.
* c-c++-common/goacc/present-1.c: Adjust test.
* c-c++-common/goacc/reduction-5.c: Likewise.
* g++.dg/goacc/data-1.C: New test.

libgomp/
* oacc-mem.c (acc_malloc): Update handling of shared-memory targets.
(acc_free): Likewise.
(acc_memcpy_to_device): Likewise.
(acc_memcpy_from_device): Likewise.
(acc_deviceptr): Likewise.
(acc_hostptr): Likewise.
(acc_is_present): Likewise.
(acc_map_data): Likewise.
(acc_unmap_data): Likewise.
(present_create_copy): Likewise.
(delete_copyout): Likewise.
(update_dev_host): Likewise.
* testsuite/libgomp.oacc-c-c++-common/asyncwait-1.c: Remove xfail.
* testsuite/libgomp.oacc-c-c++-common/data-2-lib.c: New test.
* testsuite/libgomp.oacc-c-c++-common/data-2.c: Adjust test.
* testsuite/libgomp.oacc-c-c++-common/data-3.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/enter_exit-lib.c: New test.
* testsuite/libgomp.oacc-c-c++-common/lib-13.c: Adjust test so that
it only runs on nvptx targets.
* testsuite/libgomp.oacc-c-c++-common/lib-14.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-15.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-16.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-17.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-18.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-20.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-21.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-22.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-23.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-24.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-25.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-28.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-29.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-30.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-34.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-42.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-43.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-44.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-47.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-48.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-52.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-53.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/lib-54.c: Likewise.

From-SVN: r236678

altivec.md (VParity): New mode iterator for vector parity built-in functions.

[gcc]
2016-05-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/altivec.md (VParity): New mode iterator for vector
parity built-in functions.
(p9v_ctz<mode>2): Add support for ISA 3.0 vector count trailing
zeros.
(p9v_parity<mode>2): Likewise.
* config/rs6000/vector.md (VEC_IP): New mode iterator for vector
parity.
(ctz<mode>2): ISA 3.0 expander for vector count trailing zeros.
(parity<mode>2): ISA 3.0 expander for vector parity.
* config/rs6000/rs6000-builtin.def (BU_P9_MISC_1): New macros for
power9 built-ins.
(BU_P9_64BIT_MISC_0): Likewise.
(BU_P9_MISC_0): Likewise.
(BU_P9V_AV_1): Likewise.
(BU_P9V_AV_2): Likewise.
(BU_P9V_AV_3): Likewise.
(BU_P9V_AV_P): Likewise.
(BU_P9V_VSX_1): Likewise.
(BU_P9V_OVERLOAD_1): Likewise.
(BU_P9V_OVERLOAD_2): Likewise.
(BU_P9V_OVERLOAD_3): Likewise.
(VCTZB): Add vector count trailing zeros support.
(VCTZH): Likewise.
(VCTZW): Likewise.
(VCTZD): Likewise.
(VPRTYBD): Add vector parity support.
(VPRTYBQ): Likewise.
(VPRTYBW): Likewise.
(VCTZ): Add overloaded vector count trailing zeros support.
(VPRTYB): Add overloaded vector parity support.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
overloaded vector count trailing zeros and parity instructions.
* config/rs6000/rs6000.md (wd mode attribute): Add V1TI and TI for
vector parity support.
* config/rs6000/altivec.h (vec_vctz): Add ISA 3.0 vector count
trailing zeros support.
(vec_cntlz): Likewise.
(vec_vctzb): Likewise.
(vec_vctzd): Likewise.
(vec_vctzh): Likewise.
(vec_vctzw): Likewise.
(vec_vprtyb): Add ISA 3.0 vector parity support.
(vec_vprtybd): Likewise.
(vec_vprtybw): Likewise.
(vec_vprtybq): Likewise.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Document
the ISA 3.0 vector count trailing zeros and vector parity built-in
functions.

[gcc/testsuite]
2016-05-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/p9-vparity.c: New file to check ISA 3.0
vector parity built-in functions.
* gcc.target/powerpc/ctz-3.c: New file to check ISA 3.0 vector
count trailing zeros automatic vectorization.
* gcc.target/powerpc/ctz-4.c: New file to check ISA 3.0 vector
count trailing zeros built-in functions.

From-SVN: r236677

lambda-generic-static1.C: Use target c++14.

2016-05-24  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/cpp1y/lambda-generic-static1.C: Use target c++14.
* g++.dg/cpp1y/lambda-generic-static2.C: Likewise.

From-SVN: r236676

tree-ssa-reassoc.c (sort_by_operand_rank): Skip checking gimple_bb when there is stmt_to_insert.

gcc/ChangeLog:

2016-05-24  Kugan Vivekanandarajah  <kuganv@linaro.org>

* tree-ssa-reassoc.c (sort_by_operand_rank): Skip checking gimple_bb
when there is stmt_to_insert.

gcc/testsuite/ChangeLog:

2016-05-24  Kugan Vivekanandarajah  <kuganv@linaro.org>

* gcc.dg/tree-ssa/reassoc-44.c: New test.

From-SVN: r236673

lhs-1.c: Fix testcase to avoid subreg changes.

* gcc.target/powerpc/lhs-1.c: Fix testcase to avoid subreg changes.

From-SVN: r236672

re PR c++/50436 (Crash or hang on invalid template code)

2016-05-24  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/50436
* g++.dg/template/crash123.C: New.
* g++.dg/template/crash124.C: Likewise.

From-SVN: r236671

PR c++/70584 - don't force indirection to an rvalue

* cp-gimplify.c (cp_fold_maybe_rvalue): Loop in case cp_fold
returns a decl.
(cp_fold) [INDIRECT_REF]: Don't fold to an rvalue.

From-SVN: r236670

c++config (_GLIBCXX14_USE_CONSTEXPR): New.

2016-05-24  François Dumont  <fdumont@gcc.gnu.org>

* include/bits/c++config (_GLIBCXX14_USE_CONSTEXPR): New.
* include/bits/hashtable_policy.h
(_Prime_rehash_policy::__has_load_factor): New. Mark rehash policy
having load factor management.
(_Mask_range_hashing): New.
(__clp2): New.
(_Power2_rehash_policy): New.
(_Inserts<>): Remove last template parameter, _Unique_keys, so that
partial specializations only depend on whether iterators are constant
or not.
* testsuite/23_containers/unordered_set/hash_policy/26132.cc: Adapt to
test new hash policy.
* testsuite/23_containers/unordered_set/hash_policy/load_factor.cc:
Likewise.
* testsuite/23_containers/unordered_set/hash_policy/rehash.cc:
Likewise.
* testsuite/23_containers/unordered_set/insert/hash_policy.cc:
Likewise.
* testsuite/23_containers/unordered_set/max_load_factor/robustness.cc:
Likewise.
* testsuite/23_containers/unordered_set/hash_policy/power2_rehash.cc:
New.
* testsuite/performance/23_containers/insert/54075.cc: Add benchmark
using the new hash policy.
* testsuite/performance/23_containers/insert_erase/41975.cc: Likewise.

From-SVN: r236669

PR c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

gcc/ChangeLog:
2016-05-24  Martin Sebor  <msebor@redhat.com>

PR c++/71147
* gcc/tree.h (complete_or_array_type_p): New inline function.

gcc/testsuite/ChangeLog:
2016-05-24  Martin Sebor  <msebor@redhat.com>

PR c++/71147
* g++.dg/ext/flexary16.C: New test.

gcc/cp/ChangeLog:
2016-05-24  Martin Sebor  <msebor@redhat.com>

PR c++/71147
* decl.c (layout_var_decl, grokdeclarator): Use complete_or_array_type_p.
* pt.c (instantiate_class_template_1): Try to complete the element
type of a flexible array member.
(can_complete_type_without_circularity): Handle arrays of unknown bound.
* typeck.c (complete_type): Also complete the type of the elements of
arrays with an unspecified bound.

From-SVN: r236664

i386.h (TARGET_AVOID_4BYTE_PREFIXES): Define.

* config/i386/i386.h (TARGET_AVOID_4BYTE_PREFIXES): Define.
* config/i386/constraints.md (Yr): Test TARGET_AVOID_4BYTE_PREFIXES
rather than X86_TUNE_AVOID_4BYTE_PREFIXES.

From-SVN: r236662

sse.md (<sse4_1>_round<ssemodesuffix><avxsizesuffix>): Limit 1st alternative to noavx isa...

* config/i386/sse.md (<sse4_1>_round<ssemodesuffix><avxsizesuffix>):
Limit 1st alternative to noavx isa, split 2nd alternative into one
noavx and one avx alternative, use *x and Bm in the former and
x and m in the latter.

From-SVN: r236661

sse.md (vec_set<mode>_0): Use sse4_noavx isa instead of sse4 for the first alternative...

* config/i386/sse.md (vec_set<mode>_0): Use sse4_noavx isa instead
of sse4 for the first alternative, drop %v from the template
and d operand modifier.  Split second alternative into one sse4_noavx
and one avx alternative, use *x instead of *v in the former and v
instead of *v in the latter.
(*sse4_1_extractps): Use noavx isa instead of * for the first
alternative, drop %v from the template.  Split second alternative into
one noavx and one avx alternative, use *x instead of *v in the
former and v instead of *v in the latter.
(<vi8_sse4_1_avx2_avx512>_movntdqa): Guard the first 2 alternatives
with noavx and the last one with avx.
(sse4_1_phminposuw): Guard first alternative with noavx isa,
split the second one into one noavx and one avx alternative,
use *x and Bm in the former and x and m in the latter one.
(<sse4_1>_ptest<mode>): Use noavx instead of * for the first two
alternatives.

From-SVN: r236660

sse.md (sse4_1_<code>v8qiv8hi2<mask_name>): Limit first two alternatives to noavx...

* config/i386/sse.md (sse4_1_<code>v8qiv8hi2<mask_name>): Limit
first two alternatives to noavx, use *x instead of *v in the second
one, add avx alternative without *.
(sse4_1_<code>v4qiv4si2<mask_name>, sse4_1_<code>v4hiv4si2<mask_name>,
sse4_1_<code>v2qiv2di2<mask_name>, sse4_1_<code>v2hiv2di2<mask_name>,
sse4_1_<code>v2siv2di2<mask_name>): Likewise.

From-SVN: r236659

avx-ceil-sfix-2-vec.c: Define __NO_MATH_INLINES before math.h is included.

* gcc.target/i386/avx-ceil-sfix-2-vec.c: Define __NO_MATH_INLINES before
math.h is included.
* gcc.target/i386/avx-floor-sfix-2-vec.c: Likewise.
* gcc.target/i386/avx-rint-sfix-2-vec.c: Likewise.
* gcc.target/i386/avx-round-sfix-2-vec.c: Likewise.
* gcc.target/i386/avx512f-ceil-sfix-vec-1.c: Likewise.
* gcc.target/i386/avx512f-floor-sfix-vec-1.c: Likewise.
* gcc.target/i386/sse4_1-ceil-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-ceil-vec.c: Likewise.
* gcc.target/i386/sse4_1-ceilf-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-ceilf-vec.c: Likewise.
* gcc.target/i386/sse4_1-floor-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-floor-vec.c: Likewise.
* gcc.target/i386/sse4_1-rint-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-rint-vec.c: Likewise.
* gcc.target/i386/sse4_1-rintf-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-rintf-vec.c: Likewise.
* gcc.target/i386/sse4_1-round-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-round-vec.c: Likewise.
* gcc.target/i386/sse4_1-roundf-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-roundf-vec.c: Likewise.
* gcc.target/i386/sse4_1-trunc-vec.c: Likewise.
* gcc.target/i386/sse4_1-truncf-vec.c: Likewise.
* gcc.target/i386/sse4_1-floorf-sfix-vec.c: Likewise.
* gcc.target/i386/sse4_1-floorf-vec.c: Likewise.

From-SVN: r236656

p9-vpermr.c: New test for ISA 3.0 vpermr support.

gcc/testsuite/ChangeLog:

2016-05-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
    Kelvin Nilsen  <kelvin@gcc.gnu.org>

* gcc.target/powerpc/p9-vpermr.c: New test for ISA 3.0 vpermr
support.

Co-Authored-By: Kelvin Nilsen <kelvin@gcc.gnu.org>
From-SVN: r236655

tree-ssa-threadbackwards.c (convert_and_register_jump_thread_path): New function, extracted from...

* tree-ssa-threadbackwards.c (convert_and_register_jump_thread_path):
New function, extracted from...
(fsm_find_control_statement_thread_paths): Here.  Use the new function.
Allow simple copies and constant initializations in the SSA chain.

From-SVN: r236653

re PR c++/69872 (-Wnarrowing note without warning/errror)

/cp
2016-05-24  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/69872
* typeck2.c (check_narrowing): Check pedwarn return value.

/testsuite
2016-05-24  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/69872
* g++.dg/warn/Wno-narrowing1.C: New.

From-SVN: r236651

re PR middle-end/71249 (-Wswitch-unreachable false positive for a compound statement containing a used label)

PR c/71249
* gimplify.c (gimplify_switch_expr): Look into the innermost lexical
scope.

* c-c++-common/Wswitch-unreachable-2.c: New test.

From-SVN: r236649

re PR c++/71257 (OpenMP declare simd linear with ref modifier doesn't accept references to non-integer/non-pointer)

PR c++/71257
* tree-vect-stmts.c (vectorizable_simd_clone_call): Handle
SIMD_CLONE_ARG_TYPE_LINEAR_REF_CONSTANT_STEP like
SIMD_CLONE_ARG_TYPE_LINEAR_CONSTANT_STEP.  Add
SIMD_CLONE_ARG_TYPE_LINEAR_VAL_CONSTANT_STEP and
SIMD_CLONE_ARG_TYPE_LINEAR_UVAL_CONSTANT_STEP cases explicitly.

* semantics.c (finish_omp_clauses) <case OMP_CLAUSE_LINEAR>:
For OMP_CLAUSE_LINEAR_REF don't require type to be
integral or pointer.

* g++.dg/vect/simd-clone-6.cc: New test.
* g++.dg/gomp/declare-simd-6.C: New test.

From-SVN: r236648

re PR middle-end/70434 (adding an extraneous cast to vector type results in inferior code)

PR middle-end/70434
PR c/69504
* c-c++-common/vector-subscript-5.c (foo): Move ; out of the ifdef.

From-SVN: r236647

Add priority_queue::value_compare (LWG 2684)

* include/bits/stl_queue.h (priority_queue::value_compare): Define.

From-SVN: r236646

i386.c (ix86_preferred_reload_class): Use IS_STACK_MODE, INTEGER_CLASS_P, FLOAT_CLASS_P and Q_CLASS_P macros.

* config/i386/i386.c (ix86_preferred_reload_class): Use
IS_STACK_MODE, INTEGER_CLASS_P, FLOAT_CLASS_P and Q_CLASS_P macros.

From-SVN: r236645

re PR tree-optimization/71240 (ICE on valid code at -O2 and above on x86_64-linux-gnu: verify_gimple failed)

2016-05-24  Richard Biener  <rguenther@suse.de>

PR tree-optimization/71240
* tree-ssa-math-opts.c (init_symbolic_number): Verify the source
has integral type.

* gcc.dg/optimize-bswapsi-5.c: New testcase.

From-SVN: r236644

re PR tree-optimization/71230 (ICE : in zero_one_operation, at tree-ssa-reassoc.c:1230)

2016-05-24  Richard Biener  <rguenther@suse.de>

PR tree-optimization/71230
* tree-ssa-reassoc.c (zero_one_operation): Handle negate special ops.

* gcc.dg/torture/pr71230.c: New testcase.
* g++.dg/torture/pr71230.C: Likewise.

From-SVN: r236643

Clean up PURE_SLP_STMT handling

The vectorizable_* routines had many instances of:

        slp_node || PURE_SLP_STMT (stmt_info)

which gives the misleading impression that we can have
!slp_node && PURE_SLP_STMT (stmt_info).  In this context
it's really enough to test slp_node on its own.

There are three cases:

      loop vectorisation only:
        vectorizable_foo called only with !slp_node

      pure SLP:
        vectorizable_foo called only with slp_node

      hybrid SLP:
        (e.g. a vector that's used in SLP statements and also in a reduction)
        - vectorizable_foo called once with slp_node for the SLP uses.
        - vectorizable_foo called once with !slp_node for the non-SLP uses.

Hybrid SLP isn't possible for stores, so I added an explicit assert
for that.

I also made vectorizable_comparison static, to make it obvious that
no other callers outside tree-vect-stmts.c could use it with the
!slp && PURE_SLP_STMT combination.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
* tree-vectorizer.h (vectorizable_comparison): Delete.
* tree-vect-loop.c (vectorizable_reduction): Remove redundant
PURE_SLP_STMT check.
* tree-vect-stmts.c (vectorizable_call): Likewise.
(vectorizable_simd_clone_call): Likewise.
(vectorizable_conversion): Likewise.
(vectorizable_assignment): Likewise.
(vectorizable_shift): Likewise.
(vectorizable_operation): Likewise.
(vectorizable_load): Likewise.
(vectorizable_condition): Likewise.
(vectorizable_store): Likewise.  Assert that we don't have
hybrid SLP.
(vectorizable_comparison): Make static.  Remove redundant
PURE_SLP_STMT check.
(vect_transform_stmt): Assert that we always have an slp_node
if PURE_SLP_STMT.

From-SVN: r236642

[ARM][4/4] Simplify checks for CONST_INT_P and comparison against 1/0

* config/arm/neon.md (ashldi3_neon):  Replace comparison of INTVAL of
operands[2] against 1 with comparison against CONST1_RTX.
(<shift>di3_neon): Likewise.
* config/arm/predicates.md (const0_operand): Replace with comparison
against CONST0_RTX.

From-SVN: r236641

[ARM][3/4] Cleanup casts from INTVAL to [unsigned] HOST_WIDE_INT

* config/arm/arm.md (ashldi3): Replace comparison of INTVAL of
operands[2] against 1 with comparison against CONST1_RTX.
(ashrdi3): Likewise.
(lshrdi3): Likewise.
(ashlsi3): Replace cast of INTVAL to unsigned HOST_WIDE_INT with
UINTVAL.
(ashrsi3): Likewise.
(lshrsi3): Likewise.
(rotrsi3): Likewise.
(define_split above *compareqi_eq0): Likewise.
(define_split above "prologue"): Likewise.
* config/arm/arm.c (thumb1_size_rtx_costs): Likewise.
* config/arm/predicates.md (shift_operator): Likewise.
(shift_nomul_operator): Likewise.
(sat_shift_operator): Likewise.
(thumb1_cmp_operand): Likewise.
(const_neon_scalar_shift_amount_operand): Replace manual range
check with IN_RANGE.
* config/arm/thumb1.md (define_peephole2 above *thumb_subdi3):
Replace cast of INTVAL to unsigned HOST_WIDE_INT with UINTVAL.

From-SVN: r236640

Tighten syntax checking for OpenACC routine construct in C

gcc/c/
* c-parser.c (c_parser_oacc_routine): Tighten syntax checks.
gcc/testsuite/
* c-c++-common/goacc/routine-5.c: Add tests.
* g++.dg/goacc/routine-2.C: Remove duplicate tests.
* gfortran.dg/goacc/routine-6.f90: Add tests.

From-SVN: r236639

[ARM][2/4] Replace casts of 1 to HOST_WIDE_INT by HOST_WIDE_INT_1 and HOST_WIDE_INT_1U

* config/arm/arm.md (andsi3): Replace cast of 1 to HOST_WIDE_INT
with HOST_WIDE_INT_1.
(insv): Likewise.
* config/arm/arm.c (optimal_immediate_sequence): Replace cast of
1 to unsigned HOST_WIDE_INT with HOST_WIDE_INT_1U.
(arm_canonicalize_comparison): Likewise.
(thumb1_rtx_costs): Replace cast of 1 to HOST_WIDE_INT with
HOST_WIDE_INT_1.
(thumb1_size_rtx_costs): Likewise.
(vfp_const_double_index): Replace cast of 1 to unsigned
HOST_WIDE_INT with HOST_WIDE_INT_1U.
(get_jump_table_size): Replace cast of 1 to HOST_WIDE_INT with
HOST_WIDE_INT_1.
(arm_asan_shadow_offset): Replace cast of 1 to unsigned
HOST_WIDE_INT with HOST_WIDE_INT_1U.
* config/arm/neon.md (vec_set<mode>): Replace cast of 1 to
HOST_WIDE_INT with HOST_WIDE_INT_1.

From-SVN: r236638

tree-cfg.h (should_remove_lhs_p): New predicate.

* tree-cfg.h (should_remove_lhs_p): New predicate.
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Use it.
* gimplify.c (gimplify_modify_expr): Likewise.
* tree-cfg.c (verify_gimple_call): Likewise.
* tree-cfgcleanup.c (fixup_noreturn_call): Likewise.
* gimple-fold.c: Include "tree-cfg.h".
(gimple_fold_call): Use should_remove_lhs_p.

From-SVN: r236637

re PR tree-optimization/71253 (ICE during loop distribution w/ -O2 -ftree-loop-distribution)

2016-05-24  Richard Biener  <rguenther@suse.de>

PR tree-optimization/71253
* cfganal.h (control_dependences): Make robust against edge
and BB removal.
(control_dependences::control_dependences): Remove edge_list argument.
(control_dependences::get_edge): Remove.
(control_dependences::get_edge_src): Add.
(control_dependences::get_edge_dest): Likewise.
(control_dependences::m_el): Make a vector of edge src/dest index.
* cfganal.c (control_dependences::find_control_dependence): Adjust.
(control_dependences::control_dependences): Likewise.
(control_dependences::~control_dependence): Likewise.
(control_dependences::get_edge): Remove.
(control_dependences::get_edge_src): Add.
(control_dependences::get_edge_dest): Likewise.
* tree-ssa-dce.c (mark_control_dependent_edges_necessary): Use
get_edge_src.
(perform_tree_ssa_dce): Adjust.
* tree-loop-distribution.c (create_edge_for_control_dependence): Use
get_edge_src.
(pass_loop_distribution::execute): Adjust.  Do loop destroying
conditional on changed.

* gcc.dg/torture/pr71253.c: New testcase.

From-SVN: r236636

[ARM] PR target/69857 Remove bogus early return false; in gen_operands_ldrd_strd

PR target/69857
* config/arm/arm.c (gen_operands_ldrd_strd): Remove bogus early
return.  Reindent transformation comment and mention the ARM state
behavior.

From-SVN: r236635

re PR tree-optimization/71252 (ICE: verify_ssa failed : definition in block 7 does not dominate use in block 6)

gcc/testsuite/ChangeLog:

2016-05-24  Kugan Vivekanandarajah  <kuganv@linaro.org>

PR middle-end/71252
* gfortran.dg/pr71252.f90: New test.

gcc/ChangeLog:

2016-05-24  Kugan Vivekanandarajah  <kuganv@linaro.org>

PR middle-end/71252
* tree-ssa-reassoc.c (rewrite_expr_tree_parallel): Add stmt_to_insert after
build_and_add_sum creates new use stmt.

From-SVN: r236634

Avoid unnecessary peeling for gaps with LD3

vectorizable_load forces peeling for gaps if the vectorisation factor
is not a multiple of the group size, since in that case we'd normally load
beyond the original scalar accesses but drop the excess elements as part
of a following permute:

          if (loop_vinfo
              && ! STMT_VINFO_STRIDED_P (stmt_info)
              && (GROUP_GAP (vinfo_for_stmt (first_stmt)) != 0
                  || (!slp && vf % GROUP_SIZE (vinfo_for_stmt (first_stmt)) != 0)))

This isn't necessary for LOAD_LANES though, since it loads only the
data needed and does the permute itself.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
* tree-vect-stmts.c (vectorizable_load): Reorder checks so that
load_lanes/grouped_load classification comes first.  Don't check
whether the vectorization factor is a multiple of the group size
for load_lanes.

gcc/testsuite/
* gcc.dg/vect/vect-load-lanes-peeling-1.c: New test.

From-SVN: r236632

Fix GROUP_GAP for single-element interleaving

vectorizable_load had a curious "force_peeling" variable, with no
comment explaining why we need it for single-element interleaving
but not for other cases.  I think it's simply because we weren't
initialising the GROUP_GAP correctly for single loads.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
* tree-vect-data-refs.c (vect_analyze_group_access_1): Set
GROUP_GAP for single-element interleaving.
* tree-vect-stmts.c (vectorizable_load): Remove force_peeling
variable.

From-SVN: r236631

re PR middle-end/70434 (adding an extraneous cast to vector type results in inferior code)

2016-05-24  Richard Biener  <rguenther@suse.de>

PR middle-end/70434
PR c/69504
c-family/
* c-common.h (convert_vector_to_pointer_for_subscript): Rename to ...
(convert_vector_to_array_for_subscript): ... this.
* c-common.c (convert_vector_to_pointer_for_subscript): Use a
VIEW_CONVERT_EXPR to an array type.  Rename to ...
(convert_vector_to_array_for_subscript): ... this.

cp/
* expr.c (mark_exp_read): Handle VIEW_CONVERT_EXPR.
* constexpr.c (cxx_eval_array_reference): Handle indexed
vectors.
* typeck.c (cp_build_array_ref): Adjust.

c/
* c-typeck.c (build_array_ref): Do not complain about indexing
non-lvalue vectors.  Adjust for function name change.

* tree-ssa.c (non_rewritable_mem_ref_base): Make sure to mark
bases which are accessed with non-invariant indices.
* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Re-write
constant index ARRAY_REFs of vectors into BIT_FIELD_REFs.

* c-c++-common/vector-subscript-4.c: New testcase.
* c-c++-common/vector-subscript-5.c: Likewise.

From-SVN: r236630

re PR libfortran/71123 (Namelist read failure on Windows)

2016-05-23  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

PR libgfortran/71123
* io/list_read (eat_spaces): Eat '\r' as part of spaces.
        fix change log

From-SVN: r236629