Kenneth Graunke [Fri, 9 Jun 2017 19:57:09 +0000 (12:57 -0700)]
i965: Call intel_prepare_render() from intel_update_state()
The resolve code looks at the current color draw buffers. These are not
valid until intel_prepare_render() is called. You can end up with one
color buffer bound, but where the renderbuffer has zero width/height and
no miptree allocated.
You can get a call chain like: _mesa_Clear -> _mesa_update_state ->
intel_update_state, where no brw driver hooks were called, so there is
no other point at which we could have called this.
Fixes crashes in KWin where Clear was causing intel_disable_rb_aux_buffer
to crash on irb != NULL but irb->mt == NULL.
According to Tapani, this also fixes crashes seen on Android.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Grazvydas Ignotas [Sun, 11 Jun 2017 13:46:17 +0000 (16:46 +0300)]
radv: fix trace dumping for !use_ib_bos
Fixes trace dumping crash for SI or when RADV_DEBUG=noibs is set.
Fixes: 97dfff5410 "radv: Dump command buffer on hang."
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Grazvydas Ignotas [Sat, 10 Jun 2017 15:34:22 +0000 (18:34 +0300)]
radv: don't even attempt to prefetch on SI
Before
bcae327469 this was emitting CP DMA packet even on SI, but
apparently hasn't caused too many problems. After that commit the
CP DMA code now always sets the CIK+ only bit for prefetch. Just
follow radeonsi there and don't try to prefetch at all.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101334
Fixes: bcae327469 "radv: realign cp dma code with radeonsi"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Grazvydas Ignotas [Sat, 10 Jun 2017 15:20:13 +0000 (18:20 +0300)]
radv: assert on CP_DMA_USE_L2 for SI
The register header (and radeonsi comment) states V_411_SRC_ADDR_TC_L2
is for CIK+ only, so let's assert on earlier ASICs.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Harish Krupo [Fri, 9 Jun 2017 14:43:34 +0000 (20:13 +0530)]
egl/android: support for EGL_KHR_partial_update
This patch adds support for the EGL_KHR_partial_update extension for
android platform. It passes 36/37 tests in dEQP for EGL_KHR_partial_update.
1 test not supported.
v2: add fallback for eglSetDamageRegionKHR (Tapani)
v3: The native_window_set_surface_damage call is available only from
Android version 6.0. Reintroduce the ANDROID_VERSION guard and
advertise extension only if version is >= 6.0. (Emil Velikov)
v4: use newly introduced ANDROID_API_LEVEL guard rather than
ANDROID_VERSION guard to advertise the extension.The extension
is advertised only if ANDROID_API_LEVEL >= 23 (Android 6.0 or
greater). Add fallback function for platforms other than Android.
Fix possible math overflow. (Emil Velikov)
Return immediately when n_rects is 0. Place function's entrypoint
in alphabetical order. (Eric Engestrom)
v5: Replace unnecessary calloc with malloc (Eric)
Check for BAD_ALLOC error (Emil)
Check for error in native_window_set_damage_region. (Emil, Tapani,
Eric).
Signed-off-by: Harish Krupo <harish.krupo.kps@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Marius Gräfe [Fri, 9 Jun 2017 13:39:00 +0000 (15:39 +0200)]
gallium: fixed modulo zero crashes in tgsi interpreter (v2)
softpipe throws integer division by zero exceptions on windows
when using % with integers in a geometry shader.
v2: Made error results consistent with existing div/mod zero handling in
tgsi. 64 bit signed integer division by zero returns zero like in
micro_idiv, unsigned returns ~0u like in micro_udiv.
Modulo operations always set all result bits to one (like in
micro_umod).
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Grazvydas Ignotas [Tue, 6 Jun 2017 23:19:15 +0000 (02:19 +0300)]
nir: make various getters take const pointers
This will allow to constify other things.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Ben Widawsky [Thu, 11 May 2017 22:37:45 +0000 (15:37 -0700)]
i965/cnl: Add a preliminary device for Cannonlake
v2 (Anuj):
Rebased on master and updated pci ids
Remove redundant initialization of max_wm_threads to 64 * 12.
For gen9+ max_wm_threads are initialized in gen_get_device_info().
v3 (Anuj):
Move the patch to end of series.
Remove unused gt1, gt2, gt3 functions.
Remove l3_banks variable. Variable is now available on master.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Jason Ekstrand [Fri, 9 Jun 2017 00:10:05 +0000 (17:10 -0700)]
anv: Don't advertise support on anything above gen9
This will prevent the driver from even trying to work on Cannon Lake
until we get actual support added.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Anuj Phogat [Tue, 25 Apr 2017 20:54:19 +0000 (13:54 -0700)]
i965/cnl: Enable CCS_E and RT support for few formats
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Tue, 25 Apr 2017 18:34:59 +0000 (11:34 -0700)]
i965/cnl: Reformat surface_format_info table to accomodate gen10+
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Tue, 5 Jan 2016 16:41:39 +0000 (08:41 -0800)]
i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3
v1: By Ben Widawsky <benjamin.widawsky@intel.com>
v2: v1 had an assert only for VS. Add the restriction for GS, HS and
DS as well and make sure the allocated sizes are not multiple of 3.
v3: Move the entry_size checks in to compiler code (Ken)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Anuj Phogat [Thu, 27 Apr 2017 17:35:05 +0000 (10:35 -0700)]
i965/cnl: Don't resolve single sampled color rb in case of sRGB formats
As sRGB now supports lossless compression, we also need to stop resolving
single sampled color render buffers for sRGB formats in Gen 10.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ben Widawsky [Mon, 4 Jan 2016 18:48:39 +0000 (10:48 -0800)]
i965/cnl: Implement depth count workaround
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 15 May 2017 20:04:57 +0000 (13:04 -0700)]
i965/cnl: Start using CNL MOCS defines
CNL MOCS defines are duplicates of SKL MOCS defines.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Tue, 16 May 2017 17:15:17 +0000 (10:15 -0700)]
i965/cnl: Handle gen10 in switch cases across the driver
V2: Start using gen10 functions isl_gen10*(), gen10_blorp_exec()
gen10_init_atoms() (Jason)
Remove Vulkan changes. Do them later in a separate patch.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Thu, 11 May 2017 22:57:46 +0000 (15:57 -0700)]
i965/cnl: Update few assertions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Wed, 19 Apr 2017 21:07:13 +0000 (14:07 -0700)]
i965/cnl: Add cnl bits in aubinator
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 17 Apr 2017 19:55:19 +0000 (12:55 -0700)]
i965/cnl: Add pci id for INTEL_DEVID_OVERRIDE
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Thu, 11 May 2017 18:57:11 +0000 (11:57 -0700)]
i965/cnl: Wire up android Mesa build files for gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Anuj Phogat [Thu, 11 May 2017 21:18:52 +0000 (14:18 -0700)]
i965/cnl: Wire up Mesa build files for gen10
V2: Remove isl_gen10.c and isl_gen10.h
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Anuj Phogat [Fri, 14 Apr 2017 22:09:42 +0000 (15:09 -0700)]
intel/genxml: Update genx_bits for gen10+
This commit adds a gen10 case to the switch statement and
drops some unneeded code for handling gen numbers which
doesn't work on gen10 and above.
V2: Drop "z = float(z)" and the "z *= 10" lines
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Thu, 11 May 2017 21:58:13 +0000 (14:58 -0700)]
i965/cnl: Add gen10 specific function declarations
These declarations will help the code start compiling
once we wire up the makefiles for gen10. Later patches
will start using these functions for gen10.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Thu, 11 May 2017 21:35:10 +0000 (14:35 -0700)]
i965/cnl: Include gen10_pack.h
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 17 Apr 2017 20:48:55 +0000 (13:48 -0700)]
i965/cnl: Define genX(x) and GENX(x) for gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Thu, 11 May 2017 21:16:44 +0000 (14:16 -0700)]
i965/genxml: Add gen10.xml
V2(Anuj):
Add default value for length of 3DPRIMITIVE command
Add values for 'Attribute Active Component Format'
Rename few fields to match gen9.xml
V3 (Ander Conselvan de Oliveira)
Add gen10 alias for MOCS
Make 3DSTATE_CONSTANT_BODY on Gen10 use arrays
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
Ben Widawsky [Tue, 29 Dec 2015 17:11:02 +0000 (09:11 -0800)]
i965: Make feature macros gen8 based
All the "features" of the hardware are similar starting with GEN8, so remove as
much of the GEN9 uniqueness as possible. This makes implementing future gen
platforms a bit easier.
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dave Airlie [Fri, 9 Jun 2017 01:11:29 +0000 (02:11 +0100)]
radv: set fmask state to all 0s when no fmask. (v2)
The shader reads the descriptor to decide if it should take the
fmask value, however we weren't initing it always, which meant
random crap, esp with MSAA depth textures.
Fixes random hangs with:
dEQP-VK.glsl.builtin_var.fragdepth.*
v2: check fmask_state is not NULL
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Matt Turner [Thu, 8 Jun 2017 22:13:42 +0000 (15:13 -0700)]
i965: Temporarily disable async mappings on non-LLC
Fixes regressions from commits
e0a9b261e593 and
a16355d67d92 by
neutering async mappings on non-LLC to be synchronous, like they were
before those two commits. :(
The failing tests include
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_index_only
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_combined_vertex_and_index
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_separate_vertex_and_index
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_vertex_only
piglit-test piglit.spec.arb_pixel_buffer_object.texsubimage-unpack pbo
Rafael Antognolli [Mon, 5 Jun 2017 18:04:26 +0000 (11:04 -0700)]
mesa/main/debug: Check if we successfully reopened the ppm file.
Since we created the file, we should be able to reopen it for appending, but
some weird filesystem error could cause that to be false. So simply check
whether we could reopen it or not.
CID:
1177144
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Brian Paul [Fri, 9 Jun 2017 13:45:02 +0000 (07:45 -0600)]
tgsi: clarify TGSI_SEMANTIC_SAMPLEMASK documentation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Frank Richter [Wed, 7 Jun 2017 07:43:43 +0000 (09:43 +0200)]
gallium/wgl: Allow context creation even if SetPixelFormat() wasn't called
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101326
Reviewed-by: Brian Paul <brianp@vmware.com>
Varad Gautam [Tue, 30 May 2017 11:53:47 +0000 (17:23 +0530)]
st/dri: support format modifier queries
ask the driver for supported modifiers for a given format.
v2: move to __DRIimageExtension v16.
v3: fail if the supplied format is not supported by driver.
v4: purge PIPE_CAP_QUERY_DMABUF_ATTRIBS.
v5:
- move to __DRIimageExtension v15, pass external_only to the driver.
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> (v4)
Cc: Lucas Stach <l.stach@pengutronix.de>
Varad Gautam [Tue, 30 May 2017 11:53:46 +0000 (17:23 +0530)]
gallium: introduce format modifier querying
format modifiers tokens are driver specific, and hence, need to come
in from the driver. this allows drivers to be queried for supported
format modifiers for EGL_EXT_image_dma_buf_import_modifiers.
v2: rebase to master.
v3: drivers must return false on query failure.
v4: use pscreen->is_format_supported instead of adding a separate
format query handle, remove PIPE_CAP_QUERY_DMABUF_ATTRIBS.
(Lucas Stach)
v5: add external_only parameter.
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Varad Gautam [Tue, 30 May 2017 11:53:45 +0000 (17:23 +0530)]
st/dri: support format queries
ask the driver for supported dmabuf formats
v2: rebase to master.
v3: return false on failure.
v4: use pscreen->is_format_supported instead of adding a new query.
(Lucas Stach)
v5: stylefix to conform to formatting rules (Brian Paul). add fourcc list
here instead of using struct image_format from v4.
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> (v4)
Cc: Lucas Stach <l.stach@pengutronix.de>
Varad Gautam [Tue, 30 May 2017 11:53:44 +0000 (17:23 +0530)]
st/dri: implement DRIimage creation from dmabufs with modifiers
support importing dmabufs into DRIimage while taking format modifiers
in account, as per DRIimage extension version 15.
v2: initialize winsys modifier to DRM_FORMAT_MOD_INVALID (Daniel Stone)
v3: do not bump DRIimageExtension version. split out winsys changes.
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Varad Gautam [Tue, 30 May 2017 11:53:43 +0000 (17:23 +0530)]
st/dri: implement createImageWithModifiers in DRIimage
adds a pscreen->resource_create_with_modifiers() to create textures
with modifier.
v2:
- stylefixes (Emil Velikov)
- don't return selected modifier from resource_create_with_modifiers. we can
use the winsys_handle to get this.
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> (v1)
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Varad Gautam [Tue, 30 May 2017 11:53:42 +0000 (17:23 +0530)]
st/dri: enable DRIimage modifier queries
return the modifier selected by the driver when creating this image.
v2: since we can use winsys_handle->modifier to serve these, remove
DRIimage->modifier from v1.
use DRM_API_HANDLE_TYPE_KMS instead of DRM_API_HANDLE_TYPE_FD to avoid
ownership transfer. (Lucas)
Suggested-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Varad Gautam [Tue, 30 May 2017 11:53:41 +0000 (17:23 +0530)]
gallium/winsys/drm: introduce modifier field to winsys_handle
we use this to import resources with format modifiers, and to support
per-resource modifier queries.
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Samuel Pitoiset [Tue, 6 Jun 2017 13:23:58 +0000 (15:23 +0200)]
mesa: make use of NewScissorTest driver flags
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Tue, 6 Jun 2017 13:21:43 +0000 (15:21 +0200)]
mesa: make use of NewScissorRect driver flags
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Tue, 6 Jun 2017 13:03:50 +0000 (15:03 +0200)]
mesa: add gl_driver_flags::NewScissor{Rect,Test}
_NEW_SCISSOR mesa flag is set when a scissor test is enabled/disabled
or when a new rectangle is defined. However, it triggers too much
changes in the state tracker.
Actually, ST_NEW_RASTERIZER should only be called when a scissor
test is enabled/disabled, while ST_NEW_SCISSOR should be called
in both situations.
In other words, this will avoid to update the rasterizer every
time a new rectangle is defined using glScissor*().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tapani Pälli [Thu, 8 Jun 2017 09:24:24 +0000 (12:24 +0300)]
egl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT case
Specification states that in case of error, value should not be
written, patch changes buffer age queries to return -1 in case of
error so that we can skip changing the value.
In addition, small change to droid_query_buffer_age to return 0
in case buffer does not have a back buffer available.
Fixes:
dEQP-EGL.functional.negative_partial_update.not_postable_surface
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
Dave Airlie [Tue, 9 May 2017 03:17:30 +0000 (04:17 +0100)]
radv: introduce perf test env var and allow to enable chaining
We have some features that seem to slow things down or cause other
possible undesireable side effects, but it would be nice to test
games etc with them easily.
I forsee multisample DCC and maybe some shader opt changes using this.
For now use it for batch chaining.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Thu, 8 Jun 2017 06:15:58 +0000 (16:15 +1000)]
mesa: add KHR_no_error support to glDrawRangeElements*()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 7 Jun 2017 04:02:03 +0000 (14:02 +1000)]
mesa: rework _ae_invalidate_state() so that it just sets a dirty flag
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 7 Jun 2017 03:58:34 +0000 (13:58 +1000)]
mesa: remove redundant _ae_invalidate_state() call
The FLUSH_VERTICES(ctx, _NEW_ARRAY) above this will already cause
this to be called.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 7 Jun 2017 03:26:16 +0000 (13:26 +1000)]
mesa: inline vbo_exec_invalidate_state() and call from mesa core
Rather than calling it indirectly in each driver.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 7 Jun 2017 02:43:27 +0000 (12:43 +1000)]
mesa: rework vbo_exec_init()
Here we make some assumptions about the AEcontext and set the
recalculate bools directly.
Some formating fixes are also made while we are here.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 7 Jun 2017 02:19:13 +0000 (12:19 +1000)]
mesa: stop passing state bitfield to UpdateState()
The code comment which seems to have been added in
cab974cf6c2db
(from year 2000) says:
"Set ctx->NewState to zero to avoid recursion if
Driver.UpdateState() has to call FLUSH_VERTICES(). (fixed?)"
As far as I can tell nothing in any of the UpdateState() calls
should cause it to be called recursively.
V2: add a wrapper around the osmesa update function so it can still
be used internally.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 7 Jun 2017 02:14:54 +0000 (12:14 +1000)]
st/mesa: add st_invalidate_buffers() helper
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 7 Jun 2017 01:28:23 +0000 (11:28 +1000)]
r200/radeon: stop calling _ae_invalidate_state() directly
It is already called via _vbo_InvalidateState().
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Tim Rowley [Thu, 8 Jun 2017 15:38:52 +0000 (10:38 -0500)]
swr: relax c++ requirement from c++14 to c++11
Remove c++14 generic lambda to keep compiler requirement at c++11.
No regressions on piglit or vtk test suites.
Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
CC: mesa-stable@lists.freedesktop.org
Juan A. Suarez Romero [Thu, 8 Jun 2017 19:22:08 +0000 (21:22 +0200)]
radeonsi: call LLVMAddEarlyCSEMemSSAPass only for LLVM >= 4.0
LLVMAddEarlyCSEMemSSAPass() is defined in LLVM 4.0.
Fixes: 257b538 ("radeonsi: do EarlyCSEMemSSA LLVM pass)
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Tue, 6 Jun 2017 21:54:23 +0000 (23:54 +0200)]
gallium/radeon: don't allocate HTILE in a separate buffer
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 6 Jun 2017 22:58:46 +0000 (00:58 +0200)]
radeonsi: rename depth decompress functions
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 6 Jun 2017 22:51:23 +0000 (00:51 +0200)]
radeonsi: rename shader resource decompress masks to their true meaning
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 6 Jun 2017 22:27:14 +0000 (00:27 +0200)]
radeonsi: rename is_compressed_colortex -> color_needs_decompression
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 6 Jun 2017 13:23:42 +0000 (15:23 +0200)]
radeonsi: disable the patch ID workaround on SI when the patch ID isn't used (v2)
The workaround causes a massive performance decrease on 1-SE parts.
(Cape Verde, Hainan, Oland)
The performance regression is already part of 17.0 and 17.1.
v2: check tess_uses_prim_id
Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 5 Jun 2017 00:00:52 +0000 (02:00 +0200)]
radeonsi: don't update dependent states if it has no effect (v2)
This and the previous clip_regs commit decrease IB sizes and the number of
si_update_shaders invocations as follows:
IB size si_update_shaders calls
Borderlands 2 -10% -27%
Deus Ex: MD -5% -11%
Talos Principle -8% -30%
v2: always dirty cb_render_state in set_framebuffer_state
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Varad Gautam [Tue, 30 May 2017 11:54:09 +0000 (17:24 +0530)]
i965: Add format/modifier advertising
v2: Rebase and reuse tiling/modifier map. (Daniel Stone)
v3: bump DRIimageExtension to version 15, fill external_only array.
v4: Y-tiling works since gen 6
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Varad Gautam [Tue, 30 May 2017 11:54:08 +0000 (17:24 +0530)]
i965: Support dmabuf import with modifiers
Add support for createImageFromDmaBufs2, adding a modifier to the
original, and allow importing CCS resources with auxiliary data from
dmabufs.
v2: avoid DRIimageExtension version bump, pass single modifier to
createImageFromDmaBufs2.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Daniel Stone [Tue, 30 May 2017 11:53:48 +0000 (17:23 +0530)]
i965: Improve same-buffer restriction for imports
Intel hardware requires that all planes of an image come from the same
buffer, which is currently implemented by testing that all FDs are
numerically the same.
However, when going through a winsys (e.g.) or anything which transits
FDs individually, the FDs may be different even if the underlying buffer
is the same.
Instead of checking the FDs for equality, we must check if they actually
point to the same buffer (Jason).
Reviewed-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ben Widawsky [Tue, 30 May 2017 11:53:55 +0000 (17:23 +0530)]
i965: Allocate tile aligned height
This patch shouldn't actually do anything because the libdrm function
should already do this alignment. However, it preps us for a future
patch where we add in the CCS AUX size, and in the process it serves as
a good place to find bisectable issues if libdrm or kernel does
something incorrectly.
v2: Do proper alignment for X tiling, and make sure non-tiled case is
handled (Jason)
v3: Rebase (Daniel)
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Daniel Stone [Tue, 6 Jun 2017 10:53:55 +0000 (11:53 +0100)]
i965: Move fallback size assignment out of bufmgr
The bufmgr took a mandatory size argument, which would only be used if
the kernel size query failed, i.e. an older kernel. It didn't actually
check that the BO size was sufficient for use.
Pull the check out of the bufmgr, and actually check that the BO is
sufficiently-sized for our import one level up. This also resolves a
chicken/egg we have when importing bufers without explicit modifiers,
namely that we need the tiling mode to calculate the size, but we need
the BO imported to query the tiling mode.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Daniel Stone [Tue, 30 May 2017 11:53:49 +0000 (17:23 +0530)]
i965: Invert image modifier/tiling inference
When allocating images, we record a tiling mode and then work backwards
to infer the modifier. Unfortunately this is the wrong way around, since
it is a one:many mapping (e.g. TILING_Y can be plain Y-tiling, or
Y-tiling with CCS).
Invert the mapping, so we record a modifier first and then map this to a
tiling mode.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Daniel Stone [Mon, 5 Jun 2017 13:30:02 +0000 (14:30 +0100)]
egl/dri2: Avoid sign extension when building modifier
Since the EGL attributes are signed integers, a straight OR would
also perform sign extension,
Fixes: 6f10e7c37a ("egl/dri2: Create EGLImages with dmabuf modifiers")
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Vinson Lee [Thu, 8 Jun 2017 07:15:59 +0000 (00:15 -0700)]
i915g: Add blitter_context argument.
Fix build error.
CC i915_surface.lo
i915_surface.c:108:63: error: too few arguments to function call, expected 4, have 3
util_blitter_default_src_texture(&src_templ, src, src_level);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
../../../../src/gallium/auxiliary/util/u_blitter.h:271:1: note: 'util_blitter_default_src_texture' declared here
void util_blitter_default_src_texture(struct blitter_context *blitter,
^
Fixes: a893c9169733 ("gallium/u_blitter: use 2D_ARRAY for cubemap blits if possible")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101340
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Lucas Stach [Mon, 15 May 2017 15:06:41 +0000 (17:06 +0200)]
etnaviv: flush resource when binding as sampler view
As TS is also allowed on sampler resources, we need to make sure to resolve
to self when binding the resource as a texture, to avoid stale content
being sampled.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Lucas Stach [Sun, 4 Jun 2017 04:24:20 +0000 (06:24 +0200)]
etnaviv: don't flush resource to self without TS
A resolve to self is only necessary if the resource is fast cleared, so
there is never a need to do so if there is no TS allocated.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Lucas Stach [Thu, 18 May 2017 15:05:02 +0000 (17:05 +0200)]
etnaviv: upgrade DISCARD_RANGE to DISCARD_WHOLE_RESOURCE if possible
Stolen from VC4. As we don't do any fancy reallocation tricks yet, it's
possible to upgrade also coherent mappings and shared resources.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Lucas Stach [Thu, 18 May 2017 14:44:18 +0000 (16:44 +0200)]
etnaviv: simplify transfer tiling handling
There is no need to special case compressed resources, as they are already
marked as linear on allocation. With that out of the way, there is room to
cut down on the number of if clauses used.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Lucas Stach [Thu, 18 May 2017 14:30:02 +0000 (16:30 +0200)]
etnaviv: don't read back resource if transfer discards contents
Reduces bandwidth usage of transfers which discard the buffer contents,
as well as skipping unnecessary command stream flushes and CPU/GPU
synchronization.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Lucas Stach [Thu, 18 May 2017 16:20:12 +0000 (18:20 +0200)]
etnaviv: honor PIPE_TRANSFER_UNSYNCHRONIZED flag
This gets rid of quite a bit of CPU/GPU sync on frequent vertex buffer
uploads and I haven't seen any of the issues mentioned in the comment,
so this one seems stale.
Ignore the flag if there exists a temporary resource, as those ones are
never busy.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Lucas Stach [Thu, 18 May 2017 13:37:02 +0000 (15:37 +0200)]
etnaviv: slim down resource waiting
cpu_prep() already does all the required waiting, so the only thing that
needs to be done is flushing the commandstream, if a GPU write is pending.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Rob Herring [Thu, 1 Jun 2017 00:56:56 +0000 (19:56 -0500)]
glsl: Fix gl_shader_stage enum unsigned comparison
Replace -1 with MESA_SHADER_NONE enum value to fix sign related warning:
external/mesa3d/src/compiler/glsl/link_varyings.cpp:1415:25: warning: comparison of constant -1 with expression of type 'gl_shader_stage' is always true [-Wtautological-constant-out-of-range-compare]
(consumer_stage != -1 && consumer_stage != MESA_SHADER_FRAGMENT))) {
~~~~~~~~~~~~~~ ^ ~~
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Rob Herring [Thu, 8 Jun 2017 01:56:07 +0000 (20:56 -0500)]
Android: vulkan: fix build error due to extra )
Commit
621b3410f5f8 ("util/vulkan: Move Vulkan utilities to
src/vulkan/util") broke the Android build with the following error:
build/core/binary.mk:1427: error: external/mesa3d/src/vulkan/Android.mk: libmesa_vulkan_util: Unused source files: util/vk_util.h).
Fixes: 621b3410f5f8 ("util/vulkan: Move Vulkan utilities to src/vulkan/util")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: Alex Smith <asmith@feralinteractive.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Iago Toral Quiroga [Thu, 8 Jun 2017 06:38:29 +0000 (08:38 +0200)]
Fix glcpp test expectations
With commit
f7741985be0234 we have changed some preprocessor
error messages and warnings. Adapt related glcpp tests
expectations accordingly.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101336
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Vlad Golovkin [Mon, 29 May 2017 23:51:32 +0000 (02:51 +0300)]
util: make set's deleted_key_value declaration consistent with hash table one
This also silences following clang warnings:
no previous extern declaration for non-static variable 'deleted_key' [-Werror,-Wmissing-variable-declarations]
const void *deleted_key = &deleted_key_value;
^
no previous extern declaration for non-static variable 'deleted_key_value'
[-Werror,-Wmissing-variable-declarations]
uint32_t deleted_key_value;
^
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jason Ekstrand [Fri, 26 May 2017 19:18:49 +0000 (12:18 -0700)]
i965: Delete intel_resolve_map
Now that we've moved over to the new array mechanism, it's no longer
needed.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Fri, 26 May 2017 19:12:06 +0000 (12:12 -0700)]
i965: Use the new tracking mechanism for HiZ
This is similar to the previous commit only for HiZ. For HiZ, apart
from everything looking different, there is really only one functional
change: We now track the ISL_AUX_STATE_COMPRESSED_NO_CLEAR state.
Previously, if you rendered to a resolved slice of the miptree and then
did a fast-clear with a different clear color, that slice would get
resolved even though it hadn't been fast-cleared. Now that we can track
COMPRESSED_NO_CLEAR, we know that it doesn't have any blocks in the
"clear" state so we can skip the resolve.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Wed, 31 May 2017 18:50:24 +0000 (11:50 -0700)]
i965/miptree: Make level_has_hiz take a const miptree
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Fri, 26 May 2017 00:18:30 +0000 (17:18 -0700)]
i965: Wholesale replace the color resolve tracking code
This commit reworks the resolve tracking for CCS and MCS to use the new
isl_aux_state enum. This should provide much more accurate and easy to
reason about tracking. In order to understand, for instance, the
intel_miptree_prepare_ccs_access function, one only has to go look at
the giant comment for the isl_aux_state enum and follow the arrows.
Unfortunately, there's no good way to split this up without making a
real mess so there are a bunch of changes in here:
1) We now do partial resolves. I really have no idea how this ever
worked before. So far as I can tell, the only time the old code
ever did a partial resolve was when it was using CCS_D where a
partial resolve and a full resolve are the same thing.
2) We are now tracking 4 states instead of 3 for CCS_E. In particular,
we distinguish between compressed with clear and compressed without
clear. The end result is that you will never get two partial
resolves in a row.
3) The texture view rules are now more correct. Previously, we would
only bail if compression was not supported by the destination
format. However, this is not actually correct. Not all format
pairs are supported for texture views with CCS even if both support
CCS individually. Fortunately, ISL has a helper for this.
4) We are no longer using intel_resolve_map for tracking aux state but
are instead using a simple array of enum isl_aux_state indexed by
level and layer. This is because, now that we're tracking 4
different states, it's no longer clear which should be the "default"
and array lookups are faster than linked list searches.
5) The new code is very assert-happy. Incorrect transitions will now
get caught by assertions rather than by rendering corruption.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 22:02:23 +0000 (15:02 -0700)]
i965: Delete most of the old resolve interface
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 23:09:04 +0000 (16:09 -0700)]
i965: Use the new get/set_aux_state functions for color clears
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 21:50:26 +0000 (14:50 -0700)]
i965: Move blorp to the new resolve functions
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 21:15:44 +0000 (14:15 -0700)]
i965: Move depth to the new resolve functions
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 19:30:50 +0000 (12:30 -0700)]
i965: Move images to the new resolve functions
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 19:26:00 +0000 (12:26 -0700)]
i965: Move framebuffer fetch to the new resolve functions
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 19:14:52 +0000 (12:14 -0700)]
i965: Remove an unneeded render_cache_set_check_flush
This is only needed to fix rendering corruptions caused by not flushing
after doing a resolve operation. The resolve now does all the needed
flushing so this is unnecessary.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 18:58:40 +0000 (11:58 -0700)]
i965: Move color rendering to the new resolve functions
This also removes an unneeded brw_render_cache_set_check_flush() call.
We were calling it in the case where the surface got resolved to satisfy
the flushing requirements around resolves. However, blorp now does this
itself, so the extra is just redundant.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 18:29:17 +0000 (11:29 -0700)]
i965: Move texturing to the new resolve functions
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 05:09:51 +0000 (22:09 -0700)]
i965: Use the new resolve function for several simple cases
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 05:09:30 +0000 (22:09 -0700)]
i965/miptree: Add new entrypoints for resolve management
This commit adds a new unified interface for doing resolves. The basic
format is that, prior to any surface access such as texturing or
rendering, you call intel_miptree_prepare_access. If the surface was
written, you call intel_miptree_finish_write. These two functions take
parameters which tell them whether or not auxiliary compression and fast
clears are supported on the surface. Later commits will add wrappers
around these two functions for texturing, rendering, etc.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Thu, 25 May 2017 03:01:12 +0000 (20:01 -0700)]
intel/isl: Add an enum for describing auxiliary compression state
This enum describes all of the states that a auxiliary compressed
surface can have. All of the states as well as normative language for
referring to each of the compression operations is provided in the
truly colossal comment for the new isl_aux_state enum. There is also
a diagram showing how surfaces move between the different states.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 18:47:13 +0000 (11:47 -0700)]
i965: Combine render target resolve code
We have two different bits of resolve code for render targets: one in
brw_draw where it's always been and one in brw_context to deal with sRGB
on gen9. Let's pull them together.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Wed, 31 May 2017 17:06:31 +0000 (10:06 -0700)]
i965: Be a bit more conservative about certain resolves
There are several places where we were resolving the entire miptree
when we really only needed to resolve a single slice. Let's avoid the
unneeded resolving.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Fri, 26 May 2017 02:13:47 +0000 (19:13 -0700)]
i965/blorp: Move MCS allocation earlier for clears
This way it happens before we call get_aux_state.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Tue, 23 May 2017 04:27:50 +0000 (21:27 -0700)]
i965/blorp: Refactor do_single_blorp_clear
Previously, we had two checks for can_fast_clear and a tiny bit of
shared code in between. This commit pulls all of the fast clear code
together and duplicates the tiny bit that declares some surface structs
and calls blorp_surf_for_miptree. The duplication is no real loss and
we're about to change the two in slightly different ways.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 May 2017 23:59:12 +0000 (16:59 -0700)]
i965/blorp: Take an explicit fast clear op in resolve_color
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>