pan/midgard: Sketch static analysis to uniform count

This one is a little tricky, but the idea is that:

   r16-r23 are always uniforms

   r8-r15 are sometimes work, sometimes uniforms...
      ...but as work, they are always written before use
      ...and as uniforms, they are never written before use

So we use that heuristic to determine the count to feed the machine.
We'll record work register use in the next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Hoist shader-db stats to shared decode

We'll want all this information to validate the shader descriptor.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

nir: Remove nir_const_load_to_arr

There are no remaining users in-tree.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

pan/midgard,bifrost: Expand nir_const_load_to_arr

Panfrost is the only user of the macro; we are better off expanding than
having random stuff in nir.h.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

glx: Make __glXGetDrawableAttribute return true sometimes

Right now it always returns zero, but as of:

    commit a48a6b8a400e6e92961cf7b7b4c287e8e9875f39
    Author: Adam Jackson <ajax@redhat.com>
    Date:   Tue Nov 14 15:13:05 2017 -0500

        glx: Prepare driFetchDrawable for no-config contexts

We were hoping it would return true if the drawable could actually be
looked up. It wasn't, so that didn't go very well. With the most recent
update to <GL/glxext.h> glXQueryGLXPbufferSGIX (correctly) returns void,
so there's no longer anything else besides driFetchDrawable that depends
on the return value from __glXGetDrawableAttribute.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

glx: Sync <GL/glxext.h> with Khronos

Minor fixups required to keep the prototypes matching and to remove
mention of retired enums.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

glx: Whitespace cleanups

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

swr: use LLVM version string instead of re-computing it

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

llvmpipe: use LLVM version string instead of re-computing it

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

scons: define MESA_LLVM_VERSION_STRING like the other build systems do

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: Disable NGG for geometry shaders.

A bunch of remaining issues including some that affect users.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111248
Fixes: ee21bd7440c "radv/gfx10: implement NGG support (VS only)"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

util/timespec: use unsigned 64 bit integers for nsec values

We added this utility for vulkan where all timeouts are given as
uint64_t values. We can switch from signed to unsigned as this is the
only user and if we ever deal with signed integers somewhere else
we'll have to be careful to use the corresponding
timespec_(add|sub)_msec and always pass absolute values.

v2: Forgot to drop the test calling add_nsec() with a negative number

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Fixes: d2d70c3bb5 ("util: add a timespec helper")
Acked-by: Daniel Stone <daniels@collabora.com>

iris/android: fix build and link with libmesa_intel_perf

Fixes: 0fd4359733e "iris/perf: implement routines to return counter info"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

ac: fix exclusive scans on GFX8-GFX9

This fixes a regression introduced with scan&reduce operations
on GFX10. Note that some subgroups CTS still fail on GFX10 but
I assume it's a different issue.

This fixes dEQP-VK.subgroups.arithmetic.*.subgroupexclusive*.

Fixes: 227c29a80de "amd/common/gfx10: implement scan & reduce operations"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

util: fix os_create_anonymous_file on android

Commit fixes current crashes with Vulkan applications on Android.

Fixes: c0376a123418 "util: add anon_file.h for all memfd/temp file usage"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>

i965: honor scanout requirement from DRI

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

gallium/noop: Implement resource_get_param

v2: Pass through to oscreen rather than faking it (review from Marek).

Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/rbug: Wrap resource_get_param if available

Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/trace: Wrap resource_get_param if available

Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/ddebug: Wrap resource_get_param if available

Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: recover target_check before get_current_tex_objects

At compressed_tex_sub_image we only can obtain the tex_object after
compressed_subtexture_target_check is validated for TEX_MODE_CURRENT.
So if the target is wrong the error is raised to the user.

This completes the fix for the regression introduced on "mesa: refactor
compressed_tex_sub_image function" of the pending failing tests:

dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d
dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.compressedtexsubimage3d

v2: Fix warning that texObj might be used uninitialized (Gert Wollny)

Fixes: 7df233d68dc ("mesa: refactor compressed_tex_sub_image function")
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>

gallium: Add buffer and configs handling or fp16 formats

Expose configs when allow_fp16_configs has been enabled and
DRI_LOADER_CAP_FP16 is set in the loader.

Also, make kms_swrast_dri respect format bpp, to allow for allocating
buffers wider than 32 bpp.

Make fp16 opt-in for gallium.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

i965: Add handling for fp16 configs

Expose configs when allow_fp16_configs has been enabled and
DRI_LOADER_CAP_FP16 is set in the loader.

Also, define a new dri configuration option so users can disable exposure of
fp16 formats. Make fp16 opt-in for i965.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

gbm: Add buffer handling and visuals for fp16 formats

Define and set a new loader cap DRI_LOADER_CAP_FP16, indicating that gbm can
handle fp16 formats.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

dri: Add fp16 formats

Add dri formats for RGBA ordered 64 bpp IEEE 754 half precision floating
point. Leverage existing offscreen render support for
MESA_FORMAT_RGBA_FLOAT16 and MESA_FORMAT_RGBX_FLOAT16.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: Handle dri configs with floating point pixel data

In the case that __DRI_ATTRIB_FLOAT_BIT is set in the dri config, set
EGL_COLOR_COMPONENT_TYPE_FLOAT_EXT in the egl config. Add a field to the
platform driver visual to indicate if it has components that are in floating
point form.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

dri: Handle configs with floating point pixel data

In order to handle pixel formats that consist of floating point data, enable
floatMode field in the dri config, and set __DRI_ATTRIB_FLOAT_BIT in the
render type attribute.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

glx: Add fields for color shifts

glx doesn't read the masks from the dri config directly, but for consistency
add shifts to the glxconfig.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

egl: Convert configs to use shifts and sizes instead of masks

Change dri2_add_config to take arrays of shifts and sizes, and compare with
those set in the dri config. Convert all platform driver masks
to shifts and sizes.

In order to handle older drivers, where shift attributes aren't available,
we fall back to the mask attributes and compute the shifts with ffs.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

util: move bitcount to bitscan.h

bitcount is free from the pipe header dependencies that make u_math.h hard
to include by non-gallium specific code, so move it to bitscan.h. bitscan.h
is included by u_math.h so existing references will continue working.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

dri: Add config attributes for color channel shift

The existing mask attributes can only support up to 32 bpp. Introduce
per-channel SHIFT attributes that indicate how many bits, from lsb towards
msb, the bit field is offset. A shift of -1 will indicate that there is no
bit field set for the channel.

As old loaders will still be looking for masks, we set the masks to 0 for
any formats wider than 32 bpp.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

gallium: Use consistent approach for config format filtering

rgb10 uses an 'if(allowed) continue' approach, do the same for rgba_ordering.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

i965: Add helper function for allowed config formats

The driver checks dri config options and loader caps to filter out certain
formats during config creation. Fold 4 call sites under a single helper
function.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

drm-uapi: Update headers for fp16 formats

From drm-next commit 88ab9c76d191ad8645b483f31e2b394b0f3e280e

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

radv: add RADV_DEBUG=allentrypoints

This debug option allows vkGet[Instance/Device]ProcAddr() to succeed
even if the extension associated with the requested entrypoint was not
enabled.

This has come in handy in a few instances when debugging VR
applications, so I thought it would be good to have a cleaned up version
upstreamed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

panfrost: Fix PIPE_BUFFER spacing

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Implement depth range clipping

This should fix glDepthRangef issues. Eventually, something similar
should allow implementing the depth bounds test.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Don't bail on PIPE_BUFFER

We can handle some of it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Identify and disassemble indirect texture/sampler

A pair of special flags can turn the texture/sampler handle fields into
register selects. This means code like:

   texture(uTextures[hr28.w], ...)

can be compiled to something like:

   texture ..., fsampler[hr28.w], texture[hr28.w]

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Breakout texture reg select printer

This data structure is shared in other parts of the texture word, so
let's streamline printing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Pass stream_output_info by reference

It's a large structure, apparently.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Guard against NULL rasterizer explicitly

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/bifrost: Correct file size signedness

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Fix missing ret assignment in DRM code

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Hoist bo != NULL check before dereference

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Hoist job != NULL check

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Prevent potential integer overflow in instancing

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Clarify intention with PIPE_SWIZZLE_X check

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Pay attention to framebuffer dimension sign

These are unsigned so the clamp-positive is redundant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Mark fallthrough explicitly

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Don't check reads_point_coord

Useless check.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Simplify contradictory check.

Coverity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Reorder bits check to fix 8-bit masks

Coverity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Represent unused nodes by ~0

This allows nodes to be unsigned and prevents a class of weird
signedness bugs identified by Coverity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/bifrost: Avoid buffer overflow in disassembler

This path shouldn't be possible for in-spec shaders, but let's be
defensive. (Because security, right? Mostly because Coverity.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Remove all_zero

The checks confuse Coverity, so let's make it explicit what's going on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Don't leak FBD pointer

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Allocate `dependencies` on stack

It's small; this way we don't leak memory.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/midgard: Free liveness info

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

v3d: Use the correct opcodes for signed image min/max

Reviewed-by: Eric Anholt <eric@anholt.net>

intel/nir: Add a helper for getting BRW_AOP from an intrinsic

So many duplicated switch statements....

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Add explicit signs to image min/max intrinsics

This better matches all the other atomic intrinsics such as those for
SSBOs and shared variables where the sign is part of the intrinsic
opcode.  Both generators (GLSL and SPIR-V) know the sign from the type
of the image variable or handle.  In SPIR-V, signed min/max are separate
opcodes from unsigned.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

pan/decode: Cleanup mali_attr printing

We can smush this into one-line per record as per usual. We still need
more validation and cleaning this up, especially around instancing. But
for LINEAR records, it works okay already.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Validate attribute/varying buffer pointer

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Include address in union mali_attr

No need to break it out into extra lines.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Use concise texture printing

This consolidates texture format and dimensionality into something simple:

    tiled rgba8_unorm.rgb1: 512x512

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Break up usage2 field

This is another bit field describing layout.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Pretty-print sRGB format

We can just stick an "s" in if it's sRGB.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Remove ancient TODO

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: nr_mipmap_levels -> levels

No need to be so verbose.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Validate texture dimensionality

Textures of a smaller dimension don't need higher dimensions printed.
This allows us to be more compact, while enforcing verification that
higher dimensions must be zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Break out pandecode_texture function

It's massive and hugely nested indentation -- break it out so it's
legible.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Guard texture unknowns as zero trips

unknown3A I think I've actually seen on T6xx but.. we'll see what
happens in traces going forward. We don't want the zero noise normally,
and if they show up in the wild, we want to draw attention to them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Use GLSL style formats/swizzles

This dramatically reduces visual clutter: now an entire
attribute/varying record looks something like:

    rgba32f attribute_0[16].bgra;

which is equivalent to the raw structure:

{
   .index = 0,
   .format = MALI_FORMAT_RGBA32F,
   .swizzle = (MALI_CHANNEL_BLUE << 9) | ....,
   .src_offset = 16,
}

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Don't print the default swizzle

It's just noise.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Validate swizzles against format

We want to make sure we don't access a component in the swizzle that
doesn't exist in the format, since that is (as far as I know) undefined.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Treat RESERVED swizzles as errors

We've never seen them, so if they come up in trace, we want to draw
attention to that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Handle VARYING_DISCARD

Varying discard is not used by Panfrost, but the blob uses it sometimes
to have some padding in the varyings table, probably to minimize
per-draw overhead. (...We should maybe consider this ourselves!)

Let's check for this and ensure the rest of the record is consistent
with a discarded varying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Don't trip the prefix magic field

What *is* this?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Guard attribute unknowns

One should be zero. The other has always been seen as set, so check
this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Don't crash on GL_CLAMP

It's a legacy GL thing... we don't really need to handle it *right* now,
but we shouldn't crash..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Do not expose PIPE_CAP_TEXTURE_MIRROR_CLAMP

This CAP controls a desktop-only extension. If the corresponding support
exists in the hardware, we don't know how to use it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Fix scoreboarding with dependency on job #0

Subtle issue masked by how we emitted SET_VALUE jobs, but this case can
and does occur, so let's fix it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Normalize final instances of XXX

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Normalize case matching XXX format

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Mark tripped zeroes with XXX

This normalizes the printed format. It also makes it easier for the
future when we may introduce semantic _warn and _error handlers.

A tripped zero is essentially a hazard to check for.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Check for MFBD preload chicken bit

If this bit is clear, MFBD preload will be enabled, and you.. don't want
that. (At least, when the bit is clear, the old contents of the
framebuffer will be preserved. I'm assuming this is what "MFBD preload"
refers to in kbase.)

Validate that this bit is always set.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Validate AFBC fields are zero when AFBC is disabled

There is no "chunknown" structure; that part of the union is an artefact
from falsely believing vertex/tiler MFBDs could have render targets
attached (they can't). These are just plain old AFBC fields, and if
there is no AFBC, it's error to set these field.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Do not print uniform/buffers explicitly

For our purposes of driver debugging, the contents of uniform buffers
are rarely interesting; we're more concerned about the metadata setting
them up.

We do need to be careful to validate the sizes of both uniforms and
uniform buffers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Add static bounds checking utility

Many structures in the command stream have a GPU address and size
determined statically. We should check that the pointers we are passed
are valid and the buffers they point to are big enough for the given
size. If they're not, an MMU fault would be raised.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Don't print unreferenced attribute memory

This is a source of uninitialized memory leaking into the traces.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Check for a number of potential issues

Verify sizes / masks / etc against something logical to cull down the
trace space and automatically guard against a number of potential
hazards.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Correct polygon size computations

While the algorithm for computing the header size has been correct for a
while, we used a major hack to conservatively guess the body size. Let's
scrap that and figure out the algorithm we actually need to use to be
bit-identical with what the hardware expects.

We do have to be careful to add the header size to total comptued BO
size.

It's not clear how big the polygon list needs to be in practice -- but
it has to be somewhat bigger than the polygon list itself. This needs
more investigation. If we size the polygon list exactly based on the
polygon_list_size field, we get faults like:

[ 1224.219886] panfrost ff9a0000.gpu: Unhandled Page fault in AS0 at VA 0x000000001BDE8000
               Reason: TODO
               raw fault status: 0x660003C3
               decoded fault status: SLAVE FAULT
               exception type 0xC3: TRANSLATION_FAULT_LEVEL3
               access type 0x3: WRITE
               source id 0x6600

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Remove DRY_RUN

Nobody uses this anymore anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Print "just right" count of texture pointers

The other commented lines just add noise/entropy we don't want, and can
in fact crash the trace due to asserts failing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Verify and omit polygon size

The polygon sizes are computed from the width/height/flags, so we can
reverse the computation and use our computation to verify the two
computation algorithms are bit-identical. If they are, we can omit the
computed fields.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Move pan_tiler.c outside of Gallium

The routines in this file may be shared with Vulkan.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Bounds check polygon list and tiler heap

We have the BOs available; ensure that the bounds specified in the
command stream are actually the correct bounds.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Allow updating mmaps

This allows the caller to call track_mmap multiple times for the same
gpu_va for the purpose of updating the mmap. This is used to trace
invisible BOs with kbase and doesn't apply to native traces.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

pan/decode: Express tiler structures as offsets

This allows us to catch a class of errors (for negative offsets, etc)
automatically.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>