mesa.git
4 years agoi965/iris: fix crash when calling GetPerfQueryDataINTEL
Lionel Landwerlin [Tue, 24 Mar 2020 14:54:32 +0000 (16:54 +0200)]
i965/iris: fix crash when calling GetPerfQueryDataINTEL

On a query that was never begun.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>

4 years agoglthread: compile marshal_generated.c faster by breaking it up into 8 files
Marek Olšák [Thu, 5 Mar 2020 23:08:58 +0000 (18:08 -0500)]
glthread: compile marshal_generated.c faster by breaking it up into 8 files

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>

4 years agoglthread: declare marshal and unmarshal functions as non-static
Marek Olšák [Thu, 5 Mar 2020 21:21:00 +0000 (16:21 -0500)]
glthread: declare marshal and unmarshal functions as non-static

Declare them in the header file. Then we can split marshal_generated.c
into multiple files.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>

4 years agoglthread: inline SET_func and add -O1 to build _mesa_create_marshal_table faster
Marek Olšák [Mon, 23 Mar 2020 01:56:20 +0000 (21:56 -0400)]
glthread: inline SET_func and add -O1 to build _mesa_create_marshal_table faster

The compile time of marshal_generated.c improved from 30.1s to 12.4s.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>

4 years agoradv: enable VK_KHR_8bit_storage on GFX6-GFX7
Samuel Pitoiset [Tue, 24 Mar 2020 14:07:05 +0000 (15:07 +0100)]
radv: enable VK_KHR_8bit_storage on GFX6-GFX7

Enabling a Vulkan extension doesn't mean that all features need
to be implemented. DOOM Eternal crashes at launch if that ext
is not supported but it doesn't matter if the features are enabled
or not.

Let's enable it like we did for VK_KHR_16bit_storage.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>

4 years agoutil/u_process: fix Windows build
Pierre-Eric Pelloux-Prayer [Tue, 24 Mar 2020 15:12:26 +0000 (16:12 +0100)]
util/u_process: fix Windows build

Reported by Brian Paul.

Fixes: f8f1413070a ("util/u_process: add util_get_process_exec_path")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>

4 years agopan/bi: Rewrite aligned vectors as well
Alyssa Rosenzweig [Mon, 23 Mar 2020 21:07:27 +0000 (17:07 -0400)]
pan/bi: Rewrite aligned vectors as well

This still isn't optimal, but it handles another common case where we
have a vector "prefix" and can rewrite directly. The last case is one
where writemasks and such would start coming into play and - for the
moment - is not worth the hike in complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>

4 years agopan/bi: Lower combines to rewrites for scalars
Alyssa Rosenzweig [Mon, 23 Mar 2020 20:48:58 +0000 (16:48 -0400)]
pan/bi: Lower combines to rewrites for scalars

This avoids unneeded moves for scalars. It still generates suboptimal
code for vectors, however.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>

4 years agopan/bi: Ingest vecN directly (again)
Alyssa Rosenzweig [Sun, 22 Mar 2020 21:31:23 +0000 (17:31 -0400)]
pan/bi: Ingest vecN directly (again)

Last time, I swear. We still generate writemasks but SSA-like ones and
do the lowering ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>

4 years agoturnip: implement depth clamp
Jonathan Marek [Tue, 24 Mar 2020 01:37:25 +0000 (21:37 -0400)]
turnip: implement depth clamp

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>

4 years agoturnip: fix znear clipping
Jonathan Marek [Tue, 24 Mar 2020 01:33:36 +0000 (21:33 -0400)]
turnip: fix znear clipping

Vulkan clips znear at 0 instead of -1.

Fixes dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>

4 years agofreedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP
Jonathan Marek [Tue, 24 Mar 2020 01:21:11 +0000 (21:21 -0400)]
freedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>

4 years agoaco: implement 64-bit VGPR constant copies in handle_operands()
Rhys Perry [Fri, 20 Mar 2020 16:07:08 +0000 (16:07 +0000)]
aco: implement 64-bit VGPR constant copies in handle_operands()

64-bit VGPR constant copies can happen because of 64-bit constant copy
propagation. Since this optimization is beneficial and more annoying to
deal with in the optimizer, I've implemented 64-bit VGPR constant copies
in handle_operands().

This also sets copy_operation::size correctly for 64-bit constant copies.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>

4 years agoaco: remove dead code in handle_operands()
Rhys Perry [Mon, 23 Mar 2020 20:44:27 +0000 (20:44 +0000)]
aco: remove dead code in handle_operands()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>

4 years agonir/gather_info: fix per-vertex handling in try_mask_partial_io
Rhys Perry [Wed, 11 Mar 2020 20:22:38 +0000 (20:22 +0000)]
nir/gather_info: fix per-vertex handling in try_mask_partial_io

pipeline-db (Navi, ACO):
Totals from affected shaders:
SGPRS: 6432 -> 6432 (0.00 %)
VGPRS: 11924 -> 11924 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1596 -> 1596 (0.00 %) dwords per thread
Code Size: 575524 -> 518620 (-9.89 %) bytes
LDS: 12187 -> 12187 (0.00 %) blocks
Max Waves: 2695 -> 2695 (0.00 %)

Helps a few hundred Dark Souls 3 shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>

4 years agoradeonsi: enable workarounds for YoYo engine based games
Pierre-Eric Pelloux-Prayer [Fri, 13 Mar 2020 13:24:51 +0000 (14:24 +0100)]
radeonsi: enable workarounds for YoYo engine based games

Without the radeonsi_sync_compile option the games crashes at
startup.
The engine seems to be using a custom global new operator and
it doesn't plays well with multithreading it seems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1310
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1271
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1272
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1288
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2611
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

4 years agoutil/xmlconfig: add new sha1 application attribute
Pierre-Eric Pelloux-Prayer [Mon, 16 Mar 2020 09:49:45 +0000 (10:49 +0100)]
util/xmlconfig: add new sha1 application attribute

This is useful to enable workarounds for applications with a generic name.

For instance all games made with the YoYo game engine have the same executable
name "runner".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

4 years agoutil/u_process: add util_get_process_exec_path
Pierre-Eric Pelloux-Prayer [Mon, 16 Mar 2020 09:49:17 +0000 (10:49 +0100)]
util/u_process: add util_get_process_exec_path

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

4 years agoutil/os_file: extend os_read_file to return the file size
Pierre-Eric Pelloux-Prayer [Mon, 16 Mar 2020 09:48:48 +0000 (10:48 +0100)]
util/os_file: extend os_read_file to return the file size

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

4 years agoradeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
Pierre-Eric Pelloux-Prayer [Wed, 18 Mar 2020 20:57:31 +0000 (21:57 +0100)]
radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed

FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.

When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.

Verified with the captures from bugs cited below.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>

4 years agointel/dump_gpu: Handle a bunch of getparam in the no-HW case
Jason Ekstrand [Thu, 19 Mar 2020 21:45:19 +0000 (16:45 -0500)]
intel/dump_gpu: Handle a bunch of getparam in the no-HW case

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>

4 years agointel/dump_gpu: Add an ensure_device_info helper
Jason Ekstrand [Thu, 19 Mar 2020 21:44:56 +0000 (16:44 -0500)]
intel/dump_gpu: Add an ensure_device_info helper

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>

4 years agoanv: Stop fetching the timestamp frequency ourselves
Jason Ekstrand [Thu, 19 Mar 2020 21:23:01 +0000 (16:23 -0500)]
anv: Stop fetching the timestamp frequency ourselves

gen_get_device_info_from_fd fetches the timestamp frequency from the
kernel.  ANV also carrying code for it is redundant.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>

4 years agoegl/android: enable/disable KHR_partial_update correctly
Chia-I Wu [Wed, 18 Mar 2020 19:50:31 +0000 (12:50 -0700)]
egl/android: enable/disable KHR_partial_update correctly

Commit f3728816af (egl/android: require ANDROID_native_fence_sync
for buffer age) re-added some stale code removed in commit
b4345da8762 (egl/android: Delete set_damage_region from egl dri
vtbl).  Remove it now.

Commit b4345da8762 assumes KHR_partial_update is only
driver-dependent.  That is mostly true except that the extension
also introduces buffer age query, which depends on
ANDROID_native_fence_sync on Android.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>

4 years agoci: Ban the recent popular freedreno a630 intermittent failure.
Eric Anholt [Mon, 23 Mar 2020 19:15:37 +0000 (12:15 -0700)]
ci: Ban the recent popular freedreno a630 intermittent failure.

This popped up last thursday.  The only relevant code commit was my pixel
center half integer change, but the more likely thing to me seems to be
having shuffled the test order by introducing more skips the day before.

Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2670
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>

4 years agost/mesa: fix use of uninitialized memory due to st_nir_lower_builtin
Marek Olšák [Sat, 21 Mar 2020 21:54:36 +0000 (17:54 -0400)]
st/mesa: fix use of uninitialized memory due to st_nir_lower_builtin

reported by valgrind

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>

4 years agoaco: fix boolean undef regclass
Rhys Perry [Mon, 23 Mar 2020 13:49:08 +0000 (13:49 +0000)]
aco: fix boolean undef regclass

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>

4 years agolima: Add missing source file to Android.mk
Roman Stratiienko [Mon, 23 Mar 2020 10:03:24 +0000 (12:03 +0200)]
lima: Add missing source file to Android.mk

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>

4 years agointel/tools/aubinator_error_decode: Decode ring buffers from HEAD to TAIL
D Scott Phillips [Fri, 20 Mar 2020 17:15:57 +0000 (10:15 -0700)]
intel/tools/aubinator_error_decode: Decode ring buffers from HEAD to TAIL

Capture the HEAD and TAIL register values from the dump and
properly index the ring buffer using those. Previously we would
decode the ring buffer from the beginning, printing out whatever
happened to be there.

Also, properly pass the `from_ring` parameter to gen_print_batch()
so that decoding doesn't stop once MI_BATCH_BUFFER_END is
encoutered.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>

4 years agodocs/features: Update virgl OpenGL 4.5 features
Elie Tournier [Thu, 12 Mar 2020 13:01:22 +0000 (13:01 +0000)]
docs/features: Update virgl OpenGL 4.5 features
GL_ARB_clip_control and GL_KHR_robustness are now expose in the guest.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>

4 years agointel/tools/aubinator_error_decode: read HW Context before other batches
D Scott Phillips [Thu, 19 Mar 2020 18:10:11 +0000 (11:10 -0700)]
intel/tools/aubinator_error_decode: read HW Context before other batches

The hardware context buffer has state that was set before the
batch started. By decoding it first, references to things like
Dynamic State Base Address are decodable in the command batches.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>

4 years agoiris: Set patch count threshold in 3DSTATE_HS
Sagar Ghuge [Fri, 24 Jan 2020 06:39:35 +0000 (22:39 -0800)]
iris: Set patch count threshold in 3DSTATE_HS

Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

4 years agoanv: Set patch count threshold in 3DSTATE_HS
Sagar Ghuge [Fri, 24 Jan 2020 06:27:53 +0000 (22:27 -0800)]
anv: Set patch count threshold in 3DSTATE_HS

Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

4 years agointel/compiler: Track patch count threshold
Sagar Ghuge [Fri, 24 Jan 2020 06:24:37 +0000 (22:24 -0800)]
intel/compiler: Track patch count threshold

Return the number of patches to accumulate before an 8_PATCH mode thread
is launched.

v2: (Kenneth Graunke)
- Track patch count threshold instead of input control points.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

4 years agointel/genxml: Add patch count threshold field on gen12
Sagar Ghuge [Fri, 24 Jan 2020 06:00:44 +0000 (22:00 -0800)]
intel/genxml: Add patch count threshold field on gen12

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

4 years agogitlab-ci/traces: Add Vulkan sample entries for POLARIS10
Andres Gomez [Mon, 24 Feb 2020 13:52:53 +0000 (15:52 +0200)]
gitlab-ci/traces: Add Vulkan sample entries for POLARIS10

v2:
  - Updated commit log.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>

4 years agogitlab: add bug report template
Denys [Tue, 1 Oct 2019 13:24:20 +0000 (14:24 +0100)]
gitlab: add bug report template

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>

4 years agoaco: emit IR in IF's merge block instead if the other side ends in a jump
Rhys Perry [Wed, 26 Feb 2020 13:35:26 +0000 (13:35 +0000)]
aco: emit IR in IF's merge block instead if the other side ends in a jump

Fixes NIR such as:
if (divergent) {
   a = sgpr()
} else {
   break;
}
use(a)

Previously we would have emitted:
if (divergent) {
   a = sgpr()
}
if (!divergent) {
   break;
}
use(a)

But "a" isn't available at it's use. Now we emit:
if (divergent) {
}
if (!divergent) {
   break;
}
a = sgpr()
use(a)

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 1936 -> 1936 (0.00 %)
VGPRS: 1264 -> 1264 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 159408 -> 159152 (-0.16 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 81 -> 81 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2557
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

4 years agoaco: improve check for unreachable loop continue blocks
Rhys Perry [Fri, 31 Jan 2020 16:39:20 +0000 (16:39 +0000)]
aco: improve check for unreachable loop continue blocks

The old code would have previously caught:
loop {
   ...
   break
}
when it was meant to just catch:
loop {
   if (...)
      break
   else
      break
}

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

4 years agoaco: skip NIR in unreachable merge blocks
Rhys Perry [Fri, 31 Jan 2020 16:47:10 +0000 (16:47 +0000)]
aco: skip NIR in unreachable merge blocks

NIR removes most of this but undef instructions for loop header phis can
remain. These were harmless because ACO would DCE them itself.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

4 years agoaco: handle when ACO adds new continue edges
Rhys Perry [Fri, 31 Jan 2020 13:56:26 +0000 (13:56 +0000)]
aco: handle when ACO adds new continue edges

Usually a loop ends with a uniform continue. If it doesn't and we end up
adding our own continue edges (because of continue_or_break or divergent
breaks at the end), we have to add extra operands to the loop header phis.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

4 years agoaco: handle missing second predecessors at merge block phis
Rhys Perry [Fri, 31 Jan 2020 12:41:19 +0000 (12:41 +0000)]
aco: handle missing second predecessors at merge block phis

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

4 years agoaco: set has_divergent_branch for discards in loops
Rhys Perry [Fri, 31 Jan 2020 12:40:51 +0000 (12:40 +0000)]
aco: set has_divergent_branch for discards in loops

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

4 years agogitlab-ci: add python3-requests to the test-vk container
Andres Gomez [Wed, 18 Mar 2020 09:52:53 +0000 (11:52 +0200)]
gitlab-ci: add python3-requests to the test-vk container

After 90a39af5f65 ("ci: Drop the git dependency in tracie"), we have
this error in the radv-polaris10-traces job:

"
...

+ /builds/tanty/mesa/artifacts/tracie/tests/test.sh
tracie_succeeds_if_all_images_match: Fail
Traceback (most recent call last):
  File "/tmp/tracie.test.glY0O23HJo/tracie.py", line 6, in <module>
    import requests
ModuleNotFoundError: No module named 'requests'

...
"

v2:
  - Updated commit log to be more descriptive (Michel).

Fixes: 90a39af5f65 ("ci: Drop the git dependency in tracie")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4237>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4237>

4 years agoradv/llvm: fix subgroup shuffle for chips without bpermute
Samuel Pitoiset [Mon, 23 Mar 2020 11:02:15 +0000 (12:02 +0100)]
radv/llvm: fix subgroup shuffle for chips without bpermute

bpermute only exists on GFX8+ and only with Wave32 on GFX10. Instead
we have to use readlane with a waterfall loop to defeat the LLVM
backend.

This fixes DOOM Eternal which requires subgroup shuffle.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4284>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4284>

4 years agopanfrost: Align Android makefiles with recent changes
Roman Stratiienko [Sun, 22 Mar 2020 21:36:16 +0000 (23:36 +0200)]
panfrost: Align Android makefiles with recent changes

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4280>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4280>

4 years agogitlab-ci: add a bunch of new fossils from the Sascha Vulkan demos
Samuel Pitoiset [Fri, 6 Mar 2020 08:48:03 +0000 (09:48 +0100)]
gitlab-ci: add a bunch of new fossils from the Sascha Vulkan demos

The whole fossils-db is only 448KB of data which is pretty small.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>

4 years agogitlab-ci: add a new stage for RADV CI
Samuel Pitoiset [Fri, 6 Mar 2020 07:39:25 +0000 (08:39 +0100)]
gitlab-ci: add a new stage for RADV CI

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>

4 years agogitlab-ci: compile fossils with more ASICs
Samuel Pitoiset [Fri, 6 Mar 2020 07:36:14 +0000 (08:36 +0100)]
gitlab-ci: compile fossils with more ASICs

I think we want to cover these 3 generations at the barely minimum.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>

4 years agogitlab-ci: compile fossils with both RADV compiler backends (LLVM/ACO)
Samuel Pitoiset [Fri, 6 Mar 2020 07:29:45 +0000 (08:29 +0100)]
gitlab-ci: compile fossils with both RADV compiler backends (LLVM/ACO)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>

4 years agogallium/gallivm: Remove workaround disabling AVX code for newer CPUs
Jan Zielinski [Wed, 18 Mar 2020 12:36:53 +0000 (13:36 +0100)]
gallium/gallivm: Remove workaround disabling AVX code for newer CPUs

The change enables using full 256-bit AVX and AVX2 instructions
on newer platforms.

Reviewed-by: Alok Hota <alok.hota@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4225>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4225>

4 years agoradv/winsys: spoof some values for num_render_backends in the null winsys
Samuel Pitoiset [Fri, 6 Mar 2020 09:23:41 +0000 (10:23 +0100)]
radv/winsys: spoof some values for num_render_backends in the null winsys

To avoid crashes when RADV_FORCE_FAMILY is set to GFX9+ because
num_render_backends is used to compute binning state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>

4 years agoradv/winsys: fix wrong PCI ID for Vega10 in the null winsys
Samuel Pitoiset [Fri, 6 Mar 2020 10:11:04 +0000 (11:11 +0100)]
radv/winsys: fix wrong PCI ID for Vega10 in the null winsys

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>

4 years agoglsl: Restore the IsES flag on the shader when reading from cache.
Eric Anholt [Tue, 17 Mar 2020 19:45:46 +0000 (12:45 -0700)]
glsl: Restore the IsES flag on the shader when reading from cache.

I found that when trying to MESA_SHADER_CAPTURE_PATH a trace, I was
getting "GLSL >= 3.00" for the ES shaders I was trying to capture.
Keeping this metadata in the cached shader program lets us capture
correctly.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4219>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4219>

4 years agogallivm: add support for rgtc/latc fetches.
Dave Airlie [Wed, 19 Feb 2020 02:40:50 +0000 (12:40 +1000)]
gallivm: add support for rgtc/latc fetches.

Annoyingly heaven uses rgtc2 snorm but this at least avoids
the function call overheads to the util fetch functions.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>

4 years agogallivm/s3tc: split out dxt5 alpha code
Dave Airlie [Wed, 19 Feb 2020 00:19:52 +0000 (10:19 +1000)]
gallivm/s3tc: split out dxt5 alpha code

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>

4 years agointel: Add TGL PCI ID
Jordan Justen [Fri, 20 Mar 2020 22:10:09 +0000 (15:10 -0700)]
intel: Add TGL PCI ID

Ref: Bspec 44455
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agointel: Update TGL PCI strings
Jordan Justen [Fri, 20 Mar 2020 22:08:12 +0000 (15:08 -0700)]
intel: Update TGL PCI strings

Ref: Bspec 44455
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agopan/bi: Pack csel4 opcodes
Alyssa Rosenzweig [Sun, 22 Mar 2020 01:19:43 +0000 (21:19 -0400)]
pan/bi: Pack csel4 opcodes

These are pretty straightforward but there's a lot of details to keep
straight. In the IR, we keep a general logical comparator and types
separately; in the hardware, the type gets fused with a (much more)
limited number of comparators. So there's a fair bit of code here to
account for these differences, fusing in the type information, and
changing up argument order as necessary to make it actually correct.
Anything to save a bit!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Default csel to "!= 0" mode
Alyssa Rosenzweig [Sun, 22 Mar 2020 01:19:14 +0000 (21:19 -0400)]
pan/bi: Default csel to "!= 0" mode

This way we always have regular csel conditions instead of a weird
.always special case for 3-src CSEL mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Use bi_lookup_immediate when packing
Alyssa Rosenzweig [Sun, 22 Mar 2020 00:54:24 +0000 (20:54 -0400)]
pan/bi: Use bi_lookup_immediate when packing

This gets us part of the way there to packing lo/hi separately. A little
more work is needed to do this "properly", but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Respect shift when printing immediates
Alyssa Rosenzweig [Sat, 21 Mar 2020 22:42:58 +0000 (18:42 -0400)]
pan/bi: Respect shift when printing immediates

We allow packing multiple immediates in, but we were missing this in the
print.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Implement csel fusing
Alyssa Rosenzweig [Sat, 21 Mar 2020 22:13:49 +0000 (18:13 -0400)]
pan/bi: Implement csel fusing

When generating csel instructions, we can peak to see what condition is
being used. If we're using a "nice" condition, we can fuse it in with
the csel itself, ideally letting the condition itself be DCE'd away.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Add `soft` NIR->BIR condition translation
Alyssa Rosenzweig [Sat, 21 Mar 2020 22:12:31 +0000 (18:12 -0400)]
pan/bi: Add `soft` NIR->BIR condition translation

We would like to use this routine opportunistically when fusing
conditions into csels and branches, so let's add a mode where we don't
abort.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Remove hacks for 1-bit booleans in IR
Alyssa Rosenzweig [Sat, 21 Mar 2020 21:41:34 +0000 (17:41 -0400)]
pan/bi: Remove hacks for 1-bit booleans in IR

Now that we lower them away, a bunch of special cases disappear.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Lower bool to ints
Alyssa Rosenzweig [Sat, 21 Mar 2020 21:37:47 +0000 (17:37 -0400)]
pan/bi: Lower bool to ints

Currently we lower to int32, but once mediump lands we'll be ready for
that too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Pack LD_ATTR
Alyssa Rosenzweig [Sat, 21 Mar 2020 19:25:54 +0000 (15:25 -0400)]
pan/bi: Pack LD_ATTR

Also requires the usual R61/62 games.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Pack st_vary
Alyssa Rosenzweig [Fri, 20 Mar 2020 16:39:29 +0000 (12:39 -0400)]
pan/bi: Pack st_vary

This should let varying writes go through finally.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Add store_channels property
Alyssa Rosenzweig [Fri, 20 Mar 2020 16:38:53 +0000 (12:38 -0400)]
pan/bi: Add store_channels property

It can't be inferred from the usual writemask since stores don't write
to a register destination.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Generalize data register setting
Alyssa Rosenzweig [Fri, 20 Mar 2020 16:38:08 +0000 (12:38 -0400)]
pan/bi: Generalize data register setting

So we can use it for stores too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Flesh out st_vary IR
Alyssa Rosenzweig [Fri, 20 Mar 2020 16:25:08 +0000 (12:25 -0400)]
pan/bi: Flesh out st_vary IR

We need to make the semantics of BI_VECTOR a bit more precise -
vectorize only the first argument, not all of them. This is enough for
current and future users, as far as I know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Pack ld_var_addr
Alyssa Rosenzweig [Fri, 20 Mar 2020 16:16:10 +0000 (12:16 -0400)]
pan/bi: Pack ld_var_addr

Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Pack ld_ubo ops
Alyssa Rosenzweig [Fri, 20 Mar 2020 15:52:43 +0000 (11:52 -0400)]
pan/bi: Pack ld_ubo ops

Routes some infrastructure to do so at least slightly generically but
we'll see.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Add bi_load32_components helper
Alyssa Rosenzweig [Fri, 20 Mar 2020 15:52:33 +0000 (11:52 -0400)]
pan/bi: Add bi_load32_components helper

Pattern seems to crop up a lot.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Include UBO index for sysval reads
Alyssa Rosenzweig [Fri, 20 Mar 2020 15:38:21 +0000 (11:38 -0400)]
pan/bi: Include UBO index for sysval reads

Trivially zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Index out constants in instructions
Alyssa Rosenzweig [Fri, 20 Mar 2020 02:43:06 +0000 (22:43 -0400)]
pan/bi: Index out constants in instructions

We rewrite BIR_INDEX_CONSTANT (and _ZERO) to preassigned constant ports
when assign uniform_const for the bundle. There are a lot of issues
raised here, unfortunately, and the implementation here is woefully
incomplete with a nasty hack for loads... nevertheless, it's somewhere
to start.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Document constant related errata(?)
Alyssa Rosenzweig [Fri, 20 Mar 2020 02:05:24 +0000 (22:05 -0400)]
pan/bi: Document constant related errata(?)

We're not totally sure what's up with this but Connor says if you
violate it Bad Things happen in your shader. I think this might be an
issue affecting early Bifrost (G71, ..?); when we know more we can look
into patching in a fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Pack a constant quadword
Alyssa Rosenzweig [Fri, 20 Mar 2020 01:45:18 +0000 (21:45 -0400)]
pan/bi: Pack a constant quadword

The piping isn't there to make use of it yet, but this stubs out
constant support at the clause level.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Add move lowering pass
Alyssa Rosenzweig [Thu, 19 Mar 2020 21:21:49 +0000 (17:21 -0400)]
pan/bi: Add move lowering pass

We need ALU mostly scalarized, but we get vector moves created from
lower_vec_to_mov so let's scalarize that ourselves rather than bother
NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Add bi_emit_before helper
Alyssa Rosenzweig [Thu, 19 Mar 2020 21:21:34 +0000 (17:21 -0400)]
pan/bi: Add bi_emit_before helper

For BIR lowering passes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agopan/bi: Implement FMA/MOV without modifiers
Alyssa Rosenzweig [Thu, 19 Mar 2020 20:58:48 +0000 (16:58 -0400)]
pan/bi: Implement FMA/MOV without modifiers

We split off MOV from FMOV since the canonical move on Bifrost doesn't
accept modifiers. (We can still do fmov, but with something like add-0.)
This will also make copyprop a little nicer, I think. Anyway, the
non-modifier version we can implement as-is for FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>

4 years agoetnaviv: nir: add compile_check_limits
Jonathan Marek [Sun, 15 Mar 2020 22:53:36 +0000 (18:53 -0400)]
etnaviv: nir: add compile_check_limits

To match TGSI compiler behaviour in glmark terrain scene for example.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4199>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4199>

4 years agoac: fix fast division
Marek Olšák [Fri, 20 Mar 2020 20:35:45 +0000 (16:35 -0400)]
ac: fix fast division

This stopped working with LLVM 11 and might occasionally have been broken
on older LLVM, because the metadata was set on the mul, not on the rcp.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4268>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4268>

4 years agoturnip: Instance can be NULL resolving 'GetInstanceProcAddr' entry point
Eduardo Lima Mitev [Fri, 20 Mar 2020 08:32:03 +0000 (09:32 +0100)]
turnip: Instance can be NULL resolving 'GetInstanceProcAddr' entry point

Using turnip driver without a vulkan loader is currently broken because
the entry point resolver is expecting a valid instance when resolving
'vkGetInstanceProcAddr' through vk_icdGetInstanceProcAddr().

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4257>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4257>

4 years agovbo,gallium: make glBegin/End buffer size configurable by drivers
Marek Olšák [Wed, 11 Mar 2020 21:19:10 +0000 (17:19 -0400)]
vbo,gallium: make glBegin/End buffer size configurable by drivers

The default is 512 KB, but radeonsi wants 4 MB.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>

4 years agoglthread: remove the marshal_fail XML attribute
Marek Olšák [Tue, 10 Mar 2020 00:33:06 +0000 (20:33 -0400)]
glthread: remove the marshal_fail XML attribute

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: ignore vertex arrays with user pointers if they're disabled
Marek Olšák [Mon, 9 Mar 2020 02:50:16 +0000 (22:50 -0400)]
glthread: ignore vertex arrays with user pointers if they're disabled

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: track which vertex array attribs are enabled
Marek Olšák [Wed, 4 Mar 2020 19:49:09 +0000 (14:49 -0500)]
glthread: track which vertex array attribs are enabled

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: rename non_vbo helper functions
Marek Olšák [Fri, 6 Mar 2020 21:53:54 +0000 (16:53 -0500)]
glthread: rename non_vbo helper functions

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: handle buffer unbinding via glDeleteBuffers
Marek Olšák [Wed, 4 Mar 2020 21:18:28 +0000 (16:18 -0500)]
glthread: handle buffer unbinding via glDeleteBuffers

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agomesa: put gl_thread_state inside gl_context to remove pointer indirection
Marek Olšák [Fri, 6 Mar 2020 19:54:50 +0000 (14:54 -0500)]
mesa: put gl_thread_state inside gl_context to remove pointer indirection

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: rename marshal.h/c to glthread_marshal.h and glthread_shaderobj.c
Marek Olšák [Fri, 6 Mar 2020 19:33:20 +0000 (14:33 -0500)]
glthread: rename marshal.h/c to glthread_marshal.h and glthread_shaderobj.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: move buffer functions into glthread_bufferobj.c
Marek Olšák [Fri, 6 Mar 2020 19:22:58 +0000 (14:22 -0500)]
glthread: move buffer functions into glthread_bufferobj.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: autogenerate prototypes for custom-marshalled functions
Marek Olšák [Thu, 19 Mar 2020 05:56:57 +0000 (01:56 -0400)]
glthread: autogenerate prototypes for custom-marshalled functions

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: simplify printing safe_mul in gl_marshal.py
Marek Olšák [Fri, 6 Mar 2020 19:35:02 +0000 (14:35 -0500)]
glthread: simplify printing safe_mul in gl_marshal.py

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoglthread: remove _mesa_post_marshal_hook, because it's not very useful
Marek Olšák [Fri, 6 Mar 2020 19:20:05 +0000 (14:20 -0500)]
glthread: remove _mesa_post_marshal_hook, because it's not very useful

and also remove the useless forward declaration of enum marshal_dispatch_cmd_id.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>

4 years agoutil/sparse_array: Stash the node level in the node pointer
Jason Ekstrand [Wed, 18 Mar 2020 16:48:47 +0000 (11:48 -0500)]
util/sparse_array: Stash the node level in the node pointer

This reworks the data structure a bit and, in my view, simplifies it.
Instead of each node having a header which has the node level in it, we
use the bottom 6 bits of the pointer for that.  This requires us to
allocate with the os_malloc/free_aligned helpers (which call into
posix_memalign on Linux) but cache-line aligning our allocations is
actually probably a good thing given that we're doing atomics on them.

The primary advantages to doing this is that it changes the number of
memory accesses per tree level from 2 to 1 when walking the tree because
we no longer have to look at node->level.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>

4 years agomeson,ci: Disable sparse_array tests on windows
Jason Ekstrand [Thu, 19 Mar 2020 17:50:33 +0000 (12:50 -0500)]
meson,ci: Disable sparse_array tests on windows

As soon as I switch to using the allocation helpers in os_memory.h,
these tests start blowing up on the Windows build in GitLab CI.  As far
as I can tell, the issue is something with the combination of the debug
allocator in u_debug_memory.c and the mutex implementation in the
version of Wine running in CI.  The tests don't fail on real windows nor
do they fail with newer versions of Wine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>

4 years agoutil/sparse_array: Add a node_size_log2 temporary
Jason Ekstrand [Wed, 18 Mar 2020 16:32:15 +0000 (11:32 -0500)]
util/sparse_array: Add a node_size_log2 temporary

We use this value several times.  It's probably best to encourage the
compiler to only read it once.  I have no proof that this actually makes
any performance improvement whatsoever.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>

4 years agoutil/sparse_array: Finish the sparse_array in the tests
Jason Ekstrand [Thu, 19 Mar 2020 14:39:38 +0000 (09:39 -0500)]
util/sparse_array: Finish the sparse_array in the tests

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>