yosys.git
5 years agoMerge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Eddie Hung [Wed, 28 Aug 2019 16:21:03 +0000 (09:21 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl

5 years agoMerge pull request #1332 from YosysHQ/dave/ecp5gsr
David Shah [Wed, 28 Aug 2019 11:44:02 +0000 (12:44 +0100)]
Merge pull request #1332 from YosysHQ/dave/ecp5gsr

ecp5: Add GSR and SGSR support

5 years agoMerge pull request #1335 from YosysHQ/clifford/paramap
Clifford Wolf [Wed, 28 Aug 2019 08:35:47 +0000 (10:35 +0200)]
Merge pull request #1335 from YosysHQ/clifford/paramap

Add "paramap" pass

5 years agoFix typo
Clifford Wolf [Wed, 28 Aug 2019 08:06:42 +0000 (10:06 +0200)]
Fix typo

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd "paramap" pass
Clifford Wolf [Wed, 28 Aug 2019 08:03:27 +0000 (10:03 +0200)]
Add "paramap" pass

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #1325 from YosysHQ/eddie/sat_init
Clifford Wolf [Tue, 27 Aug 2019 22:18:14 +0000 (00:18 +0200)]
Merge pull request #1325 from YosysHQ/eddie/sat_init

In sat: 'x' in init attr should be ignored

5 years agoxilinx: Add SRLC16E primitive.
Marcin Kościelnicki [Tue, 27 Aug 2019 16:08:51 +0000 (18:08 +0200)]
xilinx: Add SRLC16E primitive.

Fixes #1331.

5 years agoMerge pull request #1292 from YosysHQ/mwk/xilinx_bufgmap
Eddie Hung [Tue, 27 Aug 2019 17:19:27 +0000 (10:19 -0700)]
Merge pull request #1292 from YosysHQ/mwk/xilinx_bufgmap

Add clock buffer insertion pass, improve iopadmap.

5 years agoIgnore all 1'bx in (* init *)
Eddie Hung [Tue, 27 Aug 2019 16:24:59 +0000 (09:24 -0700)]
Ignore all 1'bx in (* init *)

5 years agoRevert to using clean
Eddie Hung [Tue, 27 Aug 2019 16:24:32 +0000 (09:24 -0700)]
Revert to using clean

5 years agoimprove clkbuf_inhibit propagation upwards through hierarchy
Marcin Kościelnicki [Tue, 27 Aug 2019 15:26:47 +0000 (17:26 +0200)]
improve clkbuf_inhibit propagation upwards through hierarchy

5 years agoecp5: Add GSR support
David Shah [Tue, 27 Aug 2019 12:07:06 +0000 (13:07 +0100)]
ecp5: Add GSR support

Signed-off-by: David Shah <dave@ds0.me>
5 years agoAdd "make bumpversion"
Clifford Wolf [Tue, 27 Aug 2019 08:13:23 +0000 (10:13 +0200)]
Add "make bumpversion"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMissing close bracket
Eddie Hung [Tue, 27 Aug 2019 04:02:52 +0000 (21:02 -0700)]
Missing close bracket

5 years agoRevert "In sat: 'x' in init attr should not override constant"
Eddie Hung [Tue, 27 Aug 2019 00:52:57 +0000 (17:52 -0700)]
Revert "In sat: 'x' in init attr should not override constant"

This reverts commit 2b37a093e95036b267481b2dae2046278eef4040.

5 years agoRemove leftover header
Eddie Hung [Tue, 27 Aug 2019 00:51:13 +0000 (17:51 -0700)]
Remove leftover header

5 years agoImprove xilinx_srl.fixed generate, add .variable generate
Eddie Hung [Tue, 27 Aug 2019 00:49:08 +0000 (17:49 -0700)]
Improve xilinx_srl.fixed generate, add .variable generate

5 years agoAccount for maxsubcnt overflowing
Eddie Hung [Tue, 27 Aug 2019 00:48:54 +0000 (17:48 -0700)]
Account for maxsubcnt overflowing

5 years agoAdd xilinx_srl_pm.variable to test_pmgen
Eddie Hung [Tue, 27 Aug 2019 00:44:57 +0000 (17:44 -0700)]
Add xilinx_srl_pm.variable to test_pmgen

5 years agoPopulate generate for xilinx_srl.fixed pattern
Eddie Hung [Mon, 26 Aug 2019 21:21:17 +0000 (14:21 -0700)]
Populate generate for xilinx_srl.fixed pattern

5 years agoAdd xilinx_srl_fixed, fix typos
Eddie Hung [Mon, 26 Aug 2019 21:20:06 +0000 (14:20 -0700)]
Add xilinx_srl_fixed, fix typos

5 years agoMerge branch 'master' into eddie/xilinx_srl
Eddie Hung [Mon, 26 Aug 2019 20:56:31 +0000 (13:56 -0700)]
Merge branch 'master' into eddie/xilinx_srl

5 years agoImprove tests to check that clkbuf is connected to expected
Eddie Hung [Mon, 26 Aug 2019 20:45:16 +0000 (13:45 -0700)]
Improve tests to check that clkbuf is connected to expected

5 years agoMerge branch 'master' into mwk/xilinx_bufgmap
Eddie Hung [Mon, 26 Aug 2019 20:25:17 +0000 (13:25 -0700)]
Merge branch 'master' into mwk/xilinx_bufgmap

5 years agoRemove dupe in CHANGELOG, missing end quote
Eddie Hung [Mon, 26 Aug 2019 17:44:23 +0000 (10:44 -0700)]
Remove dupe in CHANGELOG, missing end quote

5 years agoMerge tag 'yosys-0.9'
Clifford Wolf [Mon, 26 Aug 2019 09:11:47 +0000 (11:11 +0200)]
Merge tag 'yosys-0.9'

5 years agoYosys 0.9 yosys-0.9
Clifford Wolf [Mon, 26 Aug 2019 08:37:53 +0000 (10:37 +0200)]
Yosys 0.9

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #1112 from acw1251/pyosys_sigsig_issue
Clifford Wolf [Sun, 25 Aug 2019 09:22:02 +0000 (11:22 +0200)]
Merge pull request #1112 from acw1251/pyosys_sigsig_issue

Fixed pyosys commands returning RTLIL::SigSig

5 years agoWire with init on FF part, 1'bx on non-FF part
Eddie Hung [Sat, 24 Aug 2019 22:05:44 +0000 (15:05 -0700)]
Wire with init on FF part, 1'bx on non-FF part

5 years agoMerge pull request #1327 from YosysHQ/clifford/pmgen
Clifford Wolf [Sat, 24 Aug 2019 06:38:49 +0000 (08:38 +0200)]
Merge pull request #1327 from YosysHQ/clifford/pmgen

Add pmgen slices and choices

5 years agoCreate new $__XILINX_SHREG_ cell for variable length too
Eddie Hung [Sat, 24 Aug 2019 01:15:49 +0000 (18:15 -0700)]
Create new $__XILINX_SHREG_ cell for variable length too

5 years agoDo not allow Q of last cell of variable length SRL to be (* keep *)
Eddie Hung [Sat, 24 Aug 2019 01:15:24 +0000 (18:15 -0700)]
Do not allow Q of last cell of variable length SRL to be (* keep *)

5 years agoAlso add first.Q to chain_bits since variable length
Eddie Hung [Sat, 24 Aug 2019 01:14:06 +0000 (18:14 -0700)]
Also add first.Q to chain_bits since variable length

5 years agoDo not enforce !EN_POLARITY on $dffe
Eddie Hung [Sat, 24 Aug 2019 01:11:28 +0000 (18:11 -0700)]
Do not enforce !EN_POLARITY on $dffe

5 years agoCreate new cell for fixed length SRL
Eddie Hung [Sat, 24 Aug 2019 00:25:30 +0000 (17:25 -0700)]
Create new cell for fixed length SRL

5 years agoCleanup FDRE matching
Eddie Hung [Sat, 24 Aug 2019 00:23:52 +0000 (17:23 -0700)]
Cleanup FDRE matching

5 years agoAdd undocumented feature
Eddie Hung [Fri, 23 Aug 2019 23:41:32 +0000 (16:41 -0700)]
Add undocumented feature

5 years agoOops don't need a finally block
Eddie Hung [Fri, 23 Aug 2019 23:39:37 +0000 (16:39 -0700)]
Oops don't need a finally block

5 years agoKeep track of bits in variable length chain, to check for taps
Eddie Hung [Fri, 23 Aug 2019 23:21:10 +0000 (16:21 -0700)]
Keep track of bits in variable length chain, to check for taps

5 years agoDon't forget $dff has no EN
Eddie Hung [Fri, 23 Aug 2019 23:14:57 +0000 (16:14 -0700)]
Don't forget $dff has no EN

5 years agoSame for variable length
Eddie Hung [Fri, 23 Aug 2019 23:13:16 +0000 (16:13 -0700)]
Same for variable length

5 years agoFilter on en_port for fixed length
Eddie Hung [Fri, 23 Aug 2019 23:09:46 +0000 (16:09 -0700)]
Filter on en_port for fixed length

5 years agoCheck clock is consistent
Eddie Hung [Fri, 23 Aug 2019 22:18:26 +0000 (15:18 -0700)]
Check clock is consistent

5 years agoFix last_cell.D
Eddie Hung [Fri, 23 Aug 2019 22:08:49 +0000 (15:08 -0700)]
Fix last_cell.D

5 years agoRevert "Add a unique argument to pmgen's nusers()"
Eddie Hung [Fri, 23 Aug 2019 22:04:00 +0000 (15:04 -0700)]
Revert "Add a unique argument to pmgen's nusers()"

This reverts commit 1d88887cfdbeedff7dce9024d8fb4ceb014cb2ef.

5 years agoRevert "Fix polarity"
Eddie Hung [Fri, 23 Aug 2019 22:03:42 +0000 (15:03 -0700)]
Revert "Fix polarity"

This reverts commit 9cd23cf0feda3e12ceda1f8fa5d28d2b38f2314d.

5 years agoFix polarity
Eddie Hung [Fri, 23 Aug 2019 21:49:34 +0000 (14:49 -0700)]
Fix polarity

5 years agoCheck for non unique nusers/fanouts
Eddie Hung [Fri, 23 Aug 2019 21:32:36 +0000 (14:32 -0700)]
Check for non unique nusers/fanouts

5 years agoAdd a unique argument to pmgen's nusers()
Eddie Hung [Fri, 23 Aug 2019 21:32:17 +0000 (14:32 -0700)]
Add a unique argument to pmgen's nusers()

5 years agoUpdate doc
Eddie Hung [Fri, 23 Aug 2019 21:16:41 +0000 (14:16 -0700)]
Update doc

5 years agoRemove (* init *) entry when consumed into SRL
Eddie Hung [Fri, 23 Aug 2019 20:56:01 +0000 (13:56 -0700)]
Remove (* init *) entry when consumed into SRL

5 years agoindo -> into
Eddie Hung [Fri, 23 Aug 2019 20:15:41 +0000 (13:15 -0700)]
indo -> into

5 years agoindo -> into
Eddie Hung [Fri, 23 Aug 2019 20:15:41 +0000 (13:15 -0700)]
indo -> into

5 years agoForgot to slice
Eddie Hung [Fri, 23 Aug 2019 20:06:59 +0000 (13:06 -0700)]
Forgot to slice

5 years agoCope with possibility that D could connect to Q on same cell
Eddie Hung [Fri, 23 Aug 2019 20:06:31 +0000 (13:06 -0700)]
Cope with possibility that D could connect to Q on same cell

5 years agoRevert earliest to gcc-4.8, compile iverilog with default compiler
Eddie Hung [Wed, 14 Aug 2019 19:28:17 +0000 (12:28 -0700)]
Revert earliest to gcc-4.8, compile iverilog with default compiler

5 years agoRevert "Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!"
Eddie Hung [Wed, 14 Aug 2019 19:26:45 +0000 (12:26 -0700)]
Revert "Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!"

This reverts commit c82b2fa31f8965be2680c87af6cd9ac5d26ead4d.

5 years agoRemove .0 from clang-8.0
Eddie Hung [Wed, 14 Aug 2019 19:23:15 +0000 (12:23 -0700)]
Remove .0 from clang-8.0

5 years agoBump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!
Eddie Hung [Wed, 14 Aug 2019 19:16:02 +0000 (12:16 -0700)]
Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!

5 years agobionic -> xenial as its on whitelist
Eddie Hung [Wed, 14 Aug 2019 18:52:08 +0000 (11:52 -0700)]
bionic -> xenial as its on whitelist

5 years agoBump gcc from 4.8 to 4.9 as undefined reference
Eddie Hung [Wed, 14 Aug 2019 18:26:32 +0000 (11:26 -0700)]
Bump gcc from 4.8 to 4.9 as undefined reference

... to `__warn_memset_zero_len'.
Also remove gcc-6, bump gcc-7 to gcc-9, clang from 5.0 to 8.0

5 years agoMention shregmap -tech xilinx is superseded
Eddie Hung [Fri, 23 Aug 2019 19:24:25 +0000 (12:24 -0700)]
Mention shregmap -tech xilinx is superseded

5 years agoxilinx_srl now copes with word-level flops $dff{,e}
Eddie Hung [Fri, 23 Aug 2019 19:22:46 +0000 (12:22 -0700)]
xilinx_srl now copes with word-level flops $dff{,e}

5 years agoxilinx_srl to use 'slice' features of pmgen for word level
Eddie Hung [Fri, 23 Aug 2019 19:22:06 +0000 (12:22 -0700)]
xilinx_srl to use 'slice' features of pmgen for word level

5 years agoMerge remote-tracking branch 'origin/clifford/pmgen' into eddie/xilinx_srl
Eddie Hung [Fri, 23 Aug 2019 18:35:06 +0000 (11:35 -0700)]
Merge remote-tracking branch 'origin/clifford/pmgen' into eddie/xilinx_srl

5 years agoMerge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Eddie Hung [Fri, 23 Aug 2019 18:32:44 +0000 (11:32 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl

5 years agoMerge branch 'master' into mwk/xilinx_bufgmap
Eddie Hung [Fri, 23 Aug 2019 18:24:19 +0000 (11:24 -0700)]
Merge branch 'master' into mwk/xilinx_bufgmap

5 years agoForgot one
Eddie Hung [Fri, 23 Aug 2019 18:23:50 +0000 (11:23 -0700)]
Forgot one

5 years agoMerge branch 'master' into mwk/xilinx_bufgmap
Eddie Hung [Fri, 23 Aug 2019 18:23:31 +0000 (11:23 -0700)]
Merge branch 'master' into mwk/xilinx_bufgmap

5 years agoPut abc_* attributes above port
Eddie Hung [Fri, 23 Aug 2019 18:21:44 +0000 (11:21 -0700)]
Put abc_* attributes above port

5 years agoCheck clkbuf_inhibit=1 is ignored for custom selection
Eddie Hung [Fri, 23 Aug 2019 18:15:26 +0000 (11:15 -0700)]
Check clkbuf_inhibit=1 is ignored for custom selection

5 years agoclkbufmap to only check clkbuf_inhibit if no selection given
Eddie Hung [Fri, 23 Aug 2019 18:14:42 +0000 (11:14 -0700)]
clkbufmap to only check clkbuf_inhibit if no selection given

5 years agoAdd simple clkbufmap tests
Eddie Hung [Fri, 23 Aug 2019 18:10:02 +0000 (11:10 -0700)]
Add simple clkbufmap tests

5 years agotests/techmap/run-test.sh to cope with *.ys
Eddie Hung [Fri, 23 Aug 2019 18:09:50 +0000 (11:09 -0700)]
tests/techmap/run-test.sh to cope with *.ys

5 years agoMention clkbuf_inhibit can be overridden
Eddie Hung [Fri, 23 Aug 2019 17:24:59 +0000 (10:24 -0700)]
Mention clkbuf_inhibit can be overridden

5 years agoReview comment from @cliffordwolf
Eddie Hung [Fri, 23 Aug 2019 17:03:41 +0000 (10:03 -0700)]
Review comment from @cliffordwolf

5 years agoMerge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap
Eddie Hung [Fri, 23 Aug 2019 17:00:50 +0000 (10:00 -0700)]
Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap

5 years agoMake macOS depenency clear
Miodrag Milanovic [Fri, 23 Aug 2019 08:37:50 +0000 (10:37 +0200)]
Make macOS depenency clear

5 years agoMerge pull request #1326 from mmicko/doc-update
Eddie Hung [Fri, 23 Aug 2019 16:12:58 +0000 (09:12 -0700)]
Merge pull request #1326 from mmicko/doc-update

Make macOS dependency clear

5 years agoBlocking assignment
Eddie Hung [Fri, 23 Aug 2019 16:11:04 +0000 (09:11 -0700)]
Blocking assignment

5 years agoFix port hanlding in pmgen
Clifford Wolf [Fri, 23 Aug 2019 14:26:54 +0000 (16:26 +0200)]
Fix port hanlding in pmgen

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd pmgen slices and choices
Clifford Wolf [Fri, 23 Aug 2019 14:15:50 +0000 (16:15 +0200)]
Add pmgen slices and choices

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMake macOS depenency clear
Miodrag Milanovic [Fri, 23 Aug 2019 08:37:50 +0000 (10:37 +0200)]
Make macOS depenency clear

5 years agoDo not propagate mem2reg attribute through to result
Eddie Hung [Thu, 22 Aug 2019 23:57:59 +0000 (16:57 -0700)]
Do not propagate mem2reg attribute through to result

5 years agoIn sat: 'x' in init attr should not override constant
Eddie Hung [Thu, 22 Aug 2019 23:42:19 +0000 (16:42 -0700)]
In sat: 'x' in init attr should not override constant

5 years agoIn sat: 'x' in init attr should not override constant
Eddie Hung [Thu, 22 Aug 2019 23:42:19 +0000 (16:42 -0700)]
In sat: 'x' in init attr should not override constant

5 years agoRemove Xilinx test
Eddie Hung [Thu, 22 Aug 2019 23:18:07 +0000 (16:18 -0700)]
Remove Xilinx test

5 years agoActually, there might not be any harm in updating sigmap...
Eddie Hung [Fri, 21 Jun 2019 00:03:05 +0000 (17:03 -0700)]
Actually, there might not be any harm in updating sigmap...

5 years agoAdd comment as per @cliffordwolf
Eddie Hung [Thu, 20 Jun 2019 23:57:54 +0000 (16:57 -0700)]
Add comment as per @cliffordwolf

5 years agoAdd shregmap -tech xilinx test
Eddie Hung [Wed, 12 Jun 2019 15:34:06 +0000 (08:34 -0700)]
Add shregmap -tech xilinx test

5 years agoRevert "Try way that doesn't involve creating a new wire"
Eddie Hung [Tue, 11 Jun 2019 23:05:42 +0000 (16:05 -0700)]
Revert "Try way that doesn't involve creating a new wire"

This reverts commit 2f427acc9ed23c77e89386f4fbf53ac580bf0f0b.

5 years agoTry way that doesn't involve creating a new wire
Eddie Hung [Tue, 11 Jun 2019 22:48:20 +0000 (15:48 -0700)]
Try way that doesn't involve creating a new wire

5 years agoIf d_bit already in sigbit_chain_next, create extra wire
Eddie Hung [Mon, 10 Jun 2019 23:16:40 +0000 (16:16 -0700)]
If d_bit already in sigbit_chain_next, create extra wire

5 years agoSpelling
Eddie Hung [Thu, 22 Aug 2019 21:20:03 +0000 (14:20 -0700)]
Spelling

5 years agodo not require boost if pyosys is not used
Miodrag Milanovic [Thu, 22 Aug 2019 18:43:52 +0000 (20:43 +0200)]
do not require boost if pyosys is not used

5 years agorequire tcl-tk in Brewfile
Chris Shucksmith [Thu, 22 Aug 2019 15:37:40 +0000 (16:37 +0100)]
require tcl-tk in Brewfile

5 years agoMerge pull request #1322 from mmicko/pyosys_osx
Eddie Hung [Thu, 22 Aug 2019 18:53:27 +0000 (11:53 -0700)]
Merge pull request #1322 from mmicko/pyosys_osx

do not require boost if pyosys is not used

5 years agoAdd doc
Eddie Hung [Thu, 22 Aug 2019 18:52:24 +0000 (11:52 -0700)]
Add doc

5 years agodo not require boost if pyosys is not used
Miodrag Milanovic [Thu, 22 Aug 2019 18:43:52 +0000 (20:43 +0200)]
do not require boost if pyosys is not used

5 years agoMerge pull request #1319 from TeaEngineering/shuckc/brew-tcl-tk
Eddie Hung [Thu, 22 Aug 2019 18:32:44 +0000 (11:32 -0700)]
Merge pull request #1319 from TeaEngineering/shuckc/brew-tcl-tk

require tcl-tk in Brewfile