[binutils, ARM] <spec_reg> changes for VMRS and VMSR instructions

This patch makes changes to the <spec_reg> operand for VMRS and VMSR
instructions as per the Armv8.1-M Mainline.
New <spec_reg> options to support are:

0b0010: FPSCR_nzcvqc, access to FPSCR condition and saturation flags.
0b1100: VPR, privileged only access to the VPR register.
0b1101: P0, access to VPR.P0 predicate fields
0b1110: FPCXT_NS, enables saving and restoring of Non-secure floating
point context.
0b1111: FPCXT_S, enables saving and restoring of Secure floating point
context

*** gas/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

* config/tc-arm.c (parse_operands): Update case OP_RVC to
parse p0 and P0.
(do_vmrs): Add checks for valid operands with respect to
cpu and fpu options.
(do_vmsr): Likewise.
(reg_names): New reg_names for FPSCR_nzcvqc, VPR, FPCXT_NS
and FPCXT_S.
* testsuite/gas/arm/armv8_1-m-spec-reg.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg.s: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l: New.
* testsuite/gas/arm/vfp1xD.d: Updated to allow new valid values.
* testsuite/gas/arm/vfp1xD_t2.d: Likewise.

*** opcodes/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

* arm-dis.c (coprocessor_opcodes): New instructions for VMRS
and VMSR with the new operands.

[binutils, Arm] Add support for conditional instructions in Armv8.1-M Mainline

This patch adds the following instructions which are part of the
Armv8.1-M Mainline:
CINC
CINV
CNEG
CSINC
CSINV
CSNEG
CSET
CSETM
CSEL

gas/ChangeLog:

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

* config/tc-arm.c (TOGGLE_BIT): New.
(T16_32_TAB): New entries for cinc, cinv, cneg, csinc,
csinv, csneg, cset, csetm and csel.
(operand_parse_code): New OP_RR_ZR.
(parse_operand): Handle case for OP_RR_ZR.
(do_t_cond): New.
(insns): New instructions for cinc, cinv, cneg, csinc,
csinv, csneg, cset, csetm, csel.
* testsuite/gas/arm/armv8_1-m-cond-bad.d: New test.
* testsuite/gas/arm/armv8_1-m-cond-bad.l: New test.
* testsuite/gas/arm/armv8_1-m-cond-bad.s: New test.
* testsuite/gas/arm/armv8_1-m-cond.d: New test.
* testsuite/gas/arm/armv8_1-m-cond.s: New test.

opcodes/ChangeLog:

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

* arm-dis.c (enum mve_instructions): New enum
for csinc, csinv, csneg, csel, cset, csetm, cinv, cinv
and cneg.
(mve_opcodes): New instructions as above.
(is_mve_encoding_conflict): Add cases for csinc, csinv,
csneg and csel.
(print_insn_mve): Accept new %<bitfield>c and %<bitfield>C.

[binutils, Arm] Add support for shift instructions in MVE

This patch adds the following instructions which are part of
Armv8.1-M MVE:
ASRL (imm)
ASRL (reg)
LSLL (imm)
LSLL (reg)
LSRL
SQRSHRL
SRQSHR
SQSHLL
SQSHL
SRSHRL
SRSHR
UQRSHLL
UQRSHL
UQSHLL
UQSHL
URSHLL
URSHL

*** gas/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

* config/tc-arm.c (operand_parse_code): New entries for
OP_RRnpcsp_I32 (register or integer operands).
(do_mve_scalar_shift): New.
(insns): New instructions for asrl, lsll, lsrl, sqrshrl, sqrshr, sqshl
sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll, uqshl, urshrl and urshr.
* testsuite/gas/arm/mve-shift.d: New.
* testsuite/gas/arm/mve-shift.s: New.
* testsuite/gas/arm/mve-shift-bad.d: New.
* testsuite/gas/arm/mve-shift-bad.s: New.
* testsuite/gas/arm/mve-shift-bad.l: New.

*** opcodes/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

* arm-dis.c (emun mve_instructions): Updated for new instructions.
(mve_opcodes): New instructions for asrl, lsll, lsrl, sqrshrl,
sqrshr, sqshl, sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll,
uqshl, urshrl and urshr.
(is_mve_okay_in_it): Add new instructions to TRUE list.
(is_mve_unpredictable): Add cases for UNPRED_R13 and UNPRED_R15.
(print_insn_mve): Updated to accept new %j,
%<bitfield>m and %<bitfield>n patterns.

MIPS/gas: Reject $0 as source register for DAUI instruction

The MIPS64R6 TRM requires that the source register for DAUI
not be r0.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 67-68.

gas/
* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.s: this and add test
case for DAUI.
* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.l: this and add test
for DAUI.
* testsuite/gas/mips/mips.exp: Rename test from
r6-branch-constraints to r6-reg-constraints.

opcodes/
* mips-opc.c (mips_builtin_opcodes): Change source register
constraint for DAUI.

[MIPS] Add generation of PLT entries with compact jumps for MIPS R6

Add a new option to get the linker to emit PLTs that use compact
branches instead of delay slot branches.

bfd/
* elfxx-mips.c (LA25_BC): New macro.
(mips_elf_link_hash_table)<compact_branches>: New field.
(STUB_JALRC): New macro.
(mipsr6_o32_exec_plt0_entry_compact): New array.
(mipsr6_n32_exec_plt0_entry_compact): Likewise.
(mipsr6_n64_exec_plt0_entry_compact): Likewise.
(mipsr6_exec_plt_entry_compact): Likewise.
(mips_elf_create_la25_stub): Use BC instead of J for stubs
when compact_branches is true.
(_bfd_mips_elf_finish_dynamic_symbol): Choose the compact
PLT for MIPSR6 with compact_branches.  Do not reorder the
compact branches PLT.  Switch the lazy stub for MIPSR6
with compact_branches to use JALRC.
(mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6
when compact_branches is true.
(_bfd_mips_elf_compact_branches): New function.
* elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype.

ld/
* emultempl/mipself.em (compact_branches): New static variable.
(mips_create_output_section_statements): Call
_bfd_mips_elf_compact_branches.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and
OPTION_NO_COMPACT_BRANCHES.
(PARSE_AND_LIST_LONGOPTS): Add compact-branches,
no-compact-branches.
(PARSE_AND_LIST_OPTIONS): Add --compact-branches,
--no-compact-branches.
(PARSE_AND_LIST_ARGS_CASES): Handle the above.
* ld.texinfo: Document --compact-branches, --no-compact-branches.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.

AArch64: Fix -Werror on build

This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`.
Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit
hosts.

Committed under the obvious rule.

bfd/ChangeLog:

PR ld/24373
* elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub):
Fix print formatter.

[gdb/cli] Fix use of uninitialized variable in complete_command

When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into:
...
FAIL: gdb.linespec/explicit.exp: complete after -line: \
  cmd complete "b -line argument " (timeout)
...

The failure is reproducible outside the testsuite like this:
...
$ gdb -q build/gdb/testsuite/outputs/gdb.linespec/explicit/explicit \
  -ex "complete b -line argument"
Reading symbols from \
  build/gdb/testsuite/outputs/gdb.linespec/explicit/explicit...
terminate called after throwing an instance of 'std::length_error'
  what():  basic_string::_M_create
  Aborted (core dumped)
...

The problem is here in complete_command:
...
  completion_result result = complete (arg, &word, &quote_char);

  std::string arg_prefix (arg, word - arg);

  if (result.number_matches != 0)
...
The problem is that the word variable is not initialized when
result.number_matches == 0, but the variable is still used in the arg_prefix
initialization.

Fix this by guarding the arg_prefix initialization with the
'result.number_matches != 0' test.

Build and tested on x86_64-linux.

gdb/ChangeLog:

2019-05-21  Tom de Vries  <tdevries@suse.de>

PR cli/24587
* cli/cli-cmds.c (complete_command): Fix use of unitialized variable.

[gdb/testsuite] Require c++11 where necessary

When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into failures due test-cases requiring at least c++1.

Fix this by adding -std=c++11 to those test-cases.

Tested on x86_64-linux.

gdb/testsuite/ChangeLog:

2019-05-21  Tom de Vries  <tdevries@suse.de>

* gdb.arch/amd64-eval.exp: Require c++11.
* gdb.base/max-depth.exp: Same.
* gdb.compile/compile-cplus-array-decay.exp: Same.
* gdb.cp/meth-typedefs.exp: Same.
* gdb.cp/subtypes.exp: Same.
* gdb.cp/temargs.exp: Same.

[GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline

gas/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

PR 24559
* config/tc-arm.c (move_or_literal_pool): Set size_req to 0
for MOVW replacement.
* testsuite/gas/arm/load-pseudo.s: New test input.
* testsuite/gas/arm/m0-load-pseudo.d: New test.
* testsuite/gas/arm/m23-load-pseudo.d: New test.
* testsuite/gas/arm/m33-load-pseudo.d: New test.

[binutils][Arm] Fix Branch Future relocation handling and testisms

bfd/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

PR/target 24460
* elf32-arm.c (get_value_helper): Remove.
(elf32_arm_final_link_relocate): Fix branch future relocations.

gas/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming
conventions.
* testsuite/gas/arm/armv8_1-m-bfl.d: Likewise.
* testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise.
* testsuite/gas/arm/armv8_1-m-loloop.d: Likewise.
* testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks.
* testsuite/gas/arm/armv8_1-m-bf-rela.d: New test.
* testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks.
* testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test.

ld/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* testsuite/ld-arm/arm-elf.exp: Add tests
* testsuite/ld-arm/bfs-0.s: New test.
* testsuite/ld-arm/bfs-1.s: New test.
* testsuite/ld-arm/branch-futures.d: New test.

AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)

The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:

1) If the address is within the range of an ADR instruction it rewrites the ADRP
   into an ADR, and those doesn't need the use of a veneer.

2) If the address is not within range, it adds a branch to a veneer which will
   execute the final bit of the erratum workaround and branch back to the call
   site.

When we do this we always generate the veneers and we always align the size of
the text section to 4KB.  This is because we only know which workaround we can
use after all linking has finished and all addresses are known.  This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.

This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.

Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.

Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]

- full (default): Use both ADRP and ADR workaround. This is equivalent to not
  specifying any options and is the default behavior before this
  patch.

- adr: Only use the ADR workaround, this will not cause any increase in binary
       size but linking will fail if the referenced address is out of range of
       an ADR instruction.

- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.

In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.

bfd/ChangeLog:

PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.

ld/ChangeLog:

PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.

AArch64: Add SVE DWARF registers

The SVE DRAWF register names are missing from binutils, this may cause objdump
and readelf to ignore certain DRAWF output as the registers are unknown (most
notably CIEs).

This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit
Architecture (AARch64) with SVE support" documentation [1].

[1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support

binutils/ChangeLog:

* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.

testsuite: Mark the kill in gdbserver_run as optional

This matches the kill in gdb_file_cmd, and ensures that the command is not
sent to the gdb.in file.

When gdb.in is used as a batch file, any kill commands run before the target
is started will cause gdb to stop processing commands.

gdb/testsuite/ChangeLog:

* lib/gdbserver-support.exp (gdbserver_run): Mark kill as optional.

GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value.

In an upcoming commit, I need to be able to set the prefix used
to introduce hexadecimal literal constants using a command line
flag.   This is not currently possible, because the switch which
determines this (LITERAL_PREFIXDOLLAR_HEX) is a macro set at
build time.

This change substitutes it for a variable to be set at start up.

gas/ChangeLog:
    * expr.c (literal_prefix_dollar_hex): New variable.
    (operand)[case '$']: Use the new variable instead of the old macro.
    Also, move this instance of "case '$'" next to the other one, and
    enable it only in the complementary proprocessor case.
    * expr.h (literal_prefix_dollar_hex): Declare it.
    * config/tc-epiphany.c (md_begin): Assign literal_prefix_dollar_hex.
    * config/tc-ip2k.c:      ditto
    * config/tc-mt.c:        ditto
    * config/tc-epiphany.h (LITERAL_PREFIXDOLLAR_HEX): Remove macro definition.
    * config/tc-ip2k.h:      ditto
    * config/tc-mt.h:        ditto

Fix PR 24571 -  Relaxation does not shorten jmp or call to target at pc-relative range boundary

The range check done to transform an absolute call/jump to a pc-relative one is
off-by-one, and that causes this shortening optimization to be missed if the
branch target is right at the range boundary.

In the non-shrinkable case, the range is what is mentioned in the ISA - -4094
bytes in the backward direction, and 4096 bytes in the positive direction.

In the shrinkable case, the forward jump range increases by two bytes (deleted
because of the shortening from call/jmp to rcall/rjmp), and therefore, the
range is -4094 in the reverse, and 4098 in the positive direction.

Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to
ensure jumps to max forward and backward ranges get relaxed to rjmp.

Fix PR 24564 - link fails for some rcalls/rjmps with wraparound

The current code to compute relative distance in the wrap around case does not
handle the edge case of the target (after adjusting for implicit PC increment)
being exactly half of the wrap around distance. This patch fixes that and adds a
testcase.

The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes
for the implicit PC increment)). If the target of the jump is at a distance of
4098 bytes, it is out of range for a forward jump - however, a backward jump can
still reach that address if pmem-wrap-around is 8192.

Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and
*without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will
jump to address 4096 (wrap around at 8192 and decreasing addresses from then
on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098.

avr_relative_distance_considering_wrap_around though, does the wrap around only
if the passed in distance is less than half of the wrap around distance. In this
case, it is exactly equal to half (original distance 4098, adjusted distance of
4096 and wraparound of 8192), and the bypassed wrap around causes the reloc
overflow error.

Fix by wrapping around even if adjusted distance is equal to half of wrap around
distance.

Revert "GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value."

This reverts commit cffc205c9eaacfa312323807cd60b9d3d1c26894.

Automatic date update in version.in

[MIPS] PR gas/14798: Limit IRIX5 specific default typing to IRIX targets

On IRIX 5, every global symbol that is not explicitly labelled as
being a function is assumed to be an object.  There is no reason
why IRIX behaviour should extend to all MIPS targets, so limit this
to only IRIX targets.

gas/
PR 14798
* config/tc-mips.c (s_mips_globl): Only treat symbols that are
not explicitly labelled as BSF_OBJECTs for IRIX targets.
* testsuite/gas/mips/pr14798.s: New test source.
* testsuite/gas/mips/pr14798-irix.d: New test.
* testsuite/gas/mips/pr14798.d: Likewise.
* testsuite/gas/mips/mips.exp: Run the new tests.

binutils/
PR 14798
* testsuite/binutils-all/readelf.ss-mips: Update reference output.
* testsuite/binutils-all/readelf.ss-tmips: Likewise.

ld/
PR 14798
* testsuite/ld-mips-elf/reloc-6a.s: Specify .text section for
global code symbols.
* testsuite/ld-mips-elf/reloc-6b.s: Likewise.

GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value.

In an upcoming commit, I need to be able to set the prefix used
to introduce hexadecimal literal constants using a command line
flag.   This is not currently possible, because the switch which
determines this (LITERAL_PREFIXDOLLAR_HEX) is a macro set at
build time.

This change substitutes it for a variable to be set at start up.

gas/ChangeLog:
* expr.c (literal_prefix_dollar_hex): New variable.
(operand)[case '$']: Use the new variable instead of the old macro.
* expr.h (literal_prefix_dollar_hex): Declare it.
* config/tc-epiphany.c (md_begin): Assign literal_prefix_dollar_hex.
* config/tc-ip2k.c:      ditto
* config/tc-mt.c:        ditto
* config/tc-epiphany.h (LITERAL_PREFIXDOLLAR_HEX): Remove macro definition.
* config/tc-ip2k.h:      ditto
* config/tc-mt.h:        ditto

Correct the alpha sorting of the short options in the usage description of the gprof program.

PR 24569
* gprof.c (usage): Restore alphabetical sorting to short options
list.  Add -r, -R and -t short options to the list.
(main): Add comment about -g and -G possibly being deprecated.
* gprof.texi: Update usage example in line with changes above.

Updated translations for various binutils subdirectories.

bfd * po/fr.po: Updated French translation.
binutils* po/ca.po: Updated Catalan translation.
gprof * po/de.po: Updated German translation.
opcodes * po/fr.po: Updated French translation.

Automatic date update in version.in

Automatic date update in version.in

gdb/fortran: Use floatformats_ia64_quad for fortran 16-byte floats

PR gdb/18644 is caused by GDB using the wrong floating point format
for gfortran's 16-byte floating point type, including when the 16-byte
float is used as the component of a 32-byte complex type.

This commit addresses the issue in two places, first in i386-tdep.c,
there is already some code to force the use of floatformats_ia64_quad
for specific named types, this is extended to include the type names
that gfortran uses for its 16-byte floats.

Second, the builtin 16-byte float type (in f-lang.c) is changed so it
no longer uses gdbarch_long_double_format.  On i386 this type is not
16-bytes, but is smaller, this is not what gfortran is expecting.
Instead we now use gdbarch_floatformat_for_type and ask for a
16-byte (128 bit) type using the common gfortran type name.  This is
then spotted in i386-tdep.c (thanks to the first change above) and we
again get floatformats_ia64_quad returned.

This patch was tested on X86-64/GNU-Linux using '--target_board=unix'
and '--target_board=unix/-m32', and resolves all of the known failures
associated with PR gdb/18644.  I've also added the test case from the
original bug report.

gdb/ChangeLog:

PR gdb/18644:
* f-lang.c (build_fortran_types): Use floatformats_ia64_quad for
16-byte floats.
* i386-tdep.c (i386_floatformat_for_type): Use
floatformats_ia64_quad for the 16-byte floating point component
within a fortran 32-byte complex number.

gdb/testsuite/ChangeLog:

PR gdb/18644
* gdb.fortran/complex.exp: Remove setup_kfail calls.
* gdb.fortran/printing-types.exp: Add new test.
* gdb.fortran/printing-types.f90: Add 16-byte real variable for
testing.
* gdb.fortran/type-kinds.exp (test_cast_1_to_type_kind): Remove
setup_kfail call.

gdb: Add constructor to struct cu_partial_die_info

Adds a constructor to 'struct cu_partial_die_info' and disables the
default constructor, preventing partially initialised instances from
being created.

Update 'find_partial_die' to return a const struct.

Users of 'find_partial_die' are updated to take account of the above
two changes.

There should be no user visible changes after this commit.

gdb/ChangeLog:

* dwarf2read.c (struct cu_partial_die_info): Add constructor,
delete default constructor.
(find_partial_die): Update to return const struct.
(partial_die_parent_scope): Move variable declaration into scope
of its use and change its type to auto.
(guess_partial_die_structure_name): Likewise.
(partial_die_info::fixup): Likewise.

S12Z (doc): Minor improvements to text and formatting.

gas/
* doc/c-s12z.texi: Miscellaneous adjustments.

Automatic date update in version.in

Don't cast away const in find_and_open_source

find_and_open_source casts away const, but hasn't needed to in a
while.  This removes the cast and a strangely hostile comment.

gdb/ChangeLog
2019-05-17  Tom Tromey  <tromey@adacore.com>

* source.c (find_and_open_source): Remove cast.

Constify annotate_source

I noticed that annotate_source takes a "char *", but really should
take a "const char *".  This patch fixes this.

gdb/ChangeLog
2019-05-17  Tom Tromey  <tromey@adacore.com>

* annotate.c (annotate_source): Make "filename" const.
* annotate.h (annotate_source): Use const.

testsuite: Remove TRANSCRIPT support

TRANSCRIPT is superseeded by the .in, .cmd and .debug files, and
can be removed.

gdb/testsuite/ChangeLog

* README (Running the Testsuite): Change example.
(Testsuite Parameters): Remove TRANSCRIPT.
* lib/gdb.exp: Remove TRANSCRIPT check.

testsuite: Add replay logging to GDBSERVER_DEBUG

Add "replay" to the list of GDBSERVER_DEBUG options.  This will
cause a gdbserver.replay file to be written to the test output
directory.

At the same time switch this to a comma separated list in order
to easily handle all possible options.

The replay log is created by GDB, but has been added to
GDBSERVER_DEBUG as it is only required for gdbserver tests. To
enable it, the gdb_debug_init is overridden to allow the additional
checking, before calling the original function.

gdb/testsuite/ChangeLog:

        * README (Testsuite Parameters): Add replay logging to
        GDBSERVER_DEBUG.
        (gdbserver,debug): Refer to GDBSERVER_DEBUG.
        * lib/gdbserver-support.exp (gdbserver_start): Treat gdbserverdebug
        as a comma separated list.
        (gdb_debug_init): Override procedure.

testsuite: Create .cmd files for gdb and gdbserver

When spawning gdb or gdbserver create a .cmd file in the test output
directory containing the full command line, ensuring the current gdb
instance is appended to the files so that they can be quickly matched
to the corresponding gdb.in file.

gdb/testsuite/ChangeLog:

* lib/gdb.exp (default_gdb_spawn): Call gdb_write_cmd_file.
(gdb_write_cmd_file): New procedure.
* lib/gdbserver-support.exp (gdbserver_start): Call
gdbserver_write_cmd_file.
(gdbserver_write_cmd_file): New proedure.

testsuite: Record all gdb input to gdb.in

When debugging testsuite failures, it can be awkward parsing gdb.log to
obtain all the commands run in order to manually re-run the test.

This patch adds the functionality to save all gdb commands to the file gdb.in
when the testsuite is run. The file is saved in the directory for the test and
if gdb is restarted then .1, .2, .3 etc is added to the filename.

Once a test has been run, the .in file can be used to re-run the test in the
following way:

  gdb -x outputs/gdb.store/gdb.in outputs/gdb.store/store

The code works by intercepting send_gdb.  I've added a TYPE to ensure that any
commands that would destroy the playback are kept from the log (for example the
Y from an answer to a y/n question).

Adds library function standard_output_file_with_gdb_instance to open a file
postfixed with count of the gdb instance.  Ensure this count is reset when a new
.exp script is run.

I've re-run a random selection of .in files to check they do not error. Logs with
commands such as "attach <pid>" will not directly work when re-run.

gdb/testsuite/ChangeLog:

* lib/gdb.exp (gdb_unload): Mark Y as an answer.
(delete_breakpoints): Likewise.
(gdb_run_cmd): Likewise.
(gdb_start_cmd): Likewise.
(gdb_starti_cmd): Likewise.
(gdb_internal_error_resync): Likewise.
(gdb_test_multiple): Likewise.
(gdb_reinitialize_dir): Likewise.
(default_gdb_exit): Likewise.
(gdb_file_cmd): Mark kill as optional.
(default_gdb_start): Call gdb_stdin_log_init.
(send_gdb): Call gdb_stdin_log_write.
(rerun_to_main): Mark Y as an answer.
(gdb_stdin_log_init): New function.
(gdb_stdin_log_write): Likewise.

testsuite: Disable some tests when logging

Fix up all failures encountered when running the testsuite with
GDB_DEBUG="infrun".

Some tests rely on enabling debugging for various components.  With
debugging on, this will be lost to the debug file.

Disable separate tty for mi tests when debugging.  This currently
does not work.

disasm.c should send errors to the stderr instead of the logfile.

Note that enabling debug for other components might still cause
additional errors above what has been fixed here.

gdb/ChangeLog:

* disasm.c (set_disassembler_options): Send errors to stderr.

gdb/testsuite/ChangeLog:

* gdb.base/breakpoint-in-ro-region.exp: Disable when debugging.
* gdb.base/debug-expr.exp: Likewise.
* gdb.base/foll-fork.exp: Likewise.
* gdb.base/foll-vfork.exp: Likewise.
* gdb.base/fork-print-inferior-events.exp: Likewise.
* gdb.base/gdb-sigterm.exp: Likewise.
* gdb.base/gdbinit-history.exp: Likewise.
* gdb.base/osabi.exp: Likewise.
* gdb.base/sss-bp-on-user-bp-2.exp: Likewise.
* gdb.base/ui-redirect.exp: Likewise.
* gdb.gdb/unittest.exp: Likewise.
* gdb.mi/mi-break.exp: Disable separate-mi-tty when debugging.
* gdb.mi/mi-watch.exp: Likewise.
* gdb.mi/new-ui-mi-sync.exp: Likewise.
* gdb.mi/user-selected-context-sync.exp: Likewise.
* gdb.python/python.exp: Disable debug test when debugging.
* gdb.threads/check-libthread-db.exp: Disable when debugging.
* gdb.threads/signal-while-stepping-over-bp-other-thread.exp:
Likewise.
* gdb.threads/stepi-random-signal.exp: Likewise.

testsuite: Add option to capture GDB debug

Add both board option and environment variable which enables gdb
debug via a comma separated list and sends it to the file gdb.debug,
located in the output directory for the current test.  Document this.

Add support for the environment variable in the Makefile.

The testsuite can be run with gdb debug enabled in the following way:

make check GDB_DEBUG="infrun,target,remote"

A Test with multiple invocations of GDB will all append debug to the
same log file.

gdb/testsuite/ChangeLog:

* Makefile.in: Pass through GDB_DEBUG.
* README (Testsuite Parameters): Add GDB_DEBUG.
        (gdb,debug): Add board setting.
  * lib/gdb.exp (default_gdb_start): Start debugging.
  (gdb_debug_enabled): New procedure.
  (gdb_debug_init): Likewise.

Add debug redirect option

Currently, when logging is enabled, output will be sent to both a
logfile and standard terminal output.  The redirect option sends output
only to the logfile.  This includes all debug output.

Add the option to redirect debug output seperately to normal
output, using the cli command:

  set logging debugredirect on

By setting this and enabling logging, all output and debug will
be sent to the logfile.  The user will still see all output but
no debug output.

This causes a change in behaviour for anyone currently using
logging redirect, as now only output will be redirected.  Users
will have to issue the additional command above to also redirect
debug.

Expand ui-redirect.exp cover the changes.

gdb/ChangeLog:

* cli/cli-interp.c (struct saved_output_files): Add saved entry.
(cli_interp_base::set_logging): Check debug_redirect.
* cli/cli-interp.h (set_logging): Add debug_redirect parameter.
* cli/cli-logging.c (debug_redirect): Add static variable.
(pop_output_files): Add default param.
(handle_redirections): Print debug setting.
(show_logging_command): Likewise.
(_initialize_cli_logging): Add debugredirect command.
* interps.c (current_interp_set_logging): Add debug_redirect
parameter.
* interps.h (set_logging): Add debug_redirect parameter.
(current_interp_set_logging): Likewise.
* mi/mi-common.h: Likewise.
* mi/mi-interp.c (mi_interp::set_logging): Likewise.

gdb/testsuite/ChangeLog:

* gdb.base/ui-redirect.exp: Add debug redirect tests.

GAS (documentation): Remove trademark acknowledgements.

GNU policy is not to include trademark acknowlegements in
documentation [1]

[1] https://www.gnu.org/prep/standards/html_node/Trademarks.html

Committing as obvious.

gas/

* doc/c-arm.texi (ARM Options): Remove "(r)" and "(tm)"
* doc/c-bfin.texi (Blackfin Syntax): Remove "(r)"

Change file close behavior for tee_file

Instead of using two bools to decide if the files should close when tee_file
is closed, make file one stay open and file two close.  This simplifies the
use cases for it.

Inline the make_logging_output into the calling functions (the logic here
looks ugly in order to simplify a later change).

Expand ui-redirect.exp to cover the changes, similar to mi-logging.exp.

gdb/ChangeLog:

* cli/cli-interp.c (cli_interp_base::set_logging): Create tee_file
directly.
* cli/cli-interp.h (make_logging_output): Remove declaration.
* cli/cli-logging.c (make_logging_output): Remove function.
* mi/mi-interp.c (mi_interp::set_logging): Create tee_file
directly.
* ui-file.c (tee_file::tee_file): Remove bools.
(tee_file::~tee_file): Remove deletes.
* ui-file.h (tee_file): Remove bools.

gdb/testsuite/ChangeLog:

* gdb.base/ui-redirect.exp: Test redirection.

PR24567, assertion failure in ldlang.c:6868 when compiling with -flto

As the existing comment said: "a common ought to be overridden by a
def in a -flto object".  This patch makes the code actually do that,
rather than allowing a normal object file common to override a -flto
defined symbol.

PR 24567
* plugin.c (plugin_notice): Do not let a common symbol override
a non-common definition in IR.

MI: Add new command -complete

There is a CLI command 'complete' intended to use with emacs. Such a command
would also be useful for MI frontends, when separate CLI and MI channels cannot
be used. For example, on Windows (because of lack of PTYs) or when GDB is used
through SSH session.

This commit adds a new '-complete' MI command.

gdb/Changelog:
2019-01-28  Jan Vrany  <jan.vrany@fit.cvut.cz>

* mi/mi-cmds.h (mi_cmd_complete): New function.
* mi/mi-main.c (mi_cmd_complete): Likewise.
* mi/mi-cmds.c: Define new MI command -complete.
* NEWS: Mention new -complete command.

gdb/doc/ChangeLog:
2019-01-28  Jan Vrany  <jan.vrany@fit.cvut.cz>

* gdb.texinfo (Miscellaneous GDB/MI Commands): Document new
MI command -complete.

gdb/testsuite/ChangeLog:
2019-01-28  Jan Vrany  <jan.vrany@fit.cvut.cz>

* gdb.mi/mi-complete.exp: New file.
* gdb.mi/mi-complete.cc: Likewise.

MI: extract command completion logic from complete_command()

Extract completion logic from CLI complete_command() into a new
helper function complete().

gdb/Changelog:

* completer.h (complete): New function.
* completer.c (complete): Likewise.
* cli/cli-cmds.c: (complete_command): Update to use new complete()
function defined in completer.h.

Add myself to gdb/MAINTAINERS

gdb/Changelog:

       * MAINTAINERS (Write After Approval): Add myself.

[gdb] Fix heap-use-after-free in typename_concat

When running gdb using AddressSanitizer, and loading a cc1plus binary built
with profiledbootstrap and -flto, we run into a heap-use-after-free error:
...
$ LD_PRELOAD=/usr/lib64/libasan.so.3 ./gdb -batch cc1plus
==26855==ERROR: AddressSanitizer: heap-use-after-free on address \
  0x62100ad8a8b0 at pc 0x7f13803cc9e3 bp 0x7ffe55b0d090 sp 0x7ffe55b0c840
READ of size 47 at 0x62100ad8a8b0 thread T0
    #0 0x7f13803cc9e2  (/usr/lib64/libasan.so.3+0x3e9e2)
    #1 0x5e7a0d in typename_concat gdb/dwarf2read.c:22661
    #2 0x5c6437 in partial_die_full_name gdb/dwarf2read.c:8876
    #3 0x5c6555 in add_partial_symbol gdb/dwarf2read.c:8893
    #4 0x5c6ecf in add_partial_subprogram gdb/dwarf2read.c:9156
    #5 0x5c5e90 in scan_partial_symbols gdb/dwarf2read.c:8668
    #6 0x5c6c0a in add_partial_namespace gdb/dwarf2read.c:9081
    #7 0x5c5f99 in scan_partial_symbols gdb/dwarf2read.c:8702
    #8 0x5c48b6 in process_psymtab_comp_unit_reader gdb/dwarf2read.c:8056
    #9 0x5c3c1f in init_cutu_and_read_dies gdb/dwarf2read.c:7689
    #10 0x5c4c03 in process_psymtab_comp_unit gdb/dwarf2read.c:8140
    #11 0x5c58a2 in dwarf2_build_psymtabs_hard gdb/dwarf2read.c:8500
    #12 0x5c0d03 in dwarf2_build_psymtabs(objfile*) gdb/dwarf2read.c:6337
    #13 0x612359 in read_psyms gdb/elfread.c:1311
    #14 0x798a64 in require_partial_symbols(objfile*, int) gdb/psymtab.c:115
    #15 0x867d7b in read_symbols gdb/symfile.c:821
    #16 0x8683d9 in syms_from_objfile_1 gdb/symfile.c:1000
    #17 0x8684a1 in syms_from_objfile gdb/symfile.c:1017
    #18 0x868873 in symbol_file_add_with_addrs gdb/symfile.c:1124
    #19 0x868b0a in symbol_file_add_from_bfd(bfd*, char const*, \
                    enum_flags<symfile_add_flag>, std::vector<other_sections, \
    std::allocator<other_sections> >*, \
    enum_flags<objfile_flag>, objfile*) gdb/symfile.c:1204
    #20 0x868b64 in symbol_file_add(char const*, \
                    enum_flags<symfile_add_flag>, \
    std::vector<other_sections, \
    std::allocator<other_sections> >*, \
    enum_flags<objfile_flag>) gdb/symfile.c:1217
    #21 0x868c39 in symbol_file_add_main_1 gdb/symfile.c:1240
    #22 0x868bd0 in symbol_file_add_main(char const*, \
                    enum_flags<symfile_add_flag>) gdb/symfile.c:1231
    #23 0x71f1b2 in symbol_file_add_main_adapter gdb/main.c:395
    #24 0x71f10e in catch_command_errors gdb/main.c:372
    #25 0x71ff5f in captured_main_1 gdb/main.c:1043
    #26 0x72045d in captured_main gdb/main.c:1163
    #27 0x7204c8 in gdb_main(captured_main_args*) gdb/main.c:1188
    #28 0x40fd7d in main gdb/gdb.c:32
    #29 0x7f137e300f49 in __libc_start_main (/lib64/libc.so.6+0x20f49)
    #30 0x40fc89 in _start (/data/gdb_versions/devel/build/gdb/gdb+0x40fc89)

0x62100ad8a8b0 is located 944 bytes inside of 4064-byte region \
  [0x62100ad8a500,0x62100ad8b4e0)
freed by thread T0 here:
    #0 0x7f13804523a0 in __interceptor_free (/usr/lib64/libasan.so.3+0xc43a0)
    #1 0x435e44 in xfree<void> gdb/common/common-utils.h:60
    #2 0xa82c25 in call_freefun libiberty/obstack.c:103
    #3 0xa83098 in _obstack_free libiberty/obstack.c:280
    #4 0x4367da in auto_obstack::~auto_obstack() gdb/gdb_obstack.h:101
    #5 0x5ed72c in dwarf2_cu::~dwarf2_cu() gdb/dwarf2read.c:25341
    #6 0x5fb5bb in std::default_delete<dwarf2_cu>::operator()(dwarf2_cu*) const \
                   /usr/include/c++/7/bits/unique_ptr.h:78
    #7 0x5f7334 in std::unique_ptr<dwarf2_cu, \
                   std::default_delete<dwarf2_cu> >::~unique_ptr() \
   /usr/include/c++/7/bits/unique_ptr.h:268
    #8 0x5c3ce5 in init_cutu_and_read_dies gdb/dwarf2read.c:7624
    #9 0x5c4c03 in process_psymtab_comp_unit gdb/dwarf2read.c:8140
    #10 0x5c58a2 in dwarf2_build_psymtabs_hard gdb/dwarf2read.c:8500
    #11 0x5c0d03 in dwarf2_build_psymtabs(objfile*) gdb/dwarf2read.c:6337
    #12 0x612359 in read_psyms gdb/elfread.c:1311
    #13 0x798a64 in require_partial_symbols(objfile*, int) gdb/psymtab.c:115
    #14 0x867d7b in read_symbols gdb/symfile.c:821
    #15 0x8683d9 in syms_from_objfile_1 gdb/symfile.c:1000
    #16 0x8684a1 in syms_from_objfile gdb/symfile.c:1017
    #17 0x868873 in symbol_file_add_with_addrs gdb/symfile.c:1124
    #18 0x868b0a in symbol_file_add_from_bfd(bfd*, char const*, \
                    enum_flags<symfile_add_flag>, std::vector<other_sections,  \
    std::allocator<other_sections> >*, \
    enum_flags<objfile_flag>, objfile*) gdb/symfile.c:1204
    #19 0x868b64 in symbol_file_add(char const*, \
                    enum_flags<symfile_add_flag>, std::vector<other_sections, \
    std::allocator<other_sections> >*, \
    enum_flags<objfile_flag>) gdb/symfile.c:1217
    #20 0x868c39 in symbol_file_add_main_1 gdb/symfile.c:1240
    #21 0x868bd0 in symbol_file_add_main(char const*, \
                    enum_flags<symfile_add_flag>) gdb/symfile.c:1231
    #22 0x71f1b2 in symbol_file_add_main_adapter gdb/main.c:395
    #23 0x71f10e in catch_command_errors gdb/main.c:372
    #24 0x71ff5f in captured_main_1 gdb/main.c:1043
    #25 0x72045d in captured_main gdb/main.c:1163
    #26 0x7204c8 in gdb_main(captured_main_args*) gdb/main.c:1188
    #27 0x40fd7d in main gdb/gdb.c:32
    #28 0x7f137e300f49 in __libc_start_main (/lib64/libc.so.6+0x20f49)

previously allocated by thread T0 here:
    #0 0x7f13804526b8 in __interceptor_malloc (/usr/lib64/libasan.so.3+0xc46b8)
    #1 0x5114b5 in xmalloc gdb/common/common-utils.c:44
    #2 0xa82bd5 in call_chunkfun libiberty/obstack.c:94
    #3 0xa82eda in _obstack_newchunk libiberty/obstack.c:206
    #4 0x477310 in allocate_on_obstack::operator new(unsigned long, obstack*) \
                   gdb/gdb_obstack.h:117
    #5 0x5dea8c in load_partial_dies gdb/dwarf2read.c:18571
    #6 0x5c487f in process_psymtab_comp_unit_reader gdb/dwarf2read.c:8054
    #7 0x5c3c1f in init_cutu_and_read_dies gdb/dwarf2read.c:7689
    #8 0x5c4c03 in process_psymtab_comp_unit gdb/dwarf2read.c:8140
    #9 0x5c58a2 in dwarf2_build_psymtabs_hard gdb/dwarf2read.c:8500
    #10 0x5c0d03 in dwarf2_build_psymtabs(objfile*) gdb/dwarf2read.c:6337
    #11 0x612359 in read_psyms gdb/elfread.c:1311
    #12 0x798a64 in require_partial_symbols(objfile*, int) gdb/psymtab.c:115
    #13 0x867d7b in read_symbols gdb/symfile.c:821
    #14 0x8683d9 in syms_from_objfile_1 gdb/symfile.c:1000
    #15 0x8684a1 in syms_from_objfile gdb/symfile.c:1017
    #16 0x868873 in symbol_file_add_with_addrs gdb/symfile.c:1124
    #17 0x868b0a in symbol_file_add_from_bfd(bfd*, char const*, \
                    enum_flags<symfile_add_flag>, \
    std::vector<other_sections, \
    std::allocator<other_sections> >*, \
    enum_flags<objfile_flag>, objfile*) gdb/symfile.c:1204
    #18 0x868b64 in symbol_file_add(char const*, enum_flags<symfile_add_flag>, \
                    std::vector<other_sections, \
    std::allocator<other_sections> >*, \
    enum_flags<objfile_flag>) gdb/symfile.c:1217
    #19 0x868c39 in symbol_file_add_main_1 gdb/symfile.c:1240
    #20 0x868bd0 in symbol_file_add_main(char const*, \
                    enum_flags<symfile_add_flag>) gdb/symfile.c:1231
    #21 0x71f1b2 in symbol_file_add_main_adapter gdb/main.c:395
    #22 0x71f10e in catch_command_errors gdb/main.c:372
    #23 0x71ff5f in captured_main_1 gdb/main.c:1043
    #24 0x72045d in captured_main gdb/main.c:1163
    #25 0x7204c8 in gdb_main(captured_main_args*) gdb/main.c:1188
    #26 0x40fd7d in main gdb/gdb.c:32
    #27 0x7f137e300f49 in __libc_start_main (/lib64/libc.so.6+0x20f49)
...

This error happens as follows.

The function find_partial_die has a cu argument, but returns a pdi which may
or may not be from that cu:
...
/* Find a partial DIE at OFFSET, which may or may not be in CU,
   except in the case of .debug_types DIEs which do not reference
   outside their CU (they do however referencing other types via
   DW_FORM_ref_sig8).  */

static struct partial_die_info *
find_partial_die (sect_offset sect_off, int offset_in_dwz, struct dwarf2_cu *cu)
...

So the pdi returned by find_partial_die here in partial_die_parent_scope may
be from another cu:
...
partial_die_parent_scope (struct partial_die_info *pdi,
                          struct dwarf2_cu *cu)
{
  const char *grandparent_scope;
  struct partial_die_info *parent, *real_pdi;

  /* We need to look at our parent DIE; if we have a DW_AT_specification,
     then this means the parent of the specification DIE.  */

  real_pdi = pdi;
  while (real_pdi->has_specification)
    real_pdi = find_partial_die (real_pdi->spec_offset,
                                 real_pdi->spec_is_dwz, cu);

  parent = real_pdi->die_parent;
...
in which case both real_pdi and parent will be not from cu, but from another
one, say cu2.

Subsequently, cu's comp_unit_obstack is used to set parent->scope:
...
        parent->scope = typename_concat (&cu->comp_unit_obstack,
                                         grandparent_scope,
                                         parent->name, 0, cu);
...

So, we use cu->comp_unit_obstack to assign a value to the scope field of
a pdi belonging to cu2, and when cu is deleted, the scope field points to a
freed value.

Fix this by making find_partial_die return the cu corresponding to the
returned pdi, and handling this at the call sites.

Tested on x86_64-linux.

gdb/ChangeLog:

2019-05-17  Tom de Vries  <tdevries@suse.de>

PR gdb/24094
* dwarf2read.c (struct cu_partial_die_info): New struct.
(find_partial_die): Return cu_partial_die_info.
(partial_die_parent_scope, guess_partial_die_structure_name)
(partial_die_info::fixup): Handle new return type of find_partial_die.

Automatic date update in version.in

Make stap-probe.c:stap_parse_register_operand's "regname" an std::string

This patch simplifies the code of
stap-probe.c:stap_parse_register_operand by making "regname" an
std::string.  No functionality change.

I'm this code's maintainer, so I'm pushing this as it's a fairly
trivial patch.

gdb/ChangeLog:
2019-05-16  Sergio Durigan Junior  <sergiodj@redhat.com>

* stap-probe.c (stap_parse_register_operand): Make "regname" an
"std::string", simplifying the algorithm.

Fix complaint string formatting on stap-probe.c

I think the string formatting for complaints was messed up by Tom's
patch to simplify the complaint mechanism.  This small and trivial
patch fixes them.

Pushed as obvious.

gdb/ChangeLog:
2019-05-16  Sergio Durigan Junior  <sergiodj@redhat.com>

* stap-probe.c (handle_stap_probe): Fix complaint formatting.
(stap_static_probe_ops::get_probes): Likewise.

Slightly improve logic of some operations on stap-probe.c

This patch contains three very small improvement on the logic of some
operations we do on stap-probe.c.  They don't change what the code
does.

Pushed as obvious.

gdb/ChangeLog:
2019-05-16  Sergio Durigan Junior  <sergiodj@redhat.com>

* stap-probe.c (stap_parse_register_operand): Make "if (*p->arg ==
'-')" and "else if".
(stap_parse_single_operand): Join checks for
"gdbarch_stap_parse_special_token_p" and
"gdbarch_stap_parse_special_token" in the same "if" statement.
Invert check when verifying for operation on register
displacement.

Update some comments on stap-probe.c

Some functions's comments were not entirely correct on stap-probe.c,
so this patch updates them.

Pushed as obvious.

gdb/ChangeLog:
2019-05-16  Sergio Durigan Junior  <sergiodj@redhat.com>

* stap-probe.c (stap_get_opcode): Update comment.
(stap_get_expected_argument_type): Likewise.
(handle_stap_probe): Likewise.

Bool-ify stap-probe.c and stap-related code on i386-tdep.c

This simple patch converts a bunch of "int"s to "bool" on stap-probe.c
and on the stap-related code present on i386-tdep.c.

Pushed as obvious (+ I'm the maintainer of this code).

gdb/ChangeLog:
2019-05-16  Sergio Durigan Junior  <sergiodj@redhat.com>

* i386-tdep.c (i386_stap_parse_special_token_triplet): Change
return type to 'bool'.  Adjust comment.  Use 'bool' when
appropriate.
(i386_stap_parse_special_token_three_arg_disp): Likewise.
* stap-probe.c (stap_parse_argument_1): Likewise.
(stap_is_operator): Likewise.
(stap_is_generic_prefix): Likewise.
(stap_is_register_prefix): Likewise.
(stap_is_register_indirection_prefix): Likewise.
(stap_is_integer_prefix): Likewise.
(stap_generic_check_suffix): Likewise.
(stap_check_integer_suffix): Likewise.
(stap_check_register_suffix): Likewise.
(stap_check_register_indirection_suffix): Likewise.
(stap_parse_register_operand): Likewise.
(stap_parse_single_operand): Likewise.
(stap_parse_argument_1): Likewise.
(stap_probe::get_argument_count): Likewise.
(stap_is_operator): Likewise.

Fix darwin-nat.c build

John Marshall pointed out that darwin-nat.c fails to build:

    CXX    darwin-nat.o
    ../../../binutils-gdb/gdb/darwin-nat.c:1709:8: error: must use 'class' tag to refer to type 'thread_info' in this scope
    for (thread_info *it : all_threads ())
    /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.14.sdk/usr/include/mach/thread_act.h:240:15: note:
    class 'thread_info' is hidden by a non-type declaration of 'thread_info' here
    kern_return_t thread_info

    Mach has a thread_info() function declared in that header, which darwin-nat.c #includes.

This patch fixes the problem by reintroducing the struct keyword.

gdb/ChangeLog
2019-05-16  Tom Tromey  <tromey@adacore.com>

* darwin-nat.c (thread_info_from_private_thread_info): Add struct
keyword to foreach.

[PATCH, GAS, Arm] Refactor check_simd_pred_availability

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (check_simd_pred_availability): Refactor.
(do_neon_dyadic_i_su): Refactor use of check_simd_pred_availability.
(do_neon_dyadic_i64_su): Likewise.
(do_neon_shl): Likewise.
(do_neon_qshl): Likewise.
(do_neon_rshl): Likewise.
(do_neon_logic): Likewise.
(do_neon_dyadic_if_su): Likewise.
(do_neon_addsub_if_i): Likewise.
(do_neon_mac_maybe_scalar): Likewise.
(do_neon_fmac): Likewise.
(do_neon_mul): Likewise.
(do_neon_qdmulh): Likewise.
(do_neon_qrdmlah): Likewise.
(do_neon_abs_neg): Likewise.
(do_neon_sli): Likewise.
(do_neon_sri): Likewise.
(do_neon_qshlu_imm): Likewise.
(do_neon_cvt_1): Likewise.
(do_neon_cvttb_1): Likewise.
(do_neon_mvn): Likewise.
(do_neon_rev): Likewise.
(do_neon_dup): Likewise.
(do_neon_mov): Likewise.
(do_neon_rshift_round_imm): Likewise.
(do_neon_sat_abs_neg): Likewise.
(do_neon_cls): Likewise.
(do_neon_clz): Likewise.
(do_vmaxnm): Likewise.
(do_vrint_1): Likewise.
(do_vcmla): Likewise.
(do_vcadd): Likewise.

[PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWS

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* NEWS: Mention Armv8.1-M Mainline and MVE.

binutils/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* NEWS: Mention Armv8.1-M Mainline and MVE.

[PATCH 57/57][Arm][GAS] MVE Tests

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* testsuite/gas/arm/mve-tailpredloop.d: New test.
* testsuite/gas/arm/mve-tailpredloop.s: New test.
* testsuite/gas/arm/mve-vabav.d: New test.
* testsuite/gas/arm/mve-vabav.s: New test.
* testsuite/gas/arm/mve-vabd.d: New test.
* testsuite/gas/arm/mve-vabd.s: New test.
* testsuite/gas/arm/mve-vabsneg.d: New test.
* testsuite/gas/arm/mve-vabsneg.s: New test.
* testsuite/gas/arm/mve-vadc.d: New test.
* testsuite/gas/arm/mve-vadc.s: New test.
* testsuite/gas/arm/mve-vaddlv.d: New test.
* testsuite/gas/arm/mve-vaddlv.s: New test.
* testsuite/gas/arm/mve-vaddsub.d: New test.
* testsuite/gas/arm/mve-vaddsub.s: New test.
* testsuite/gas/arm/mve-vaddv.d: New test.
* testsuite/gas/arm/mve-vaddv.s: New test.
* testsuite/gas/arm/mve-vand.d: New test.
* testsuite/gas/arm/mve-vand.s: New test.
* testsuite/gas/arm/mve-vbic.d: New test.
* testsuite/gas/arm/mve-vbic.s: New test.
* testsuite/gas/arm/mve-vbrsr.d: New test.
* testsuite/gas/arm/mve-vbrsr.s: New test.
* testsuite/gas/arm/mve-vcadd.d: New test.
* testsuite/gas/arm/mve-vcadd.s: New test.
* testsuite/gas/arm/mve-vcls.d: New test.
* testsuite/gas/arm/mve-vcls.s: New test.
* testsuite/gas/arm/mve-vclz.d: New test.
* testsuite/gas/arm/mve-vclz.s: New test.
* testsuite/gas/arm/mve-vcmla.d: New test.
* testsuite/gas/arm/mve-vcmla.s: New test.
* testsuite/gas/arm/mve-vcmp.d: New test.
* testsuite/gas/arm/mve-vcmp.s: New test.
* testsuite/gas/arm/mve-vcmul.d: New test.
* testsuite/gas/arm/mve-vcmul.s: New test.
* testsuite/gas/arm/mve-vcvt-1.d: New test.
* testsuite/gas/arm/mve-vcvt-1.s: New test.
* testsuite/gas/arm/mve-vcvt-2.d: New test.
* testsuite/gas/arm/mve-vcvt-2.s: New test.
* testsuite/gas/arm/mve-vcvt-3.d: New test.
* testsuite/gas/arm/mve-vcvt-3.s: New test.
* testsuite/gas/arm/mve-vcvt-4.d: New test.
* testsuite/gas/arm/mve-vcvt-4.s: New test.
* testsuite/gas/arm/mve-vddup.d: New test.
* testsuite/gas/arm/mve-vddup.s: New test.
* testsuite/gas/arm/mve-vdup.d: New test.
* testsuite/gas/arm/mve-vdup.s: New test.
* testsuite/gas/arm/mve-veor.d: New test.
* testsuite/gas/arm/mve-veor.s: New test.
* testsuite/gas/arm/mve-vfma-vfms.d: New test.
* testsuite/gas/arm/mve-vfma-vfms.s: New test.
* testsuite/gas/arm/mve-vfmas.d: New test.
* testsuite/gas/arm/mve-vfmas.s: New test.
* testsuite/gas/arm/mve-vhadd-vhsub-vrhadd.d: New test.
* testsuite/gas/arm/mve-vhadd-vhsub-vrhadd.s: New test.
* testsuite/gas/arm/mve-vhcadd.d: New test.
* testsuite/gas/arm/mve-vhcadd.s: New test.
* testsuite/gas/arm/mve-vmax-vmin.d: New test.
* testsuite/gas/arm/mve-vmax-vmin.s: New test.
* testsuite/gas/arm/mve-vmaxa-vmina.d: New test.
* testsuite/gas/arm/mve-vmaxa-vmina.s: New test.
* testsuite/gas/arm/mve-vmaxnm-vminnm.d: New test.
* testsuite/gas/arm/mve-vmaxnm-vminnm.s: New test.
* testsuite/gas/arm/mve-vmaxnma-vminnma.s: New test.
* testsuite/gas/arm/mve-vmaxnmv-vminnmv.d: New test.
* testsuite/gas/arm/mve-vmaxnmv-vminnmv.s: New test.
* testsuite/gas/arm/mve-vmaxv-vminv.d: New test.
* testsuite/gas/arm/mve-vmaxv-vminv.s: New test.
* testsuite/gas/arm/mve-vmla.d: New test.
* testsuite/gas/arm/mve-vmla.s: New test.
* testsuite/gas/arm/mve-vmladav.d: New test.
* testsuite/gas/arm/mve-vmladav.s: New test.
* testsuite/gas/arm/mve-vmlaldav.d: New test.
* testsuite/gas/arm/mve-vmlaldav.s: New test.
* testsuite/gas/arm/mve-vmlalv.d: New test.
* testsuite/gas/arm/mve-vmlalv.s: New test.
* testsuite/gas/arm/mve-vmlas.d: New test.
* testsuite/gas/arm/mve-vmlas.s: New test.
* testsuite/gas/arm/mve-vmlav.d: New test.
* testsuite/gas/arm/mve-vmlav.s: New test.
* testsuite/gas/arm/mve-vmlsdav.d: New test.
* testsuite/gas/arm/mve-vmlsdav.s: New test.
* testsuite/gas/arm/mve-vmlsldav.d: New test.
* testsuite/gas/arm/mve-vmlsldav.s: New test.
* testsuite/gas/arm/mve-vmov-1.d: New test.
* testsuite/gas/arm/mve-vmov-1.s: New test.
* testsuite/gas/arm/mve-vmov-2.d: New test.
* testsuite/gas/arm/mve-vmov-2.s: New test.
* testsuite/gas/arm/mve-vmul.d: New test.
* testsuite/gas/arm/mve-vmul.s: New test.
* testsuite/gas/arm/mve-vmulh.d: New test.
* testsuite/gas/arm/mve-vmulh.s: New test.
* testsuite/gas/arm/mve-vmullbt.d: New test.
* testsuite/gas/arm/mve-vmullbt.s: New test.
* testsuite/gas/arm/mve-vmvn.d: New test.
* testsuite/gas/arm/mve-vmvn.s: New test.
* testsuite/gas/arm/mve-vorn.d: New test.
* testsuite/gas/arm/mve-vorn.s: New test.
* testsuite/gas/arm/mve-vorr.d: New test.
* testsuite/gas/arm/mve-vorr.s: New test.
* testsuite/gas/arm/mve-vpnot.d: New test.
* testsuite/gas/arm/mve-vpnot.s: New test.
* testsuite/gas/arm/mve-vpsel.d: New test.
* testsuite/gas/arm/mve-vpsel.s: New test.
* testsuite/gas/arm/mve-vpt.d: New test.
* testsuite/gas/arm/mve-vpt.s: New test.
* testsuite/gas/arm/mve-vqabsneg.s: New test.
* testsuite/gas/arm/mve-vqaddsub.d: New test.
* testsuite/gas/arm/mve-vqaddsub.s: New test.
* testsuite/gas/arm/mve-vqdmladh.d: New test.
* testsuite/gas/arm/mve-vqdmladh.s: New test.
* testsuite/gas/arm/mve-vqdmlah.d: New test.
* testsuite/gas/arm/mve-vqdmlah.s: New test.
* testsuite/gas/arm/mve-vqdmlash.d: New test.
* testsuite/gas/arm/mve-vqdmlash.s: New test.
* testsuite/gas/arm/mve-vqdmlsdh.d: New test.
* testsuite/gas/arm/mve-vqdmlsdh.s: New test.
* testsuite/gas/arm/mve-vqdmulh.d: New test.
* testsuite/gas/arm/mve-vqdmulh.s: New test.
* testsuite/gas/arm/mve-vqdmull.d: New test.
* testsuite/gas/arm/mve-vqdmull.s: New test.
* testsuite/gas/arm/mve-vqmovn.d: New test.
* testsuite/gas/arm/mve-vqmovn.s: New test.
* testsuite/gas/arm/mve-vqrshl.d: New test.
* testsuite/gas/arm/mve-vqrshl.s: New test.
* testsuite/gas/arm/mve-vqrshrn.d: New test.
* testsuite/gas/arm/mve-vqrshrn.s: New test.
* testsuite/gas/arm/mve-vqshl.d: New test.
* testsuite/gas/arm/mve-vqshl.s: New test.
* testsuite/gas/arm/mve-vrev.d: New test.
* testsuite/gas/arm/mve-vrev.s: New test.
* testsuite/gas/arm/mve-vrint.d: New test.
* testsuite/gas/arm/mve-vrint.s: New test.
* testsuite/gas/arm/mve-vrmlaldavh.d: New test.
* testsuite/gas/arm/mve-vrmlaldavh.s: New test.
* testsuite/gas/arm/mve-vrshl.d: New test.
* testsuite/gas/arm/mve-vrshl.s: New test.
* testsuite/gas/arm/mve-vsbc.d: New test.
* testsuite/gas/arm/mve-vsbc.s: New test.
* testsuite/gas/arm/mve-vshl.d: New test.
* testsuite/gas/arm/mve-vshl.s: New test.
* testsuite/gas/arm/mve-vshlc.d: New test.
* testsuite/gas/arm/mve-vshlc.s: New test.
* testsuite/gas/arm/mve-vshll.d: New test.
* testsuite/gas/arm/mve-vshll.s: New test.
* testsuite/gas/arm/mve-vshr.d: New test.
* testsuite/gas/arm/mve-vshr.s: New test.
* testsuite/gas/arm/mve-vshrn.d: New test.
* testsuite/gas/arm/mve-vshrn.s: New test.
* testsuite/gas/arm/mve-vsli.d: New test.
* testsuite/gas/arm/mve-vsli.s: New test.
* testsuite/gas/arm/mve-vsri.d: New test.
* testsuite/gas/arm/mve-vsri.s: New test.
* testsuite/gas/arm/mve-vstld.d: New test.
* testsuite/gas/arm/mve-vstld.s: New test.
* testsuite/gas/arm/mve-vstrldr-1.d: New test.
* testsuite/gas/arm/mve-vstrldr-1.s: New test.
* testsuite/gas/arm/mve-vstrldr-2.d: New test.
* testsuite/gas/arm/mve-vstrldr-2.s: New test.
* testsuite/gas/arm/mve-vstrldr-3.d: New test.
* testsuite/gas/arm/mve-vstrldr-3.s: New test.

[PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, vqabs, vqadd, vqsub, vqneg and vrev

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (thumb32_opcodes): Add new instructions.
(enum mve_instructions): Likewise.
(enum mve_undefined): Add new reasons.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_size): Likewise.

[PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vrmulh and vneg

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (thumb32_opcodes): Add new instructions.
(enum mve_instructions): Likewise.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.

[PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a)v, vmaxnm(a), vmaxnm(a)v, vmin(a), vmin(a)v, vminnm(a), vminnm(a)v and vmla

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (thumb32_opcodes): Add new instructions.
(enum mve_instructions): Likewise.
(is_mve_encoding_conflict): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.

[PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vcls, vclz and vctp

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (thumb32_opcodes): Add new instructions.
(enum mve_instructions): Likewise.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.

[PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, vabd, vabs, vadd, vsbc and vsub

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (thumb32_opcodes): Add new instructions.
(enum mve_instructions): Likewise.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wlstp and dlstp

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (thumb32_opcodes): Add new instructions.
(print_insn_thumb32): Handle new instructions.

[PATCH 50/57][Arm][OBJDUMP] Add support for MVE shift instructions

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_undefined): Add new reasons.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_size): Likewise.
(print_mve_shift_n): Likewise.
(print_insn_mve): Likewise.

[PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructions

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_unpredictable): Likewise.
(print_mve_rotate): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, vidup and viwdup

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav, vmladav, vmlas, vrmlsldavh, vmlsldav, vmlsdav, vrmlaldavh, vqdmlah, vqrdmlash, vqrdmlash, vqdmlsdh, vqrdmlsdh, vqdmulh and vqrdmulh

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_undefined): Add new reasons.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, vqdmull, vqmovn, vqmovun and vmovn

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vorr, vorn, vmovx and vbic

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_unpredictable): Add new reasons.
(enum mve_undefined): Likewise.
(is_mve_okay_in_it): Handle new isntructions.
(is_mve_encoding_conflict): Likewise.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_vmov_index): Likewise.
(print_simd_imm8): Likewise.
(print_mve_undefined): Likewise.
(print_mve_unpredictable): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrint

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_unpredictable): Add new reasons.
(enum mve_undefined): Likewise.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_unpredictable): Likewise.
(print_mve_rounding_mode): Likewise.
(print_mve_vcvt_size): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores and gather loads

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_unpredictable): Add new reasons.
(enum mve_undefined): Likewise.
(is_mve_undefined): Handle new instructions.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_unpredictable): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.

[PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and vstr[bhw]

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_undefined): Add new reasons.
(insns): Add new instructions.
(is_mve_encoding_conflict):
(print_mve_vld_str_addr): New print function.
(is_mve_undefined): Handle new instructions.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_size): Likewise.
(print_insn_coprocessor_1): Handle MVE VLDR, VSTR instructions.
(print_insn_mve):  Handle new operands.

[PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst[24]

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_unpredictable): Add new reasons.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_unpredictable): Likewise.
(mve_opcodes): Add new instructions.
(print_mve_unpredictable): Handle new reasons.
(print_mve_register_blocks): New print function.
(print_mve_size): Handle new instructions.
(print_insn_mve): Likewise.

[PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfma, vfms, vhadd, vhsub and vrhadd

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_unpredictable): Add new reasons.
(enum mve_undefined): Likewise.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(coprocessor_opcodes): Move NEON VDUP from here...
(neon_opcodes): ... to here.
(mve_opcodes): Add new instructions.
(print_mve_undefined):  Handle new reasons.
(print_mve_unpredictable): Likewise.
(print_mve_size): Handle new instructions.
(print_insn_neon): Handle vdup.
(print_insn_mve): Handle new operands.

[PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmp

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): Add new instructions.
(enum mve_unpredictable): Add new values.
(mve_opcodes): Add new instructions.
(vec_condnames): New array with vector conditions.
(mve_predicatenames): New array with predicate suffixes.
(mve_vec_sizename): New array with vector sizes.
(enum vpt_pred_state): New enum with vector predication states.
(struct vpt_block): New struct type for vpt blocks.
(vpt_block_state): Global struct to keep track of state.
(mve_extract_pred_mask): New helper function.
(num_instructions_vpt_block): Likewise.
(mark_outside_vpt_block): Likewise.
(mark_inside_vpt_block): Likewise.
(invert_next_predicate_state): Likewise.
(update_next_predicate_state): Likewise.
(update_vpt_block_state): Likewise.
(is_vpt_instruction): Likewise.
(is_mve_encoding_conflict): Add entries for new instructions.
(is_mve_unpredictable): Likewise.
(print_mve_unpredictable): Handle new cases.
(print_instruction_predicate): Likewise.
(print_mve_size): New function.
(print_vec_condition): New function.
(print_insn_mve): Handle vpt blocks and new print operands.

[PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in coprocessor instructions

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors
8, 14 and 15 for Armv8.1-M Mainline.

[PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructions

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Michael Collison <michael.collison@arm.com>

* arm-dis.c (enum mve_instructions): New enum.
(enum mve_unpredictable): Likewise.
(enum mve_undefined): Likewise.
(struct mopcode32): New struct.
(is_mve_okay_in_it): New function.
(is_mve_architecture): Likewise.
(arm_decode_field): Likewise.
(arm_decode_field_multiple): Likewise.
(is_mve_encoding_conflict): Likewise.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_undefined): Likewise.
(print_mve_unpredictable): Likewise.
(print_insn_coprocessor_1): Use arm_decode_field_multiple.
(print_insn_mve): New function.
(print_insn_thumb32): Handle MVE architecture.
(select_arm_features): Force thumb for Armv8.1-m Mainline.

[PATCH 36/57][Arm][GAS] Add support for MVE instructions: wlstp, dlstp, letp and lctp

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (T16_32_TAB): Add new instructions.
(do_t_loloop): Changed to handle tail predication variants.
(md_apply_fix): Likewise.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-tailpredloop-bad.d: New test.
* testsuite/gas/arm/mve-tailpredloop-bad.l: New test.
* testsuite/gas/arm/mve-tailpredloop-bad.s: New test.
* testsuite/gas/arm/mve-tailpredloop.d: New test.

[PATCH 35/57][Arm][GAS] Add support for MVE instructions: vshlc and vshll

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vshll): New encoding function.
(do_mve_vshlc): Likewise.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vshlc-bad.d: New test.
* testsuite/gas/arm/mve-vshlc-bad.l: New test.
* testsuite/gas/arm/mve-vshlc-bad.s: New test.
* testsuite/gas/arm/mve-vshll-bad.d: New test.
* testsuite/gas/arm/mve-vshll-bad.l: New test.
* testsuite/gas/arm/mve-vshll-bad.s: New test.

[PATCH 34/57][Arm][GAS] Add support for MVE instructions: vshl and vqshl

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): Add new operand.
(parse_operands): Handle new operand.
(do_neon_shl_imm): Accept MVE variants.
(do_neon_shl): Likewise.
(do_neon_qshl_imm): Likewise.
(do_neon_qshl): Likewise.
(do_neon_qshlu_imm): Likewise.
(insns): Likewise.
* testsuite/gas/arm/mve-vqshl-bad.d: New test.
* testsuite/gas/arm/mve-vqshl-bad.l: New test.
* testsuite/gas/arm/mve-vqshl-bad.s: New test.
* testsuite/gas/arm/mve-vshl-bad.d: New test.
* testsuite/gas/arm/mve-vshl-bad.l: New test.
* testsuite/gas/arm/mve-vshl-bad.s: New test.

[PATCH 33/57][Arm][GAS] Add support for MVE instructions: vshr, vrshr, vsli, vsri, vrev16, vrev32 and vrev64

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_neon_sli): Accept MVE variants.
(do_neon_sri): Likewise.
(do_neon_rev): Likewise.
(do_neon_rshift_round_imm): Likewise.
(insns): Likewise.
* testsuite/gas/arm/mve-vrev-bad.d: New test.
* testsuite/gas/arm/mve-vrev-bad.l: New test.
* testsuite/gas/arm/mve-vrev-bad.s: New test.
* testsuite/gas/arm/mve-vshr-bad.d: New test.
* testsuite/gas/arm/mve-vshr-bad.l: New test.
* testsuite/gas/arm/mve-vshr-bad.s: New test.
* testsuite/gas/arm/mve-vsli-bad.d: New test.
* testsuite/gas/arm/mve-vsli-bad.l: New test.
* testsuite/gas/arm/mve-vsli-bad.s: New test.
* testsuite/gas/arm/mve-vsri-bad.d: New test.
* testsuite/gas/arm/mve-vsri-bad.l: New test.
* testsuite/gas/arm/mve-vsri-bad.s: New test.

[PATCH 32/57][Arm][GAS] Add support for MVE instructions: vrintn, vrintx, vrinta, vrintz, vrintm and vrintp

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_vrint_1): Accept MVE variants.
(insns): Change entries to accept MVE variants.
* testsuite/gas/arm/mve-vrint-bad.d: New test.
* testsuite/gas/arm/mve-vrint-bad.l: New test.
* testsuite/gas/arm/mve-vrint-bad.s: New test.

[PATCH 31/57][Arm][GAS] Add support for MVE instructions: vshrn[tb], vrshrn[tb], vqshrn[tb], vqshrun[tb], vqrshrn[tb] and vqrshrun[tb]

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vshrnt, M_MNEM_vshrnb, M_MNEM_vrshrnt,
 M_MNEM_vqshrnt, M_MNEM_vqshrnb, M_MNEM_vqshrunt, M_MNEM_vqshrunb,
 M_MNEM_vrshrnb, M_MNEM_vqrshrnt, M_MNEM_vqrshrnb, M_MNEM_vqrshrunt,
 M_MNEM_vqrshrunb): New instruction encodings.
(do_mve_vshrn): New encoding function.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vqrshrn-bad.d: New test.
* testsuite/gas/arm/mve-vqrshrn-bad.l: New test.
* testsuite/gas/arm/mve-vqrshrn-bad.s: New test.
* testsuite/gas/arm/mve-vshrn-bad.d: New test.
* testsuite/gas/arm/mve-vshrn-bad.l: New test.
* testsuite/gas/arm/mve-vshrn-bad.s: New test.

[PATCH 30/57][Arm][GAS] Add support for MVE instructions: vqmovnt, vqmovnb, vqmovunt, vqmovunb, vqrshl and vrshl

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vqmovnt, M_MNEM_vqmovnb,
 M_MNEM_vqmovunt, M_MNEM_vqmovunb): New instruction encodings.
(do_mve_vqmovn): New encoding function.
(do_neon_rshl): Change to accepte MVE variants.
(insns): Change entries and add new for MVE mnemonics.
* testsuite/gas/arm/mve-vqmovn-bad.d: New test.
* testsuite/gas/arm/mve-vqmovn-bad.l: New test.
* testsuite/gas/arm/mve-vqmovn-bad.s: New test.
* testsuite/gas/arm/mve-vqrshl-bad.d: New test.
* testsuite/gas/arm/mve-vqrshl-bad.l: New test.
* testsuite/gas/arm/mve-vqrshl-bad.s: New test.
* testsuite/gas/arm/mve-vrshl-bad.d: New test.
* testsuite/gas/arm/mve-vrshl-bad.l: New test.
* testsuite/gas/arm/mve-vrshl-bad.s: New test.

[PATCH 29/57][Arm][GAS] Add support for MVE instructions: vqdmullt and vqdmullb

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): Add new operand.
(parse_operands): Handle new operand.
(do_mve_vqdmull): New encoding function.
(insns): Add entry for MVE mnemonics.
* testsuite/gas/arm/mve-vqdmull-bad.d: New test.
* testsuite/gas/arm/mve-vqdmull-bad.l: New test.
* testsuite/gas/arm/mve-vqdmull-bad.s: New test.

[PATCH 28/57][Arm][GAS] Add support for MVE instructions: vqdmlah, vqrdmlah, vqdmlash, vqrdmlash, vqdmulh and vqrdmulh

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): Add new operand.
(parse_operands): Handle new operand.
(mve_encode_qqr): Handle new instructions.
(do_neon_qdmulh): Add support for MVE variants.
(do_neon_qrdmlah): Likewise.
(do_mve_vqdmlah): New encoding function.
(insns): Change entries and add new entries for MVE mnemonics.
* testsuite/gas/arm/mve-vqdmulh-bad.d: New test.
* testsuite/gas/arm/mve-vqdmulh-bad.l: New test.
* testsuite/gas/arm/mve-vqdmulh-bad.s: New test.

[PATCH 27/57][Arm][GAS] Add support for MVE instructions: vqdmladh, vqrdmladh, vqdmlsdh and vqrdmlsdh

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vqdmladh): New encoding function.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vqdmladh-bad.d: New test.
* testsuite/gas/arm/mve-vqdmladh-bad.l: New test.
* testsuite/gas/arm/mve-vqdmladh-bad.s: New test.
* testsuite/gas/arm/mve-vqdmlsdh-bad.d: New test.
* testsuite/gas/arm/mve-vqdmlsdh-bad.l: New test.
* testsuite/gas/arm/mve-vqdmlsdh-bad.s: New test.

[PATCH 26/57][Arm][GAS] Add support for MVE instructions: vpnot and vpsel

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vpsel): New encoding function.
(do_mve_vpnot): Likewise.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vpnot-bad.d: New test.
* testsuite/gas/arm/mve-vpnot-bad.l: New test.
* testsuite/gas/arm/mve-vpnot-bad.s: New test.
* testsuite/gas/arm/mve-vpsel-bad.d: New test.
* testsuite/gas/arm/mve-vpsel-bad.l: New test.
* testsuite/gas/arm/mve-vpsel-bad.s: New test.

[PATCH 25/57][Arm][GAS] Add support for MVE instruction: vmvn, vqabs and vqneg

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_neon_mvn): Change to accept MVE variants.
(do_neon_sat_abs_neg): Likewise.
(insns): Likewise.
* testsuite/gas/arm/mve-vmvn-bad.d: New test.
* testsuite/gas/arm/mve-vmvn-bad.l: New test.
* testsuite/gas/arm/mve-vmvn-bad.s: New test.
* testsuite/gas/arm/mve-vqabsneg-bad.d: New test.
* testsuite/gas/arm/mve-vqabsneg-bad.l: New test.
* testsuite/gas/arm/mve-vqabsneg-bad.s: New test.

[PATCH 24/57][Arm][GAS] Add support for MVE instructions: vmlas, vmulh and vrmulh

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vmlas): New encoding function.
(do_mve_vmulh): Likewise.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vmlas-bad.d: New test.
* testsuite/gas/arm/mve-vmlas-bad.l: New test.
* testsuite/gas/arm/mve-vmlas-bad.s: New test.
* testsuite/gas/arm/mve-vmulh-bad.d: New test.
* testsuite/gas/arm/mve-vmulh-bad.l: New test.
* testsuite/gas/arm/mve-vmulh-bad.s: New test.

[PATCH 23/57][Arm][GAS] Add support for MVE instructions: vmla, vmul, vqadd and vqsub

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): New operand.
(parse_operands): Handle new operand.
(mve_encode_qqr): Handle new instructions.
(do_neon_dyadic_i64_su): Accept MVE variants.
(neon_dyadic_misc): Likewise.
(do_neon_mac_maybe_scalar): Likewise.
(do_neon_mul): Likewise.
(insns): Change to accept MVE variants.
* testsuite/gas/arm/mve-vmla-bad.d: New test.
* testsuite/gas/arm/mve-vmla-bad.l: New test.
* testsuite/gas/arm/mve-vmla-bad.s: New test.
* testsuite/gas/arm/mve-vmul-bad-1.d: New test.
* testsuite/gas/arm/mve-vmul-bad-1.l: New test.
* testsuite/gas/arm/mve-vmul-bad-1.s: New test.
* testsuite/gas/arm/mve-vmul-bad-2.d: New test.
* testsuite/gas/arm/mve-vmul-bad-2.l: New test.
* testsuite/gas/arm/mve-vmul-bad-2.s: New test.
* testsuite/gas/arm/mve-vqaddsub-bad.d: New test.
* testsuite/gas/arm/mve-vqaddsub-bad.l: New test.
* testsuite/gas/arm/mve-vqaddsub-bad.s: New test.

[PATCH 22/57][Arm][GAS] Add support for MVE instructions: vmlaldav, vmlalv, vmlsldav, vrmlaldavh, vrmlalvh and vrmlsldavh

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vmlaldav, M_MNEM_vmlaldava,
 M_MNEM_vmlaldavx, M_MNEM_vmlaldavax, M_MNEM_vmlsldav,
 M_MNEM_vmlsldava, M_MNEM_vmlsldavx, M_MNEM_vmlsldavax,
 M_MNEM_vrmlaldavhx, M_MNEM_vrmlaldavhax, M_MNEM_vrmlsldavh,
 M_MNEM_vrmlsldavha, M_MNEM_vrmlsldavhx, M_MNEM_vrmlsldavhax): New
instruction encodings.
(NEON_SHAPE_DEF): New shape
(mve_encode_rrqq): New encoding helper function.
(do_mve_vmlaldav): New encoding function.
(do_mve_vrmlaldavh): New encoding function.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vmlaldav-bad.d: New test.
* testsuite/gas/arm/mve-vmlaldav-bad.l: New test.
* testsuite/gas/arm/mve-vmlaldav-bad.s: New test.
* testsuite/gas/arm/mve-vmlalv-bad.d: New test.
* testsuite/gas/arm/mve-vmlalv-bad.l: New test.
* testsuite/gas/arm/mve-vmlalv-bad.s: New test.
* testsuite/gas/arm/mve-vmlsldav-bad.d: New test.
* testsuite/gas/arm/mve-vmlsldav-bad.l: New test.
* testsuite/gas/arm/mve-vmlsldav-bad.s: New test.
* testsuite/gas/arm/mve-vrmlaldavh-bad.d: New test.
* testsuite/gas/arm/mve-vrmlaldavh-bad.l: New test.
* testsuite/gas/arm/mve-vrmlaldavh-bad.s: New test.

[PATCH 21/57][Arm][GAS] Add support for MVE instructions: vmaxv, vmaxav, vminv and vminav

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vmaxv, M_MNEM_vmaxav, M_MNEM_vminv,
 M_MNEM_vminav): New instruction encodings.
(do_mve_vmaxv): New encoding function.
(insns): Add entries for new MVE mnemonics.
* testsuite/gas/arm/mve-vmaxv-vminv-bad.d: New test.
* testsuite/gas/arm/mve-vmaxv-vminv-bad.l: New test.
* testsuite/gas/arm/mve-vmaxv-vminv-bad.s: New test.

[PATCH 20/57][Arm][GAS] Add support for MVE instructions: vmaxnmv, vmaxnmav, vminnmv and vminnmav

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vmaxnmv): New encoding function.
(insns): Add entries for new mnemonics.
* testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.d: New test.
* testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.l: New test.
* testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.s: New test.

[PATCH 19/57][Arm][GAS] Add support for MVE instructions: vmax[nm][a] and vmin[nm][a]

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vmaxa_vmina): New encoding function.
(do_mve_vmaxnma_vminnma): Likewise.
(do_neon_dyadic_if_su): Change to support MVE variants.
(do_vmaxnm): Likewise.
(insns): Change to accept MVE variants and add new.
* testsuite/gas/arm/mve-vmax-vmin-bad.d: New test.
* testsuite/gas/arm/mve-vmax-vmin-bad.l: New test.
* testsuite/gas/arm/mve-vmax-vmin-bad.s: New test.
* testsuite/gas/arm/mve-vmaxa-vmina-bad.d: New test.
* testsuite/gas/arm/mve-vmaxa-vmina-bad.l: New test.
* testsuite/gas/arm/mve-vmaxa-vmina-bad.s: New test.
* testsuite/gas/arm/mve-vmaxnm-vminnm-bad.d: New test.
* testsuite/gas/arm/mve-vmaxnm-vminnm-bad.l: New test.
* testsuite/gas/arm/mve-vmaxnm-vminnm-bad.s: New test.
* testsuite/gas/arm/mve-vmaxnma-vminnma-bad.d: New test.
* testsuite/gas/arm/mve-vmaxnma-vminnma-bad.l: New test.
* testsuite/gas/arm/mve-vmaxnma-vminnma-bad.s: New test.

[PATCH 18/57][Arm][GAS] Add support for MVE instructions: vhcadd, vhadd, vhsub and vrhadd

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): New operand.
(parse_operands): Handle new operand.
(mve_encode_qqr): Change to support new instructions.
(enum vfp_or_neon_is_neon_bits): Moved.
(vfp_or_neon_is_neon): Moved.
(check_simd_pred_availability): Moved.
(do_neon_dyadic_i_su): Changed to support MVE variants.
(neon_dyadic_misc): Changed mve_encode_qqr call.
(do_mve_vbrsr): Likewise.
(do_mve_vhcadd): New encoding function.
(insns): Change existing to accept MVE variants and add new.
* testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.d: New test.
* testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.l: New test.
* testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.s: New test.
* testsuite/gas/arm/mve-vhcadd-bad.d: New test.
* testsuite/gas/arm/mve-vhcadd-bad.l: New test.
* testsuite/gas/arm/mve-vhcadd-bad.s: New test.

[PATCH 17/57][Arm][GAS] Add support for MVE instructions: vfma and vfms

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_neon_fmac): Change to support MVE variants.
(insns): Change to accept MVE variants.
* testsuite/gas/arm/mve-vfma-vfms-bad.d: New test.
* testsuite/gas/arm/mve-vfma-vfms-bad.l: New test.
* testsuite/gas/arm/mve-vfma-vfms-bad.s: New test.

[PATCH 16/57][Arm][GAS] Add support for MVE instructions: vdup, vddup, vdwdup, vidup and viwdup

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vddup, M_MNEM_vdwdup, M_MNEM_vidup,
 M_MNEM_viwdup): New instruction encodings.
(NEON_SHAPE_DEF): New shapes.
(do_mve_viddup): New encoding function.
(do_neon_dup): Change to support new MVE variants.
(insns): Change existing to accept MVE variants and add new.
* testsuite/gas/arm/mve-vddup-bad.d: New test.
* testsuite/gas/arm/mve-vddup-bad.l: New test.
* testsuite/gas/arm/mve-vddup-bad.s: New test.
* testsuite/gas/arm/mve-vdup-bad.d: New test.
* testsuite/gas/arm/mve-vdup-bad.l: New test.
* testsuite/gas/arm/mve-vdup-bad.s: New test.
* testsuite/gas/arm/mve-vidup-bad.d: New test.
* testsuite/gas/arm/mve-vidup-bad.l: New test.
* testsuite/gas/arm/mve-vidup-bad.s: New test.

[PATCH 15/57][Arm][GAS] Add support for MVE instructions: vcls, vclz and vfmas

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (do_mve_vfmas): New encoding function.
(do_neon_cls): Change to support MVE variants.
(do_neon_clz): Change to support MVE variants.
(insns): Change to support MVE variants and add new.
* testsuite/gas/arm/mve-vcls-bad.d: New test.
* testsuite/gas/arm/mve-vcls-bad.l: New test.
* testsuite/gas/arm/mve-vcls-bad.s: New test.
* testsuite/gas/arm/mve-vclz-bad.d: New test.
* testsuite/gas/arm/mve-vclz-bad.l: New test.
* testsuite/gas/arm/mve-vclz-bad.s: New test.
* testsuite/gas/arm/mve-vfmas-bad.d: New test.
* testsuite/gas/arm/mve-vfmas-bad.l: New test.
* testsuite/gas/arm/mve-vfmas-bad.s: New test.

[PATCH 14/57][Arm][GAS] Add support for MVE instructions: vcadd, vcmla and vcmul

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): New operands.
(parse_operands): Handle new operands.
(do_mve_vcmul): New encoding function.
(do_vcmla): Change to support MVE variants.
(do_vcadd): Change to support MVE variants.
(insns): Change existing to support MVE variants and add new.
* testsuite/gas/arm/mve-vcadd-bad-1.d: New test.
* testsuite/gas/arm/mve-vcadd-bad-1.l: New test.
* testsuite/gas/arm/mve-vcadd-bad-1.s: New test.
* testsuite/gas/arm/mve-vcadd-bad-2.d: New test.
* testsuite/gas/arm/mve-vcadd-bad-2.l: New test.
* testsuite/gas/arm/mve-vcadd-bad-2.s: New test.
* testsuite/gas/arm/mve-vcmla-bad-1.d: New test.
* testsuite/gas/arm/mve-vcmla-bad-1.l: New test.
* testsuite/gas/arm/mve-vcmla-bad-1.s: New test.
* testsuite/gas/arm/mve-vcmla-bad-2.d: New test.
* testsuite/gas/arm/mve-vcmla-bad-2.l: New test.
* testsuite/gas/arm/mve-vcmla-bad-2.s: New test.
* testsuite/gas/arm/mve-vcmul-bad-1.d: New test.
* testsuite/gas/arm/mve-vcmul-bad-1.l: New test.
* testsuite/gas/arm/mve-vcmul-bad-1.s: New test.
* testsuite/gas/arm/mve-vcmul-bad-2.d: New test.
* testsuite/gas/arm/mve-vcmul-bad-2.l: New test.
* testsuite/gas/arm/mve-vcmul-bad-2.s: New test.

[PATCH 13/57][Arm][GAS] Add support for MVE instructions: vand, vbic, vorr, vorn and veor

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (enum operand_parse_code): New operands.
(parse_operands): Handle new operands.
(enum vfp_or_neon_is_neon_bits): Moved
(vfp_or_neon_is_neon): Moved
(check_simd_pred_availability): Moved.
(do_neon_logic): Change to accept MVE variants.
(insns): Changed to accept MVE variants.
* testsuite/gas/arm/mve-vand-bad.d: New test.
* testsuite/gas/arm/mve-vand-bad.l: New test.
* testsuite/gas/arm/mve-vand-bad.s: New test.
* testsuite/gas/arm/mve-vbic-bad.d: New test.
* testsuite/gas/arm/mve-vbic-bad.l: New test.
* testsuite/gas/arm/mve-vbic-bad.s: New test.
* testsuite/gas/arm/mve-veor-bad.d: New test.
* testsuite/gas/arm/mve-veor-bad.l: New test.
* testsuite/gas/arm/mve-veor-bad.s: New test.
* testsuite/gas/arm/mve-vorn-bad.d: New test.
* testsuite/gas/arm/mve-vorn-bad.l: New test.
* testsuite/gas/arm/mve-vorn-bad.s: New test.
* testsuite/gas/arm/mve-vorr-bad.d: New test.
* testsuite/gas/arm/mve-vorr-bad.l: New test.
* testsuite/gas/arm/mve-vorr-bad.s: New test.

[PATCH 12/57][Arm][GAS] Add support for MVE instructions: vaddlv and vaddv

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vaddlv, M_MNEM_vaddlva, M_MNEM_vaddv,
 M_MNEM_vaddva): New instruction encodings.
(mve_encode_rq): New encoding helper function.
(do_mve_vaddlv): New encoding function.
(do_mve_vaddv): New encoding function.
* testsuite/gas/arm/mve-vaddlv-bad.d: New test.
* testsuite/gas/arm/mve-vaddlv-bad.l: New test.
* testsuite/gas/arm/mve-vaddlv-bad.s: New test.
* testsuite/gas/arm/mve-vaddv-bad.d: New test.
* testsuite/gas/arm/mve-vaddv-bad.l: New test.
* testsuite/gas/arm/mve-vaddv-bad.s: New test.

[PATCH 11/57][Arm][GAS] Add support for MVE instructions: vadc, vsbc and vbrsr

gas/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/tc-arm.c (M_MNEM_vadc, M_MNEM_vadci, M_MNEM_vbrsr):
New instruction encodings.
(do_mve_vadc): New encoding instruction.
(do_mve_vbrsr): Likewise.
(do_mve_vsbc): Likewise.
* testsuite/gas/arm/mve-vadc-bad.d: New test.
* testsuite/gas/arm/mve-vadc-bad.l: New test.
* testsuite/gas/arm/mve-vadc-bad.s: New test.
* testsuite/gas/arm/mve-vbrsr-bad.d: New test.
* testsuite/gas/arm/mve-vbrsr-bad.l: New test.
* testsuite/gas/arm/mve-vbrsr-bad.s: New test.
* testsuite/gas/arm/mve-vsbc-bad.d: New test.
* testsuite/gas/arm/mve-vsbc-bad.l: New test.
* testsuite/gas/arm/mve-vsbc-bad.s: New test.