re PR c++/82085 (ICE: Template variable reference used in nested template alias)

/cp
2017-10-30  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/82085
* pt.c (tsubst_copy_and_build, [INDIRECT_REF]): For a REFERENCE_REF_P,
unconditionally call convert_from_reference.

/testsuite
2017-10-30  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/82085
* g++.dg/cpp1y/var-templ56.C: New.

From-SVN: r254239

[C++ PATCH] operator name cleanup prepatch

https://gcc.gnu.org/ml/gcc-patches/2017-10/msg02240.html
cp/
* call.c (build_op_call_1): Test for FUNCTION_DECL in same manner
as a few lines earlier.
* cp-tree.h (PACK_EXPANSION_PATTERN): Fix white space.
* decl.c (grokfndecl): Fix indentation.
(compute_array_index_type): Use processing_template_decl_sentinel.
(grok_op_properties): Move warnings to end.  Reorder other checks
to group similar entities.  Tweak diagnostics.
* lex.c (unqualified_name_lookup_error): No need to check name is
not ERROR_MARK operator.
* parser.c (cp_parser_operator): Select operator code before
looking it up.
* typeck.c (check_return_expr): Fix indentation and line wrapping.

testsuite/

* g++.dg/other/operator2.C: Adjust diagnostic.
* g++.old-deja/g++.jason/operator.C: Likewise.

From-SVN: r254238

Remove DImode expansions for 1-bit shifts

A left shift of 1 can always be done using an add, so slightly adjust rtx
cost for DImode left shift by 1 so that adddi3 is preferred in all cases,
and the arm_ashldi3_1bit is redundant.

DImode right shifts of 1 are rarely used (6 in total in the GCC binary),
so there is little benefit of the arm_ashrdi3_1bit and arm_lshrdi3_1bit
patterns.  The generated code is better and faster without these shifts
as it allows early expansion, optimization and better register allocation.

    gcc/
* config/arm/arm.md (ashldi3): Remove shift by 1 expansion.
(arm_ashldi3_1bit): Remove pattern.
(ashrdi3): Remove shift by 1 expansion.
(arm_ashrdi3_1bit): Remove pattern.
(lshrdi3): Remove shift by 1 expansion.
(arm_lshrdi3_1bit): Remove pattern.
* config/arm/arm.c (arm_rtx_costs_internal): Slightly increase
cost of ashldi3 by 1.
* config/arm/neon.md (ashldi3_neon): Remove shift by 1 expansion.
(<shift>di3_neon): Likewise.

From-SVN: r254237

Wrong type-attribute for stp and str

Fix the type attributes of the integer stores in aarch64_simd_mov.

    gcc/
* config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Rename
both identically named patterns to (*aarch64_simd_mov<VD:mode>)
and (*aarch64_simd_mov<VQ:mode>).
(*aarch64_simd_mov<VD:mode>): Change type attribute to match
pattern alternative.
(*aarch64_simd_mov<VQ:mode>): Re-order and change type
attributes to match pattern alternative.

From-SVN: r254236

Part 2/2 for contributing PPC64LE support for X86 SSE2 instrisics.
This patch includes testsuite/gcc.target tests for the intrinsics
in emmintrin.h.  For these tests I added -Wno-psabi to dg-options
to suppress warnings associated with the vector ABI change in GCC5.

From-SVN: r254235

Part 1/2 for contributing PPC64LE support for X86 SSE2 instrisics.

Part 1/2 for contributing PPC64LE support for X86 SSE2
instrisics. This patch includes the new (for PPC) emmintrin.h,
changes x86intrin.h to include xmmintrin.h, and associated
config.gcc changes.

From-SVN: r254234

backport: unnecessary duplication and repeating bugs like PR78439 due to changes being applied only to one of the duplicates.

Merge the movdi_vfp_cortexa8 pattern into movdi_vfp and remove it to avoid
unnecessary duplication and repeating bugs like PR78439 due to changes being
applied only to one of the duplicates.

    gcc/
        * config/arm/vfp.md (movdi_vfp): Merge changes from movdi_vfp_cortexa8.
        * (movdi_vfp_cortexa8): Remove pattern.

From-SVN: r254233

Remove Tru64 UNIX and IRIX references in install.texi

* doc/install.texi (Specific, alpha*-*-*): Remove DEC OSF/1
etc. reference.
(Specific, alpha*-dec-osf5.1): Remove.
(Specific, mips-sgi-irix5): Remove.
(Specific, mips-sgi-irix6): Remove.

From-SVN: r254230

Don't create broken symlink in libstdc++-v3/include/bits

* include/Makefile.am (stamp-bits-sup): Do not create broken symlink
to stamp-bits.
* include/Makefile.in: Regenerate.

From-SVN: r254229

re PR middle-end/22141 (Missing optimization when storing structures)

PR middle-end/22141
* gimple-ssa-store-merging.c (merged_store_group::apply_stores): Fix
arguments to clear_bit_region_be.

From-SVN: r254228

Fix ia64 build failure.

gcc/
* gimplify.c: Include memmodel.h.

From-SVN: r254227

Remove ios_mode::trunc from basic_ofstream openmode arguments

* include/std/fstream (basic_ifstream, basic_ofstream, basic_fstream):
Remove outdated comments about calling c_str() to create a file stream
from a std::string.
(basic_ofstream::basic_ofstream, basic_ofstream::open): Remove
redundant ios_mode::trunc bits from default arguments and comments.

From-SVN: r254226

[hsa] Add missing guard in OMP gridification

2017-10-30  Martin Jambor  <mjambor@suse.cz>

* omp-grid.c (grid_attempt_target_gridification): Also insert a
condition whether loop should be executed at all.

From-SVN: r254225

Minor tweak to libstdc++ FAQ

* doc/xml/faq.xml: Adjust "What is libstdc++?" answer slightly.

From-SVN: r254224

Minor header reorganization for unordered containers

* include/bits/hashtable_policy.h: Include <tuple>.
* include/std/unordered_map: Only include <bits/stl_pair.h> instead
of <utility> and <tuple>.
* include/std/unordered_set: Likewise.

From-SVN: r254223

Implement LWG 2485

* include/debug/array (get(const array<_Tp, _Nm>&&)): New.
* include/std/array (get(const array<_Tp, _Nm>&&)): Likewise.
* include/std/tuple (get(const tuple<_Elements...>&&)): Likewise.
(get(const tuple<_Types...>&&)): Likewise.
* include/std/utility
(__pair_get::__const_move_get(const std::pair<_Tp1, _Tp2>&&)):
Likewise.
(get(const std::pair<_Tp1, _Tp2>&&)): Likewise.
(get(const pair<_Tp, _Up>&&)): Likewise.
(get(const pair<_Up, _Tp>&&)): Likewise.
* testsuite/20_util/pair/astuple/get.cc: Add tests for
new overloads.
* testsuite/20_util/pair/astuple/get_by_type.cc: Likewise.
* testsuite/20_util/tuple/element_access/get2.cc: Likewise.
* testsuite/20_util/tuple/element_access/get2_by_type.cc: Likewise.
* testsuite/23_containers/array/tuple_interface/get.cc: Likewise.
* testsuite/23_containers/array/tuple_interface/tuple_element_debug_neg.cc:
Adjust.
* testsuite/23_containers/array/tuple_interface/tuple_element_neg.cc:
Likewise.

From-SVN: r254222

rs6000.c (rs6000_gimple_fold_builtin): Add support for gimple folding of vec_madd() intrinsics.

[gcc]

2017-10-30  Will Schmidt <will_schmidt@vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add support for
gimple folding of vec_madd() intrinsics.
* config/rs6000/altivec.md (mulv8hi3): Rename altivec_vmladduhm to
fmav8hi4.  (altivec_vmladduhm): Rename to fmav8hi4.
* config/rs6000/rs6000-builtin.def: Rename vmladduhm to fmav8hi4

From-SVN: r254221

fold-vec-perm-longlong.c: Update to use long long types for testcase arguments.

2017-10-30  Will Schmidt  <will_schmidt@vnet.ibm.com>

* gcc.target/powerpc/fold-vec-perm-longlong.c: Update to use long long
types for testcase arguments.

From-SVN: r254220

re PR lto/82757 (r251560 causes: plugin needed to handle lto object)

2017-10-30  Richard Biener  <rguenther@suse.de>

PR lto/82757
* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
Strip two leading _s from the __gnu_lto_* symbols.

From-SVN: r254219

revert: [multiple changes]

2017-10-30  Richard Biener  <rguenther@suse.de>

PR tree-optimization/82762
Revert
2017-10-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/82129
Revert
2017-08-01  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81181
* tree-ssa-pre.c (compute_antic_aux): Defer clean() to ...
(compute_antic): ... end of iteration here.

* gcc.dg/torture/pr82762.c: New testcase.

From-SVN: r254218

gimple-parser.c (c_parser_gimple_statement): Parse conditional stmts.

2017-10-30  Richard Biener  <rguenther@suse.de>

c/
* gimple-parser.c (c_parser_gimple_statement): Parse conditional
stmts.

* gcc.dg/gimplefe-27.c: New testcase.

From-SVN: r254217

Add -std=c17, -std=gnu17.

C17, a bug-fix version of the C11 standard with DR resolutions
integrated, will soon go to ballot.  This patch adds corresponding
options -std=c17, -std=gnu17 (new default version, replacing
-std=gnu11 as the default), -std=iso9899:2017.  As a bug-fix version
of the standard, there is no need for flag_isoc17 or any options for
compatibility warnings; however, there is a new __STDC_VERSION__
value, so new cpplib languages CLK_GNUC17 and CLK_STDC17 are added to
support using that new value with the new options.  (If the standard
ends up being published in 2018 and being known as C18, option aliases
can be added.  Note however that -std=iso9899:199409 corresponds to a
__STDC_VERSION__ value rather than a publication date.)

(There are a couple of DR resolutions needing implementing in GCC, but
that's independent of the new options.)

(I'd propose to add -std=c2x / -std=gnu2x / -Wc11-c2x-compat for the
next major C standard revision once there are actually C2x drafts
being issued with new features included.)

Bootstrapped with no regressions for x86_64-pc-linux-gnu.

gcc:
* doc/invoke.texi (C Dialect Options): Document -std=c17,
-std=iso9899:2017 and -std=gnu17.
* doc/standards.texi (C Language): Document C17 support.
* doc/cpp.texi (Overview): Mention -std=c17.
(Standard Predefined Macros): Document C11 and C17 values of
__STDC_VERSION__.  Do not refer to C99 support as incomplete.
* doc/extend.texi (Inline): Do not list individual options for
standards newer than C99.
* dwarf2out.c (highest_c_language, gen_compile_unit_die): Handle
"GNU C17".
* config/rl78/rl78.c (rl78_option_override): Handle "GNU C17"
language name.

gcc/c-family:
* c.opt (std=c17, std=gnu17, std=iso9899:2017): New options.
* c-opts.c (set_std_c17): New function.
(c_common_init_options): Use gnu17 as default C version.
(c_common_handle_option): Handle -std=c17 and -std=gnu17.

gcc/testsuite:
* gcc.dg/c17-version-1.c, gcc.dg/c17-version-2.c: New tests.

libcpp:
* include/cpplib.h (enum c_lang): Add CLK_GNUC17 and CLK_STDC17.
* init.c (lang_defaults): Add GNUC17 and STDC17 data.
(cpp_init_builtins): Handle C17 value of __STDC_VERSION__.

From-SVN: r254216

asan.c (asan_finish_file): Align asan globals array by shadow granularity.

2017-10-30  Maxim Ostapenko  <m.ostapenko@samsung.com>

* asan.c (asan_finish_file): Align asan globals array by shadow
granularity.

From-SVN: r254214

re PR middle-end/22141 (Missing optimization when storing structures)

PR middle-end/22141
* gimple-ssa-store-merging.c: Include rtl.h and expr.h.
(struct store_immediate_info): Add bitregion_start and bitregion_end
fields.
(store_immediate_info::store_immediate_info): Add brs and bre
arguments and initialize bitregion_{start,end} from those.
(struct merged_store_group): Add bitregion_start, bitregion_end,
align_base and mask fields.  Drop unnecessary struct keyword from
struct store_immediate_info.  Add do_merge method.
(clear_bit_region_be): Use memset instead of loop storing zeros.
(merged_store_group::do_merge): New method.
(merged_store_group::merge_into): Use do_merge.  Allow gaps in between
stores as long as the surrounding bitregions have no gaps.
(merged_store_group::merge_overlapping): Use do_merge.
(merged_store_group::apply_stores): Test that bitregion_{start,end}
is byte aligned, rather than requiring that start and width are
byte aligned.  Drop unnecessary struct keyword from
struct store_immediate_info.  Allocate and populate also mask array.
Make start of the arrays relative to bitregion_start rather than
start and size them according to bitregion_{end,start} difference.
(struct imm_store_chain_info): Drop unnecessary struct keyword from
struct store_immediate_info.
(pass_store_merging::gate): Punt if BITS_PER_UNIT or CHAR_BIT is not 8.
(pass_store_merging::terminate_all_aliasing_chains): Drop unnecessary
struct keyword from struct store_immediate_info.
(imm_store_chain_info::coalesce_immediate_stores): Allow gaps in
between stores as long as the surrounding bitregions have no gaps.
Formatting fixes.
(struct split_store): Add orig non-static data member.
(split_store::split_store): Initialize orig to false.
(find_constituent_stmts): Return store_immediate_info *, non-NULL
if there is exactly a single original stmt.  Change stmts argument
to pointer from reference, if NULL, don't push anything to it.  Add
first argument, use it to optimize skipping over orig stmts that
are known to be before bitpos already.  Simplify.
(split_group): Return unsigned int count how many stores are or
would be needed rather than a bool.  Add allow_unaligned argument.
Change split_stores argument from reference to pointer, if NULL,
only do a dry run computing how many stores would be produced.
Rewritten algorithm to use both alignment and misalign if
!allow_unaligned and handle bitfield stores with gaps.
(imm_store_chain_info::output_merged_store): Set start_byte_pos
from bitregion_start instead of start.  Compute allow_unaligned
here, if true, do 2 split_group dry runs to compute which one
produces fewer stores and prefer aligned if equal.  Punt if
new count is bigger or equal than original before emitting any
statements, rather than during that.  Remove no longer needed
new_ssa_names tracking.  Replace num_stmts with
split_stores.length ().  Use 32-bit stack allocated entries
in split_stores auto_vec.  Try to reuse original store lhs/rhs1
if possible.  Handle bitfields with gaps.
(pass_store_merging::execute): Ignore bitsize == 0 stores.
Compute bitregion_{start,end} for the stores and construct
store_immediate_info with that.  Formatting fixes.

* gcc.dg/store_merging_10.c: New test.
* gcc.dg/store_merging_11.c: New test.
* gcc.dg/store_merging_12.c: New test.
* g++.dg/pr71694.C: Add -fno-store-merging to dg-options.

From-SVN: r254213

re PR target/82725 ([x86_64] internal compiler error: in change_address_1, at emit-rtl.c:2162)

PR target/82725
* config/i386/i386.c (legitimate_pic_address_disp_p): Allow
UNSPEC_DTPOFF and UNSPEC_NTPOFF with SImode immediate offset.

testsuite/ChangeLog:

PR target/82725
* g++.dg/pr82725.C: New test.

From-SVN: r254212

Fix cygwin builds, broken by PR sanitizer/82517 fix.

gcc/
* gimplify.c: Include tm_p.h.

From-SVN: r254211

Daily bump.

From-SVN: r254210

Emit a no longer supported warning for gcoff* options.

gcc/
* common.opt (gcoff): Re-add as ignored option.
(gcoff1, gcoff2, gcoff3): Likewise.

From-SVN: r254207

Delete obsolete SDB debug info support.

gcc/
* Makefile.in (OBJS): Delete sdbout.o.
(GTFILES): Delete $(srcdir)/sdbout.c.
* debug.h: Delete sdb_debug_hooks.
* final.c: Delete sdbout.h include.
(final_scan_insn): Delete SDB_DEBUG check.
(rest_of_clean_state): Likewise.
* output.h: Delete sdb_begin_function_line.
* sdbout.c: Delete.
* sdbout.h: Delete.
* toplev.c: Delete sdbout.h include.
(process_options): Delete SDB_DEBUG check.
* tree-core.h (tree_type_common): Delete pointer field of
tree_type_symtab.
* tree.c (copy_node): Clear TYPE_SYMTAB_DIE instead of
TYPE_SYMTAB_POINTER.
* tree.h (TYPE_SYMTAB_POINTER): Delete.
(TYPE_SYMTAB_IS_POINTER): Delete.
(TYPE_SYMTAB_IS_DIE): Renumber.
* xcoffout.c: Refer to former sdbout.c file.
(xcoffout_begin_prologue): Use past tense for sdbout.c reference.

* doc/install.texi (--with-stabs): Delete COFF and ECOFF info.
* doc/invoke.texi (SEEALSO): Delete adb and sdb references.
(Debugging Options): Delete -gcoff.
(-gstabs): Delete SDB reference.
(-gcoff): Delete.
(-gcoff@var{level}): Delete.
* doc/passes.texi (Debugging information output): Delete SDB and
sdbout.c references.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (DWARF_CIE_DATA_ALIGNMENT): Delete SDB from xref.
(SDB and DWARF): Change node name to DWARF and delete SDB and COFF
references.
(DEBUGGER_AUTO_OFFSET): Delete COFF and SDB references.
(PREFERRED_DEBUGGING_TYPE): Delete SDB_DEBUG and -gcoff references.
(SDB_DEBUGGING_INFO): Delete.
(PUT_SDB_@dots{}, SDB_DELIM, SDB_ALLOW_UNKNOWN_REFERENCES)
SDB_ALLOW_FORWARD_REFERENCES, SDB_OUTPUT_SOURCE_LINE): Delete.
* target.def (output_source_filename): Delete COFF reference.

* common.opt (gcoff): Delete.
(gxcoff+): Update Negative chain.
* defaults.h: Delete all references to SDB_DEBUGGING_INFO and
SDB_DEBUG.
* dwarf2out.c (gen_array_type_die): Change SDB to debuggers.
* flag-types.h (enum debug_info_type): Delete SDB_DEBUG.
* function.c (number_blocks): Delete SDB_DEBUGGING_INFO, SDB_DEBUG,
and SDB references.
(expand_function_start): Change sdb reference to past tense.
(expand_function_end): Change sdb reference to past tense.
* gcc.c (cpp_unique_options): Delete gcoff3 reference.
* opts.c (debug_type_names): Delete coff entry.
(common_handle_option): Delete OPT_gcoff case.
* system.h (SDB_DEBUG, SDB_DEBUGGING_INFO): Poison.

* config/dbxcoff.h (PREFERRED_DEBUGGING_TYPE): Set to DBX_DEBUG.
* config/cris/cris.h: Delete SDB reference in comment.
* config/i386/cygming.h: Don't define SDB_DEBUGGING_INFO.
(ASM_DECLARE_FUNCTION_NAME): Delete SDB reference from comment.
* config/i386/gas.h: Don't define SDB_DEBUGGING_INFO.
* config/i386/i386.c (svr4_dbx_register_map): Change SDB references
to past tense.
(ix86_expand_prologue): Likewise.
* config/i386/winnt.c (i386_pe_start_function): Don't check SDB_DEBUG.
* config/ia64/ia64.h: Likewise.
* config/m68k/m68kelf.h (DBX_REGISTER_NUMBER): Delete SDB reference.
* config/mips/mips.h (SUBTARGET_ASM_DEBUGGING_SPEC): Delete gcoff*
support.
* config/mmix/mmix.h: Likewise.
* config/nds32/nds32.c: Likewise.
* config/stormy/storym16.h: Likewise.
* config/visium/visium.h: Likewise.
* config/vx-common.h (SDB_DEBUGGING_INFO): Delete undef.

gcc/fortran/
* invoke.texi: Delete adb and sdb references.

gccc/testsuite/
* lib/gcc-dg.exp (gcc-dg-debug-runtest): Delete -gcoff.
* lib/gfortran-dg.exp (gfortran-dg-debug-runtest): Delete
-gcoff.

From-SVN: r254206

* gcc.dg/torture/pr82692.c: Move from gcc.target/i386.

From-SVN: r254205

nios2.h (FRAME_GROWS_DOWNWARD): Define to 1.

2017-10-28  Sandra Loosemore  <sandra@codesourcery.com>

gcc/
* config/nios2/nios2.h (FRAME_GROWS_DOWNWARD): Define to 1.
* config/nios2/nios2.c (nios2_initial_elimination_offset):  Make
FRAME_POINTER_REGNUM point at high end of local var area.

From-SVN: r254204

Daily bump.

From-SVN: r254203

* ChangeLog: Fix whitespace.

From-SVN: r254200

re PR c++/70971 (ICE in parameter pack expansion)

2017-10-28  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/70971
* g++.dg/torture/pr70971.C: New.

From-SVN: r254199

check.c (gfc_check_co_reduce): Clarify error message.

gcc/fortran/ChangeLog:

2017-10-28  Andre Vehreschild  <vehre@gcc.gnu.org>

* check.c (gfc_check_co_reduce): Clarify error message.

From-SVN: r254197

re PR fortran/81758 ([OOP] Broken vtab)

2017-10-28  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/81758
* trans-expr.c (trans_class_vptr_len_assignment): 'vptr_expr'
must only be set if the right hand side expression is of type
class.

2017-10-28  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/81758
* gfortran.dg/class_63.f90: New test.

From-SVN: r254195

target.c (struct gomp_coalesce_buf): New type.

* target.c (struct gomp_coalesce_buf): New type.
(MAX_COALESCE_BUF_SIZE, MAX_COALESCE_BUF_GAP): Define.
(gomp_coalesce_buf_add, gomp_to_device_kind_p): New functions.
(gomp_copy_host2dev): Add CBUF argument, if copying into
the cached ranges, memcpy into buffer instead of copying
into device.
(gomp_map_vars_existing, gomp_map_pointer, gomp_map_fields_existing):
Add CBUF argument, pass it through to other calls.
(gomp_map_vars): Aggregate copies from host to device if small enough
and with small enough gaps in between into memcpy into a buffer and
fewer host to device copies from the buffer.
(gomp_update): Adjust gomp_copy_host2dev caller.

From-SVN: r254194

re PR fortran/82620 ([PDT] ICE: free_expr0(): Bad expr type (at fortran/expr.c:497))

2017-10-27  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/82620
* match.c (gfc_match_allocate): Exit early on syntax error.

2017-10-27  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/82620
* gfortran.dg/allocate_error_7.f90: new test.

From-SVN: r254193

Daily bump.

From-SVN: r254192

re PR c++/82218 ([C++1x] constexpr on static member function causes segfault)

2017-10-27  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/82218
* g++.dg/cpp1y/constexpr-82218.C: New.

From-SVN: r254189

bb-reorder.c (find_traces_1_round): Fix off-by-one index.

* bb-reorder.c (find_traces_1_round): Fix off-by-one index.
Move comment around.  Do not reset best_edge for a copiable
destination if the copy would cause a partition change.
(better_edge_p): Remove redundant check.

From-SVN: r254188

PR target/82268 Correct FAIL when configured --with-cpu

* gcc.target/i386/pr82196-1.c (dg-options): Add -mno-avx.

From-SVN: r254186

i386-protos.h (ix86_fp_compare_mode): Remove prototype.

* config/i386/i386-protos.h (ix86_fp_compare_mode): Remove prototype.

From-SVN: r254184

builtins.c (CASE_MATHFN_FLOATN): New helper macro to add cases for math functions that have _Float<N> and...

[gcc]
2017-10-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

* builtins.c (CASE_MATHFN_FLOATN): New helper macro to add cases
for math functions that have _Float<N> and _Float<N>X variants.
(mathfn_built_in_2): Add support for math functions that have
_Float<N> and _Float<N>X variants.
(DEF_INTERNAL_FLT_FLOATN_FN): New helper macro.
(expand_builtin_mathfn_ternary): Add support for fma with
_Float<N> and _Float<N>X variants.
(expand_builtin): Likewise.
(fold_builtin_3): Likewise.
* builtins.def (DEF_EXT_LIB_FLOATN_NX_BUILTINS): New macro to
create math function _Float<N> and _Float<N>X variants as external
library builtins.
(BUILT_IN_COPYSIGN _Float<N> and _Float<N>X variants) Use
DEF_EXT_LIB_FLOATN_NX_BUILTINS to make built-in functions using
the __builtin_ prefix and if not strict ansi, without the prefix.
(BUILT_IN_FABS _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_FMA _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_FMAX _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_FMIN _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_NAN _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_SQRT _Float<N> and _Float<N>X variants): Likewise.
* builtin-types.def (BT_FN_FLOAT16_FLOAT16_FLOAT16_FLOAT16): New
function signatures for fma _Float<N> and _Float<N>X variants.
(BT_FN_FLOAT32_FLOAT32_FLOAT32_FLOAT32): Likewise.
(BT_FN_FLOAT64_FLOAT64_FLOAT64_FLOAT64): Likewise.
(BT_FN_FLOAT128_FLOAT128_FLOAT128_FLOAT128): Likewise.
(BT_FN_FLOAT32X_FLOAT32X_FLOAT32X_FLOAT32X): Likewise.
(BT_FN_FLOAT64X_FLOAT64X_FLOAT64X_FLOAT64X): Likewise.
(BT_FN_FLOAT128X_FLOAT128X_FLOAT128X_FLOAT128X): Likewise.
* gencfn-macros.c (print_case_cfn): Add support for math functions
that have _Float<N> and _Float<N>X variants.
(print_define_operator_list): Likewise.
(fltfn_suffixes): Likewise.
(main): Likewise.
* internal-fn.def (DEF_INTERNAL_FLT_FLOATN_FN): New helper macro
for math functions that have _Float<N> and _Float<N>X variants.
(SQRT): Add support for sqrt, copysign, fmin and fmax _Float<N>
and _Float<N>X variants.
(COPYSIGN): Likewise.
(FMIN): Likewise.
(FMAX): Likewise.
* fold-const.c (tree_call_nonnegative_warnv_p): Add support for
copysign, fma, fmax, fmin, and sqrt _Float<N> and _Float<N>X
variants.
(integer_valued_read_call_p): Likewise.
* fold-const-call.c (fold_const_call_ss): Likewise.
(fold_const_call_sss): Add support for copysign, fmin, and fmax
_Float<N> and _Float<N>X variants.
(fold_const_call_ssss): Add support for fma _Float<N> and
_Float<N>X variants.
* gimple-ssa-backprop.c (backprop::process_builtin_call_use): Add
support for copysign and fma _Float<N> and _Float<N>X variants.
(backprop::process_builtin_call_use): Likewise.
* tree-call-cdce.c (can_test_argument_range); Add support for
sqrt _Float<N> and _Float<N>X variants.
(edom_only_function): Likewise.
(get_no_error_domain): Likewise.
* tree-ssa-math-opts.c (internal_fn_reciprocal): Likewise.
* tree-ssa-reassoc.c (attempt_builtin_copysign): Add support for
copysign _Float<N> and _Float<N>X variants.
* config/rs6000/rs6000-builtin.def (SQRTF128): Delete, this is now
handled by machine independent code.
(FMAF128): Likewise.
* doc/cpp.texi (Common Predefined Macros): Document defining
__FP_FAST_FMAF<N> and __FP_FAST_FMAF<N>X if the backend supports
fma _Float<N> and _Float<N>X variants.

[gcc/c]
2017-10-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

* c-decl.c (header_for_builtin_fn): Add support for copysign, fma,
fmax, fmin, and sqrt _Float<N> and _Float<N>X variants.

[gcc/c-family]
2017-10-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

* c-cppbuiltin.c (mode_has_fma): Add support for PowerPC KFmode.
(c_cpp_builtins): If a machine has a fast fma _Float<N> and
_Float<N>X variant, define __FP_FAST_FMA<N> and/or
__FP_FAST_FMA<N>X.

[gcc/testsuite]
2017-10-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/float128-hw.c: Add support for all 4 FMA
variants.  Check various conversions to/from float128.  Check
negation.  Use {\m...\M} in the tests.
* gcc.target/powerpc/float128-hw2.c: New test for implicit
_Float128 math functions.
* gcc.target/powerpc/float128-hw3.c: New test for strict ansi mode
not implicitly adding the _Float128 math functions.
* gcc.target/powerpc/float128-fma2.c: Delete, test is no longer
valid.
* gcc.target/powerpc/float128-sqrt2.c: Likewise.

From-SVN: r254168

re PR target/82692 (Ordered comparisons used for unordered built-ins)

PR target/82692
* config/i386/i386-modes.def (CCFPU): Remove definition.
* config/i386/i386.c (put_condition_mode): Remove CCFPU mode handling.
(ix86_cc_modes_compatible): Ditto.
(ix86_expand_carry_flag_compare): Ditto.
(ix86_expand_int_movcc): Ditto.
(ix86_expand_int_addcc): Ditto.
(ix86_reverse_condition): Ditto.
(ix86_unordered_fp_compare): Rename from ix86_fp_compare_mode.
Return true/false for unordered/ordered fp comparisons.
(ix86_cc_mode): Always return CCFPmode for float mode comparisons.
(ix86_prepare_fp_compare_args): Update for rename.
(ix86_expand_fp_compare): Update for rename.  Generate unordered
compare RTXes wrapped with UNSPEC_NOTRAP unspec.
(ix86_expand_sse_compare_and_jump): Ditto.
* config/i386/predicates.md (fcmov_comparison_operator):
Remove CCFPU mode handling.
(ix86_comparison_operator): Ditto.
(ix86_carry_flag_operator): Ditto.
* config/i386/i386.md (UNSPEC_NOTRAP): New unspec.
(*cmpu<mode>_i387): Wrap compare RTX with UNSPEC_NOTRAP unspec.
(*cmpu<mode>_cc_i387): Ditto.
(FPCMP): Remove mode iterator.
(unord): Remove mode attribute.
(unord_subst): New define_subst transformation
(unord): New define_subst attribute.
(unordered): Ditto.
(*cmpi<unord><MODEF:mode>): Rewrite using unord_subst transformation.
(*cmpi<unord>xf_i387): Ditto.
* config/i386/sse.md (<sse>_<unord>comi<round_saeonly_name>): Merge
from <sse>_comi<round_saeonly_name> and <sse>_ucomi<round_saeonly_name>
using unord_subst transformation.
* config/i386/subst.md (SUBST_A): Remove CCFP and CCFPU modes.
(round_saeonly): Also handle CCFP mode.
* reg-stack.c (subst_stack_regs_pat): Handle UNSPEC_NOTRAP unspec.
Remove UNSPEC_SAHF unspec handling.

testsuite/ChangeLog:

PR target/82692
* gcc.dg/torture/pr82692.c: New test.

From-SVN: r254167

* x86-tune.def (X86_TUNE_INTER_UNIT_MOVES_TO_VEC): Disable for Zen.

From-SVN: r254166

fold-vec-neg-char.c: New.

[testsuite]

2017-10-27  Will Schmidt  <will_schmidt@vnet.ibm.com>

* gcc.target/powerpc/fold-vec-neg-char.c: New.
* gcc.target/powerpc/fold-vec-neg-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-neg-int.c: New.
* gcc.target/powerpc/fold-vec-neg-longlong.c: New.
* gcc.target/powerpc/fold-vec-neg-short.c: New.

From-SVN: r254164

re PR libfortran/81938 (valgrind error message and heap-buffer-overflow on address sanitized libgfortran.so)

2017-10-27  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
    Rimvydas (RJ)

PR libgfortran/81938
io/format.c (free_format_data): Don't try to free vlist
descriptors past the end of the fnode array.

From-SVN: r254163

Simplify _Node_insert_return to avoid including <tuple>

* include/bits/node_handle.h (_Node_insert_return::get): Avoid
use of std::tie and std::get.

From-SVN: r254162

List headers in Makefile in alphabetical order

* include/Makefile.am: Put headers in alphabetical order.
* include/Makefile.in: Regenerate.

From-SVN: r254161

Remove noexcept from filesystem iterators and operations (LWG 3013, 3014)

* include/bits/fs_dir.h (directory_iterator): Remove noexcept from
constructors and increment member (LWG 3013).
(recursive_directory_iterator): Likewise.
* include/bits/fs_ops.h (copy, copy_file, create_directories)
(is_empty, remove_all): Remove noexcept (LWG 3013 and LWG 3014).
* src/filesystem/std-dir.cc (directory_iterator::increment)
(recursive_directory_iterator::increment): Remove noexcept.
* src/filesystem/std-ops.cc (copy, copy_file, create_directories)
(is_empty, remove_all): Remove noexcept

From-SVN: r254160

Make filesystem::file_status default constructor non-explicit (LWG 2787)

* include/bits/fs_dir.h (file_status): Make default constructor
non-explicit (LWG 2787).
* testsuite/27_io/filesystem/file_status/1.cc: New test.
* testsuite/experimental/filesystem/file_status/1.cc: New test.

From-SVN: r254159

pt.c (invalid_nontype_parm_type_p): Return a bool instead of an int.

2017-10-27  Paolo Carlini  <paolo.carlini@oracle.com>

* pt.c (invalid_nontype_parm_type_p): Return a bool instead of an int.

From-SVN: r254158

re PR fortran/56342 (MATMUL with PARAMETER: Simplification usually doesn't work)

2017-10-27  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/56342
* simplify.c (is_constant_array_expr): If the expression is
a parameter array, call gfc_simplify_expr.

2017-10-27  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/56342
* gfortran.dg/matmul_const.f90: New test.

From-SVN: r254157

gimple-ssa-sprintf.c: Include domwalk.h.

* gimple-ssa-sprintf.c: Include domwalk.h.
(class sprintf_dom_walker): New class, derived from dom_walker.
(sprintf_dom_walker::before_dom_children): New function.
(struct call_info): Moved into sprintf_dom_walker class
(compute_formath_length, handle_gimple_call): Likewise.
(sprintf_length::execute): Call the dominator walker rather
than walking the statements.

From-SVN: r254156

tree-vrp.c (check_all_array_refs): Do not use wi->info to smuggle gimple statement locations.

* tree-vrp.c (check_all_array_refs): Do not use wi->info to smuggle
gimple statement locations.
(check_array_bounds): Corresponding changes.  Get the statement's
location directly from wi->stmt.

From-SVN: r254154

RISC-V: Correct and improve the "-mabi" documentation

The documentation for the "-mabi" argument on RISC-V was incorrect.  We
chose to treat this as a documentation bug rather than a code bug, and
to make the documentation match what GCC currently does.  In the
process, I also improved the documentation a bit.

Thanks to Alex Bradbury for finding the bug!

PR target/82717: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82717

gcc/ChangeLog

2017-10-27  Palmer Dabbelt  <palmer@dabbelt.com>

        PR target/82717
        * doc/invoke.texi (RISC-V) <-mabi>: Correct and improve.

From-SVN: r254153

x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENCY, [...]): Disable for Haswell and newer CPUs.

* config/i386/x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENCY,
X86_TUNE_MOVX): Disable for Haswell and newer CPUs.

From-SVN: r254152

Fix profiledbootstrap.

2017-10-27  Martin Liska  <mliska@suse.cz>

* Makefile.tpl: Use proper name of folder as it was renamed
during transition to 4 stages.
* Makefile.in: Regenerate.

From-SVN: r254150

Provide filesystem::path overloads for file streams (LWG 2676, partial)

* include/std/fstream (basic_filebuf::_If_path): New SFINAE helper.
(basic_filebuf::open<Path>(const Path&, const ios_base::openmode&))
(basic_ifstream<Path>(const Path&, const ios_base::openmode&))
(basic_ifstream::open<Path>(const Path&, const ios_base::openmode&))
(basic_ofstream<Path>(const Path&, const ios_base::openmode&))
(basic_ofstream::open<Path>(const Path&, const ios_base::openmode&))
(basic_fstream<Path>(const Path&, const ios_base::openmode&))
(basic_fstream::open<Path>(const Path&, const ios_base::openmode&)):
New constructors and member functions.
* testsuite/27_io/basic_filebuf/open/char/path.cc: New test.
* testsuite/27_io/basic_fstream/cons/char/path.cc: New test.
* testsuite/27_io/basic_fstream/open/char/path.cc: New test.
* testsuite/27_io/basic_ifstream/cons/char/path.cc: New test.
* testsuite/27_io/basic_ifstream/open/char/path.cc: New test.
* testsuite/27_io/basic_ofstream/cons/char/path.cc: New test.
* testsuite/27_io/basic_ofstream/open/char/path.cc: New test.

From-SVN: r254148

* gcc.target/i386/pr70021.c: Add -mtune=skylake.

From-SVN: r254147

re PR target/82703 (Wrong addition of std::array components with -O2 -ftree-loop-vectorize -ftree-slp-vectorize (works fine with -O2))

PR target/82703
* config/i386/i386-protos.h (maybe_get_pool_constant): Removed.
* config/i386/i386.c (maybe_get_pool_constant): Removed.
(ix86_split_to_parts): Use avoid_constant_pool_reference instead of
maybe_get_pool_constant.
* config/i386/predicates.md (zero_extended_scalar_load_operand):
Likewise.

* gcc.dg/pr82703.c: New test.

From-SVN: r254145

Define std::filesystem::path::format enum (P0430R2)

* include/bits/fs_path.h (path::format): Define new enumeration type.
(path(string_type&&), path<Source>(const Source&))
(path<InputIterator>(InputIterator, InputIterator))
(path<Source>(const Source&, const locale&))
(path<InputIterator>(InputIterator, InputIterator, const locale&)):
Add format parameter.
* testsuite/27_io/filesystem/path/construct/format.cc: New test.

From-SVN: r254144

Update install.texi for Solaris 12 rename

* doc/install.texi (Specific, i?86-*-solaris2.10): Simplify gas
2.26 caveat.  Update gas and gld versions.
(Specific, *-*-solaris2*): Update binutils version.  Remove caveat
reference.

From-SVN: r254143

Extend ipa-pure-const pass to propagate malloc attribute.

2017-10-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* cgraph.h (set_malloc_flag): Declare.
* cgraph.c (set_malloc_flag_1): New function.
(set_malloc_flag): Likewise.
* ipa-fnsummary.h (ipa_call_summary): Add new field is_return_callee.
* ipa-fnsummary.c (ipa_call_summary::reset): Set is_return_callee to
false.
(read_ipa_call_summary): Add support for reading is_return_callee.
(write_ipa_call_summary): Stream is_return_callee.
* ipa-inline.c (ipa_inline): Remove call to ipa_free_fn_summary.
* ipa-pure-const.c: Add headers ssa.h, alloc-pool.h, symbol-summary.h,
ipa-prop.h, ipa-fnsummary.h.
(pure_const_names): Change to static.
(malloc_state_e): Define.
(malloc_state_names): Define.
(funct_state_d): Add field malloc_state.
(varying_state): Set malloc_state to STATE_MALLOC_BOTTOM.
(check_retval_uses): New function.
(malloc_candidate_p): Likewise.
(analyze_function): Add support for malloc attribute.
(pure_const_write_summary): Stream malloc_state.
(pure_const_read_summary): Add support for reading malloc_state.
(dump_malloc_lattice): New function.
(propagate_malloc): New function.
(warn_function_malloc): New function.
(ipa_pure_const::execute): Call propagate_malloc and
ipa_free_fn_summary.
(pass_local_pure_const::execute): Add support for malloc attribute.
* ssa-iterators.h (RETURN_FROM_IMM_USE_STMT): New macro.
* doc/invoke.texi: Document Wsuggest-attribute=malloc.

testsuite/
* gcc.dg/ipa/propmalloc-1.c: New test-case.
* gcc.dg/ipa/propmalloc-2.c: Likewise.
* gcc.dg/ipa/propmalloc-3.c: Likewise.

From-SVN: r254140

re PR c++/71385 (Internal compiler error when using concept as placeholder)

2017-10-27  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/71385
* g++.dg/concepts/pr71385.C: New.

From-SVN: r254139

re PR c++/80739 (Accessing value of X through a Y glvalue in a constant expression)

2017-10-27  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/80739
* g++.dg/cpp1y/constexpr-80739.C: New.

From-SVN: r254138

Document --coverage and fork-like functions (PR gcov-profile/82457).

2017-10-27  Martin Liska  <mliska@suse.cz>

PR gcov-profile/82457
* doc/invoke.texi: Document that one needs a non-strict ISO mode
for fork-like functions to be properly instrumented.

From-SVN: r254137

re PR middle-end/81659 (ICE in verify_dominators, at dominance.c:1184)

2017-10-27  Richard Biener  <rguenther@suse.de>

PR middle-end/81659
* tree-eh.c (pass_lower_eh_dispatch::execute): Free dominator
info when we redirected EH.

* g++.dg/torture/pr81659.C: New testcase.

From-SVN: r254136

aarch64.md (<optab>_trunc><vf><GPI:mode>2): New pattern.

2017-10-26  Michael Collison  <michael.collison@arm.com>

* config/aarch64/aarch64.md(<optab>_trunc><vf><GPI:mode>2):
New pattern.
(<optab>_trunchf<GPI:mode>2: New pattern.
(<optab>_trunc<vgp><GPI:mode>2: New pattern.
* config/aarch64/iterators.md (wv): New mode attribute.
(vf, VF): New mode attributes.
(vgp, VGP): New mode attributes.
(s): Update attribute with SImode and DImode prefixes.
* testsuite/gcc.target/aarch64/fix_trunc1.c: New testcase.
* testsuite/gcc.target/aarch64/vect-vcvt.c: Fix scan-assembler
directives to allow float or integer destination registers for
fcvtz[su].

From-SVN: r254133

Daily bump.

From-SVN: r254131

Protect more algorithms from overloaded comma operators

* include/bits/stl_algo.h (__find_if_not_n, generate_n): Cast to void
to ensure overloaded comma not used.
* include/bits/stl_algobase.h (__fill_n_a, equal): Likewise.
* include/bits/stl_uninitialized.h (__uninitialized_fill_n)
(__uninitialized_fill_n_a, __uninitialized_default_n_1)
(__uninitialized_default_n_a, __uninitialized_copy_n)
(__uninitialized_copy_n_pair): Likewise
* testsuite/20_util/specialized_algorithms/memory_management_tools/1.cc:
Use test iterator wrappers with overloaded comma operator.
* testsuite/25_algorithms/fill_n/1.cc: Likewise.
* testsuite/25_algorithms/generate_n/1.cc: New test.
* testsuite/25_algorithms/stable_partition/1.cc: New test.
* testsuite/util/testsuite_iterators.h (operator,): Add deleted
non-member comma operator with iterator wrappers as right operand.

From-SVN: r254128

compiler: explicitly convert between type aliases

    Otherwise we can get a crash in the backend.

    Test case is https://golang.org/cl/73790.

    Reviewed-on: https://go-review.googlesource.com/73810

From-SVN: r254126

constraints.md ("S"): Match r0rel_constant_p too.

2017-10-26  Sandra Loosemore  <sandra@codesourcery.com>

gcc/
* config/nios2/constraints.md ("S"): Match r0rel_constant_p too.
* config/nios2/nios2-protos.h (r0rel_constant_p): Declare.
* config/nios2/nios2.c: (nios2_r0rel_sec_regex): New.
(nios2_option_overide): Initialize it.  Don't allow R0-relative
addressing with PIC.
(nios2_rtx_costs): Handle r0rel_constant_p like gprel_constant_p.
(nios2_symbolic_constant_p): Likewise.
(nios2_legitimate_address_p): Likewise.
(nios2_r0rel_section_name_p): New.
(nios2_symbol_ref_in_r0rel_data_p): New.
(nios2_emit_move_sequence): Handle r0rel_constant_p.
(r0rel_constant_p): New.
(nios2_print_operand_address): Handle r0rel_constant_p.
(nios2_cdx_narrow_form_p): Likewise.
* config/nios2/nios2.opt (mr0rel-sec=): New option.
* doc/invoke.texi (Option Summary): Add -mr0rel-sec.
(Nios II Options): Document -mr0rel-sec.

gcc/testsuite/
* gcc.target/nios2/gpopt-r0rel-sec.c: New.

From-SVN: r254124

nios2.c: Include xregex.h.

2017-10-26  Sandra Loosemore  <sandra@codesourcery.com>

gcc/
* config/nios2/nios2.c: Include xregex.h.
(nios2_gprel_sec_regex): New.
(nios2_option_overide): Initialize it.  Don't allow GP-relative
addressing with PIC.
(nios2_small_section_name_p): Check for regex match.
* config/nios2/nios2.opt (mgprel-sec=): New option.
* doc/invoke.texi (Option Summary): Add -mgprel-sec.
(Nios II Options): Document -mgprel-sec.

gcc/testsuite/
* gcc.target/nios2/gpopt-gprel-sec.c: New.

From-SVN: r254123

Fix hyphenation build-time path and install-time path.

gcc/
* doc/invoke.texi (-fdebug-prefix-map): Expand documentation.

From-SVN: r254122

Add some usage info -fdebug-prefix-map= docs.

gcc/
* doc/invoke.texi (-fdebug-prefix-map): Expand documentation.

From-SVN: r254121

Fix unsharing of GIMPLE_OMP_{SINGLE,TARGET,TEAMS} in gimple_copy

2017-10-26  Tom de Vries  <tom@codesourcery.com>

PR tree-optimization/82707
* gimple.c (gimple_copy): Fix unsharing of
GIMPLE_OMP_{SINGLE,TARGET,TEAMS}.

From-SVN: r254120

Adding missing CMP* intrinsics

gcc/
* config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
_mm512_mask_cmpunord_pd_mask, _mm512_cmpeq_ps_mask,
_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
_mm512_mask_cmpunord_ps_mask): New intrinsics.
gcc/testsuite/
* gcc.target/i386/avx512f-vcmpps-1.c (_mm512_cmpeq_ps_mask,
_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
_mm512_mask_cmpunord_ps_mask): Test new intrinsics.
* gcc.target/i386/avx512f-vcmpps-2.c (_mm512_cmpeq_ps_mask,
_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
_mm512_mask_cmpunord_ps_mask): Test new intrinsics.
* gcc.target/i386/avx512f-vcmppd-1.c (_mm512_cmpeq_pd_mask,
_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
_mm512_mask_cmpunord_pd_mask): Test new intrinsics.
* gcc.target/i386/avx512f-vcmppd-2.c (_mm512_cmpeq_pd_mask,
_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
_mm512_mask_cmpunord_pd_mask): Test new intrinsics.

From-SVN: r254118

aix.h (TARGET_IEEEQUAD_DEFAULT): Set long double default to IBM.

[gcc]
2017-10-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/aix.h (TARGET_IEEEQUAD_DEFAULT): Set long double
default to IBM.
* config/rs6000/darwin.h (TARGET_IEEEQUAD_DEFAULT): Likewise.
* config/rs6000/rs6000.opt (-mabi=ieeelongdouble): Move the
warning to rs6000.c.  Remove the Undocumented flag, since it has
been documented.
(-mabi=ibmlongdouble): Likewise.
* config/rs6000/rs6000.c (TARGET_IEEEQUAD_DEFAULT): If it is not
already set, set the default format for long double.
(rs6000_debug_reg_global): Print whether long double is IBM or
IEEE.
(rs6000_option_override_internal): Rework setting long double
format.  Only warn if the user is changing the long double default
and they did not use -Wno-psabi.
* doc/invoke.texi (PowerPC options): Update the documentation for
-mabi=ieeelongdouble and -mabi=ibmlongdouble.

From-SVN: r254116

Add wider_subreg_mode helper functions

This patch adds helper functions that say which of the two modes
involved in a subreg is the larger, preferring the outer mode in
the event of a tie.  It also converts IRA and reload to track modes
instead of byte sizes, since this is slightly more convenient when
variable-sized modes are added later.

2017-10-26  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* rtl.h (wider_subreg_mode): New function.
* ira.h (ira_sort_regnos_for_alter_reg): Take a machine_mode *
rather than an unsigned int *.
* ira-color.c (regno_max_ref_width): Replace with...
(regno_max_ref_mode): ...this new variable.
(coalesced_pseudo_reg_slot_compare): Update accordingly.
Use wider_subreg_mode.
(ira_sort_regnos_for_alter_reg): Likewise.  Take a machine_mode *
rather than an unsigned int *.
* lra-constraints.c (uses_hard_regs_p): Use wider_subreg_mode.
(process_alt_operands): Likewise.
(invariant_p): Likewise.
* lra-spills.c (assign_mem_slot): Likewise.
(add_pseudo_to_slot): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* reload1.c (regno_max_ref_width): Replace with...
(regno_max_ref_mode): ...this new variable.
(reload): Update accordingly.  Update call to
ira_sort_regnos_for_alter_reg.
(alter_reg): Update to use regno_max_ref_mode.  Call wider_subreg_mode.
(init_eliminable_invariants): Update to use regno_max_ref_mode.
(scan_paradoxical_subregs): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254115

Introduce emit_frame_chain

The current frame code combines the separate concepts of a frame chain
(saving old FP,LR in a record and pointing new FP to it) and a frame
pointer used to access locals.  Add emit_frame_chain to the aarch64_frame
descriptor and use it in the prolog and epilog code.  For now just
initialize it as before, so generated code is identical.

Also correctly set EXIT_IGNORE_STACK.  The current AArch64 epilog code
restores SP from FP if alloca is used.  If a frame pointer is used but
there is no alloca, SP must remain valid for the epilog to work correctly.

    gcc/
* config/aarch64/aarch64.h (EXIT_IGNORE_STACK): Set if alloca is used.
(aarch64_frame): Add emit_frame_chain boolean.
* config/aarch64/aarch64.c (aarch64_frame_pointer_required)
Move eh_return case to aarch64_layout_frame.
(aarch64_layout_frame): Initialize emit_frame_chain.
(aarch64_expand_prologue): Use emit_frame_chain.

From-SVN: r254114

Deduction guides for associative containers, debug mode deduction guide fixes.

* include/bits/stl_iterator.h (__iter_key_t)
(__iter_val_t, __iter_to_alloc_t): New.
* include/bits/stl_map.h: Add deduction guides.
* include/bits/stl_multimap.h: Likewise.
* include/bits/stl_multiset.h: Likewise.
* include/bits/stl_set.h: Likewise.
* include/bits/unordered_map.h: Likewise.
* include/bits/unordered_set.h: Likewise.
* include/debug/deque: Likewise.
* include/debug/forward_list: Likewise.
* include/debug/list: Likewise.
* include/debug/map.h: Likewise.
* include/debug/multimap.h: Likewise.
* include/debug/multiset.h: Likewise.
* include/debug/set.h: Likewise.
* include/debug/unordered_map: Likewise.
* include/debug/unordered_set: Likewise.
* include/debug/vector: Likewise.
* testsuite/23_containers/map/cons/deduction.cc: New.
* testsuite/23_containers/multimap/cons/deduction.cc: Likewise.
* testsuite/23_containers/multiset/cons/deduction.cc: Likewise.
* testsuite/23_containers/set/cons/deduction.cc: Likewise.
* testsuite/23_containers/unordered_map/cons/deduction.cc: Likewise.
* testsuite/23_containers/unordered_multimap/cons/deduction.cc:
Likewise.
* testsuite/23_containers/unordered_multiset/cons/deduction.cc:
Likewise.
* testsuite/23_containers/unordered_set/cons/deduction.cc: Likewise.

From-SVN: r254113

Simplify frame layout for stack probing

This patch makes some changes to the frame layout in order to simplify
stack probing.  We want to use the save of LR as a probe in any non-leaf
function.  With shrinkwrapping we may only save LR before a call, so it
is useful to define a fixed location in the callee-saves. So force LR at
the bottom of the callee-saves even with -fomit-frame-pointer.

Also remove a rarely used frame layout that saves the callee-saves first
with -fomit-frame-pointer.  Doing so allows the store of LR to be used as
a valid stack probe in all frames.

    gcc/
* config/aarch64/aarch64.c (aarch64_layout_frame):
        Ensure LR is always stored at the bottom of the callee-saves.
        Remove rarely used frame layout which saves callee-saves at top of
        frame, so the store of LR can be used as a valid probe in all cases.

From-SVN: r254112

Improve addressing of TI/TFmode

In https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong
pointed out some addressing inefficiencies due to a recent change in
regcprop (https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00775.html).

This patch improves aarch64_legitimize_address_displacement to split
unaligned offsets of TImode and TFmode accesses.  The resulting code
is better and no longer relies on the original regcprop optimization.

For the test we now produce:

add x1, sp, 4
stp xzr, xzr, [x1, 24]

rather than:

        mov     x1, sp
        add     x1, x1, 28
        stp     xzr, xzr, [x1]

    gcc/
* config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
Improve unaligned TImode/TFmode base/offset split.

    testsuite/
* gcc.target/aarch64/ldp_stp_unaligned_2.c: New file.

From-SVN: r254111

Make more use of df_read_modify_subreg_p

This patch uses df_read_modify_subreg_p to check whether writing
to a subreg would preserve some of the existing contents.

This has the effect of putting more emphasis on the
REGMODE_NATURAL_SIZE-based definition of whether something can be
partially modified, instead of using UNITS_PER_WORD unconditionally.
This becomes important for SVE, where UNITS_PER_WORD has no
significance for subregs of multi-register LD2/ST2, LD3/ST3 and
LD4/ST4 tuples.

2017-10-26  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* caller-save.c (mark_referenced_regs):  Use read_modify_subreg_p.
* combine.c (find_single_use_1): Likewise.
(expand_field_assignment): Likewise.
(move_deaths): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* rtlanal.c (reg_referenced_p): Likewise.
(covers_regno_no_parallel_p): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254110

Stop print_hex from printing bits above the precision

2017-10-26  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* wide-int-print.cc (print_hex): Loop based on extract_uhwi.
Don't print any bits outside the precision of the value.
* wide-int.cc (test_printing): Add some new tests.

From-SVN: r254109

[obvious][arm testsuite] Fixup expected location in require-pic-register-loc.c

After r254010 we now add -gcolumn-info by default, that means the tests
in gcc.target/arm/require-pic-register-loc.c need adjusting to not expect
to see column zero.

gcc/testsuite/

* gcc.target/arm/require-pic-register-loc.c: Use wider regex for
column information.

From-SVN: r254106

[C++ PATCH] Kill IDENTIFIER_LABEL_VALUE

https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01935.html
* decl.c (sort_labels): Restore function.
(pop_labels): Sort labels
(identify_goto): Add translation markup.

From-SVN: r254104

Use -xbrace_comment=no with recent Solaris/x86 as

* configure.ac (gcc_cv_as_ix86_xbrace_comment): Check if assembler
supports -xbrace_comment option.
* configure: Regenerate.
* config.in: Regenerate.
* config/i386/sol2.h (ASM_XBRACE_COMMENT_SPEC): Define.
(ASM_CPU_SPEC): Use it.

From-SVN: r254103

This patch adds a new hook that gives the preferred alignment for a static rtx...

TARGET_STATIC_RTX_ALIGNMENT

This patch adds a new hook that gives the preferred alignment for
a static rtx, so that we don't need to query the front end in
force_const_mem.

2017-10-26  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* target.def (static_rtx_alignment): New hook.
* targhooks.h (default_static_rtx_alignment): Declare.
* targhooks.c (default_static_rtx_alignment): New function.
* doc/tm.texi.in (TARGET_STATIC_RTX_ALIGNMENT): New hook.
* doc/tm.texi: Regenerate.
* varasm.c (force_const_mem): Use targetm.static_rtx_alignment
instead of targetm.constant_alignment.  Remove call to
set_mem_attributes.
* config/cris/cris.c (TARGET_STATIC_RTX_ALIGNMENT): Redefine.
(cris_preferred_mininum_alignment): New function, split out from...
(cris_constant_alignment): ...here.
(cris_static_rtx_alignment): New function.
* config/i386/i386.c (ix86_static_rtx_alignment): New function,
split out from...
(ix86_constant_alignment): ...here.
(TARGET_STATIC_RTX_ALIGNMENT): Redefine.
* config/mmix/mmix.c (TARGET_STATIC_RTX_ALIGNMENT): Redefine.
(mmix_static_rtx_alignment): New function.
* config/spu/spu.c (spu_static_rtx_alignment): New function.
(TARGET_STATIC_RTX_ALIGNMENT): Redefine.

From-SVN: r254102

2017-10-26  Tamar Christina  <tamar.christina@arm.com>

* gcc.dg/vect/vect-reduc-dot-s8a.c
(dg-additional-options, dg-require-effective-target): Add +dotprod.
* gcc.dg/vect/vect-reduc-dot-u8a.c
(dg-additional-options, dg-require-effective-target): Add +dotprod.

From-SVN: r254101

2017-10-26  Tamar Christina  <tamar.christina@arm.com>

* lib/target-supports.exp
(check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache): New.
(check_effective_target_arm_v8_2a_dotprod_neon_ok): New.
(add_options_for_arm_v8_2a_dotprod_neon): New.
(check_effective_target_arm_v8_2a_dotprod_neon_hw): New.
(check_effective_target_vect_sdot_qi): Add ARM && AArch64.
(check_effective_target_vect_udot_qi): Likewise.
* gcc.target/arm/simd/vdot-exec.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vdot-exec.c: New.
* gcc/doc/sourcebuild.texi: Document arm_v8_2a_dotprod_neon.

From-SVN: r254100

vect-multitypes-1.c: Correct target selector.

2017-10-26  Tamar Christina  <tamar.christina@arm.com>

* gcc.dg/vect/vect-multitypes-1.c: Correct target selector.

From-SVN: r254099

re PR target/81800 (On aarch64 ilp32 lrint should not be inlined as two instructions)

2017-10-26  Tamar Christina  <tamar.christina@arm.com>

PR target/81800
* config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): Add flag_trapping_math
and flag_fp_int_builtin_inexact.

gcc/testsuite/
2017-10-26  Tamar Christina  <tamar.christina@arm.com>

* gcc.target/aarch64/inline-lrint_2.c (dg-options): Add -fno-trapping-math.

From-SVN: r254098

vect-dot-qi.h: New.

2017-10-26  Tamar Christina  <tamar.christina@arm.com>

* gcc.target/aarch64/advsimd-intrinsics/vect-dot-qi.h: New.
* gcc.target/aarch64/advsimd-intrinsics/vdot-compile.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vect-dot-s8.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vect-dot-u8.c: New.

From-SVN: r254097

Daily bump.

From-SVN: r254096

C: detect more missing semicolons (PR c/7356)

c_parser_declaration_or_fndef has logic for parsing what might be
either a declaration or a function definition.

This patch adds a test to detect cases where a semicolon would have
terminated the decls as a declaration, where the token that follows
would start a new declaration specifier, and updates the error message
accordingly, with a fix-it hint.

This addresses PR c/7356, fixing the case of a stray token before a
#include that previously gave inscrutable output, and improving e.g.:

  int i
  int j;

from:

  t.c:2:1: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'int'
   int j;
   ^~~

to:

  t.c:1:6: error: expected ';' before 'int'
   int i
        ^
        ;
   int j;
   ~~~

gcc.dg/noncompile/920923-1.c needs a slight update, as the output for
the first line changes from:

  920923-1.c:2:14: error: expected '=', ',', ';', 'asm' or
  '__attribute__' before 'unsigned'
   typedef BYTE unsigned char; /* { dg-error "expected" } */
                ^~~~~~~~

to:
  920923-1.c:2:13: error: expected ';' before 'unsigned'
   typedef BYTE unsigned char; /* { dg-error "expected" } */
               ^~~~~~~~~
               ;
  920923-1.c:2:1: warning: useless type name in empty declaration
   typedef BYTE unsigned char; /* { dg-error "expected" } */
   ^~~~~~~

The patch also adds a test for PR c/44515 as a baseline.

gcc/c/ChangeLog:
PR c/7356
* c-parser.c (c_parser_declaration_or_fndef): Detect missing
semicolons.

gcc/testsuite/ChangeLog:
PR c/7356
PR c/44515
* c-c++-common/pr44515.c: New test case.
* gcc.dg/pr7356-2.c: New test case.
* gcc.dg/pr7356.c: New test case.
* gcc.dg/spellcheck-typenames.c: Update the "singed" char "TODO"
case to reflect changes to output.
* gcc.dg/noncompile/920923-1.c: Add dg-warning to reflect changes
to output.

From-SVN: r254093

RISC-V: Add Sign/Zero extend patterns for PIC loads

Loads on RISC-V are sign-extending by default, but we weren't telling
GCC this in our PIC load patterns.  This corrects the problem, and adds
a zero-extending pattern as well.

gcc/ChangeLog

2017-10-25  Palmer Dabbelt  <palmer@dabbelt.com>

       * config/riscv/riscv.md (ZERO_EXTEND_LOAD): Define.
       * config/riscv/pic.md (local_pic_load): Rename to local_pic_load_s,
       mark as a sign-extending load.
       (local_pic_load_u): Define.

From-SVN: r254092

Makefile.am (check-go-tool): Output colon after ${fl}.

* Makefile.am (check-go-tool): Output colon after ${fl}.
(check-runtime, check-cgo-test, check-carchive-test): Likewise.
* Makefile.in: Rebuild.

From-SVN: r254090