mesa: add depth_func() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add KHR_no_error support for glFrontFace()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add front_face() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add KHR_no_error support for glCullFace()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add cull_face() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add KHR_no_error support for glCreateShader() and glCreateShaderObjectARB()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: rename create_shader() to create_shader_err()

And add a no_error variant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: pass the 'caller' function to create_shader()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add KHR_no_error support for glAttachShader() and glAttachObjectARB()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: rename attach_shader() to attach_shader_err()

And add a no_error variant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: pass the 'caller' function to attach_shader()

In order to fix GL error messages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mapi: Enable assembly language API acceleration for PPC64LE (V2)

Implement assembly language API acceleration for PPC64LE,
analogous to long-standing implementations for X86 and X86-64.

See also similar implementation in libglvnd.

Tested with Piglit.

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Bill Schmidt <wschmidt@linux.vnet.ibm.com>

i965: Add a RGBX->RGBA fallback for glEGLImageTextureTarget2D()

This enables support for importing RGBX8888 EGLImage textures on
Skylake.

Chrome OS needs support for RGBX8888 EGLImage textures because because
the Android framework produces HAL_PIXEL_FORMAT_RGBX8888 winsys
surfaces, which the Chrome OS compositor consumes as dma_bufs.  On
hardware for which RGBX is unsupported or disabled, normally core Mesa
provides the RGBX->RGBA fallback during glTexStorage.  But the DRIimage
code bypasses core Mesa, so we must do the fallback in i965.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Add _mesa_format_fallback_rgbx_to_rgba() [v2]

The new function takes a mesa_format and, if the format is an alpha
format with a non-alpha variant, returns the non-alpha format.
Otherwise, it returns the original format.

Example:
  input -> output

  // Fallback exists
  MESA_FORMAT_R8G8B8X8_UNORM -> MESA_FORMAT_R8G8B8A8_UNORM
  MESA_FORMAT_RGBX_UNORM16 -> MESA_FORMAT_RGBA_UNORM16

  // No fallback
  MESA_FORMAT_R8G8B8A8_UNORM -> MESA_FORMAT_R8G8B8A8_UNORM
  MESA_FORMAT_Z_FLOAT32 -> MESA_FORMAT_Z_FLOAT32

i965 will use this for EGLImages and DRIimages.

v2 (Jason Ekstrand):
 - Use mako
 - Rework to be easier to read
 - Write directly to the output file

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radeonsi: move instance divisors into a constant buffer

Shader key size: 107 -> 47

Divisors of 0 and 1 are encoded in the shader key. Greater instance divisors
are loaded from a constant buffer.

The shader code doing the division is huge. Is it something we need to
worry about? Does any app use instance divisors >= 2?

VS prolog disassembly:
    s_load_dwordx4 s[12:15], s[0:1], 0x80  ; C00A0300 00000080
    s_nop 0                                ; BF800000
    s_waitcnt lgkmcnt(0)                   ; BF8C007F
    s_buffer_load_dword s14, s[12:15], 0x4 ; C0220386 00000004
    s_waitcnt lgkmcnt(0)                   ; BF8C007F
    v_cvt_f32_u32_e32 v4, s14              ; 7E080C0E
    v_rcp_iflag_f32_e32 v4, v4             ; 7E084704
    v_mul_f32_e32 v4, 0x4f800000, v4       ; 0A0808FF 4F800000
    v_cvt_u32_f32_e32 v4, v4               ; 7E080F04
    v_mul_hi_u32 v5, v4, s14               ; D2860005 00001D04
    v_mul_lo_i32 v6, v4, s14               ; D2850006 00001D04
    v_cmp_eq_u32_e64 s[12:13], 0, v5       ; D0CA000C 00020A80
    v_sub_i32_e32 v5, vcc, 0, v6           ; 340A0C80
    v_cndmask_b32_e64 v5, v6, v5, s[12:13] ; D1000005 00320B06
    v_mul_hi_u32 v5, v5, v4                ; D2860005 00020905
    v_add_i32_e32 v6, vcc, v5, v4          ; 320C0905
    v_subrev_i32_e32 v4, vcc, v5, v4       ; 36080905
    v_cndmask_b32_e64 v4, v4, v6, s[12:13] ; D1000004 00320D04
    v_mul_hi_u32 v5, v4, v1                ; D2860005 00020304
    v_add_i32_e32 v4, vcc, s8, v0          ; 32080008
    v_mul_lo_i32 v6, v5, s14               ; D2850006 00001D05
    v_add_i32_e32 v7, vcc, 1, v5           ; 320E0A81
    v_cmp_ge_u32_e64 s[12:13], v1, v6      ; D0CE000C 00020D01
    v_sub_i32_e32 v6, vcc, v1, v6          ; 340C0D01
    v_cmp_le_u32_e32 vcc, s14, v6          ; 7D960C0E
    v_cndmask_b32_e64 v8, 0, -1, s[12:13]  ; D1000008 00318280
    v_cndmask_b32_e64 v6, 0, -1, vcc       ; D1000006 01A98280
    v_and_b32_e32 v6, v8, v6               ; 260C0D08
    v_cmp_eq_u32_e32 vcc, 0, v6            ; 7D940C80
    v_cndmask_b32_e32 v6, v7, v5, vcc      ; 000C0B07
    v_add_i32_e32 v5, vcc, -1, v5          ; 320A0AC1
    v_cmp_eq_u32_e32 vcc, 0, v8            ; 7D941080
    v_cndmask_b32_e32 v5, v6, v5, vcc      ; 000A0B06
    v_add_i32_e32 v5, vcc, s9, v5          ; 320A0A09

v2: set prefer_mono for fetched instance divisors

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: check nr_cbufs in other places before flushing CB

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use #pragma pack to pack si_shader_key

sizeof(struct si_shader_key):
  Before reverting the 2 commits: 120 bytes
  After reverting the 2 commits: 128 bytes
  With #pragma pack: 107 bytes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

Revert "radeonsi: use uint32_t to declare si_shader_key.opt.kill_outputs"

This reverts commit 7b2240ac9ce3ba9bd86f4ae8aac53af8878c0b10.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

Revert "radeonsi: remove 8 bytes from si_shader_key with uint32_t ff_tcs_inputs_to_copy"

This reverts commit 6b6fed3a3c81c2b0d319ef121df20a0dc914705f.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: optimize GL_PRIMITIVE_RESTART_NV more

And other client state changes don't have to call
update_derived_primitive_restart_state.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: fix clip plane enable breakage

Broken by:

commit 00173d91b70ae4dcea7c6324ee4858c498cae14b
Author: Marek Olšák <marek.olsak@amd.com>
Date:   Sat Jun 10 12:09:43 2017 +0200

    mesa: don't flag _NEW_TRANSFORM for st/mesa if possible

It also optimizes the case slightly for GL core.

It doesn't try to fix that glEnable might be a bad place to do the
clip plane transformation.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

radeon/vcn: enable h264 decode entension support

It's enabled through message buffer for UVD

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

svga: clean up format_cap_table

Per Jose's suggestion, this patch cleans up format_cap_table to remove
the unnecessary default cap value for vgpu10 formats since those devcap values
can be retrieved from the device.

Tested with MTT conform, glretrace, piglit in HWv13 and HWv8.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

svga: fix the default devcap for SVGA3D_Z_D24S8_INT

The default devcap for format SVGA3D_Z_D24S8_INT in HWv8 when its devcap is
not explicitly advertised should be set to zero to match the default value
in the device.

Tested with MTT piglit in HW version 8.

Reviewed-by: Neha Bhende <bhenden@vmware.com>

svga: create buffer surfaces for incompatible bind flags

In cases where certain bind flags cannot be enabled together,
such as CONSTANT_BUFFER cannot be combined with any other flags,
a separate host surface will be created.
For example, if a stream output buffer is reused as a constant buffer,
two host surfaces will be created, one for stream output,
and another one for constant buffer. Data will be copied from the
stream output surface to the constant buffer surface.

Fixes piglit test ext_transform_feedback-immediate-reuse-index-buffer,
                  ext_transform_feedback-immediate-reuse-uniform-buffer

Tested with MTT piglit, MTT glretrace, Nature, NobelClinician Viewer, Tropics.

v2: Fix bind flags compatibility check as suggested by Brian.
v3: Use the list utility to maintain the buffer surface list.
v4: Use the SAFE rev of LIST_FOR_EACH_ENTRY

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

svga: do not unconditionally enable streamout bind flag

Currently we unconditionally enable streamout bind flag at
buffer resource creation time. This is not necessary if the buffer
is never used as a streamout buffer. With this patch, we enable
streamout bind flag as indicated by the state tracker. If the buffer
is later bound to streamout and does not already has streamout bind
flag enabled, we will recreate the buffer with
the new set of bind flags. Buffer content will be copied
from the old buffer to the new one.

Tested with MTT piglit, Nature, Tropics, Lightsmark.

v2: Fix bind flags check as suggested by Brian.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

svga: pass tobind_flags to svga_buffer_handle

This is to prepare for more bind_flags optimization
in subsequent patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

svga: pass bind_flags to surface create functions

This is to prepare for other bind_flags optimization
in subsequent patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

pipe_loader_sw: fix compilation warning

Add the new 'flags' parameter to pipe_loader_sw_create_screen().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: add missing include

src/mesa/drivers/x11/xm_dd.c:688:7: warning: implicit declaration of function ‘_mesa_update_draw_buffer_bounds’; did you mean ‘_mesa_has_ARB_draw_buffers_blend’? [-Wimplicit-function-declaration]
       _mesa_update_draw_buffer_bounds(ctx, ctx->DrawBuffer);
       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Cc: Marek Olšák <marek.olsak@amd.com>
Fixes: 585c5cf8a514783d9ed3 ("mesa: don't update draw buffer bounds in
      _mesa_update_state")
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>

i965: perf: add support for Geminilake

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>

i965: perf: add support for Kabylake

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>

i965: perf: use gen_device_info rather then brw_context

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: perf: ensure isolated timer reports while idle don't confuse filtering

From experimentation in IGT, we found that the OA unit might label
some report as "idle" (using an invalid context ID), right after a
report for a given context. Deltas generated by those reports actually
belong to the previous context, even though they're not labelled as
such.

This change makes ensure that while reading OA reports, we only
consider the GPU actually idle after 2 reports with an invalid context
ID.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: perf: keep on reading reports until delimiting timestamp

Due to an underlying hardware race condition, we have no guarantee
that all the reports coming from the OA buffer related to the workload
we're trying to measure have landed to memory by the time all the work
submitted has completed. That means we need to keep on reading the OA
stream until we read a report with a timestamp more recent than the
timestamp recored by the MI_REPORT_PERF_COUNT at the end of the
performance query.

v2: fix uninitialized offset variable to 0 (Lionel)

v3: rework the reading to avoid blocking the user of the API unless
    requested (Rob)

v4: fix a bug that makes the i965 driver reading the perf stream when
    not necessary, leading to very long counter accumulation times
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add Gen8+ INTEL_performance_query support

Enables access to OA unit metrics on Gen8+ via INTEL_performance_query.

v2: make use of new parameters coming from gen_device_info (Lionel)

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add XML OA metric sets for Gen8+

Also updates Makefile.am to generate corresponding normalization code.

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add Gen8+ sys_vars for generated OA code

In preparation for adding XML OA metric set descriptions for Gen 8 and 9
which will result in auto generated code that depends on a number of new
system variables ($EuSubslicesTotalCount, $EuThreadsCount and
$SliceMask) this adds corresponding members to brw->perf.sys_vars.

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv/i965: drop libdrm_intel dependency completely

With Ken's work to drop the library dependency on libdrm_intel, we now
only depend on libdrm for the kernel uapi headers it provides. It
seems like we're better off just embeddeding those headers ourselves,
making the lives of people developping news features tightly
integrated with the kernel a tiny bit easier.

This change also makes it a bit more obvious what cflags/libs are
required by the i915 drivers vs i965, by renaming INTEL_CFLAGS/LIBS
into I915_CFLAGS/LIBS.

Headers were generated from drm-tip on the following commit :

   commit 6d61e70ccc21606ffb8a0a03bd3aba24f659502b
   Merge: 338ffbf7cb5e c0bc126f97fb
   Author: Dave Airlie <airlied@redhat.com>
   Date:   Tue Jun 27 07:24:49 2017 +1000

       Backmerge tag 'v4.12-rc7' into drm-next

v2: Use installed files from the kernel (Daniel Vetter)

v3: Use headers from drm-next rather than drm-tip (Dave/Daniel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i915: use different CFLAGS/LIBS variables than i965/anv

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

aubinator: import intel_aub.h from libdrm

This enables us to compile aubinator without the libdrm dependency.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: perf: minimize the chances to spread queries across batchbuffers

Counter related to timings will be sensitive to any delay introduced
by the software. In particular if our begin & end of performance
queries end up in different batches, time related counters will
exhibit biffer values caused by the time it takes for the kernel
driver to load new requests into the hardware.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>

nir: implement GLSL.std.450 NMax, NMIn and NClamp operations

v2: NIR fmax/fmin already handles NaN (Connor).

Reviewed by: Elie Tournier <elie.tournier@collabora.com>

nir: add support for 64-bit in SmoothStep function

According to GLSL.std.450 spec, SmoothStep expects input to be a
floating-point type, but it does not restrict the bitsize.

Current implementation relies on inputs to be 32-bit.

This commit extends the support to 64-bit size inputs.

Reviewed by: Elie Tournier <elie.tournier@collabora.com>

nir: sge operation is defined for floating-point types

According to GLSL.std.450 spec, the operand for step() function must be
a floating-point. It does not restrict the value to 32-bit floats.

Reviewed by: Elie Tournier <elie.tournier@collabora.com>

i965: Separate gen < 8 and gen >= 8 paths explicitly in wrap_mode()

Makes coverity happier.

Fix indentation in gen >= 8 block while at it.

CID: 1413020
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

intel/anv: Add missing break in anv_CreateDevice()

CID: 1413018
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

ac/nir: convert emit helpers to ac_llvm_context

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/nir: remove unused nir_to_llvm_context::has_ddxy

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/nir: implement nir_op_f2b

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/nir: implement nir_op_{b2i,i2b}

Booleans in NIR are ~0 for true, b2i returns 0/1.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/nir: convert type helpers to ac_llvm_context

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/llvm: fix type of second llvm.cttz.* parameter

LLVM has required an i1 here for a long time. llvm.ctlz.* was fixed in
commit edd23e06067 ("ac/llvm: fix various findMSB bugs").

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/shader_info: fix a comment

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac: add ac_llvm_context::v8i32

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac: add ac_llvm_context::{i,f}32_{0,1}

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac: add ac_llvm_context::{i16, i64, f16, f64}

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

nv50/ir: fix combineLd/St to update existing records as necessary

Previously the logic would decide that the record is kept, which
translates into keep = false in the caller, which meant that these
passes did not run.

While it's right that keep = false which means that a new record does
not need to be added, we do still have to perform the usual list
maintenance. It's easiest to do this pre-merge rather than post.

The lowering that clip/cull distance passes produce triggers this bug in
TCS (since reading outputs is done differently in other stages), but it
should be possible to achieve it with the right sequence of regular
reads/writes.

Fixes: KHR-GL45.cull_distance.functional
Fixes: generated_tests/spec/arb_tessellation_shader/execution/tes-input/tes-input-gl_ClipDistance.shader_test
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

nv50/ir: adjust overlapping logic to take fileIndex-relative offsets

If the fileIndex is different, that means they are in logically
different spaces. However if there's also a relative offset, then they
could end up pointing at the same spot again.

Also add a note about potential for multiple buffers to overlap even if
they're at different file indexes. However that's potentially lowered
away by the point that this logic hits.

Not known to fix any specific application or test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nv50/ir: VFETCH is also considered a load for MemoryOpt

This has no effect since in practice this will only play for
memory-backed files, for which VFETCH will never happen.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clear

The idxbuf could linger, and when a clear happened, which also uses the
3d bufctx, we could get an error trying to access it.

This fixes spurious crashes/errors in CTS tests.

Fixes: 61d8f3387d ("nv50,nvc0: clear index buffer bufctx bin unconditionally")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

nv50/ir: fetch indirect sources BEFORE the op that uses them

All the BuildUtil helpers just insert the operation into the current BB.
So we have to take care that any fetchSrc() operations happen before the
operation whose setIndirect() it goes into.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

mesa: skip FLUSH_VERTICES() if no samplers were changed

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: don't set _NEW_PROGRAM_CONSTANTS for non-bindless opaque uniforms

v2: rebase on new _mesa_flush_vertices_for_uniforms() helper

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Android: add renderonly files to libmesa_gallium

vc4 now depends on renderonly functions, but these weren't added to the
Android build resulting in the following errors:

src/gallium/drivers/vc4/vc4_resource.c:380: error: undefined reference to 'renderonly_scanout_destroy'
src/gallium/drivers/vc4/vc4_resource.c:681: error: undefined reference to 'renderonly_create_gpu_import_for_resource'
src/gallium/drivers/vc4/vc4_screen.c:625: error: undefined reference to 'renderonly_dup'
src/gallium/winsys/pl111/drm/pl111_drm_winsys.c:37: error: undefined reference to 'renderonly_create_gpu_import_for_resource'
src/gallium/winsys/pl111/drm/pl111_drm_winsys.c:37: error: undefined reference to 'renderonly_create_gpu_import_for_resource'

Fixes: 7029ec05e2c7 ("gallium: Add renderonly-based support for pl111+vc4.")
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: add KHR_no_error support for glCopyTexImage*D()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: add no error support to copyteximage()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: create copyteximage_err() helper and always inline copyteximage()

This will be useful in the following patch when we add KHR_no_error
support.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: tidy up copyteximage()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

i915: On Gen <= 3 there are no array textures

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

i915: On Gen <= 3 there is no W-tiling

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

i915: Remove unused fields intel_mipmap_tree::logical_(width|height|depth)0

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

i915: Remove unused field intel_mipmap_tree::array_spacing_lod0

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

i915: On Gen <= 3 there is no multisampling

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

i915: Trivial code reformatting

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

i915,i965: Don't condition use of GLSL clear on the current API

Meta always sets the API to API_OPENGL_COMPAT, so the current API
setting is irrelevant.

   text    data     bss     dec     hex filename
7154994  256860   37332 7449186  71aa62 32-bit i965_dri.so before
7154978  256860   37332 7449170  71aa52 32-bit i965_dri.so after
6788451  328056   50704 7167211  6d5ceb 64-bit i965_dri.so before
6788419  328056   50704 7167179  6d5ccb 64-bit i965_dri.so after

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

mesa: add KHR_no_error support for glCopyTex{ture}SubImage*D()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: add copy_texture_sub_image_no_error() helper

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: remove redundant NULL check

This can never be NULL in any of the entry paths.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: create copy_texture_sub_image_err() helper

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: make _mesa_copy_texture_sub_image() static

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: add KHR_no_error support for gl{Compressed}TexImage*D()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: add no error support to teximage()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: create wrapper around teximage()

This is used to inline KHR_no_error logic without inlining
the function into all its callers.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: fix unused variable warning in release builds

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radeonsi: don't flush and wait for CB after depth-only rendering

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

blorp: Use normalized coordinates on Gen6

Apparently, the sampler has some sort of precision issues for
non-normalized texture coordinates with linear filtering.  This caused
some small precision issues in scaled blits.  Work around this by using
normalized coordinates.  There is some extra work necessary because Gen6
uses TEX (instead of TXF) for some multisample resolve blits.

Fixes piglit.spec.arb_framebuffer_object.fbo-blit-stretch on SNB.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68365
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>

mesa/glthread: don't include pthread.h

Not needed. This fixes the Windows build.

anv/gpu_memcpy: Rename the gpu_memcpy function

A GPU memcpy function could alternatively be implemented using MI_*
commands. Provide more detail into how this one operates in case another
memcpy function is created.

v2:
- Update the commit message.
v3:
- Use 'memcpy' instead of 'cpy' (Jason Ekstrand)
- Shorten 'streamout' to 'so'

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/blorp: Provide surface states for CCS resolves

In the future, we plan on using this method to resolve images whose
surface state fast-clear value is dynamically updated during command
buffer execution. Start using it now for testing and to reduce churn
later on.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/blorp: Add a surface-state-based CCS resolve function

This will be used in the next patch.

v2:
- Omit BLORP_BATCH_NO_EMIT_DEPTH_STENCIL (Jason Ekstrand)
- Update commit message.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

blorp/clear: Add a binding-table-based CCS resolve function

v2:
- Do layered resolves.
(Jason Ekstrand):
- Replace "bt" suffix with "attachment".
- Rename helper function to prepare_ccs_resolve.
- Move blorp_params_init() into helper function.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Adjust params of color buffer transitioning functions

Splitting out these fields will make the color buffer transitioning
function simpler when it gains more features.

v2: Remove unintended blank line (Iago Toral)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/blorp: Remove 3D subresource transition workaround

For 3D image subresources undergoing a layout transition via
PipelineBarrier, we increase the number of fast-cleared layers to match
the intended behaviour of KHR_maintenance1. When such subresources
undergo layout transitions between subpasses, we don't do this to avoid
failing incorrect CTS tests. Instead, unify the behaviour in both
scenarios, and wait for the CTS tests to catch up. See CL 1111 for the
test fix and Vulkan issue #849 for more information.

On SKL+, this causes 3 test failures under:
dEQP-VK.pipeline.render_to_image.3d.*

v2: Add a reference to the Vulkan issue (Iago Toral).

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/cmd_buffer: Adjust the image view reloc function

Make the function take in an image instead of an image view. This
enables us to record relocations for surfaces states created outside of
the anv_CreateImageView path.

v2 (Jason Ekstrand):
- Use image->offset instead of surf_offset in aux_offset calculation.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/cmd_buffer: Adjust layout transition aspect checking

Reflect the fact that an image view or subresource range with the color
aspect cannot have any other aspect.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Add and use color auxiliary buffer helpers

v2:
- Check for aux levels in layer helper (Jason Ekstrand)
- Don't assert aux is present, return 0 if it isn't.
- Use the helpers.
v3:
- Make the helpers aspect-agnostic (Jason Ekstrand)
- Drop anv_image_has_color_aux()

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel/isl: Only create a CCS buffer if the image supports rendering

v2: Omit the commit message.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel/isl: Limit CCS to one level and layer on gen7

v2 (Jason Ekstrand):
- Remove Vulkan-specific terminology from the commit title.
- Replace '== 7' with '<= 7' to hint that this is a new feature on BDW+.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel/blorp: Check for layer fast-clear restriction

v2: Update commit title (Jason Ekstrand)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>