Add function_abi.{h,cc}

This patch adds new structures and functions for handling
multiple ABIs in a translation unit.  The structures are:

- predefined_function_abi: describes a static, predefined ABI
- function_abi: describes either a predefined ABI or a local
  variant of one (e.g. taking -fipa-ra into account)

The patch adds functions for getting the ABI from a given type
or decl; a later patch will also add a function for getting the
ABI of the target of a call insn.

Although ABIs are about much more than call-clobber/saved choices,
I wanted to keep the name general in case we add more ABI-related
information in future.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* Makefile.in (OBJS): Add function-abi.o.
(GTFILES): Add function-abi.h.
* function-abi.cc: New file.
* function-abi.h: Likewise.
* emit-rtl.h (rtl_data::abi): New field.
* function.c: Include function-abi.h.
(prepare_function_start): Initialize crtl->abi.
* read-rtl-function.c: Include regs.h and function-abi.h.
(read_rtl_function_body): Initialize crtl->abi.
(read_rtl_function_body_from_file_range): Likewise.
* reginfo.c: Include function-abi.h.
(init_reg_sets_1): Initialize default_function_abi.
(globalize_reg): Call add_full_reg_clobber for each predefined ABI
when making a register global.
* target-globals.h (this_target_function_abi_info): Declare.
(target_globals::function_abi_info): New field.
(restore_target_globals): Copy it.
* target-globals.c: Include function-abi.h.
(default_target_globals): Initialize the function_abi_info field.
(target_globals): Allocate it.
(save_target_globals): Free it.

From-SVN: r276307

Fix compile time warning about building the FRV backend by adding missing break statements to the switches in frv_register_move_cost.

PR target/85978
* config/frv/frv.c (frv_register_move_cost): Add break statements
to avoid falling through to the wrong cases.  Tidy code.

From-SVN: r276306

[AArch64] Strengthen aarch64_hard_regno_call_part_clobbered

The aarch64_vector_pcs handling in aarch64_hard_regno_call_part_clobbered
checks whether the mode might be bigger than 16 bytes, since on SVE
targets the (non-SVE) vector PCS only guarantees that the low 16 bytes
are preserved.  But for multi-register modes, we should instead test
whether each single-register part might be bigger than 16 bytes.
(The size is always divided evenly between registers.)

The testcase uses XImode as an example where this helps.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
For multi-registers modes, test how big each register part is.

gcc/testsuite/
* gcc.target/aarch64/torture/simd-abi-8.c: New test.

From-SVN: r276305

Remove the iq2000_select_section function the iq2000 backend - it never provided any useful functionality.

PR target/59205
* config/iq2000/iq2000.c (iq2000_select_section): Delete.
(TARGET_ASM_SELECT_SECTION): Remove definition.
(TARGET_HAVE_SWITCHABLE_BSS_SECTIONS): Allow definition.

From-SVN: r276304

Introduce rtx_alloca, alloca_raw_REG and alloca_rtx_fmt_*

When one passes short-lived fake rtxes to backends in order to test
their capabilities, it might be beneficial to allocate these rtxes on
stack in order to reduce the load on GC.

Provide macro counterparts of some of the gen_* functions for that
purpose.

gcc/ChangeLog:

2019-09-30  Ilya Leoshkevich  <iii@linux.ibm.com>

* emit-rtl.c (init_raw_REG): New function.
(gen_raw_REG): Use init_raw_REG.
* gengenrtl.c (gendef): Emit init_* functions and alloca_*
macros.
* rtl.c (rtx_alloc_stat_v): Use rtx_init.
* rtl.h (rtx_init): New function.
(rtx_alloca): New function.
(init_raw_REG): New function.
(alloca_raw_REG): New macro.

From-SVN: r276303

[C] Print ", ..." rather than ",  ..." in diagnostics

pp_separate_with inserts a space after the separator, so there's
no need to add whitespace before "..." as well.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/c-family/
* c-pretty-print.c (pp_c_parameter_type_list): Avoid printing
two spaces between a comma and "...".

gcc/testsuite/
* gcc.dg/Wincompatible-pointer-types-1.c (f1): Expect only one
space between the comma and "...".

From-SVN: r276302

libgomp_g.h: Include stdint.h instead of gstdint.h.

2019-09-30  Kwok Cheung Yeung  <kcy@codesourcery.com>

        * libgomp_g.h: Include stdint.h instead of gstdint.h.

From-SVN: r276301

Add initial support for prefixed/PC-relative addressing.

2019-09-30  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/predicates.md (pcrel_address): Delete predicate.
(pcrel_local_address): Replace pcrel_address predicate, use the
new function address_to_insn_form.
(pcrel_external_address): Replace with new implementation using
address_to_insn_form..
(prefixed_mem_operand): Delete predicate which is now unused.
(pcrel_external_mem_operand): Delete predicate which is now
unused.
* config/rs6000/rs6000-protos.h (enum insn_form): New
enumeration.
(enum non_prefixed): New enumeration.
(address_to_insn_form): New declaration.
(prefixed_load_p): New declaration.
(prefixed_store_p): New declaration.
(prefixed_paddi_p): New declaration.
(rs6000_asm_output_opcode): New declaration.
(rs6000_final_prescan_insn): Move declaration and update calling
signature.
(address_is_prefixed): New helper inline function.
* config/rs6000/rs6000.c(print_operand_address): Check for either
PC-relative local symbols or PC-relative external symbols.
(rs6000_emit_move): Support loading PC-relative addresses.
(mode_supports_prefixed_address_p): Delete, no longer used.
(rs6000_prefixed_address_mode_p): Delete, no longer used.
(address_to_insn_form): New function to decode an address format.
(reg_to_non_prefixed): New function to identify what the
non-prefixed memory instruction format is for a register.
(prefixed_load_p): New function to identify prefixed loads.
(prefixed_store_p): New function to identify prefixed stores.
(prefixed_paddi_p): New function to identify prefixed load
immediates.
(next_insn_prefixed_p): New static state variable.
(rs6000_final_prescan_insn): New function to determine if an insn
uses a prefixed instruction.
(rs6000_asm_output_opcode): New function to emit 'p' in front of a
prefixed instruction.
* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): New target hook.
(ASM_OUTPUT_OPCODE): New target hook.
* config/rs6000/rs6000.md (prefixed): New insn attribute for
prefixed instructions.
(prefixed_length): New insn attribute for the size of prefixed
instructions.
(non_prefixed_length): New insn attribute for the size of
non-prefixed instructions.
(pcrel_local_addr): New insn to load up a local PC-relative
address.
(pcrel_extern_addr): New insn to load up an external PC-relative
address.
(mov<mode>_64bit_dm): Split the alternatives for loading 0.0 to a
GPR and loading a 128-bit floating point type to a GPR.

From-SVN: r276300

gimple.c (gimple_get_lhs): For PHIs return the result.

2019-09-30  Richard Biener  <rguenther@suse.de>

* gimple.c (gimple_get_lhs): For PHIs return the result.
* tree-vectorizer.h (vectorizable_live_operation): Also get the
SLP instance as argument.
* tree-vect-loop.c (vect_analyze_loop_operations): Also handle
double-reduction PHIs with vectorizable_lc_phi.
(vect_analyze_loop_operations): Adjust.
(vect_create_epilog_for_reduction): Remove all code not dealing
with reduction LC PHI or epilogue generation.
(vectorizable_live_operation): Call vect_create_epilog_for_reduction
for live stmts of reductions.
* tree-vect-stmts.c (vectorizable_condition): When !for_reduction
do not handle defs that are not vect_internal_def.
(can_vectorize_live_stmts): Adjust.
(vect_analyze_stmt): When the vectorized stmt defined a value
used on backedges adjust the backedge uses of vectorized PHIs.

From-SVN: r276299

Implement LWG 3255 for std::span constructors

Also fix the constraints on span(Container&) and span(const Container&)
constructors so that they aren't used for const spans or const arrays.

* include/std/span (span(element_type(&)[N]))
(span(array<value_type, N>&), span(const array<value_type, N>&)):
Deduce array element type to allow safe const conversions (LWG 3255).
[!_GLIBCXX_P1394] (span(Container&), span(const Container&)): Use
remove_cv_t on arguments to __is_std_span and __is_std_array.
* testsuite/23_containers/span/lwg3255.cc: New test.

From-SVN: r276298

PR libstdc++/77936 remove unused variable

PR libstdc++/77936
* include/parallel/checkers.h (__is_sorted): Remove unused variable.

From-SVN: r276297

[PR 91853] Prevent IPA-SRA ICEs on type-mismatched calls

2019-09-30  Martin Jambor  <mjambor@suse.cz>

PR ipa/91853
* tree-inline.c (force_value_to_type): New function.
(setup_one_parameter): Use force_value_to_type to convert type.
* tree-inline.c (force_value_to_type): Declare.
* ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Deal
with register type mismatches.

testsuite/
* gcc.dg/ipa/pr91853.c: New test.

From-SVN: r276296

config.gcc: Use the secure-plt on FreeBSD 13 and upwards for 32-bit PowerPC.

2019-09-30  Andreas Tobler  <andreast@gcc.gnu.org>

* config.gcc: Use the secure-plt on FreeBSD 13 and upwards for
32-bit PowerPC.
Define TARGET_FREEBSD32_SECURE_PLT for 64-bit PowerPC.
* config/rs6000/t-freebsd64: Make use of the above define and build
the 32-bit libraries with secure-plt.

From-SVN: r276295

re PR target/91931 (ICE in decompose, at rtl.h:2277)

PR target/91931
* config/i386/i386-expand.c (ix86_expand_adjust_ufix_to_sfix_si): Use
gen_int_mode instead of GEN_INT.

* gcc.target/i386/pr91931.c: New test.

From-SVN: r276294

Daily bump.

From-SVN: r276276

re PR fortran/91641 (ICE in gfc_conv_is_contiguous_expr, at fortran/trans-intrinsic.c:2857)

2019-09-29  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91641
* check.c (gfc_check_is_contiguous): null() cannot be an actual
argument to is_contiguous().

2019-09-29  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91641
* gfortran.dg/pr91641.f90: New test.

From-SVN: r276272

[Darwin, PPC, Mode Iterators 5/n] Update macho_low.

Replace the define_expand and two define_insns with a single
@macho_low_<mode> and update callers.

gcc/ChangeLog:

2019-09-29  Iain Sandoe  <iain@sandoe.co.uk>

* config/darwin.c (gen_macho_low):Amend to include the mode
argument.
(machopic_indirect_data_reference): Amend gen_macho_low call
to include mode argument
* config/rs6000/rs6000.c (emit_move): Likewise. Amend a comment.
* config/rs6000/darwin.md (@macho_low_<mode>): New, replaces
the macho_high expander and two define_insn entries.

From-SVN: r276271

re PR fortran/91714 (Accepts type statement without delimiter in free form)

2019-09-29  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91714
* decl.c (gfc_match_decl_type_spec):  Issue errors for a few
mangled types.

2019-09-29  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91714
* gfortran.dg/dec_type_print_3.f90: Update dg-error regex.
* gfortran.dg/pr91714.f90: New test.

From-SVN: r276270

re PR fortran/91726 (ICE in gfc_conv_array_ref, at fortran/trans-array.c:3612)

2019-09-29  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/91726
* resolve.c (gfc_expr_to_initialize): Bail out with a copy of
the original expression if the array ref is a scalar and the
array_spec has corank.
* trans-array.c (gfc_conv_array_ref): Such expressions are OK
even if the array ref codimen is zero.
* trans-expr.c (gfc_get_class_from_expr): New function taken
from gfc_get_vptr_from_expr.
(gfc_get_vptr_from_expr): Call new function.
* trans-stmt.c (trans_associate_var): If one of these is a
target expression, extract the class expression from the target
and copy its fields to a new target variable.
* trans.h : Add prototype for gfc_get_class_from_expr.

2019-09-29  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/91726
* gfortran.dg/coarray_poly_9.f90 : New test.

From-SVN: r276269

re PR bootstrap/90543 (Build failure on MINGW for gcc-9.1.0)

PR bootstrap/90543
* optc-save-gen.awk: Fix up printing string option differences.

From-SVN: r276268

vec_perm cost to 1 for non-Power7 VSX architectures

gcc/ChangeLog

2019-09-29  Kewen Lin  <linkw@gcc.gnu.org>

    * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Lower
    vec_perm cost to 1 for non-Power7 VSX architectures.

From-SVN: r276267

This patch is to add the support for float from/to long conversion
vectorization on port rs6000.

gcc/ChangeLog

2019-09-29  Kewen Lin  <linkw@gcc.gnu.org>

    * config/rs6000/vsx.md (vec_pack[su]_float_v2di): New define_expand.
    (vec_unpack_[su]fix_trunc_hi_v4sf): Likewise.
    (vec_unpack_[su]fix_trunc_lo_v4sf): Likewise.

gcc/testsuite/ChangeLog

2019-09-29  Kewen Lin  <linkw@gcc.gnu.org>

    * gcc.target/powerpc/conv-vectorize-1.c: New test.
    * gcc.target/powerpc/conv-vectorize-2.c: New test.

From-SVN: r276266

re PR fortran/91802 (ICE in mio_name_expr_t, at fortran/module.c:2141)

2019-09-28  Jerry DeLisle  <jvdelisle@gcc.ngu.org>

PR fortran/91802
* decl.c (attr_decl1): Return MATCH_ERROR without free to avoid
bad expression type in free_expr0() ICE in rank+corank check.

From-SVN: r276265

Daily bump.

From-SVN: r276264

stl_algo.h (merge): Fix documentation.

2019-09-28  François Dumont  <fdumont@gcc.gnu.org>

* include/bits/stl_algo.h (merge): Fix documentation.
* include/debug/functions.h (__check_sorted_aux): Add C++20 constexpr.
(__check_sorted): Likewise and remove nested irreflexive check.
(__check_sorted_set_aux, __check_sorted_set): Add C++20 constexpr.
(__check_partitioned_lower, __check_partitioned_upper): Likewise.
(_Irreflexive_checker::_S_is_valid): Likewise.
(__is_irreflexive, __is_irreflexive_pred): Likewise.
* include/debug/helper_functions.h (__get_distance): Add constexpr.
(__valid_range_aux): Add C++20 constexpr.
(__valid_range(_Iter, _Iter, _Distance_traits<_Iter>::__type&)):
Likewise and add std::is_constant_evaluated check.
(__valid_range_aux(_Iter, _Iter, std::input_iterator_tag)): New.
(__valid_range_aux(_Iter, _Iter, std::random_accss_iterator_tag)): New.
(__valid_range_aux(_Integral, _Integral, std::__true_type)): New,
use latter.
(__valid_range(_Iter, _Iter)): Adapt to use latter, add constexpr and
__builtin_is_contant_evaludated check..
(__can_advance, __base): Add constexpr.
* include/debug/macros.h [_GLIBCXX_HAVE_BUILTIN_IS_CONSTANT_EVALUATED]
(_GLIBCXX_DEBUG_VERIFY_COND_AT): New.
(__glibcxx_check_sorted): Use __glibcxx_check_irreflexive.
(__glibcxx_check_sorted_pred): Use __glibcxx_check_irreflexive_pred.
* testsuite/25_algorithms/binary_search/constexpr.cc: Use irreflexive
std::less.
* testsuite/25_algorithms/is_sorted/constexpr.cc: Likewise.
* testsuite/25_algorithms/merge/constexpr.cc: Fix order in camm. Fix
lambda to be irreflexive.

From-SVN: r276260

[Darwin, PPC, Mode Iterators 4/n] Update macho_high.

Drop the expander and use a mode iterator on the define_insn
for @macho_high_<mode> instead.

gcc/ChangeLog:

2019-09-28  Iain Sandoe  <iain@sandoe.co.uk>

* config/darwin.c (gen_macho_high): Amend to include the mode
argument.
(machopic_indirect_data_reference): Amend gen_macho_high call
to include mode argument.
(machopic_legitimize_pic_address): Likewise.
* config/rs6000/rs6000.c (rs6000_legitimize_address):
* config/rs6000/darwin.md (@macho_high_<mode>): New, replaces
the macho_high expander and two define_insn entries.

From-SVN: r276256

re PR libfortran/91593 (Implicit enum conversions in libgfortran/io/transfer.c)

2019-09-28  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

PR libfortran/91593
* io/io.h: Add gcc_unreachable().
* io/transfer.c (file_mode, current_mode,
formatted_transfer_scalar_read, formatted_transfer_scalar_write,
pre_position, next_record_r, next_record_w): Add and use
FORMATTED_UNSPECIFIED to enumeration.

From-SVN: r276255

re PR fortran/91802 (ICE in mio_name_expr_t, at fortran/module.c:2141)

2019-09-28  Steven G. Kargl  <kargl@gcc.ngu.org>

PR fortran/91802
* decl.c (attr_decl1): Check if rank+corank > 15.

2019-09-28  Steven G. Kargl  <kargl@gcc.ngu.org>

PR fortran/91802
* gfortran.dg/pr91802.f90: New test.

From-SVN: r276254

re PR fortran/91864 (ICE in gfc_check_do_variable, at fortran/parse.c:4405)

2019-09-28  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91864
* gcc/fortran/io.c (match_io_element): An inquiry parameter cannot be
read into.
* gcc/fortran/match.c (gfc_match_allocate): An inquiry parameter
can be neither an allocate-object nor stat variable.
(gfc_match_deallocate): An inquiry parameter cannot be deallocated.

2019-09-28  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91864
* gcc/testsuite/gfortran.dg/pr91864.f90

From-SVN: r276253

PR c++/91889 - follow-up fix for DR 2352.

* call.c (involves_qualification_conversion_p): New function.
(direct_reference_binding): Build a ck_qual if the conversion
would involve a qualification conversion.
(convert_like_real): Strip the conversion created by the ck_qual
in direct_reference_binding.

* g++.dg/cpp0x/ref-bind3.C: Add dg-error.
* g++.dg/cpp0x/ref-bind4.C: New test.
* g++.dg/cpp0x/ref-bind5.C: New test.
* g++.dg/cpp0x/ref-bind6.C: New test.
* g++.old-deja/g++.pt/spec35.C: Revert earlier change.

From-SVN: r276251

PR c++/91921 - stray warning with -Woverloaded-virtual.

* class.c (warn_hidden): Only emit the second part of
-Woverloaded-virtual if the first part was issued.  Use inform instead
warning_at.

* g++.dg/warn/Woverloaded-2.C: New.
* g++.dg/warn/Woverloaded-2.h: New.
* g++.dg/warn/pr61945.C: Turn dg-warning into dg-message.
* g++.old-deja/g++.mike/warn6.C: Likewise.
* g++.old-deja/g++.warn/virt1.C: Likewise.

From-SVN: r276249

PR c++/91923 - failure-to-SFINAE with class type NTTP in C++17.

* pt.c (invalid_nontype_parm_type_p): Only emit errors when
tf_error.

* g++.dg/cpp0x/nontype5.C: New test.

From-SVN: r276248

re PR target/86805 (sh port needs updating for CVE-2017-5753)

gcc/
2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>

PR target/86805
* config/sh/sh.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.

From-SVN: r276244

re PR target/80672 (gcc/config/sh/sh.c:716: prefer compare to find.)

gcc/
2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>

PR target/80672
* config/sh/sh.c (parse_validate_atomic_model_option): Use
std::string::compare instead of std::string::find.

From-SVN: r276240

Fix endian issue in pr91656 testcases

PR testsuite/91676
PR rtl-optimization/91656
* gcc.dg/torture/pr91656-1.c: Correct for big and pdp endian.
* gcc.dg/torture/pr91656-2.c: Likewise.
* gcc.dg/torture/pr91656-3.c: Likewise.

From-SVN: r276236

compiler: resolve importing ambiguity for more complex function calls

    Tweak the exporter for inlinable function bodies to work around a
    problem with importing of function calls whose function expressions
    are not simple function names. In the bug in question, the function
    body exporter was writing out a function call of the form

           (*(*FuncTyp)(var))(arg)

    which produced an export data representation of

           *$convert(<type 5>, var)(x)

    which is hard to parse unambiguously. Fix: change the export data
    emitter to introduce parens around the function expression for more
    complex calls.

    Testcase for this bug is in CL 197217.

    Fixes golang/go#34503.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197122

From-SVN: r276228

Daily bump.

From-SVN: r276227

Regenerate `configure' scripts for `uclinuxfdpiceabi' libtool.m4 update

A change made with r275564 ("[ARM/FDPIC v6 02/24] [ARM] FDPIC: Handle
arm*-*-uclinuxfdpiceabi in configure scripts") to libtool.m4 has not
regenerated all the `configure' scripts affected.  Fix it.

gcc/
* configure: Regenerate.

libatomic/
* configure: Regenerate.

libbacktrace/
* configure: Regenerate.

libcc1/
* configure: Regenerate.

libffi/
* configure: Regenerate.

libgfortran/
* configure: Regenerate.

libgomp/
* configure: Regenerate.

libhsail-rt/
* configure: Regenerate.

libitm/
* configure: Regenerate.

libobjc/
* configure: Regenerate.

liboffloadmic/
* configure: Regenerate.

libphobos/
* configure: Regenerate.

libquadmath/
* configure: Regenerate.

libsanitizer/
* configure: Regenerate.

libssp/
* configure: Regenerate.

libstdc++-v3/
* configure: Regenerate.

libvtv/
* configure: Regenerate.

lto-plugin/
* configure: Regenerate.

zlib/
* configure: Regenerate.

From-SVN: r276213

re PR c++/88203 (assert does not compile with OpenMP's pragma omp parallel for default(none))

PR c++/88203
c-family/
* c-common.h (c_omp_predefined_variable): Declare.
* c-omp.c (c_omp_predefined_variable): New function.
(c_omp_predetermined_sharing): Return OMP_CLAUSE_DEFAULT_SHARED
for predefined variables.
c/
* c-parser.c (c_parser_predefined_identifier): New function.
(c_parser_postfix_expression): Use it.
(c_parser_omp_variable_list): Parse predefined identifiers.
* c-typeck.c (c_finish_omp_clauses): Allow predefined variables
in shared and firstprivate clauses, even when they are predetermined
shared.
cp/
* parser.c (cp_parser_omp_var_list_no_open): Parse predefined
variables.
* semantics.c (finish_omp_clauses): Allow predefined variables in
shared and firstprivate clauses, even when they are predetermined
shared.
* cp-gimplify.c (cxx_omp_predetermined_sharing_1): Return
OMP_CLAUSE_DEFAULT_SHARED for predefined variables.
testsuite/
* c-c++-common/gomp/pr88203-1.c: New test.
* c-c++-common/gomp/pr88203-2.c: New test.
* c-c++-common/gomp/pr88203-3.c: New test.

From-SVN: r276212

re PR middle-end/91920 (ggc 9.2.0 failing openmp compile on ppc64le)

PR middle-end/91920
* gimplify.c (omp_default_clause): Predetermine DECL_IN_CONSTANT_POOL
variables as shared.

* c-c++-common/gomp/pr91920.c: New test.

From-SVN: r276211

[Darwin, PPC, Mode Iterators 3/n] Update macho_correct_pic.

Drop the expander and use a mode expander on the define_insn
for macho_correct_pic instead.

gcc/ChangeLog:

2019-09-27  Iain Sandoe  <iain@sandoe.co.uk>

* config/rs6000/darwin.md (@macho_correct_pic_<mode>): New,
replaces the expander and two define_insn entries.
(@reload_macho_picbase_<mode>): Update gen_macho_correct_pic
call.
* config/rs6000/rs6000.md (builtin_setjmp_receiver): Likewise.

From-SVN: r276196

Const-correctness fixes for fibonacci_heap.h

gcc/ChangeLog:
* fibonacci_heap.h (fibonacci_heap::empty): Make const.
(fibonacci_heap::nodes): Likewise.
(fibonacci_heap::min_key): Likewise.
(fibonacci_heap::min): Likewise.

From-SVN: r276193

constexpr.c (cxx_fold_indirect_ref): Use similar_type_p.

* constexpr.c (cxx_fold_indirect_ref): Use similar_type_p.

Merging the similar_type_p change to the concepts branch broke a cmcstl2
testcase; investigating led me to this small testcase which has always
failed on trunk.

(cxx_eval_indirect_ref): Likewise.  Improve error location.

From-SVN: r276192

cp-tree.h (class iloc_sentinel): New.

* cp-tree.h (class iloc_sentinel): New.

We didn't already have a sentinel for input_location, and while
temp_override would work, it would also happily set input_location to 0,
which breaks things that try to look up the associated filename.

* decl.c (grokdeclarator, finish_enum_value_list): Use it.
* mangle.c (mangle_decl_string): Use it.
* pt.c (perform_typedefs_access_check): Use it.

From-SVN: r276191

Make cgraph_node::get_fun const

gcc/ChangeLog:
* cgraph.c (cgraph_node::get_fun): Make const.
* cgraph.h (cgraph_node::get_fun): Likewise.

From-SVN: r276190

compiler: don't read known type, simplify Import::finalize_methods

    With the current export format, if we already know the type, we don't
    have to read and parse the definition.

    We only use the finalizer in Import::finalize_methods, so make it a
    local variable.  To match Finalize_methods::type, only put struct
    types into real_for_named.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197700

From-SVN: r276188

compiler: only check whether struct or array types are big

    Fetching the size of a type typically involves a hash table lookup,
    and is generally non-trivial.  The escape analysis code calls is_big
    more than one might expect.  So only fetch the size if we need it.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197699

From-SVN: r276187

compiler: fix brace formatting

    Just happened to notice this one.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197698

From-SVN: r276186

PR libstdc++/91910 fix data race in Debug Mode destructors

Fix data race when _Safe_iterator_base::_M_detach() runs concurrently with
the _Safe_container_base destructor.

PR libstdc++/91910
* src/c++11/debug.cc (_Safe_iterator_base::_M_detach()): Load pointer
atomically and lock the mutex before accessing the sequence.
(_Safe_local_iterator_base::_M_detach()): Likewise.
(_Safe_iterator_base::_M_reset()): Clear _M_sequence atomically.

From-SVN: r276184

re PR target/91919 (arm-linux-eabi ICE with building kernel)

PR target/91919
* config/arm/arm.md (<US>mlal): Remove SE wrappers around operands
of SImode MULT.

* gcc.c-torture/compile/pr91919.c: New.test

From-SVN: r276183

tree-vectorizer.h (_stmt_vec_info::reduc_fn): New.

2019-09-27  Richard Biener  <rguenther@suse.de>

* tree-vectorizer.h (_stmt_vec_info::reduc_fn): New.
(STMT_VINFO_REDUC_FN): Likewise.
* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
STMT_VINFO_REDUC_FN.
* tree-vect-loop.c (vect_is_simple_reduction): Fix STMT_VINFO_REDUC_IDX
for condition reductions.
(vect_create_epilog_for_reduction): Compute all required state
from the stmt to be vectorized.
(vectorizable_reduction): Simplify vect_create_epilog_for_reduction
invocation and remove then dead code.  For single def-use chains
record only a single vector stmt.

From-SVN: r276180

associate_48.f90: Fix a dg directive.

2019-09-27  Manfred Schwarb  <manfred99@gmx.ch>

        * gfortran.dg/associate_48.f90: Fix a dg directive.
        * gfortran.dg/auto_in_equiv_1.f90: Ditto.
        * gfortran.dg/auto_in_equiv_2.f90: Ditto.
        * gfortran.dg/lto/pr87689_0.f: Ditto.

From-SVN: r276179

re PR tree-optimization/91885 (ICE when compiling SPEC 2017 blender benchmark with -O3 -fprofile-generate)

PR tree-optimization/91885
* gcc.dg/pr91885.c (__int64_t): Change from long to long long.
(__uint64_t): Change from unsigned long to unsigned long long.

From-SVN: r276178

[AArch64] Split built-in function codes into major and minor codes

It was easier to add the SVE ACLE support without enumerating every
function at build time.  This in turn meant that it was easier if the
SVE builtins occupied a distinct numberspace from the existing AArch64
ones, which *are* enumerated at build time.  This patch therefore
divides the built-in functions codes into "major" and "minor" codes.
At present the major code is just "general", but the SVE patch will add
"SVE" as well.

Also, it was convenient to put the SVE ACLE support in its own file,
so the patch makes aarch64.c provide the frontline target hooks directly,
forwarding to the other files for the real work.

The reason for organising the files this way is that aarch64.c needs
to define the target hook macros whatever happens, and having aarch64.c
macros forward to aarch64-builtins.c functions and aarch64-bulitins.c
functions forward to the SVE file seemed a bit indirect.  Doing things
the way the patch does them puts aarch64-builtins.c and the SVE code on
more of an equal footing.

The aarch64_(general_)gimple_fold_builtin change is mostly just
reindentation.

2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-protos.h (aarch64_builtin_class): New enum.
(AARCH64_BUILTIN_SHIFT, AARCH64_BUILTIN_CLASS): New constants.
(aarch64_gimple_fold_builtin, aarch64_mangle_builtin_type)
(aarch64_fold_builtin, aarch64_init_builtins, aarch64_expand_builtin):
(aarch64_builtin_decl, aarch64_builtin_rsqrt): Delete.
(aarch64_general_mangle_builtin_type, aarch64_general_init_builtins):
(aarch64_general_fold_builtin, aarch64_general_gimple_fold_builtin):
(aarch64_general_expand_builtin, aarch64_general_builtin_decl):
(aarch64_general_builtin_rsqrt): Declare.
* config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
New function.
(aarch64_mangle_builtin_type): Rename to...
(aarch64_general_mangle_builtin_type): ...this.
(aarch64_init_fcmla_laneq_builtins, aarch64_init_simd_builtins)
(aarch64_init_crc32_builtins, aarch64_init_builtin_rsqrt)
(aarch64_init_pauth_hint_builtins, aarch64_init_tme_builtins): Use
aarch64_general_add_builtin instead of add_builtin_function.
(aarch64_init_builtins): Rename to...
(aarch64_general_init_builtins): ...this.  Use
aarch64_general_add_builtin instead of add_builtin_function.
(aarch64_builtin_decl): Rename to...
(aarch64_general_builtin_decl): ...this and remove the unused
arguments.
(aarch64_expand_builtin): Rename to...
(aarch64_general_expand_builtin): ...this and remove the unused
arguments.
(aarch64_builtin_rsqrt): Rename to...
(aarch64_general_builtin_rsqrt): ...this.
(aarch64_fold_builtin): Rename to...
(aarch64_general_fold_builtin): ...this.  Take the function subcode
and return type as arguments.  Remove the "ignored" argument.
(aarch64_gimple_fold_builtin): Rename to...
(aarch64_general_gimple_fold_builtin): ...this.  Take the function
subcode and gcall as arguments, and return the new function call.
* config/aarch64/aarch64.c (aarch64_init_builtins)
(aarch64_fold_builtin, aarch64_gimple_fold_builtin)
(aarch64_expand_builtin, aarch64_builtin_decl): New functions.
(aarch64_builtin_reciprocal): Call aarch64_general_builtin_rsqrt
instead of aarch64_builtin_rsqrt.
(aarch64_mangle_type): Call aarch64_general_mangle_builtin_type
instead of aarch64_mangle_builtin_type.

From-SVN: r276177

[C][C++] Allow targets to check calls to BUILT_IN_MD functions

For SVE, we'd like the frontends to check calls to target-specific
built-in functions in the same way that they already do for "normal"
builtins.  This patch adds a target hook for that and extends
check_builtin_function_arguments accordingly.

A slight complication is that when TARGET_RESOLVE_OVERLOADED_BUILTIN
has resolved an overload, it can use build_function_call_vec to build
the call to the underlying non-overloaded function decl.  This in
turn coerces the arguments to the function type and then calls
check_builtin_function_arguments to check the final call.  If the
target does find a problem in this final call, it can be useful
to refer to the original overloaded function decl in diagnostics,
since that's what the user wrote.

The patch therefore passes the original decl as a final optional
parameter to build_function_call_vec.

2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* target.def (check_builtin_call): New target hook.
* doc/tm.texi.in (TARGET_CHECK_BUILTIN_CALL): New @hook.
* doc/tm.texi: Regenerate.

gcc/c-family/
* c-common.h (build_function_call_vec): Take the original
function decl as an optional final parameter.
(check_builtin_function_arguments): Take the original function decl.
* c-common.c (check_builtin_function_arguments): Likewise.
Handle all built-in functions, not just BUILT_IN_NORMAL ones.
Use targetm.check_builtin_call to check BUILT_IN_MD functions.

gcc/c/
* c-typeck.c (build_function_call_vec): Take the original function
decl as an optional final parameter.  Pass all built-in calls to
check_builtin_function_arguments.

gcc/cp/
* cp-tree.h (build_cxx_call): Take the original function decl
as an optional final parameter.
(cp_build_function_call_vec): Likewise.
* call.c (build_cxx_call): Likewise.  Pass all built-in calls to
check_builtin_function_arguments.
* typeck.c (build_function_call_vec): Take the original function
decl as an optional final parameter and pass it to
cp_build_function_call_vec.
(cp_build_function_call_vec): Take the original function
decl as an optional final parameter and pass it to build_cxx_call.

From-SVN: r276176

Fix reduc_index==1 handling for COND_REDUCTION (PR91909)

The then/else order of the VEC_COND_EXPRs created by
vect_create_epilog_for_reduction meeds to line up with the
main VEC_COND_EXPR.

2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR tree-optimization/91909
* tree-vect-loop.c (vect_create_epilog_for_reduction): Take a
reduc_index parameter.  When handling COND_REDUCTION, make sure
that the reduction phi operand is in the correct arm of the
VEC_COND_EXPR.
(vectorizable_reduction): Pass reduc_index to the above.

From-SVN: r276175

[AArch64][SVE2] Shift-Right Accumulate combine patterns

This patch adds combining support for SVE2's shift-right accumulate
instructions.

2019-09-27  Yuliang Wang  <yuliang.wang@arm.com>

gcc/
* config/aarch64/aarch64-sve2.md (aarch64_sve2_sra<mode>):
New combine pattern.

gcc/testsuite/
* gcc.target/aarch64/sve2/shracc_1.c: New test.

From-SVN: r276174

set DECL_SIZE_UNIT for zero-sized fields

Zero-sized fields do not get processed by finish_record_type: they're
removed from the field list before and reinserted after, so their
DECL_SIZE_UNIT remains unset, causing the translation of assignment
statements with use_memset_p, in quite unusual circumstances, to use a
NULL_TREE as the memset length.  This patch sets DECL_SIZE_UNIT for
the zero-sized fields, that don't go through language-independent
layout, in language-specific layout.

for  gcc/ada/ChangeLog

* gcc-interface/decl.c (components_to_record): Set
DECL_SIZE_UNIT for zero-sized fields.

From-SVN: r276173

Daily bump.

From-SVN: r276172

re PR libbacktrace/91908 (New libbacktrace tests fail to build)

PR libbacktrace/91908
* pecoff.c (backtrace_initialize): Explicitly cast unchecked
__sync_bool_compare_and_swap to void.
* xcoff.c (backtrace_initialize): Likewise.

From-SVN: r276168

charset.c (UCS_LIMIT): New macro.

* charset.c (UCS_LIMIT): New macro.
(ucn_valid_in_identifier): Use it instead of a hardcoded constant.
(_cpp_valid_ucn): Issue a pedantic warning for UCNs larger than
UCS_LIMIT outside of identifiers in C and in C++2a or later.

From-SVN: r276167

xtensa: fix PR target/91880

Xtensa hwloop_optimize segfaults when zero overhead loop is about to be
inserted as the first instruction of the function.
Insert zero overhead loop instruction into new basic block before the
loop when basic block that precedes the loop is empty.

2019-09-26  Max Filippov  <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
loop instruction into new basic block before the loop when basic
block that precedes the loop is empty.

gcc/testsuite/
* gcc.target/xtensa/pr91880.c: New test case.
* gcc.target/xtensa/xtensa.exp: New test suite.

From-SVN: r276166

function.c (gimplify_parameters): Use build_clobber function.

* function.c (gimplify_parameters): Use build_clobber function.
* tree-ssa.c (execute_update_addresses_taken): Likewise.
* tree-inline.c (expand_call_inline): Likewise.
* tree-sra.c (clobber_subtree): Likewise.
* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Likewise.
* omp-low.c (lower_rec_simd_input_clauses, lower_rec_input_clauses,
lower_omp_single, lower_depend_clauses, lower_omp_taskreg,
lower_omp_target): Likewise.
* omp-expand.c (expand_omp_for_generic): Likewise.
* omp-offload.c (ompdevlow_adjust_simt_enter): Likewise.

From-SVN: r276165

CO_BROADCAST for derived types with allocatable components

From-SVN: r276164

rs6000-builtin.def: (LVSL...

[gcc]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
LD_ELEMREV_V16QI): Use the PURE attribute.

[testsuite]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/pure-builtin-redundant-load.c:  New.

From-SVN: r276163

rs6000-builtin.def: (LVSL...

[gcc]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
LD_ELEMREV_V16QI): Use the PURE attribute.

[testsuite]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/pure-builtin-redundant-load.c:  New.

From-SVN: r276162

[Darwin, PPC, Mode Iterators 2/n] Eliminate picbase expanders.

We can use the mode iterators directly with an @pattern to avoid the
need for an expander that was only there to pass the mode through.

gcc/ChangeLog:

2019-09-26  Iain Sandoe  <iain@sandoe.co.uk>

* config/rs6000/darwin.md: Replace the expanders for
load_macho_picbase and reload_macho_picbase with use of '@'
in their respective define_insns.
(nonlocal_goto_receiver): Pass Pmode to gen_reload_macho_picbase.
* config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Pass
Pmode to gen_load_macho_picbase.
* config/rs6000/rs6000.md: Likewise.

From-SVN: r276159

re PR tree-optimization/91896 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1687)

2019-09-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.

* gcc.dg/torture/pr91896.c: New testcase.

From-SVN: r276158

tree-vect-loop.c (vect_analyze_loop_operations): Analyze loop-closed PHIs that are vect_internal_def.

2019-09-26  Richard Biener  <rguenther@suse.de>

* tree-vect-loop.c (vect_analyze_loop_operations): Analyze
loop-closed PHIs that are vect_internal_def.
(vect_create_epilog_for_reduction): Exit early for nested cycles.
Simplify.
(vectorizable_lc_phi): New.
* tree-vect-stmts.c (vect_analyze_stmt): Call vectorize_lc_phi.
(vect_transform_stmt): Likewise.
* tree-vectorizer.h (stmt_vec_info_type): Add lc_phi_info_type.
(vectorizable_lc_phi): Declare.

From-SVN: r276157

PR tree-optimization/91914 - Invalid strlen folding for offset into struct

gcc/testsuite/CHangeLog:
* gcc.dg/strlenopt-79.c: New test.

From-SVN: r276156

Define std::to_array for Debug Mode

* include/debug/array (to_array): Define for debug mode.

From-SVN: r276155

Implement C++20 constexpr changes to std::pair (P1032R1)

* include/bits/stl_pair.h (pair): Add _GLIBCXX20_CONSTEXPR to
piecewise construction constructor, assignment operators, and swap.
* include/std/tuple (pair::pair(piecewise_construct_t, tuple, tuple)):
Add _GLIBCXX20_CONSTEXPR.
(pair::pair(tuple, tuple, _Index_tuple, _Index_tuple)): Likewise.
* testsuite/20_util/pair/constexpr_assign.cc: New test.
* testsuite/20_util/pair/constexpr_swap.cc: New test.

From-SVN: r276154

Fix array index error in address_v6 comparisons

* include/experimental/internet (operator==, operator<): Fix loop
condition to avoid reading past the end of the array.

From-SVN: r276153

Remove include directives for deleted Profile Mode headers

* include/std/array: Remove references to profile mode.
* include/std/bitset: Likewise.
* include/std/deque: Likewise.
* include/std/forward_list: Likewise.
* include/std/list: Likewise.
* include/std/map: Likewise.
* include/std/set: Likewise.
* include/std/unordered_map: Likewise.
* include/std/unordered_set: Likewise.
* include/std/vector: Likewise.
* testsuite/17_intro/headers/c++1998/profile_mode.cc: New test.
* testsuite/17_intro/headers/c++2011/profile_mode.cc: New test.

From-SVN: r276152

* osint.adb (OS_Time_To_GNAT_Time): Remove dependency on To_C/To_Ada

From-SVN: r276151

tree-vect-loop.c (vect_analyze_loop_operations): Also call vectorizable_reduction for vect_double_reduction_def.

2019-09-26  Richard Biener  <rguenther@suse.de>

* tree-vect-loop.c (vect_analyze_loop_operations): Also call
vectorizable_reduction for vect_double_reduction_def.
(vect_transform_loop): Likewise.
(vect_create_epilog_for_reduction): Move double-reduction
PHI creation and preheader argument setting of PHIs ...
(vectorizable_reduction): ... here.  Also process
vect_double_reduction_def PHIs, creating the vectorized
PHI nodes, remembering the scalar adjustment computed for
the epilogue in STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT.
Remember the original reduction code in STMT_VINFO_REDUC_CODE.
* tree-vectorizer.c (vec_info::new_stmt_vec_info):
Initialize STMT_VINFO_REDUC_CODE.
* tree-vectorizer.h (_stmt_vec_info::reduc_epilogue_adjustment): New.
(_stmt_vec_info::reduc_code): Likewise.
(STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT): Likewise.
(STMT_VINFO_REDUC_CODE): Likewise.

From-SVN: r276150

Add myself as an aarch64 maintainer

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

* MAINTAINERS: Add myself as an aarch64 maintainer.

From-SVN: r276149

driver: Also prune joined switches with negation

When -march=native is passed to host_detect_local_cpu to the backend,
it overrides all command lines after it.  That means

$ gcc -march=native -march=armv8-a

is treated as

$ gcc -march=armv8-a -march=native

Prune joined switches with Negative and RejectNegative to allow
-march=armv8-a to override previous -march=native on command-line.

This is the same fix as was applied for i386 in SVN revision 269164 but for
aarch64 and arm.

2019-09-26  Matt Turner  <mattst88@gmail.com>

PR driver/69471
* config/aarch64/aarch64.opt (march=): Add Negative(march=).
(mtune=): Add Negative(mtune=).
(mcpu=): Add Negative(mcpu=).
* config/arm/arm.opt: Likewise.

From-SVN: r276148

[arm] Implement DImode SIMD32 intrinsics

This patch implements some more SIMD32, but these ones have a DImode result+addend.
Apart from that there's nothing too exciting about them.

Bootstrapped and tested on arm-none-linux-gnueabihf.

* config/arm/arm.md (arm_<simd32_op>): New define_insn.
* config/arm/arm_acle.h (__smlald, __smlaldx, __smlsld, __smlsldx):
Define.
* config/arm/arm_acle.h: Define builtins for the above.
* config/arm/iterators.md (SIMD32_DIMODE): New int_iterator.
(simd32_op): Handle the above.
* config/arm/unspecs.md: Define unspecs for the above.

* gcc.target/arm/acle/simd32.c: Update test.

From-SVN: r276147

[arm] Implement non-GE-setting SIMD32 intrinsics

This patch is part of a series to implement the SIMD32 ACLE intrinsics [1].
The interesting parts implementation-wise involve adding support for setting and reading
the Q bit for saturation and the GE-bits for the packed SIMD instructions.
That will come in a later patch.

For now, this patch implements the other intrinsics that don't need anything special ;
just a mapping from arm_acle.h function to builtin to RTL expander+unspec.

I've compressed as many as I could with iterators so that we end up needing only 3
new define_insns.

Bootstrapped and tested on arm-none-linux-gnueabihf.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics

* config/arm/arm.md (arm_<simd32_op>): New define_insn.
(arm_<sup>xtb16): Likewise.
(arm_usada8): Likewise.
* config/arm/arm_acle.h (__qadd8, __qsub8, __shadd8, __shsub8,
__uhadd8, __uhsub8, __uqadd8, __uqsub8, __qadd16, __qasx, __qsax,
__qsub16, __shadd16, __shasx, __shsax, __shsub16, __uhadd16, __uhasx,
__uhsax, __uhsub16, __uqadd16, __uqasx, __uqsax, __uqsub16, __sxtab16,
__sxtb16, __uxtab16, __uxtb16): Define.
* config/arm/arm_acle_builtins.def: Define builtins for the above.
* config/arm/unspecs.md: Define unspecs for the above.
* config/arm/iterators.md (SIMD32_NOGE_BINOP): New int_iterator.
(USXTB16): Likewise.
(simd32_op): New int_attribute.
(sup): Handle UNSPEC_SXTB16, UNSPEC_UXTB16.
* doc/sourcebuild.exp (arm_simd32_ok): Document.

* lib/target-supports.exp
(check_effective_target_arm_simd32_ok_nocache): New procedure.
(check_effective_target_arm_simd32_ok): Likewise.
(add_options_for_arm_simd32): Likewise.
* gcc.target/arm/acle/simd32.c: New test.

From-SVN: r276146

[arm] Update FP16 tests

My recent assemble_real patch (r275873) meant that we now output
negative FP16 constants in the same way as we'd output an integer
subreg of them.  This patch updates gcc.target/arm/fp16-* accordingly.

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/arm/fp16-compile-alt-3.c: Expect (__fp16) -2.0
to be written as a negative short rather than a positive one.
* gcc.target/arm/fp16-compile-ieee-3.c: Likewise.

From-SVN: r276145

[PATCH] Fix quoting in a call to internal_error

2019-09-26  Martin Jambor  <mjambor@suse.cz>

* ipa-sra.c (verify_splitting_accesses): Fix quoting in a call to
internal_error.

From-SVN: r276144

[PATCH] Fix continue condition in IPA-SRA's process_scan_results

2019-09-26  Martin Jambor  <mjambor@suse.cz>

* ipa-sra.c (process_scan_results): Fix continue condition.

From-SVN: r276143

Add myself as aarch64 port maintainer

* MAINTAINERS: Add myself as aarch64 maintainer.

From-SVN: r276142

Add TODO_update_ssa for SLP BB vectorization (PR tree-optimization/91885).

2019-09-26  Martin Liska  <mliska@suse.cz>

PR tree-optimization/91885
* tree-vectorizer.c (try_vectorize_loop_1):
Add TODO_update_ssa_only_virtuals similarly to what slp
pass does.
2019-09-26  Martin Liska  <mliska@suse.cz>

PR tree-optimization/91885
* gcc.dg/pr91885.c: New test.

From-SVN: r276141

[AArch64] Fix cost of (plus ... (const_int -C))

The PLUS handling in aarch64_rtx_costs only checked for nonnegative
constants, meaning that simple immediate subtractions like:

  (set (reg R1) (plus (reg R2) (const_int -8)))

had a cost of two instructions.

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
aarch64_plus_immediate rather than aarch64_uimm12_shift
to test for valid PLUS immediates.

From-SVN: r276140

Daily bump.

From-SVN: r276139

libgcc: Rebuild autoconf files

        * config.in, configure: Re-rebuild with stock autoconf 2.69,
        not the ubuntu modified 2.69.

From-SVN: r276135

aarch64: Configure for sys/auxv.h in libgcc for lse-init.c

PR target/91833
* config/aarch64/lse-init.c: Include auto-target.h.  Disable
initialization if !HAVE_SYS_AUXV_H.
* configure.ac (AC_CHECK_HEADERS): Add sys/auxv.h.
* config.in, configure: Rebuild.

From-SVN: r276134

aarch64: Fix store-exclusive in load-operate LSE helpers

PR target/91834
* config/aarch64/lse.S (LDNM): Ensure STXR output does not
overlap the inputs.

From-SVN: r276133

Colorize %L and %C text to match diagnostic_show_locus (PR fortran/91426)

gcc/fortran/ChangeLog:
PR fortran/91426
* error.c (curr_diagnostic): New static variable.
(gfc_report_diagnostic): New static function.
(gfc_warning): Replace call to diagnostic_report_diagnostic with
call to gfc_report_diagnostic.
(gfc_format_decoder): Colorize the text of %L and %C to match the
colorization used by diagnostic_show_locus.
(gfc_warning_now_at): Replace call to diagnostic_report_diagnostic with
call to gfc_report_diagnostic.
(gfc_warning_now): Likewise.
(gfc_warning_internal): Likewise.
(gfc_error_now): Likewise.
(gfc_fatal_error): Likewise.
(gfc_error_opt): Likewise.
(gfc_internal_error): Likewise.

From-SVN: r276132

Remove newly unused function and variable in tree-sra

Hi,

Martin and his clang warnings discovered that I forgot to remove a
static inline function and a variable when ripping out the old IPA-SRA
from tree-sra.c and both are now unused.  Thus I am doing that now
with the patch below which I will commit as obvious (after including
it in a round of a bootstrap and testing on an x86_64-linux).

Thanks,

Martin

2019-09-25  Martin Jambor  <mjambor@suse.cz>

* tree-sra.c (no_accesses_p): Remove.
(no_accesses_representant): Likewise.

From-SVN: r276128

PR c++/91877 - ICE with converting member of packed struct.

* call.c (convert_like_real): Use similar_type_p in an assert.

* g++.dg/conversion/packed1.C: New test.

From-SVN: r276127

[AArch64] Use implementation namespace consistently in arm_neon.h

We're somewhat inconsistent in arm_neon.h when it comes to using the implementation namespace for local
identifiers. This means things like:
#define hash_abcd 0
#define hash_e 1
#define wk 2

#include "arm_neon.h"

uint32x4_t
foo (uint32x4_t a, uint32_t b, uint32x4_t c)
{
  return vsha1cq_u32 (a, b, c);
}

don't compile.
This patch fixes these issues throughout the whole of arm_neon.h
Bootstrapped and tested on aarch64-none-linux-gnu.
The advsimd-intrinsics.exp tests pass just fine.

From-SVN: r276125

re PR tree-optimization/91896 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1687)

2019-09-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.

* gcc.dg/torture/pr91896.c: New testcase.

From-SVN: r276123

[AARCH64] Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

The DCache clean & ICache invalidation requirements for instructions
to be data coherence are discoverable through new fields in CTR_EL0.
Let's support the two bits if they are enabled, the CPU core will
not execute the unnecessary DCache clean or Icache Invalidation
instructions.

2019-09-25  Shaokun Zhang  <zhangshaokun@hisilicon.com>

* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Add support for
CTR_EL0.IDC and CTR_EL0.DIC.

From-SVN: r276122

Implement LWG 3296 for basic_regex::assign

* include/bits/regex.h
(basic_regex::assign(const C*, size_t, flag_type)): Add default
argument (LWG 3296).
* testsuite/28_regex/basic_regex/assign/char/lwg3296.cc: New test.
* testsuite/28_regex/basic_regex/assign/wchar_t/lwg3296.cc: New test.

From-SVN: r276121

Move a target test-case to generic folder.

2019-09-25  Martin Liska  <mliska@suse.cz>

* gcc.target/s390/pr91014.c: Move to ...
* gcc.dg/pr91014.c: ... this.

From-SVN: r276120

name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.

/cp
2019-09-25  Paolo Carlini  <paolo.carlini@oracle.com>

* name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.
(check_local_shadow): Use it in three additional places.

/testsuite
2019-09-25  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/diagnostic/redeclaration-1.C: New.
* g++.dg/lookup/extern-c-hidden.C: Test location(s) too.
* g++.dg/lookup/extern-c-redecl.C: Likewise.
* g++.dg/lookup/extern-c-redecl6.C: Likewise.
* g++.old-deja/g++.other/using9.C: Likewise.

From-SVN: r276119

Fix location of dependent member CALL_EXPR.

The break here was skipping over the code that sets EXPR_LOCATION on the
call expressions, for no good reason.

* parser.c (cp_parser_postfix_expression): Do set location of
dependent member call.

From-SVN: r276112