lkcl [Wed, 5 Oct 2022 09:58:04 +0000 (10:58 +0100)]
lkcl [Wed, 5 Oct 2022 09:56:21 +0000 (10:56 +0100)]
lkcl [Wed, 5 Oct 2022 09:54:24 +0000 (10:54 +0100)]
lkcl [Wed, 5 Oct 2022 03:04:43 +0000 (04:04 +0100)]
lkcl [Tue, 4 Oct 2022 15:16:16 +0000 (16:16 +0100)]
lkcl [Tue, 4 Oct 2022 15:10:51 +0000 (16:10 +0100)]
lkcl [Tue, 4 Oct 2022 13:40:47 +0000 (14:40 +0100)]
lkcl [Tue, 4 Oct 2022 13:39:05 +0000 (14:39 +0100)]
lkcl [Tue, 4 Oct 2022 13:38:06 +0000 (14:38 +0100)]
lkcl [Tue, 4 Oct 2022 13:21:44 +0000 (14:21 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 13:14:48 +0000 (14:14 +0100)]
clarify notes on fishmv being R-M-W
lkcl [Tue, 4 Oct 2022 13:06:47 +0000 (14:06 +0100)]
lkcl [Tue, 4 Oct 2022 13:05:19 +0000 (14:05 +0100)]
lkcl [Tue, 4 Oct 2022 12:15:24 +0000 (13:15 +0100)]
lkcl [Tue, 4 Oct 2022 12:11:51 +0000 (13:11 +0100)]
lkcl [Tue, 4 Oct 2022 12:04:54 +0000 (13:04 +0100)]
lkcl [Tue, 4 Oct 2022 11:44:31 +0000 (12:44 +0100)]
lkcl [Tue, 4 Oct 2022 11:41:55 +0000 (12:41 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 11:29:04 +0000 (12:29 +0100)]
observation motivation on ls002, even FPR=0 needs FLD
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 11:28:38 +0000 (12:28 +0100)]
whitespace
lkcl [Tue, 4 Oct 2022 11:24:59 +0000 (12:24 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 11:12:36 +0000 (12:12 +0100)]
add zero-overhead loop link
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 10:29:32 +0000 (11:29 +0100)]
add asm for affine
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 10:28:48 +0000 (11:28 +0100)]
add gf2p8affineqb bitmatrix-mul to bitmanip page
lkcl [Tue, 4 Oct 2022 05:23:06 +0000 (06:23 +0100)]
lkcl [Tue, 4 Oct 2022 02:33:21 +0000 (03:33 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 01:55:28 +0000 (02:55 +0100)]
formatting
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 01:54:38 +0000 (02:54 +0100)]
whitespace (linelength)
Jacob Lifshay [Tue, 4 Oct 2022 00:12:21 +0000 (17:12 -0700)]
add 256-bit packed SIMD emulation table
Jacob Lifshay [Tue, 4 Oct 2022 00:05:10 +0000 (17:05 -0700)]
add motivation for SVP64 with VL=1 override
Jacob Lifshay [Mon, 3 Oct 2022 23:40:36 +0000 (16:40 -0700)]
work on SVP64 scalar overriding VL to 1 question
lkcl [Mon, 3 Oct 2022 23:03:08 +0000 (00:03 +0100)]
lkcl [Mon, 3 Oct 2022 22:18:29 +0000 (23:18 +0100)]
lkcl [Mon, 3 Oct 2022 22:16:45 +0000 (23:16 +0100)]
lkcl [Mon, 3 Oct 2022 22:16:10 +0000 (23:16 +0100)]
lkcl [Mon, 3 Oct 2022 20:51:54 +0000 (21:51 +0100)]
lkcl [Mon, 3 Oct 2022 20:50:48 +0000 (21:50 +0100)]
lkcl [Mon, 3 Oct 2022 20:48:21 +0000 (21:48 +0100)]
lkcl [Mon, 3 Oct 2022 20:41:51 +0000 (21:41 +0100)]
lkcl [Mon, 3 Oct 2022 20:36:39 +0000 (21:36 +0100)]
lkcl [Mon, 3 Oct 2022 20:30:22 +0000 (21:30 +0100)]
Luke Kenneth Casson Leighton [Mon, 3 Oct 2022 20:26:10 +0000 (21:26 +0100)]
wildcard Makefile for RFCs
lkcl [Mon, 3 Oct 2022 20:25:31 +0000 (21:25 +0100)]
lkcl [Mon, 3 Oct 2022 20:16:45 +0000 (21:16 +0100)]
lkcl [Mon, 3 Oct 2022 20:10:40 +0000 (21:10 +0100)]
lkcl [Mon, 3 Oct 2022 19:57:27 +0000 (20:57 +0100)]
lkcl [Mon, 3 Oct 2022 19:55:49 +0000 (20:55 +0100)]
lkcl [Mon, 3 Oct 2022 19:44:23 +0000 (20:44 +0100)]
lkcl [Mon, 3 Oct 2022 19:35:00 +0000 (20:35 +0100)]
lkcl [Mon, 3 Oct 2022 19:32:49 +0000 (20:32 +0100)]
lkcl [Mon, 3 Oct 2022 19:22:25 +0000 (20:22 +0100)]
lkcl [Mon, 3 Oct 2022 19:16:34 +0000 (20:16 +0100)]
lkcl [Mon, 3 Oct 2022 19:09:42 +0000 (20:09 +0100)]
lkcl [Mon, 3 Oct 2022 16:17:10 +0000 (17:17 +0100)]
lkcl [Mon, 3 Oct 2022 15:25:11 +0000 (16:25 +0100)]
lkcl [Mon, 3 Oct 2022 15:16:20 +0000 (16:16 +0100)]
lkcl [Mon, 3 Oct 2022 15:00:05 +0000 (16:00 +0100)]
lkcl [Mon, 3 Oct 2022 14:17:07 +0000 (15:17 +0100)]
lkcl [Mon, 3 Oct 2022 12:33:11 +0000 (13:33 +0100)]
lkcl [Mon, 3 Oct 2022 11:52:32 +0000 (12:52 +0100)]
lkcl [Mon, 3 Oct 2022 11:49:03 +0000 (12:49 +0100)]
lkcl [Mon, 3 Oct 2022 11:43:50 +0000 (12:43 +0100)]
lkcl [Mon, 3 Oct 2022 11:42:10 +0000 (12:42 +0100)]
lkcl [Mon, 3 Oct 2022 11:34:38 +0000 (12:34 +0100)]
lkcl [Mon, 3 Oct 2022 11:06:56 +0000 (12:06 +0100)]
lkcl [Mon, 3 Oct 2022 10:45:13 +0000 (11:45 +0100)]
lkcl [Mon, 3 Oct 2022 10:43:14 +0000 (11:43 +0100)]
Luke Kenneth Casson Leighton [Mon, 3 Oct 2022 10:25:54 +0000 (11:25 +0100)]
remove SVSRR0 mention
lkcl [Mon, 3 Oct 2022 06:36:40 +0000 (07:36 +0100)]
lkcl [Sun, 2 Oct 2022 16:58:12 +0000 (17:58 +0100)]
lkcl [Sun, 2 Oct 2022 16:43:28 +0000 (17:43 +0100)]
lkcl [Sun, 2 Oct 2022 15:37:41 +0000 (16:37 +0100)]
lkcl [Sun, 2 Oct 2022 14:33:15 +0000 (15:33 +0100)]
lkcl [Sun, 2 Oct 2022 14:13:04 +0000 (15:13 +0100)]
lkcl [Sun, 2 Oct 2022 13:56:18 +0000 (14:56 +0100)]
lkcl [Sun, 2 Oct 2022 13:35:10 +0000 (14:35 +0100)]
lkcl [Sun, 2 Oct 2022 13:28:52 +0000 (14:28 +0100)]
lkcl [Sat, 1 Oct 2022 17:59:12 +0000 (18:59 +0100)]
lkcl [Sat, 1 Oct 2022 17:57:03 +0000 (18:57 +0100)]
lkcl [Sat, 1 Oct 2022 16:37:45 +0000 (17:37 +0100)]
Andrey Miroshnikov [Sat, 1 Oct 2022 11:25:42 +0000 (12:25 +0100)]
docs(pinmux): Added a bit on PinGen
Andrey Miroshnikov [Sat, 1 Oct 2022 10:17:31 +0000 (11:17 +0100)]
docs(pinmux): Changed 'bank' to 'port'/'mux', added section on PinSpec class
lkcl [Thu, 29 Sep 2022 23:15:13 +0000 (00:15 +0100)]
lkcl [Thu, 29 Sep 2022 22:55:10 +0000 (23:55 +0100)]
lkcl [Thu, 29 Sep 2022 22:50:20 +0000 (23:50 +0100)]
IkiWiki [Thu, 29 Sep 2022 22:47:13 +0000 (23:47 +0100)]
dummy commit
Jacob Lifshay [Thu, 29 Sep 2022 22:46:12 +0000 (15:46 -0700)]
use adde, not addeo for bigint add
lkcl [Thu, 29 Sep 2022 22:44:22 +0000 (23:44 +0100)]
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 20:05:57 +0000 (21:05 +0100)]
shuffle eamples around to fit more words on pages
lkcl [Thu, 29 Sep 2022 19:47:49 +0000 (20:47 +0100)]
veerakumar_r [Thu, 29 Sep 2022 16:02:09 +0000 (17:02 +0100)]
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 11:30:09 +0000 (12:30 +0100)]
mention idea of reserving 25% only of PO9 for non-Vectorised uses
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 11:18:26 +0000 (12:18 +0100)]
whitespace
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 11:18:03 +0000 (12:18 +0100)]
add bigint examples
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 08:45:52 +0000 (09:45 +0100)]
replace image bug #907
Luke Kenneth Casson Leighton [Thu, 29 Sep 2022 08:45:39 +0000 (09:45 +0100)]
fix reporting in remapmatrix.py
Jacob Lifshay [Thu, 29 Sep 2022 03:08:47 +0000 (20:08 -0700)]
rename madded->maddedu for consistency with PowerISA maddhdu instruction
Jacob Lifshay [Thu, 29 Sep 2022 03:02:58 +0000 (20:02 -0700)]
rename divrem2du->divmod2du for consistency with PowerISA mod* instructions
lkcl [Wed, 28 Sep 2022 16:24:04 +0000 (17:24 +0100)]
lkcl [Wed, 28 Sep 2022 16:21:49 +0000 (17:21 +0100)]
projects / libreriscv.git / log