Jakub Jelinek [Tue, 6 Dec 2016 09:22:36 +0000 (10:22 +0100)]
re PR c++/71537 (GCC rejects consetxpr boolean conversions and comparisons on the result of pointer arithmetic.)
PR c++/71537
* fold-const-call.c (fold_const_call): Handle
CFN_BUILT_IN_{INDEX,STRCHR,RINDEX,STRRCHR}.
* g++.dg/cpp0x/constexpr-strchr.C: New test.
From-SVN: r243284
Jakub Jelinek [Tue, 6 Dec 2016 09:21:13 +0000 (10:21 +0100)]
re PR tree-optimization/78675 (ICE: verify_gimple failed (error: integral result type precision does not match field size of BIT_FIELD_REF))
2016-12-06 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/78675
* tree-vect-loop.c (vectorizable_live_operation): For
VECTOR_BOOLEAN_TYPE_P vectype use integral type with bitsize precision
instead of TREE_TYPE (vectype) for the BIT_FIELD_REF.
* gcc.c-torture/execute/pr78675.c: New test.
* gcc.target/i386/pr78675-1.c: New test.
* gcc.target/i386/pr78675-2.c: New test.
From-SVN: r243283
Eric Botcazou [Tue, 6 Dec 2016 07:03:04 +0000 (07:03 +0000)]
re PR middle-end/78642 (invalid rtl sharing found in the insn)
PR middle-end/78642
* emit-rtl.c (verify_rtx_sharing) <CLOBBER>: Relax condition.
(copy_rtx_if_shared_1) <CLOBBER>: Likewise.
(copy_insn_1) <CLOBBER>: Likewise.
From-SVN: r243282
DJ Delorie [Tue, 6 Dec 2016 06:40:07 +0000 (01:40 -0500)]
Oops, fix date
From-SVN: r243281
DJ Delorie [Tue, 6 Dec 2016 06:38:23 +0000 (01:38 -0500)]
* argv.c (expandargv): Check for directories passed as @-files.
From-SVN: r243280
Michael Meissner [Tue, 6 Dec 2016 00:58:40 +0000 (00:58 +0000)]
re PR target/78688 (PowerPC fails bootstrap)
2016-12-05 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78688
* config/rs6000/rs6000.h (FUNCTION_VALUE_REGNO_P): Use IN_RANGE
instead of ((N) >= (X) && (N) <= (Y-X)) to silence warnings about
comparing signed to unsigned values.
(FUNCTION_ARG_REGNO_P): Likewise.
From-SVN: r243278
GCC Administrator [Tue, 6 Dec 2016 00:16:18 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243277
Joseph Myers [Mon, 5 Dec 2016 22:49:31 +0000 (22:49 +0000)]
* es.po, fr.po: Update.
From-SVN: r243273
Bill Schmidt [Mon, 5 Dec 2016 21:48:27 +0000 (21:48 +0000)]
re PR tree-optimization/78646 (incorrect result type for pointer addition in slsr)
2016-12-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Stefan Freudenberger <stefan@reservoir.com>
PR tree-optimization/78646
* gimple-ssa-strength-reduction.c (replace_ref): The pointer
addition used for the memory base expression should have the type
of the candidate.
Co-Authored-By: Stefan Freudenberger <stefan@reservoir.com>
From-SVN: r243272
Jeff Law [Mon, 5 Dec 2016 17:49:41 +0000 (10:49 -0700)]
re PR target/71721 (uclinux posix threads)
PR target/71721
* config.gcc (*-*-uclinux*): Enable posix threads.
Adding BZ marker
From-SVN: r243269
Waldemar Brodkorb [Mon, 5 Dec 2016 17:48:39 +0000 (17:48 +0000)]
* config.gcc (*-*-uclinux*): Enable posix threads.
From-SVN: r243268
Andrew Senkevich [Mon, 5 Dec 2016 17:18:42 +0000 (17:18 +0000)]
Add AVX512 k-mask intrinsics
gcc/
2016-12-05 Andrew Senkevich <andrew.senkevich@intel.com>
* config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h: Ditto.
* config/i386/i386-builtin-types.def (UCHAR_FTYPE_UQI_UQI_PUCHAR,
UCHAR_FTYPE_UHI_UHI_PUCHAR, UCHAR_FTYPE_USI_USI_PUCHAR,
UCHAR_FTYPE_UDI_UDI_PUCHAR, UCHAR_FTYPE_UQI_UQI, UCHAR_FTYPE_UHI_UHI,
UCHAR_FTYPE_USI_USI, UCHAR_FTYPE_UDI_UDI, UQI_FTYPE_UQI_INT,
UHI_FTYPE_UHI_INT, USI_FTYPE_USI_INT, UDI_FTYPE_UDI_INT,
UQI_FTYPE_UQI, USI_FTYPE_USI, UDI_FTYPE_UDI, UQI_FTYPE_UQI_UQI): New
function types.
* config/i386/i386-builtin.def (__builtin_ia32_knotqi,
__builtin_ia32_knotsi, __builtin_ia32_knotdi,
__builtin_ia32_korqi, __builtin_ia32_korsi, __builtin_ia32_kordi,
__builtin_ia32_kxnorqi, __builtin_ia32_kxnorsi,
__builtin_ia32_kxnordi, __builtin_ia32_kxorqi, __builtin_ia32_kxorsi,
__builtin_ia32_kxordi, __builtin_ia32_kandqi,
__builtin_ia32_kandsi, __builtin_ia32_kanddi, __builtin_ia32_kandnqi,
__builtin_ia32_kandnsi, __builtin_ia32_kandndi): New.
* config/i386/i386.c (ix86_expand_args_builtin): Handle new types.
gcc/testsuite/
2016-12-05 Andrew Senkevich <andrew.senkevich@intel.com>
* gcc.target/i386/avx512bw-kandd-1.c: New.
* gcc.target/i386/avx512bw-kandnd-1.c: Ditto.
* gcc.target/i386/avx512bw-kandnq-1.c: Ditto.
* gcc.target/i386/avx512bw-kandq-1.c: Ditto.
* gcc.target/i386/avx512bw-knotd-1.c: Ditto.
* gcc.target/i386/avx512bw-knotq-1.c: Ditto.
* gcc.target/i386/avx512bw-kord-1.c: Ditto.
* gcc.target/i386/avx512bw-korq-1.c: Ditto.
* gcc.target/i386/avx512bw-kunpckdq-3.c: Ditto.
* gcc.target/i386/avx512bw-kunpckwd-3.c: Ditto.
* gcc.target/i386/avx512bw-kxnord-1.c: Ditto.
* gcc.target/i386/avx512bw-kxnorq-1.c: Ditto.
* gcc.target/i386/avx512bw-kxord-1.c: Ditto.
* gcc.target/i386/avx512bw-kxorq-1.c: Ditto.
* gcc.target/i386/avx512dq-kandb-1.c: Ditto.
* gcc.target/i386/avx512dq-kandnb-1.c: Ditto.
* gcc.target/i386/avx512dq-knotb-1.c: Ditto.
* gcc.target/i386/avx512dq-korb-1.c: Ditto.
* gcc.target/i386/avx512dq-kxnorb-1.c: Ditto.
* gcc.target/i386/avx512dq-kxorb-1.c: Ditto.
* gcc.target/i386/avx512f-kunpckbw-3.c: Ditto.
* gcc.target/i386/avx512f-kandnw-1.c: Removed unneeded check.
From-SVN: r243265
Segher Boessenkool [Mon, 5 Dec 2016 13:54:42 +0000 (14:54 +0100)]
Subject: [PATCH] Revert "Do not simplify "(and (reg) (const bit)" to
if_then_else."
* combine.c: Revert r243162.
From-SVN: r243256
Paolo Bonzini [Mon, 5 Dec 2016 13:19:34 +0000 (13:19 +0000)]
match.pd: Simplify X ? C : 0 where C is a power of 2 and X tests a single bit.
gcc:
* match.pd: Simplify X ? C : 0 where C is a power of 2 and
X tests a single bit.
gcc/testsuite:
* gcc.dg/fold-and-lshift.c, gcc.dg/fold-and-rshift-1.c,
gcc.dg/fold-and-rshift-2.c: New testcases.
From-SVN: r243255
Nathan Sidwell [Mon, 5 Dec 2016 12:24:39 +0000 (12:24 +0000)]
diagnostic.c (diagnostic_check_max_errors): New, broken out of ...
gcc/
* diagnostic.c (diagnostic_check_max_errors): New, broken out of ...
(diagnostic_action_after_output): ... here.
(diagnostic_report_diagnostic): Call it for non-notes.
* diagnostic.h (struct diagnostic_context): Make max_errors signed
int.
(diagnostic_check_max_errors): Declare.
gcc/fortran/
* error.c (gfc_warning_check): Call diagnostic_check_max_errors.
(gfc_error_check): Likewise.
gcc/testsuite/
* c-c++-common/fmax_errors.c: Check notes after last error are
emitted.
From-SVN: r243254
Mikael Pettersson [Mon, 5 Dec 2016 11:27:55 +0000 (12:27 +0100)]
re PR ada/48835 (porting GNAT to m68k-linux)
PR ada/48835
* gcc-interface/Makefile.in: Add support for m68k-linux.
* system-linux-m68k.ads: New file.
From-SVN: r243247
Cupertino Miranda [Mon, 5 Dec 2016 11:16:52 +0000 (11:16 +0000)]
[ARC] Fix PIE.
gcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config/arc/arc.h (STARTFILE_SPEC): Use default linux specs.
(ENDFILE_SPEC): Likewise.
libgcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config.host (arc*-*-linux-uclibc*): Use default extra
objects. Include linux-android header.
* config/arc/crti.S (_init): Declare symbol as function.
(_fini): Likewise.
From-SVN: r243245
Claudiu Zissulescu [Mon, 5 Dec 2016 11:16:38 +0000 (12:16 +0100)]
[ARC] Remove unused patterns, refactor unspec+offset pattern gen.
2016-12-05 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (insn_is_tls_gd_dispatch): Remove.
* config/arc/arc.c (arc_unspec_offset): New function.
(arc_finalize_pic): Change.
(arc_emit_call_tls_get_addr): Likewise.
(arc_legitimize_tls_address): Likewise.
(arc_legitimize_pic_address): Likewise.
(insn_is_tls_gd_dispatch): Remove.
* config/arc/arc.h (INSN_REFERENCES_ARE_DELAYED): Change.
* config/arc/arc.md (ls_gd_load): Remove unused pattern.
(tls_gd_dispatch): Likewise.
From-SVN: r243244
Eric Botcazou [Mon, 5 Dec 2016 11:15:17 +0000 (11:15 +0000)]
system-darwin-ppc.ads (Support_Atomic_Primitives): Set to True only if the word size is 64.
* system-darwin-ppc.ads (Support_Atomic_Primitives): Set to True only
if the word size is 64.
From-SVN: r243243
Andre Vieira [Mon, 5 Dec 2016 09:44:24 +0000 (09:44 +0000)]
Fix arm-netbsdelf bootstrap.
2016-12-025 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/arm.c (TARGET_ASM_INIT_SECTIONS): Fix wrong undef
location.
From-SVN: r243240
James Greenhalgh [Mon, 5 Dec 2016 09:35:28 +0000 (09:35 +0000)]
[Patch 2/2 PR78561] Recalculate constant pool size before emitting it
gcc/testsuite/
PR rtl-optimization/78561
* gcc.target/aarch64/pr78561.c: Add missing testcase from r243183.
From-SVN: r243239
Eric Botcazou [Mon, 5 Dec 2016 09:30:57 +0000 (09:30 +0000)]
sparc-protos.h (sparc_splitdi_legitimate): Rename to...
* config/sparc/sparc-protos.h (sparc_splitdi_legitimate): Rename to...
(sparc_split_reg_mem_legitimate): ...this.
(sparc_split_reg_mem): Declare.
(sparc_split_mem_reg): Likewise.
(sparc_split_regreg_legitimate): Rename to...
(sparc_split_reg_reg_legitimate): ...this.
* config/sparc/sparc.c (sparc_splitdi_legitimate): Rename to...
(sparc_split_reg_mem_legitimate): ...this.
(sparc_split_reg_mem): New function.
(sparc_split_mem_reg): Likewise.
(sparc_split_regreg_legitimate): Rename to...
(sparc_split_reg_reg_legitimate): ...this.
(sparc_split_reg_reg): New function.
* config/sparc/sparc.md (lra): Remove "none" value.
(enabled): Adjust to above change.
(*movdi_insn_sp32): Remove new (r,T) alternative and reorder others.
(DImode splitters): Adjust to above renamings and use new functions.
(*movdf_insn_sp32): Remove new (r,T) alternative and reorder others.
(DFmode splitters): Adjust to above renamings and use new functions.
(*mov<VM64:mode>_insn_sp64): Replace C with Z constraint and use W
constraint in conjunction with e.
(*mov<VM64:mode>_insn_sp32): Remove new (r,T) alternative, add (o,Y)
alternative and reorder others.
(VM64:mode splitters): Adjust to above renamings and use new functions.
From-SVN: r243238
GCC Administrator [Mon, 5 Dec 2016 00:16:15 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243235
Janus Weil [Sun, 4 Dec 2016 20:31:26 +0000 (21:31 +0100)]
re PR fortran/78618 (ICE in gfc_check_rank, at fortran/check.c:3670)
2016-12-04 Janus Weil <janus@gcc.gnu.org>
PR fortran/78618
* intrinsic.c (gfc_convert_type_warn): Do not set the full typespec for
the conversion symbol, but only type and kind. Set the full typespec
for the expression.
(gfc_convert_chartype): Ditto.
From-SVN: r243232
Martin Sebor [Sun, 4 Dec 2016 17:48:44 +0000 (17:48 +0000)]
PR c/78668 - aligned_alloc, realloc, et al. missing attribute alloc_size
gcc/ChangeLog:
PR c/78668
* builtin-attrs.def (ATTR_ALLOC_SIZE, ATTR_RETURNS_NONNULL): New
identifier tree nodes.
(ATTR_ALLOCA_SIZE_1_NOTHROW_LEAF_LIST): New attribute list.
(ATTR_MALLOC_SIZE_1_NOTHROW_LIST): Same.
(ATTR_MALLOC_SIZE_1_NOTHROW_LEAF_LIST): Same.
(ATTR_MALLOC_SIZE_1_2_NOTHROW_LEAF_LIST): Same.
(ATTR_ALLOC_SIZE_2_NOTHROW_LEAF_LIST): Same.
* builtins.def (aligned_alloc, calloc, malloc, realloc):
Add attribute alloc_size.
(alloca): Add attribute alloc_size and returns_nonnull.
gcc/testsuite/ChangeLog:
PR c/78668
* gcc.dg/builtin-alloc-size.c: New test.
From-SVN: r243231
Uros Bizjak [Sun, 4 Dec 2016 14:38:05 +0000 (15:38 +0100)]
re PR target/70322 (STV doesn't optimize andn)
PR target/70322
* config/i386/i386.c (dimode_scalar_to_vector_candidate_p): Handle NEG.
(dimode_scalar_chain::compute_convert_gain): Ditto.
(dimode_scalar_chain::convert_insn): Ditto.
testsuite/ChangeLog:
PR target/70322
* gcc.target/i386/pr70322-4.c: New test.
From-SVN: r243228
GCC Administrator [Sun, 4 Dec 2016 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243227
Janus Weil [Sat, 3 Dec 2016 18:48:48 +0000 (19:48 +0100)]
re PR fortran/43207 ([OOP] invalid (pointer) assignment to and from abstract non-polymorphic expressions)
2016-12-03 Janus Weil <janus@gcc.gnu.org>
PR fortran/43207
* primary.c (gfc_match_varspec): Reject nonpolymorphic references to
abstract types.
2016-12-03 Janus Weil <janus@gcc.gnu.org>
PR fortran/43207
* gfortran.dg/abstract_type_9.f90: New test case.
From-SVN: r243224
Janus Weil [Sat, 3 Dec 2016 18:37:57 +0000 (19:37 +0100)]
re PR fortran/42188 ([OOP] F03:C612. The leftmost part-name shall be the name of a data object.)
2016-12-03 Janus Weil <janus@gcc.gnu.org>
PR fortran/42188
* primary.c (gfc_match_rvalue): Add a new check that gives better error
messages.
2016-12-03 Janus Weil <janus@gcc.gnu.org>
PR fortran/42188
* gfortran.dg/derived_result_2.f90.f90: New test case.
From-SVN: r243223
Eric Botcazou [Sat, 3 Dec 2016 17:37:13 +0000 (17:37 +0000)]
lra-constraints.c (emit_spill_move): Use gen_lowpart_SUBREG in all cases to build a lowpart SUBREG.
* lra-constraints.c (emit_spill_move): Use gen_lowpart_SUBREG in all
cases to build a lowpart SUBREG.
From-SVN: r243222
Eric Botcazou [Sat, 3 Dec 2016 17:29:43 +0000 (17:29 +0000)]
constraints.md (U): Adjust comment.
* config/sparc/constraints.md (U): Adjust comment.
* config/sparc/sparc.md (lra): New attribute.
(enabled): For base instructions, if the lra attribute is set,
return 1 if it is in keeping with TARGET_LRA.
(*movdi_insn_sp32): Add lra attribute for alternatives mentioning U
constraint and duplicate them with U replaced by r.
(*movdf_insn_sp32): Likewise.
(*mov<VM64:mode>_insn_sp32): Likewise.
(*movtf_insn_sp32): Remove alternatives mentioning U constraint.
From-SVN: r243221
John David Anglin [Sat, 3 Dec 2016 16:10:43 +0000 (16:10 +0000)]
baseline_symbols.txt: Regenerate.
* config/abi/post/hppa-linux-gnu/baseline_symbols.txt: Regenerate.
From-SVN: r243220
Thomas Koenig [Sat, 3 Dec 2016 09:44:35 +0000 (09:44 +0000)]
re PR libfortran/78379 (Processor-specific versions for matmul)
2016-12-03 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/78379
* config/i386/cpuinfo.c: Move denums for processor vendors,
processor type, processor subtypes and declaration of
struct __processor_model into
* config/i386/cpuinfo.h: New header file.
* Makefile.am: Add dependence of m4/matmul_internal_m4 to
mamtul files..
* Makefile.in: Regenerated.
* acinclude.m4: Check for AVX, AVX2 and AVX512F.
* config.h.in: Add HAVE_AVX, HAVE_AVX2 and HAVE_AVX512F.
* configure: Regenerated.
* configure.ac: Use checks for AVX, AVX2 and AVX_512F.
* m4/matmul_internal.m4: New file. working part of matmul.m4.
* m4/matmul.m4: Implement architecture-specific switching
for AVX, AVX2 and AVX512F by including matmul_internal.m4
multiple times.
* generated/matmul_c10.c: Regenerated.
* generated/matmul_c16.c: Regenerated.
* generated/matmul_c4.c: Regenerated.
* generated/matmul_c8.c: Regenerated.
* generated/matmul_i1.c: Regenerated.
* generated/matmul_i16.c: Regenerated.
* generated/matmul_i2.c: Regenerated.
* generated/matmul_i4.c: Regenerated.
* generated/matmul_i8.c: Regenerated.
* generated/matmul_r10.c: Regenerated.
* generated/matmul_r16.c: Regenerated.
* generated/matmul_r4.c: Regenerated.
* generated/matmul_r8.c: Regenerated.
From-SVN: r243219
Janus Weil [Sat, 3 Dec 2016 09:32:27 +0000 (10:32 +0100)]
re PR fortran/58175 ([OOP] Incorrect warning message on scalar finalizer)
2016-12-03 Janus Weil <janus@gcc.gnu.org>
PR fortran/58175
* resolve.c (gfc_resolve_finalizers): Prevent bogus warning.
2016-12-03 Janus Weil <janus@gcc.gnu.org>
PR fortran/58175
* gfortran.dg/finalize_30.f90: Extend test case.
From-SVN: r243218
Steven G. Kargl [Sat, 3 Dec 2016 07:23:13 +0000 (07:23 +0000)]
expr.c (gfc_build_conversion): Remove unneeded initialization.
2016-12-02 Steven G. Kargl <kargl@gcc.gnu.org>
* expr.c (gfc_build_conversion): Remove unneeded initialization.
From-SVN: r243217
Jeff Law [Sat, 3 Dec 2016 02:02:51 +0000 (19:02 -0700)]
arm.c (arm_handle_cmse_nonsecure_call): Remove unused variable main_variant.
* config/arm/arm.c (arm_handle_cmse_nonsecure_call): Remove unused
variable main_variant.
From-SVN: r243216
Michael Meissner [Sat, 3 Dec 2016 00:41:44 +0000 (00:41 +0000)]
config.gcc (powerpc*-*-linux*): Set gnu-indirect-function by default on PowerPC linux systems.
2016-12-02 Michael Meissner <meissner@linux.vnet.ibm.com>
* config.gcc (powerpc*-*-linux*): Set gnu-indirect-function by
default on PowerPC linux systems.
From-SVN: r243215
GCC Administrator [Sat, 3 Dec 2016 00:16:15 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243214
Segher Boessenkool [Fri, 2 Dec 2016 23:51:31 +0000 (00:51 +0100)]
simplify-rtx: Fix the last fix (PR78638)
I managed to get the last obvious fix wrong: mode is M1, GET_MODE (op)
is M2.
* simplify-rtx.c (simplify_truncation): M2 is not mode, it is
GET_MODE (op). Fix this.
From-SVN: r243210
David Malcolm [Fri, 2 Dec 2016 22:39:43 +0000 (22:39 +0000)]
selftest.c: remove calls to strndup (PR bootstrap/78616)
gcc/ChangeLog:
PR bootstrap/78616
* selftest.c (selftest::assert_strndup_eq): Rename to...
(selftest::assert_xstrndup_eq): ...this, and remove call to
strndup.
(selftest::test_strndup): Rename to...
(selftest::test_xstrndup): ...this, updating for above renaming.
(selftest::test_libiberty): Update for renaming.
From-SVN: r243207
Michael Meissner [Fri, 2 Dec 2016 22:12:08 +0000 (22:12 +0000)]
re PR target/78639 (Power9 bad code generation for cactusADM benchmark)
2016-12-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78639
* config/rs6000/rs6000.md (movdi_internal64): Fix typo in
subversion id 242679 that causes the wrong store instruction to be
generated if a DImode is in an Altivec register using REG+REG
addressing.
From-SVN: r243206
Steven G. Kargl [Fri, 2 Dec 2016 22:09:13 +0000 (22:09 +0000)]
simplify.c (gfc_convert_char_constant): Free result on error.
2016-12-02 Steven G. Kargl <kargl@gcc.gnu.org>
* simplify.c (gfc_convert_char_constant): Free result on error.
From-SVN: r243205
Jakub Jelinek [Fri, 2 Dec 2016 21:23:22 +0000 (22:23 +0100)]
re PR c++/78649 (ICE on invalid C++ code on x86_64-linux-gnu (internal compiler error: tree check: expected class ‘type’, have ‘exceptional’ (error_mark) in build_value_init_noctor, at cp/init.c:380))
PR c++/78649
* pt.c (tsubst_init): Don't call build_value_init if decl's type
is error_mark_node.
* g++.dg/cpp0x/pr78649.C: New test.
From-SVN: r243204
Uros Bizjak [Fri, 2 Dec 2016 18:48:35 +0000 (19:48 +0100)]
re PR target/70322 (STV doesn't optimize andn)
PR target/70322
* config/i386/i386.md (*andndi3_doubleword): Add non-BMI alternative
and corresponding post-reload splitter.
testsuite/ChangeLog:
PR target/70322
* gcc.target/i386/pr70322-2.c (dg-final): Remove xfail.
From-SVN: r243202
Janus Weil [Fri, 2 Dec 2016 18:38:24 +0000 (19:38 +0100)]
[multiple changes]
2016-12-02 Janus Weil <janus@gcc.gnu.org>
Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78618
* check.c (gfc_check_rank): Remove ATTRIBUTE_UNUSED.
* expr.c (gfc_check_assign): Fix error propagation.
2016-12-02 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78618
* gfortran.dg/char_conversion.f90: New test.
From-SVN: r243201
Kyrylo Tkachov [Fri, 2 Dec 2016 17:13:08 +0000 (17:13 +0000)]
[AArch64] Separate shrink wrapping hooks implementation
* config/aarch64/aarch64.h (machine_function): Add
reg_is_wrapped_separately field.
* config/aarch64/aarch64.md (LAST_SAVED_REGNUM): Define new constant.
* config/aarch64/aarch64.c (emit_set_insn): Change return type to
rtx_insn *.
(aarch64_save_callee_saves): Don't save registers that are wrapped
separately.
(aarch64_restore_callee_saves): Don't restore registers that are
wrapped separately.
(offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p,
aarch64_offset_7bit_signed_scaled_p): Move earlier in the file.
(aarch64_get_separate_components): New function.
(aarch64_get_next_set_bit): Likewise.
(aarch64_components_for_bb): Likewise.
(aarch64_disqualify_components): Likewise.
(aarch64_emit_prologue_components): Likewise.
(aarch64_emit_epilogue_components): Likewise.
(aarch64_set_handled_components): Likewise.
(aarch64_process_components): Likewise.
(TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS,
TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB,
TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS,
TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS,
TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS,
TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Define.
From-SVN: r243200
Martin Jambor [Fri, 2 Dec 2016 17:05:10 +0000 (18:05 +0100)]
Move rebuild_cfg to the end of build_ssa_passes
2016-12-02 Martin Jambor <mjambor@suse.cz>
* passes.def: Move pass_rebuild_cgraph_edges to the end of
pass_build_ssa_passes.
From-SVN: r243199
Uros Bizjak [Fri, 2 Dec 2016 16:53:23 +0000 (17:53 +0100)]
alpha.md (exception_receiver): Copy alpha_gp_ave_rtx return value.
* config/alpha/alpha.md (exception_receiver): Copy
alpha_gp_ave_rtx return value.
From-SVN: r243197
Tadek Kijkowski [Fri, 2 Dec 2016 16:34:28 +0000 (16:34 +0000)]
Makefile.in (PREPROCESSOR_DEFINES): Add a level of indirection for several include directories that may be relative...
* Makefile.in (PREPROCESSOR_DEFINES): Add a level of indirection
for several include directories that may be relative to sysroot.
* config/i386/x-mingw32 (gplus_includedir): Define.
(gplus_tool_includedir, gplus_backward_include_dir): Likewise.
(native_system_includedir): Likewise.
* config/i386/mingw32.h (STANDARD_STARTFILE_PREFIX_1): Do not
override if TARGET_SYSTEM_ROOT is defined.
(NATIVE_SYSTEM_HEADER_DIR): Likewise.
From-SVN: r243196
Jakub Jelinek [Fri, 2 Dec 2016 16:28:41 +0000 (17:28 +0100)]
re PR target/70322 (STV doesn't optimize andn)
PR target/70322
* config/i386/i386.c (dimode_scalar_to_vector_candidate_p): Handle
NOT.
(dimode_scalar_chain::compute_convert_gain): Likewise.
(dimode_scalar_chain::convert_insn): Likewise.
* config/i386/i386.md (*one_cmpldi2_doubleword): New
define_insn_and_split.
(one_cmpl<mode>2): Use SWIM1248x iterator instead of SWIM.
* gcc.target/i386/pr70322-1.c: New test.
* gcc.target/i386/pr70322-2.c: New test.
* gcc.target/i386/pr70322-3.c: New test.
From-SVN: r243195
Jakub Jelinek [Fri, 2 Dec 2016 15:42:04 +0000 (16:42 +0100)]
re PR target/78614 (ICE error: invalid rtl sharing found in the insn (verify_rtx_sharing) gcc/emit-rtl.c:2743)
PR target/78614
* rtl.c (copy_rtx): Don't clear used flag here.
(shallow_copy_rtx_stat): Clear used flag here unless code the rtx
is shareable.
* simplify-rtx.c (simplify_replace_fn_rtx): When copying rtx with
'E' in format, copy all vectors.
* emit-rtl.c (copy_insn_1): Don't clear used flag here.
* valtrack.c (cleanup_auto_inc_dec): Likewise.
* config/rs6000/rs6000.c (rs6000_frame_related): Likewise.
From-SVN: r243194
Andre Vieira [Fri, 2 Dec 2016 15:34:36 +0000 (15:34 +0000)]
Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-builtins.c (arm_builtins): Define
ARM_BUILTIN_CMSE_NONSECURE_CALLER.
(bdesc_2arg): Add line for cmse_nonsecure_caller.
(arm_init_builtins): Handle cmse_nonsecure_caller.
(arm_expand_builtin): Likewise.
* config/arm/arm_cmse.h (cmse_nonsecure_caller): New.
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-1.c: Add test for
cmse_nonsecure_caller.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243193
Andre Vieira [Fri, 2 Dec 2016 15:33:26 +0000 (15:33 +0000)]
ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (detect_cmse_nonsecure_call): New.
(cmse_nonsecure_call_clear_caller_saved): New.
(arm_reorg): Use cmse_nonsecure_call_clear_caller_saved.
(arm_function_ok_for_sibcall): Disable sibcalls for
cmse_nonsecure_call.
* config/arm/arm-protos.h (detect_cmse_nonsecure_call): New.
* config/arm/arm.md (call): Handle cmse_nonsecure_entry.
(call_value): Likewise.
(nonsecure_call_internal): New.
(nonsecure_call_value_internal): New.
* config/arm/thumb1.md (*nonsecure_call_reg_thumb1_v5): New.
(*nonsecure_call_value_reg_thumb1_v5): New.
* config/arm/thumb2.md (*nonsecure_call_reg_thumb2): New.
(*nonsecure_call_value_reg_thumb2): New.
* config/arm/unspecs.md (UNSPEC_NONSECURE_MEM): New.
libgcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/cmse_nonsecure_call.S: New.
* config/arm/t-arm: Compile cmse_nonsecure_call.S
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: Run tests in mainline dir.
* gcc.target/arm/cmse/cmse-9.c: Added some extra tests.
* gcc.target/arm/cmse/cmse-14.c: New.
* gcc.target/arm/cmse/baseline/bitfield-4.c: New.
* gcc.target/arm/cmse/baseline/bitfield-5.c: New.
* gcc.target/arm/cmse/baseline/bitfield-6.c: New.
* gcc.target/arm/cmse/baseline/bitfield-7.c: New.
* gcc.target/arm/cmse/baseline/bitfield-8.c: New.
* gcc.target/arm/cmse/baseline/bitfield-9.c: New.
* gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: New.
* gcc.target/arm/cmse/baseline/cmse-11.c: New.
* gcc.target/arm/cmse/baseline/cmse-13.c: New.
* gcc.target/arm/cmse/baseline/cmse-6.c: New.
* gcc.target/arm/cmse/baseline/union-1.c: New.
* gcc.target/arm/cmse/baseline/union-2.c: New.
* gcc.target/arm/cmse/mainline/bitfield-4.c: New.
* gcc.target/arm/cmse/mainline/bitfield-5.c: New.
* gcc.target/arm/cmse/mainline/bitfield-6.c: New.
* gcc.target/arm/cmse/mainline/bitfield-7.c: New.
* gcc.target/arm/cmse/mainline/bitfield-8.c: New.
* gcc.target/arm/cmse/mainline/bitfield-9.c: New.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: New.
* gcc.target/arm/cmse/mainline/union-1.c: New.
* gcc.target/arm/cmse/mainline/union-2.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: New.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243192
Andre Vieira [Fri, 2 Dec 2016 15:30:37 +0000 (15:30 +0000)]
Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (gimplify.h): New include.
(arm_handle_cmse_nonsecure_call): New.
(arm_attribute_table): Added cmse_nonsecure_call.
(arm_comp_type_attributes): Deny compatibility of function types
with without the cmse_nonsecure_call attribute.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-3.c: Add tests.
* gcc.target/arm/cmse/cmse-4.c: Add tests.
* gcc.target/arm/cmse/cmse-15.c: New.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243191
Andre Vieira [Fri, 2 Dec 2016 15:29:03 +0000 (15:29 +0000)]
ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (output_return_instruction): Clear
registers.
(thumb2_expand_return): Likewise.
(thumb1_expand_epilogue): Likewise.
(thumb_exit): Likewise.
(arm_expand_epilogue): Likewise.
(cmse_nonsecure_entry_clear_before_return): New.
(comp_not_to_clear_mask_str_un): New.
(compute_not_to_clear_mask): New.
* config/arm/thumb1.md (*epilogue_insns): Change length attribute.
* config/arm/thumb2.md (*thumb2_return): Disable for
cmse_nonsecure_entry functions.
(*thumb2_cmse_entry_return): Duplicate thumb2_return pattern for
cmse_nonsecure_entry functions.
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: Test different multilibs separate.
* gcc.target/arm/cmse/struct-1.c: New.
* gcc.target/arm/cmse/bitfield-1.c: New.
* gcc.target/arm/cmse/bitfield-2.c: New.
* gcc.target/arm/cmse/bitfield-3.c: New.
* gcc.target/arm/cmse/baseline/cmse-2.c: New.
* gcc.target/arm/cmse/baseline/softfp.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: New.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243190
Andre Vieira [Fri, 2 Dec 2016 15:27:03 +0000 (15:27 +0000)]
ARMv8-M Security Extension's cmse_nonsecure_entry: __acle_se label and bxns
return
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (use_return_insn): Change to return with bxns
when cmse_nonsecure_entry.
(output_return_instruction): Likewise.
(arm_output_function_prologue): Likewise.
(thumb_pop): Likewise.
(thumb_exit): Likewise.
(thumb2_expand_return): Assert that entry functions always have simple
returns.
(arm_expand_epilogue): Handle entry functions.
(arm_function_ok_for_sibcall): Disable sibcall for entry functions.
(arm_asm_declare_function_name): New.
* config/arm/arm-protos.h (arm_asm_declare_function_name): New.
* config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to
use arm_asm_declare_function_name.
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-4.c: New.
* gcc.target/arm/cmse/cmse-9.c: New.
* gcc.target/arm/cmse/cmse-10.c: New.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243189
Andre Vieira [Fri, 2 Dec 2016 15:24:40 +0000 (15:24 +0000)]
Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_nonsecure_entry
(arm_compute_func_type): Handle cmse_nonsecure_entry.
(cmse_func_args_or_return_in_stack): New.
(arm_handle_cmse_nonsecure_entry): New.
* config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define.
(IS_CMSE_ENTRY): Likewise.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-3.c: New.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243188
Andre Vieira [Fri, 2 Dec 2016 15:22:43 +0000 (15:22 +0000)]
Add support for ARMv8-M's Secure Extensions flag and intrinsics
gcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config.gcc (extra_headers): Added arm_cmse.h.
* config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-c.c
(arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro.
* config/arm/arm-flags.h: Define FL2_CMSE.
* config/arm.c (arm_arch_cmse): New.
(arm_option_override): New error for unsupported cmse target.
* config/arm/arm.h (arm_arch_cmse): New.
* config/arm/arm.opt (mcmse): New.
* config/arm/arm_cmse.h: New file.
* doc/invoke.texi (ARM Options): Add -mcmse.
* doc/sourcebuild.texi (arm_cmse_ok): Add new effective target.
* doc/extend.texi: Add ARMv8-M Security Extensions entry.
gcc/testsuite/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: New.
* gcc.target/arm/cmse/cmse-1.c: New.
* gcc.target/arm/cmse/cmse-12.c: New.
* lib/target-supports.exp
(check_effective_target_arm_cmse_ok): New.
libgcc/ChangeLog:
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-arm (HAVE_CMSE): New.
* config/arm/cmse.c: New.
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r243187
Georg-Johann Lay [Fri, 2 Dec 2016 15:08:27 +0000 (15:08 +0000)]
avr.c: Fix coding rule glitches.
* config/avr/avr.c: Fix coding rule glitches.
From-SVN: r243186
Cesar Philippidis [Fri, 2 Dec 2016 14:54:39 +0000 (06:54 -0800)]
c-parser.c (c_parser_pragma): Error when PRAGMA_OACC_{ENTER_DATA...
gcc/c/
* c-parser.c (c_parser_pragma): Error when PRAGMA_OACC_{ENTER_DATA,
EXIT_DATA,WAIT} are not used in compound statements.
(c_parser_oacc_enter_exit_data): Update diagnostics.
gcc/cp/
* parser.c (cp_parser_oacc_enter_exit_data): Update diagnostics.
(cp_parser_pragma): Error when PRAGMA_OACC_{ENTER_DATA,
EXIT_DATA,WAIT} are not used in compound statements.
gcc/testsuite/
* c-c++-common/goacc/data-2.c: Adjust test.
* c-c++-common/goacc/executeables-1.c: New test.
* g++.dg/goacc/data-1.C: Adjust test.
Co-Authored-By: James Norris <jnorris@codesourcery.com>
From-SVN: r243185
Martin Jambor [Fri, 2 Dec 2016 14:42:15 +0000 (15:42 +0100)]
[hsa] Exclude parallel outlines from hsa_callable_functions_p
2016-12-09 Martin Jambor <mjambor@suse.cz>
* hsa.c (hsa_callable_function_p): Return false for artificial
functions.
From-SVN: r243184
James Greenhalgh [Fri, 2 Dec 2016 14:31:10 +0000 (14:31 +0000)]
[Patch 2/2 PR78561] Recalculate constant pool size before emitting it
gcc/
PR rtl-optimization/78561
* varasm.c (recompute_pool_offsets): New.
(output_constant_pool): Call it.
gcc/testsuite/
PR rtl-optimization/78561
* gcc.target/aarch64/pr78561.c: New.
From-SVN: r243183
James Greenhalgh [Fri, 2 Dec 2016 14:29:35 +0000 (14:29 +0000)]
[Patch 1/2 PR78561] Rename get_pool_size to get_pool_size_upper_bound
gcc/
PR rtl-optimization/78561
* config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p) Rename
get_pool_size to get_pool_size_upper_bound.
(rs6000_stack_info): Likewise.
(rs6000_emit_prologue): Likewise.
(rs6000_elf_declare_function_name): Likewise.
(rs6000_set_up_by_prologue): Likewise.
(rs6000_can_eliminate): Likewise, reformat spaces to tabs.
* output.h (get_pool_size): Rename to...
(get_pool_size_upper_bound): ...This.
* varasm.c (get_pool_size): Rename to...
(get_pool_size_upper_bound): ...This.
From-SVN: r243182
Sebastian Huber [Fri, 2 Dec 2016 14:13:12 +0000 (14:13 +0000)]
[RTEMS] Use spin lock for pool management
libgomp/
* libgomp/config/rtems/pool.h (gomp_thread_pool_reservoir): Use
pthread_spinlock_t instead of gomp_mutex_t lock.
(gomp_get_thread_pool): Likewise.
(gomp_release_thread_pool): Likewise.
* libgomp/config/rtems/proc.c (allocate_thread_pool_reservoir):
Likewise.
From-SVN: r243181
Bin Cheng [Fri, 2 Dec 2016 14:13:11 +0000 (14:13 +0000)]
match.pd: Add new pattern: (cond (cmp (convert?
* match.pd: Add new pattern:
(cond (cmp (convert? x) c1) (op x c2) c3) -> (op (minmax x c1) c2).
gcc/testsuite
* gcc.dg/fold-bopcond-1.c: New test.
* gcc.dg/fold-bopcond-2.c: New test.
From-SVN: r243180
Sebastian Huber [Fri, 2 Dec 2016 14:10:33 +0000 (14:10 +0000)]
[RTEMS] Fix libgomp for nthreads == 1
libgomp/
* config/rtems/pool.h (gomp_get_thread_pool): Return proper
thread pool in case nthreads == 1.
From-SVN: r243179
Jason Merrill [Fri, 2 Dec 2016 13:58:32 +0000 (08:58 -0500)]
call.c (add_function_candidate): Also exclude inherited ctors that take a type reference-related to the derived...
* call.c (add_function_candidate): Also exclude inherited ctors
that take a type reference-related to the derived class.
From-SVN: r243178
Nathan Sidwell [Fri, 2 Dec 2016 13:14:01 +0000 (13:14 +0000)]
diagnostic.c (diagnostic_report_diagnostic): Remove extraneous braces.
* diagnostic.c (diagnostic_report_diagnostic): Remove extraneous
braces.
From-SVN: r243177
Dominik Vogt [Fri, 2 Dec 2016 12:32:16 +0000 (12:32 +0000)]
S/390: Fix setmem-long test.
Adding a " in the scan-assembler pattern is necessary because of a
recent change in print-rtl.c.
gcc/testsuite/ChangeLog:
2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com>
* gcc.target/s390/md/setmem_long-1.c: Fix test.
From-SVN: r243176
Aldy Hernandez [Fri, 2 Dec 2016 12:20:42 +0000 (12:20 +0000)]
re PR middle-end/78328 (wrong wording for unbounded alloc case in -Walloca-larger-than note)
PR middle-end/78328
* gimple-ssa-warn-alloca.c (alloca_call_type): Handle
VR_ANTI_RANGE.
From-SVN: r243174
Andreas Krebbel [Fri, 2 Dec 2016 11:52:58 +0000 (11:52 +0000)]
S/390: Fix RTL sharing when generating reg note.
gcc/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_save_gprs_to_fprs): Fix RTL sharing
problem.
From-SVN: r243173
Georg-Johann Lay [Fri, 2 Dec 2016 09:12:22 +0000 (09:12 +0000)]
avr-arch.h (avr_mcu_t): Remove field.
* config/avr/avr-arch.h (avr_mcu_t) [n_flash]: Remove field.
* config/avr/avr-devices.c (AVR_MCU): Remove N_FLASH macro argument.
* config/avr/avr-mcus.def (AVR_MCU): Remove initializer for n_flash.
* config/avr/avr.c (avr_set_core_architecture) [avr_n_flash]: Use
avr_mcu_types.flash_size to compute default value.
* config/avr/gen-avr-mmcu-specs.c (print_mcu) [cc1_n_flash]: Use
mcu->flash_size to compute value for spec.
From-SVN: r243171
Georg-Johann Lay [Fri, 2 Dec 2016 09:05:56 +0000 (09:05 +0000)]
invoke.texi (AVR Options): Point to absdata.
* doc/invoke.texi (AVR Options) [-mabsdata]: Point to absdata.
* doc/extend.texi (AVR Variable Attributes) [progmem]: Hint
about linker description to avoid progmem altogether.
[absdata]: Point to -mabsdata option.
From-SVN: r243170
Jakub Jelinek [Fri, 2 Dec 2016 08:44:42 +0000 (09:44 +0100)]
re PR rtl-optimization/78547 (ICE: in loc_cmp, at var-tracking.c:3417 with -Os -g -mstringop-strategy=libcall -freorder-blocks-algorithm=simple)
PR rtl-optimization/78547
* emit-rtl.c (unshare_all_rtl): Make sure DECL_RTL and
DECL_INCOMING_RTL is not shared.
* config/i386/i386.c (convert_scalars_to_vectors): If any
insns have been converted, adjust all parameter's DEC_RTL and
DECL_INCOMING_RTL back from V1TImode to TImode if the parameters have
TImode.
* gcc.dg/pr78547.c: New test.
From-SVN: r243165
Jakub Jelinek [Fri, 2 Dec 2016 08:42:12 +0000 (09:42 +0100)]
re PR rtl-optimization/78575 (ICE: in trunc_int_for_mode, at explow.c:55 with -O2 -g)
PR rtl-optimization/78575
* config/i386/i386.c (timode_scalar_chain::fix_debug_reg_uses): Use
DF infrastructure to wrap all V1TImode reg uses into TImode subreg
if not already wrapped in a subreg. Make sure df_insn_rescan does not
affect further iterations.
* gcc.dg/pr78575.c: New test.
From-SVN: r243164
Martin Liska [Fri, 2 Dec 2016 08:36:01 +0000 (09:36 +0100)]
Fix runtime error: left shift of negative value (PR
PR ipa/78555
* sreal.c (sreal::to_int): Make absolute value before shifting.
(sreal::operator/): Likewise.
(sreal_verify_negative_division): New test.
(void sreal_c_tests): Call the new test.
* sreal.h (sreal::normalize_up): Use new SREAL_ABS and
SREAL_SIGN macros.
(sreal::normalize_down): Likewise.
From-SVN: r243163
Dominik Vogt [Fri, 2 Dec 2016 08:32:40 +0000 (08:32 +0000)]
Do not simplify "(and (reg) (const bit)" to if_then_else.
combine_simplify_rtx() tries to replace rtx expressions with just two
possible values with an experession that uses if_then_else:
(if_then_else (condition) (value1) (value2))
If the original expression is e.g.
(and (reg) (const_int 2))
where the constant is the mask for a single bit, the replacement results
in a more complex expression than before:
(if_then_else (ne (zero_extract (reg) (1) (31))) (2) (0))
Similar replacements are done for
(signextend (and ...))
(zeroextend (and ...))
Suppress the replacement this special case in if_then_else_cond().
gcc/ChangeLog:
2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com>
* combine.c (combine_simplify_rtx): Suppress replacement of
"(and (reg) (const_int bit))" with "if_then_else".
From-SVN: r243162
Dominik Vogt [Fri, 2 Dec 2016 08:31:09 +0000 (08:31 +0000)]
S/390: Fix litpool-r3-1.c.
gcc/testsuite/ChangeLog:
2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com>
* gcc.target/s390/litpool-r3-1.c: Fix label number test.
From-SVN: r243161
Dominik Vogt [Fri, 2 Dec 2016 08:30:16 +0000 (08:30 +0000)]
PR target/77822: S390: Validate argument range of {zero,sign}_extract.
With some undefined code, combine generates patterns where the arguments to
*_extract are out of range, e.b. a negative bit position. If the s390 backend
accepts these, they lead to not just undefined behaviour but invalid assembly
instructions (argument out of the allowed range). So this patch makes sure
that the rtl expressions with out of range arguments are rejected.
gcc/ChangeLog:
2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/77822
* config/s390/s390.md ("extzv")
("*extzv<mode><clobbercc_or_nocc>")
("*extzvdi<clobbercc_or_nocc>_lshiftrt")
("*<risbg_n>_ior_and_sr_ze")
("*extract1bitdi<clobbercc_or_nocc>")
("*insv<mode><clobbercc_or_nocc>", "*insv_rnsbg_noshift")
("*insv_rnsbg_srl", "*insv<mode>_mem_reg")
("*insvdi_mem_reghigh", "*insvdi_reg_imm"): Use EXTRACT_ARGS_IN_RANGE
to validate the arguments of zero_extract and sign_extract.
gcc/testsuite/ChangeLog:
2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/77822
* gcc.target/s390/s390.exp: Support .C tests.
* gcc.target/s390/pr77822-2.c: New test.
* gcc.target/s390/pr77822-1.C: New test.
From-SVN: r243160
Dominik Vogt [Fri, 2 Dec 2016 08:26:19 +0000 (08:26 +0000)]
PR target/77822: Add helper macro EXTRACT_ARGS_IN_RANGE to system.h.
The macro can be used to validate the arguments of zero_extract and
sign_extract to fix this problem:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77822
gcc/ChangeLog:
2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/77822
* rtl.h (EXTRACT_ARGS_IN_RANGE): New.
From-SVN: r243159
Andreas Krebbel [Fri, 2 Dec 2016 08:25:27 +0000 (08:25 +0000)]
S/390: Define vectorization_cost hook
Define the vectorization_cost hook. The only change right now
compared to the default implementation is the reduced costs for
unaligned loads/stores. This is supposed to prevent unnecessary loop
peeling performed to reach better alignments.
Further tuning of this hook is required.
-Andreas-
gcc/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc/config/s390/s390.c (s390_builtin_vectorization_cost): New
function.
(TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Define target
macro.
gcc/testsuite/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-nopeel-1.c: New test.
From-SVN: r243158
Andreas Krebbel [Fri, 2 Dec 2016 08:24:27 +0000 (08:24 +0000)]
S/390: Add vector pack/unpack patterns.
gcc/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vector.md (vec_halfhalf): New mode iterator.
("vec_pack_trunc_<mode>", "vec_pack_ssat_<mode>")
("vec_pack_usat_<mode>", "vec_unpacks_hi_v16qi")
("vec_unpacks_low_v16qi", "vec_unpacku_hi_v16qi")
("vec_unpacku_low_v16qi", "vec_unpacks_hi_v8hi")
("vec_unpacks_lo_v8hi", "vec_unpacku_hi_v8hi")
("vec_unpacku_lo_v8hi", "vec_unpacks_hi_v4si")
("vec_unpacks_lo_v4si", "vec_unpacku_hi_v4si")
("vec_unpacku_lo_v4si"): New pattern definitions.
* config/s390/vx-builtins.md: Move VI_HW_HSD mode iterator to
vector.md.
From-SVN: r243157
Andreas Krebbel [Fri, 2 Dec 2016 08:23:19 +0000 (08:23 +0000)]
Add testcase missing in last commit.
gcc/testsuite/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/zvector/vec-cmp-2.c: New test.
From-SVN: r243156
Andreas Krebbel [Fri, 2 Dec 2016 08:22:34 +0000 (08:22 +0000)]
S/390: Merge compare of compare results
With this patch EQ and NE compares on CC mode reader patterns are
folded. This allows using the result of the vec_all_* and vec_any_*
builtins directly in a conditional jump instruction as in the attached
testcase.
gcc/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-protos.h (s390_reverse_condition): New
prototype.
* config/s390/s390.c (s390_canonicalize_comparison): Fold compares
of CC mode values.
(s390_reverse_condition): New function.
* config/s390/s390.h (REVERSE_CC_MODE, REVERSE_CONDITION): Define
target macros.
gcc/testsuite/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/zvector/vec-cmp-2.c: New test.
From-SVN: r243155
Andreas Krebbel [Fri, 2 Dec 2016 08:21:43 +0000 (08:21 +0000)]
S/390: Fix vector all/any cc modes.
This fixes a problem with the vector compares producing CC mode
results.
The instructions produce condition code modes which can be either
interpreted to check an ALL elements or an ANY element result. As the
modes where used before they could not be inverted by the middle-end
by inverting the comparison code (e.g. eq to ne). The result usually
was just wrong.
In fact inverting a comparison code on an CCVALL mode would require to
also change the mode to CCVANY but this cannot be done easily in the
middle-end. With this patch the meaning of an ALL cc mode only refers
to the not-inverted comparison code (e.g. eq, gt, ge). With that
change inverting the comparison code matches a not operation on the
condition code mask again.
Bootstrapped and regression tested on s390 and s390x.
Bye,
-Andreas-
gcc/testsuite/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-scalar-cmp-1.c: Fix and harden the
pattern checks.
* gcc.target/s390/zvector/vec-cmp-1.c: New test.
gcc/ChangeLog:
2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-modes.def (CCVEQANY, CCVH, CCVHANY, CCVHU)
(CCVHUANY): Remove modes.
(CCVIH, CCVIHU, CCVIALL, CCVIANY, CCVFALL, CCVFANY): Add modes and
documentation.
* config/s390/s390.c (s390_match_ccmode_set): Rename cc modes.
(s390_expand_vec_compare_scalar): Pick one of the cc consumer
modes.
(s390_branch_condition_mask): Adjust to use the new cc consumer
modes. The new modes allow for proper reversal in the middle-end.
(s390_expand_vec_compare_cc): Determine the proper cc producer and
consumer modes for a comparison.
* config/s390/s390.md: Rename CCVH to CCVIH and CCVHU to CCVIHU
throughout the file.
* config/s390/vx-builtins.md: Likewise.
From-SVN: r243154
Maxim Ostapenko [Fri, 2 Dec 2016 07:39:27 +0000 (07:39 +0000)]
Add support for ASan odr_indicator.
config/
* bootstrap-asan.mk: Replace LSAN_OPTIONS=detect_leaks=0 with
ASAN_OPTIONS=detect_leaks=0:use_odr_indicator=1.
gcc/
* asan.c (asan_global_struct): Refactor.
(create_odr_indicator): New function.
(asan_needs_odr_indicator_p): Likewise.
(is_odr_indicator): Likewise.
(asan_add_global): Introduce odr_indicator_ptr. Pass it into global's
constructor.
(asan_protect_global): Do not protect odr indicators.
gcc/c-family/
* c-attribs.c (asan odr indicator): New attribute.
(handle_asan_odr_indicator_attribute): New function.
gcc/testsuite/
* c-c++-common/asan/no-redundant-odr-indicators-1.c: New test.
From-SVN: r243153
Jeff Law [Fri, 2 Dec 2016 06:40:57 +0000 (23:40 -0700)]
* tree-ssa-threadedge.c
(record_temporary_equivalences_from_stmts_at_dest): Avoid temporary
propagation of operands if there are no operands.
From-SVN: r243152
GCC Administrator [Fri, 2 Dec 2016 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243150
Jakub Jelinek [Thu, 1 Dec 2016 23:15:57 +0000 (00:15 +0100)]
re PR tree-optimization/78586 (Wrong code caused by printf-return-value)
PR tree-optimization/78586
* gimple-ssa-sprintf.c (format_integer): Don't handle NOP_EXPR,
CONVERT_EXPR or COMPONENT_REF here. Formatting fix. For
SSA_NAME_DEF_STMT with NOP_EXPR only change argtype if the rhs1's
type is INTEGER_TYPE or POINTER_TYPE.
From-SVN: r243145
Elizebeth Punnoose [Thu, 1 Dec 2016 23:11:35 +0000 (23:11 +0000)]
re PR fortran/77505 (Negative character length not treated as LEN=0)
2016-12-01 Elizebeth Punnoose <elizebeth.punnoose@hpe.com>
PR fortran/77505
* trans-array.c (trans_array_constructor): Treat negative character
length as LEN = 0.
2016-12-01 Elizebeth Punnoose <elizebeth.punnoose@hpe.com>
PR fortran/77505
* gfortran.dg/char_length_20.f90: New test.
* gfortran.dg/char_length_21.f90: Ditto.
From-SVN: r243143
Ma Jiang [Thu, 1 Dec 2016 23:02:51 +0000 (23:02 +0000)]
acx.m4: Change "tail +16c" to "tail -c +17".
* config/acx.m4: Change "tail +16c" to "tail -c +17".
* configure: Regenerated.
From-SVN: r243142
Kelvin Nilsen [Thu, 1 Dec 2016 22:52:07 +0000 (22:52 +0000)]
re PR target/78577 (Fix define_insn operand types for vexturhlx, vexturhrx, vextuwlx, and vextuwrx patterns)
gcc/ChangeLog:
2016-12-01 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/78577
* config/rs6000/vsx.md (vextuhlx): Revise mode of operand 2.
(vextuhrx): Likewise.
(vextuwlx): Likewise.
(vextuwrx): Likewise.
From-SVN: r243141
Joseph Myers [Thu, 1 Dec 2016 22:36:49 +0000 (22:36 +0000)]
* es.po: Update.
From-SVN: r243139
Jason Merrill [Thu, 1 Dec 2016 22:13:06 +0000 (17:13 -0500)]
call.c (add_function_candidate): Exclude inherited copy/move ctors.
* call.c (add_function_candidate): Exclude inherited copy/move
ctors.
From-SVN: r243138
Jason Merrill [Thu, 1 Dec 2016 22:10:57 +0000 (17:10 -0500)]
fix PR number
From-SVN: r243137
David Malcolm [Thu, 1 Dec 2016 21:56:09 +0000 (21:56 +0000)]
dwarf2out.c: fix jit issue with early_dwarf_finished
All of the jit testcases that generate debuginfo appear to have been
failing since r240228 on their 2nd in-process iteration on this
assertion in set_early_dwarf's ctor:
gcc_assert (! early_dwarf_finished);
Root cause is that the global is never reset at the end of compilation,
which this patch fixes in the obvious way.
gcc/ChangeLog:
* dwarf2out.c (dwarf2out_c_finalize): Reset early_dwarf and
early_dwarf_finished.
From-SVN: r243136
Eric Botcazou [Thu, 1 Dec 2016 21:41:10 +0000 (21:41 +0000)]
sparc.opt (mlra): New target option.
* config/sparc/sparc.opt (mlra): New target option.
* config/sparc/sparc.c (TARGET_LRA_P): Define to...
(sparc_lra_p): ...this. New function.
(D_MODES, DF_MODES): Add missing cast.
* config/sparc/sparc.md (*movsi_lo_sum, *movsi_high): Do not
provide these insns when flag_pic.
(sethi_di_medlow, losum_di_medlow, seth44, setm44, setl44, sethh,
setlm, sethm, setlo, embmedany_sethi, embmedany_losum,
embmedany_brsum, embmedany_textuhi, embmedany_texthi,
embmedany_textulo, embmedany_textlo): Likewise.
(sethi_di_medlow_embmedany_pic): Provide it only when flag_pic.
Co-Authored-By: David S. Miller <davem@davemloft.net>
From-SVN: r243135
Steven G. Kargl [Thu, 1 Dec 2016 20:37:55 +0000 (20:37 +0000)]
re PR fortran/78279 (ICE in identical_array_ref, at fortran/dependency.c:104)
2016-12-01 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78279
* dependency.c (identical_array_ref): Convert gcc_assert to conditional
and gfc_internal_error.
2016-12-01 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78279
* gfortran.dg/pr78279.f90: New test.
From-SVN: r243131
Ian Lance Taylor [Thu, 1 Dec 2016 19:54:36 +0000 (19:54 +0000)]
compiler: add slice initializers to the GC root list
As of https://golang.org/cl/32917 we can put slice initializers in the
.data section. The program can still change the values in those
slices. That means that if the slice elements can contain pointers,
we need to register the entire initializer as a GC root.
This would be straightforward except that we only have a Bexpression
for the slice initializer, not an Expression. So introduce a
Backend_expression type that wraps a Bexpression as an Expression.
The test case for this is https://golang.org/cl/33790.
Reviewed-on: https://go-review.googlesource.com/33792
From-SVN: r243129
David Edelsohn [Thu, 1 Dec 2016 19:02:34 +0000 (19:02 +0000)]
* testsuite/26_numerics/headers/cmath/hypot.cc: XFAIL on AIX.
From-SVN: r243127
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