Alyssa Rosenzweig [Wed, 26 Aug 2020 20:52:23 +0000 (16:52 -0400)]
pan/decode: Print shader-db even for compute
Stated rationale is silly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 20:50:16 +0000 (16:50 -0400)]
pan/decode: Drop mali_vertex_tiler_postfix arg
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 20:44:51 +0000 (16:44 -0400)]
pan/decode: Drop scratchpad size dump
It fails if the scratchpad isn't actually mapped from pandecode's
perspective, and isn't useful information to us at this point.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 20:48:13 +0000 (16:48 -0400)]
panfrost: Use nir_builder_init_simple_shader for blits
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 17:21:06 +0000 (13:21 -0400)]
panfrost: Inline bifrost_tiler_only
Pointless abstraction now that fused jobs are dropped.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 17:10:53 +0000 (13:10 -0400)]
panfrost: Drop bifrost_payload_fused
Fused jobs are broken for various reasons almost everywhere. Drop the
reference - if for some reason somebody wants this later, it's preserved
in git.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 17:04:17 +0000 (13:04 -0400)]
panfrost: XMLify invocations
Not so bad :)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 16:45:38 +0000 (12:45 -0400)]
panfrost: Add invocation XML
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 20:59:14 +0000 (16:59 -0400)]
panfrost: XMLify primitive information
This is grouped as the latter part of the prefix. Some kludges around a
magic field for compute jobs that we'll deal with later. (I hope.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 15:23:52 +0000 (11:23 -0400)]
panfrost: Drop point sprite from shader key
It's not implemented on Bifrost, and not needed on Midgard. For Bifrost
this will belong in mesa/st anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 15:22:47 +0000 (11:22 -0400)]
panfrost: Cleanup point sprite linking
Use the common Gallium helper, and get the sprite coord mask from the
rasterizer instead of the shader state (which requires useless keying).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 14:50:18 +0000 (10:50 -0400)]
panfrost: Simplify ZSA bind
void* casts are implicit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 18:59:30 +0000 (14:59 -0400)]
panfrost: Use pack for draw descriptor
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 19:07:41 +0000 (15:07 -0400)]
panfrost: Use draw pack for compute jobs
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 17:37:22 +0000 (13:37 -0400)]
panfrost: Detangle postfix from varying emits
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 17:25:29 +0000 (13:25 -0400)]
panfrost: Inline panfrost_vt_set_draw_info
Not happy about the monster routine, but we'll get simplification having
everything together. (I hope.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 17:03:59 +0000 (13:03 -0400)]
panfrost: Inline panfrost_vt_init
Again, we'd like to keep the routines filling out the postfix together,
and this has a single remaining caller (once for vertex then immediately
for tiler).
By keeping them together we can avoid uploading the shared
memory/framebuffer structures twice in a row, saving a bit of memory in
the process.
We also fix a bug where bit 2 of gl_enables is incorrectly set on
Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 16:52:45 +0000 (12:52 -0400)]
panfrost: Don't call panfrost_vt_init for compute
Given we emit shared memory immediately after anyway, the function call
doesn't do anything but zero-initializing the payload and setting some
magic bits. We can do that ourselves at the call site.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 16:48:12 +0000 (12:48 -0400)]
panfrost: Avoid postfix dep for vertex_data
We need to thread some extra data through the context but still gets us
a bit closer.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Tue, 25 Aug 2020 16:03:17 +0000 (12:03 -0400)]
panfrost: Remove postfix parameter from UBO upload
Need to signal push constants via a side channel. I tried to disentangle
this code, but there are a number of stacked issues here:
* We need to upload sysvals. Currently we prefix UBO #0 with sysvals,
but this requires a memcpy() of the entire contents of UBO #0. We
could create a synthetic UBO instead with sysvals at the end.
* We want to push uniforms/sysvals. Currently we push UBO #0 as much as
we can, which pushes sysvals automatically by point 1.
* We want to optimize out f2f16(uniform). We don't currently handle
this.
* We want to optimize out uniform-on-uniform/constant operations. Mesa
doesn't currently have good support for this.
The real solution will look something like:
* Create a separate UBO for sysvals.
* Let the compiler allocate push constant space as it sees fit ("copy
word 12:15 of UBO 1 to word 2:3 of push constant space, as fp16").
* Somehow handle uniform folding when NIR gains support.
For now, let's not block the depostfixening.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 18:02:15 +0000 (14:02 -0400)]
panfrost: Inline vt_update_{rasterizer, occlusion}
These are simple enough that the abstraction will get in the way of the
upcoming refactor. Let's keep all the state together.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 17:54:20 +0000 (13:54 -0400)]
panfrost: Separate postfix from emits
This is the easy subset, where we have functions that take in a postfix
pointer but only to use as a return address. We can use an actual return
instead, which is a bit simpler and helps prepare for condensed postfix
packing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 17:46:34 +0000 (13:46 -0400)]
panfrost: Use draw pack for blit
Something easy to start us off for the series.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 17:13:33 +0000 (13:13 -0400)]
panfrost: Add XML for mali_vertex_tiler_postfix
This is a bit of everything but overall sets up the draw state.
Translating fairly directly from the header. Main structural change is
breaking out a 2-bit enum for occlusion query mode instead of
maintaining separate booleans for the modes.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 17:36:22 +0000 (13:36 -0400)]
panfrost: Add padded type for instance fields
Mali has a special 5:3 encoding representing a subset of the natural
numbers, of the form:
a * (2^b)
for a odd and b natural/zero. It is used for padding out instance sizes,
as well as in attribute records so it's worth representing as a native
type as opposed to having manual packs/unpacks in various places.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 16:07:59 +0000 (12:07 -0400)]
panfrost: Drop blend indirection
We don't need to ralloc/memcpy/free, we can emit all at once when we
have proper write ordering gaurantees.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Wed, 26 Aug 2020 13:44:12 +0000 (09:44 -0400)]
panfrost: Emit explicit REPLACE for disabled colour writeout
Likewise zero for Bifrost. Avoids UB behaviour in next commit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Alyssa Rosenzweig [Mon, 24 Aug 2020 16:06:04 +0000 (12:06 -0400)]
panfrost: Add opaque midgard_blend XML
Just to ensure write ordering is sane.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
Daniel Stone [Mon, 24 Aug 2020 19:41:19 +0000 (20:41 +0100)]
CI: Re-enable VS2019 build
Now that we have a more powerful runner and a more stable Docker
configuration, try re-enabling the Windows build.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6446>
Daniel Stone [Mon, 24 Aug 2020 19:40:49 +0000 (20:40 +0100)]
CI: Windows: Use separate config file for Docker
Rather than relying on global state for 'docker login' credentials, use
a local file so we don't collide with other simultaneous builds.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6446>
Eric Engestrom [Sat, 1 Aug 2020 22:43:52 +0000 (00:43 +0200)]
egl: simplify eglSwapInterval() fallback logic
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6153>
Eric Engestrom [Sat, 1 Aug 2020 22:39:51 +0000 (00:39 +0200)]
egl: inline eglSwapInterval() fallback
It's literally just a `return EGL_TRUE`, there's no need to have
a function for that.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6153>
Lionel Landwerlin [Tue, 4 Aug 2020 14:25:37 +0000 (17:25 +0300)]
anv: simplify push constant emissions
Instead of allocating a push constant buffer per stage from the
dynamic state pool, we can use the same one for all stages.
We can do this because the push constant data is supposed to be
identical of all stages. Even if vkCmdPushConstants() allows to update
chunks of the push constant data differently per stage, this valid
usage guarantees that any chunk of push constant data used be 2
different stages must be identical :
"For each byte in the range specified by offset and size and for
each push constant range that overlaps that byte, stageFlags must
include all stages in that push constant range’s
VkPushConstantRange::stageFlags"
v2: Fix dirtying of stages (Jason)
v3: Move push constant data into base pipeline state struct (Jason)
v4: Remove duplicated field (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6183>
Lionel Landwerlin [Sat, 8 Aug 2020 09:05:36 +0000 (12:05 +0300)]
anv: move push constant allocation tracking into gfx pipeline state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6183>
Samuel Pitoiset [Thu, 27 Aug 2020 06:44:30 +0000 (08:44 +0200)]
aco: fix wrong source position for constant with nir_op_cube_face_coord
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6480>
Samuel Pitoiset [Thu, 27 Aug 2020 12:37:11 +0000 (14:37 +0200)]
radv: set BIG_PAGE to improve performance on GFX10.3
It reduces traffic between CB, DB and TCP blocks if buffers
respect a certain alignment.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
Samuel Pitoiset [Thu, 27 Aug 2020 12:00:54 +0000 (05:00 -0700)]
radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time
The upcoming patch will set BIG_PAGE if needed.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
Eric Anholt [Thu, 20 Aug 2020 19:32:20 +0000 (12:32 -0700)]
nir/lower_discard_to_demote: Use nir_shader_instructions_pass().
Cleans up indentation, and clears the metadata tracking flag that would
break if this pass was used in in NIR_PASS().
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
Eric Anholt [Thu, 20 Aug 2020 19:25:52 +0000 (12:25 -0700)]
nir/nir_lower_wrmasks: Use the nir_lower_instructions_pass() helper.
This fixes the invalidation of metadata when we didn't modify the shader
and unindents a bunch of code.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
Eric Anholt [Thu, 20 Aug 2020 19:10:39 +0000 (12:10 -0700)]
nir/lower_io_to_scalar: Convert to use nir_shader_instructions_pass().
This unindents a whole bunch of code, and fixes the lack of metadata
tracking in the pass (which wasn't called in an opt loop so it hadn't been
caught before).
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
Eric Anholt [Thu, 20 Aug 2020 18:56:04 +0000 (11:56 -0700)]
nir/opt_undef: Convert to use nir_shader_instructions_pass().
We can't use nir_lower_instructions because we operate on stores which
don't have an SSA def.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
Eric Anholt [Thu, 20 Aug 2020 18:51:13 +0000 (11:51 -0700)]
nir/lower_vec_to_movs: Convert to use nir_shader_instructions_pass().
Less pass code, less indenting, should be the same perf.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
Eric Anholt [Thu, 20 Aug 2020 18:43:29 +0000 (11:43 -0700)]
nir: Add a helper for general instruction-modifying passes.
The nir_shader_lower_instructions() is really nice, but it's only for SSA
operations, and sometimes you want something more general. I've put it in
nir_builder.h so it can be inlined and retain the same performance
characteristics we're used to in our lowering passes even in the absence
of LTO.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
Eric Anholt [Tue, 4 Aug 2020 23:15:04 +0000 (16:15 -0700)]
nir/opt_copy_prop_vars: Quiet valgrind warning about overlapping memcpy.
The warning is kind of silly:
Test case 'dEQP-GLES2.functional.shaders.indexing.tmp_array.vec3_const_write_static_read_vertex'..
==
1874780== Source and destination overlap in memcpy(0xa261690, 0xa261690, 160)
==
1874780== at 0x484D498: __GI_memcpy (vg_replace_strmem.c:1037)
==
1874780== by 0x596FC07: copy_entry_remove (nir_opt_copy_prop_vars.c:296)
The "memcpy is undefined if they overlap" thing is surely meant to be
"memcpy with *partial* overlap is undefined", but let's keep anyone else
from having to debug this.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6178>
Eric Engestrom [Sun, 2 Aug 2020 00:00:55 +0000 (02:00 +0200)]
egl: document which driver hooks are only required by extensions
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Sat, 1 Aug 2020 23:54:33 +0000 (01:54 +0200)]
egl: move extension driver functions after core functions
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Sat, 1 Aug 2020 20:27:46 +0000 (22:27 +0200)]
docs/egl: correct/update DRI2 mention with the shiny new DRI3
That initial sentence must have been written ages ago ^^'
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Thu, 30 Jul 2020 22:47:13 +0000 (00:47 +0200)]
docs/egl: add some more documentation
Inspired by `src/egl/main/README.txt`, which was severely outdated, but
still contained valid information.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Wed, 29 Jul 2020 09:33:12 +0000 (11:33 +0200)]
docs/egl: add haiku driver
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Wed, 29 Jul 2020 09:27:21 +0000 (11:27 +0200)]
docs/egl: complete list of dri2 platforms
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Wed, 29 Jul 2020 09:06:15 +0000 (11:06 +0200)]
docs/egl: move section around
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Eric Engestrom [Wed, 29 Jul 2020 08:58:14 +0000 (10:58 +0200)]
docs/egl: fix typo
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
Jesse Natalie [Tue, 23 Jun 2020 12:45:36 +0000 (05:45 -0700)]
nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir
SPIR-V dest sizes match the input, while nir is always int32. Insert
casts from the nir op to the expected SPIR-V dest.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Jesse Natalie [Tue, 23 Jun 2020 12:47:20 +0000 (05:47 -0700)]
nir: Add bit_count to lower_int64 pass
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Jesse Natalie [Mon, 22 Jun 2020 22:01:00 +0000 (15:01 -0700)]
nir: Remove 32bit restriction for uadd_carry optimization
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Jesse Natalie [Mon, 22 Jun 2020 21:59:39 +0000 (14:59 -0700)]
nir: Implement mul_high lowering for bit sizes other than 32
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Jesse Natalie [Mon, 22 Jun 2020 18:51:09 +0000 (11:51 -0700)]
nir_lower_bit_size: Support lowering ops with differing source/dest sizes
Specifically the bit-finding routines always return int32. Don't complain
about the dest already being 32 bits when lowering to 32 bits, and
don't bother casting the dest if it's already right.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Jesse Natalie [Mon, 8 Jun 2020 12:56:59 +0000 (05:56 -0700)]
nir: Relax opt_if logic to prevent re-merging 64bit phis for loop headers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Jesse Natalie [Fri, 5 Jun 2020 22:43:26 +0000 (15:43 -0700)]
nir: Add a lowering pass to split 64bit phis
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
Kenneth Graunke [Tue, 25 Aug 2020 18:54:14 +0000 (11:54 -0700)]
iris: Drop stale syncobj references in fence_server_sync
When calling glWaitSync (fence_server_sync), we added dependencies
in all batches (render and compute) on existing work. Even if
applications don't use compute at all, they theoretically could,
so we record that the compute batch depends on the render batch.
But if the application truly doesn't use compute, or rarely uses
it, we ended up recording dependencies on _all_ previous render
batches, racking up a massive list of syncobjs. Not only is this
pointless, it also meant that we never allowed the kernel to free
the underlying i915_request objects.
There are a number of solutions to this problem, but for now, we
take a simple one: when recording a new syncobj dependency, we
walk the list and see if any of them have already passed. If so,
that dependency has been fulfilled. We no longer need to track it,
and can simply drop it from the list, unreferencing the syncobj.
Android's SurfaceFlinger in particular was hitting this issue,
as it uses glWaitSync, doesn't typically use compute shaders,
and runs for long durations.
Thanks to Yang A Shi <yang.a.shi@intel.com> and
Kefei Yao <kefei.yao@intel.com> for their excellent work in
tracking down this issue!
Fixes: f459c56be6b ("iris: Add fence support using drm_syncobj")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yang A Shi <yang.a.shi@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6463>
Kenneth Graunke [Tue, 25 Aug 2020 16:47:13 +0000 (09:47 -0700)]
iris: Reorder the loops in iris_fence_await() for clarity.
Swapping the order of the loops makes the logic much easier to follow:
for each point in our fence, if it hasn't gone by, make future work in
all batches depend on it. Both loops are necessary, and now it's
clearer why.
(This doesn't actually fix a bug but needs to be cherry-picked for
the next patch to apply, which does fix a bug.)
Fixes: f459c56be6b ("iris: Add fence support using drm_syncobj")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yang A Shi <yang.a.shi@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6463>
Michel Dänzer [Thu, 27 Aug 2020 07:36:22 +0000 (09:36 +0200)]
ci: Fix up rules for post-merge / main project branch pipelines
Pre-merge pipelines for MRs appear to run in the target project
namespace now, so we have to explicitly rule those out.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6481>
Samuel Pitoiset [Wed, 26 Aug 2020 12:24:45 +0000 (14:24 +0200)]
aco: add ACO_DEBUG=novn,noopt,nosched for debugging purposes
To disable value numbering, optimizations and scheduling.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6470>
Bas Nieuwenhuizen [Tue, 25 Aug 2020 17:12:37 +0000 (19:12 +0200)]
radv: Fix 3d blits.
- the offsets are inclusive-exclusive so the +1 was wrong
- Since the GPU doesn't do the interpolation on depth (as we render
per layer), we have to add an offset for the pixel center.
CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3073
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6458>
Marek Olšák [Tue, 25 Aug 2020 23:27:26 +0000 (19:27 -0400)]
st/mesa: remove useless code for lowered IO in st_nir_assign_vs_in_locations
It's not needed.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6465>
Eric Anholt [Tue, 25 Aug 2020 20:43:27 +0000 (13:43 -0700)]
ci: Test the KHR-GL* CTS cases with softpipe.
I've been hacking on softpipe in the process of trying to delete a bunch
of core Mesa code, and want to make sure I don't regress desktop GL
either. The run takes under a minute and a half.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6466>
Rhys Perry [Fri, 21 Aug 2020 12:25:45 +0000 (13:25 +0100)]
aco: sink get_alu_src() in bfe lowering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6424>
Rhys Perry [Fri, 21 Aug 2020 12:12:38 +0000 (13:12 +0100)]
aco: fix sgpr ubfe/ibfe if the offset is too large
If the offset is large enough, it could affect the width. I'm also not
sure if the hardware masks the offset by 0x1f.
Found by inspection. No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6424>
Rhys Perry [Fri, 21 Aug 2020 12:07:35 +0000 (13:07 +0100)]
aco: remove 64-bit SGPR ubfe/ibfe
ubfe/ibfe is always 32-bit.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6424>
Rhys Perry [Wed, 5 Aug 2020 13:59:30 +0000 (14:59 +0100)]
aco/tests: add tests for long jumps
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Wed, 5 Aug 2020 13:59:01 +0000 (14:59 +0100)]
aco: shorten disassembly for repeated instructions
Future tests will do this.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Wed, 5 Aug 2020 13:53:17 +0000 (14:53 +0100)]
aco/tests: add test for GFX10 0x3f bug
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Tue, 4 Aug 2020 15:06:56 +0000 (16:06 +0100)]
aco: create long jumps
When the branch offset can't be encoded, we have to use s_setpc_b64.
Fixes hang in RPCS3 vertex ubershader.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3231
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Tue, 4 Aug 2020 13:18:55 +0000 (14:18 +0100)]
aco: reserve 2 sgprs for each branch
We'll need two sgprs for the possibility of a long jump.
fossil-db (Navi):
Totals from 10197 (7.50% of 135946) affected shaders:
SGPRs: 946268 -> 946468 (+0.02%)
VGPRs: 705884 -> 707956 (+0.29%); split: -0.00%, +0.30%
SpillSGPRs: 31485 -> 36212 (+15.01%); split: -0.04%, +15.05%
CodeSize:
88296484 ->
88384604 (+0.10%); split: -0.01%, +0.11%
MaxWaves: 81379 -> 81171 (-0.26%)
Instrs:
17219111 ->
17231682 (+0.07%); split: -0.03%, +0.10%
Cycles:
1594875900 ->
1596450136 (+0.10%); split: -0.05%, +0.15%
VMEM:
1687263 ->
1689080 (+0.11%); split: +0.14%, -0.03%
SMEM: 657726 -> 660262 (+0.39%); split: +0.61%, -0.22%
VClause: 294806 -> 294638 (-0.06%); split: -0.08%, +0.02%
SClause: 556702 -> 556210 (-0.09%); split: -0.12%, +0.03%
Copies:
1466323 ->
1469349 (+0.21%); split: -0.57%, +0.78%
Branches: 619793 -> 618556 (-0.20%); split: -0.28%, +0.08%
PreSGPRs: 806364 -> 811477 (+0.63%); split: -0.14%, +0.77%
PreVGPRs: 655845 -> 657174 (+0.20%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Thu, 6 Aug 2020 16:38:41 +0000 (17:38 +0100)]
aco: keep loop live-through variables spilled
fossil-db (Navi):
Totals from 3149 (2.32% of 135946) affected shaders:
VGPRs: 280928 -> 280932 (+0.00%)
SpillSGPRs: 51133 -> 30042 (-41.25%)
CodeSize:
43063076 ->
41377252 (-3.91%); split: -3.92%, +0.00%
Instrs:
8278435 ->
8037133 (-2.91%); split: -2.92%, +0.00%
Cycles:
709575456 ->
683366172 (-3.69%); split: -3.69%, +0.00%
VMEM: 542887 -> 542937 (+0.01%); split: +0.05%, -0.04%
SMEM: 210255 -> 206368 (-1.85%); split: +0.12%, -1.97%
SClause: 258847 -> 258019 (-0.32%); split: -0.52%, +0.20%
Copies: 731836 -> 684784 (-6.43%); split: -6.44%, +0.01%
Branches: 305422 -> 292844 (-4.12%); split: -4.12%, +0.00%
PreSGPRs: 333103 -> 332701 (-0.12%)
PreVGPRs: 280086 -> 280089 (+0.00%)
Helps mostly Detroit: Become Human and the single spilling Doom Eternal
shader.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Thu, 6 Aug 2020 14:57:05 +0000 (15:57 +0100)]
aco: fix spills_entry heuristic for branch blocks in init_live_in_vars()
fossil-db (Navi):
Totals from 222 (0.16% of 135946) affected shaders:
SpillSGPRs: 9121 -> 9117 (-0.04%)
SpillVGPRs: 2820 -> 1821 (-35.43%)
CodeSize:
5134264 ->
5053336 (-1.58%); split: -1.63%, +0.05%
Instrs: 953435 -> 938761 (-1.54%); split: -1.59%, +0.05%
Cycles:
100567688 ->
97252432 (-3.30%); split: -3.34%, +0.04%
VMEM: 40752 -> 39219 (-3.76%); split: +0.04%, -3.80%
SMEM: 15416 -> 15509 (+0.60%); split: +0.64%, -0.03%
VClause: 20120 -> 19091 (-5.11%)
SClause: 23540 -> 23544 (+0.02%); split: -0.11%, +0.12%
Copies: 125912 -> 122017 (-3.09%); split: -3.36%, +0.26%
Branches: 31131 -> 30009 (-3.60%)
Mostly affects parallel-rdp ubershaders.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Tue, 25 Aug 2020 20:19:11 +0000 (21:19 +0100)]
aco: fix regclass checks when fixing to vcc/exec with Builder
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Wed, 26 Aug 2020 10:10:37 +0000 (11:10 +0100)]
aco: don't fix break condition for break+discard to exec
This would move the old exec mask back into exec. This also fixes the
live_out_exec.
Issue found in dEQP-VK.graphicsfuzz.cosh-return-inf-unused
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Wed, 5 Aug 2020 12:29:58 +0000 (13:29 +0100)]
aco: don't consider the first partial spill if it's the wrong type
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Rhys Perry [Tue, 4 Aug 2020 16:08:43 +0000 (17:08 +0100)]
aco: consider branch definitions in spiller
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
Samuel Pitoiset [Wed, 26 Aug 2020 08:07:45 +0000 (10:07 +0200)]
radv: print a warning when RADV_TRAP_HANDLER is used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6468>
Marek Vasut [Tue, 21 Jul 2020 14:21:14 +0000 (16:21 +0200)]
etnaviv: Add lock around pending_ctx
The content of rsc->pending_ctx could be changed from multiple contexts
and thus from multiple threads. The per-context lock is not sufficient
to protect this list. Add per-resource lock to protect this list.
Fixes: e5cc66dfad0 ("etnaviv: Rework locking")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6454>
Marek Vasut [Tue, 21 Jul 2020 14:21:34 +0000 (16:21 +0200)]
etnaviv: Remove etna_resource_get_status()
This function is not used, remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6454>
Lukas F. Hartmann [Sat, 13 Jun 2020 18:55:44 +0000 (20:55 +0200)]
etnaviv: Fix disabling early-z rejection on GC7000L (HALTI5)
The VIVS_PE_DEPTH_CONFIG_DISABLE_ZS in PE_DEPTH_CONFIG caused depth
write hangs on HALTI5.
This is because the 0x11000000 bits in RA have to be toggled on
when setting this bit to zero. This combination will disable
early-z rejection on GC7000L, which was previously done through
a different bit.
Tested only on GC7000L so far.
Signed-off-by: Lukas F. Hartmann <lukas@mntre.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5456>
Samuel Pitoiset [Tue, 25 Aug 2020 06:43:56 +0000 (08:43 +0200)]
radv: fix setting EXCP_EN for different shader stages
While TRAP_PRESENT is always at the same place, EXCP_EN can be
different between shader stages. This sets it properly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6452>
Alejandro Piñeiro [Mon, 24 Aug 2020 08:33:46 +0000 (10:33 +0200)]
v3d: set instance id to 0 at start of tile
PTB assumes that base instance to be 0 at start of tile, but hw would
not do that, we need to set it. It is worth to note that the opcode
name is somewhat confusing as what it really sets is the base
instance. We could rename the opcode, but then the name would be
different to the original Broadcom name, so confusing in any case.
This fixes several dEQP-GLES3 and dEQP-GLES31 tests that passes
individually, but started to fail depending on other tests running
before using base instance different to zero.
This is the backport of a Vulkan patch that fixed some Vulkan CTS
tests that start to fails after some other tests used an instance id.
CC: 20.2 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6447>
Alejandro Piñeiro [Wed, 19 Aug 2020 23:02:53 +0000 (01:02 +0200)]
v3d/packet: fix typo on Set InstanceID/PrimitiveID packet
Fixes: 276d22c52 ("v3d: Add some more new packets for V3D 4.x.")
CC: 20.2 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6447>
Eric Anholt [Tue, 25 Aug 2020 21:55:22 +0000 (14:55 -0700)]
freedreno/a5xx: Don't set the VARYING flag for fragcoord-only programs.
As with a6xx (commits
beb02a78,
5785bcc8), the blob doesn't set this flag
for a5xx when fragcoords are used but not proper varyings. See for
example dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz.
The hope was that this would clear up separate_shader fails/flakes like it
helped with a6xx's flakes, but that didn't happen.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6464>
Nanley Chery [Sat, 25 Jul 2020 01:20:52 +0000 (18:20 -0700)]
gallium/dri2: Report correct YUYV and UYVY plane count
Return the actual number of planes in these formats (one) instead of the
number of planes used for lowering (two).
Fixes: d5c857837aa ("gallium/dri2: Fix creation of multi-planar modifier images")
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6449>
Eric Anholt [Tue, 25 Aug 2020 17:28:50 +0000 (10:28 -0700)]
ci: Mark the rest of compswap as flaky on freedreno.
We got another flake, this time on
dEQP-GLES31.functional.compute.shared_var.atomic.compswap.highp_uint,
which blocked !4162 from merging. Mark the rest flaky so we don't have to
keep firefighting one test at a time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6459>
Jason Ekstrand [Sat, 22 Aug 2020 00:02:02 +0000 (19:02 -0500)]
nir: Report progress properly in nir_lower_bool_to_*
All three passes have the same bug where, in the mov/vec case they
unconditionally return true even if they don't change anything. Throw
in a bit size check so they return false properly.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6435>
Rob Clark [Tue, 25 Aug 2020 20:02:34 +0000 (13:02 -0700)]
freedreno/a6xx: fix hang with large render target
It seems we do have some limits. Similar to older gens, # of tiles per
pipe cannot be more than 32. But I could not trigger any hangs with 16
or more tiles per pipe in either X or Y direction, so that limit does
not seem to apply.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6461>
Rob Clark [Tue, 25 Aug 2020 19:23:38 +0000 (12:23 -0700)]
freedreno: add env var to override tiles-per-pipe
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6461>
Rob Clark [Tue, 25 Aug 2020 17:03:31 +0000 (10:03 -0700)]
freedreno: add env var to override GMEM size
Sometimes it is useful to force a smaller size while debugging.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6461>
Rob Clark [Tue, 25 Aug 2020 16:50:59 +0000 (09:50 -0700)]
freedreno/gmemtool: add tile_alignw/h and a650
Fixes: f6f8a190920 ("freedreno/a6xx: split up gmem/tile alignment requirements")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6461>
Marek Olšák [Tue, 25 Aug 2020 17:54:38 +0000 (13:54 -0400)]
radeonsi: fix tess levels coming as scalar arrays from SPIR-V
This fixes: KHR-GL45.gl_spirv.spirv_modules_positive_test
Fixes: 75ce078a0af "radeonsi: enable NIR by default and document GL 4.6 support"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6460>
Indrajit Kumar Das [Tue, 11 Aug 2020 02:01:50 +0000 (07:31 +0530)]
mesa: add NV_copy_depth_to_color support for nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6289>
Mark Menzynski [Tue, 28 Jan 2020 12:36:27 +0000 (13:36 +0100)]
nvc0: Add shader disk caching
Adds shader disk caching for nvc0 to reduce the need to every time compile
shaders. Shaders are saved into disk_shader_cache from nvc0_screen structure.
It serializes the input nv50_ir_prog_info to compute the hash key and
also to do a byte compare between the original nv50_ir_prog_info and the one
saved in the cache. If keys match and also the byte compare returns they
are equal, shaders are same, and the compiled nv50_ir_prog_info_out from the
cache can be used instead of compiling input info.
Seems to be significantly improving loading times, these are the results
from running bunch of shaders:
cache off
real 2m58.574s
user 21m34.018s
sys 0m8.055s
cache on, first run
real 3m32.617s
user 24m52.701s
sys 0m20.400s
cache on, second run
real 0m23.745s
user 2m43.566s
sys 0m4.532s
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4264>
Mark Menzynski [Tue, 28 Jan 2020 12:11:31 +0000 (13:11 +0100)]
nv50/ir: Add nv50_ir_prog_info serialize
Adds a function for serializing a nv50_ir_prog_info structure, which is
needed for shader caching.
v2 (Karol): strip nir when serializing
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4264>
Mark Menzynski [Tue, 28 Jan 2020 12:10:35 +0000 (13:10 +0100)]
nv50/ir: Add prog_info_out print
Adds a function for printing nv50_ir_prog_info_out structure
in JSON-like format, which could be used in debugging.
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4264>
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