i965: Expose and refactor brw_update_renderbuffer_surfaces()

Note that brw_update_renderbuffer_surfaces() already had a helper
variable which was used in parallel to direct access of the current
draw buffer of the context.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Refactor rb surface setup to allow caller to store offsets

Notice that in gen7_wm_surface_state.c there is also indentation
change in the surrounding code removing tabs.

v2 (Matt): Fixed whitespace: tabs -> spaces

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/gen8: Use constant pointers for reading miptree details

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/ps: Use SET_FIELD() for sampler count

The value is actually clamped to 0-16 as sample state pointer
can be used to support more than 16 samplers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

glx: Massive update of comments in struct extension_info

In response to another patch, Emil asked for some clarification how this
stuff works.  Rather than just reply to the e-mail, I decided to update
the exlanation in the code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>

winsys/radeon: add a private interface for radeon_surface

winsys/radeon: move radeon_winsys.h to drivers/radeon

clover: remove util/compat

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

i965: Don't try to apply the opt_sampler_eot extension for vs

The opt_sampler_eot optimisation of fs_visitor effectively assumes
that it is running on a fragment shader because it casts the program
key to a brw_wm_prog_key. However on Skylake fs_visitor can also be
used for vertex shaders. It looks like this usually works anyway
because the optimisation is skipped if key->nr_color_regions != 1.
However for a vertex shader the key is actually a brw_vs_prog_key so
the space for nr_color_regions is probably taken up by
key->base.program_string_id. This can end up making nr_color_regions
be 1 in which case the function will later assert when the last
instruction is not FS_OPCODE_FB_WRITE. This was making the DEQP test
suite assert. Presumably this only happens there because that compiles
a lot of shaders so it would end up with a high value for
program_string_id.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r300: do not link against libdrm_intel

Accidentally added since the introduction of the file.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

clover: make module::symbol::name a string

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

clover: remove compat::string

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

clover: remove compat classes that match std one

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

clover: compile all sources with c++11

Later we can remove the compat code

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

st/nine: Remove Managed texture hack.

Previously binding an unitialized managed texture
was causing a crash, and a workaround was added to
prevent the crash.

This patch removes this workaround and instead set the initial
state of managed textures as dirty, so that when the texture is bound
for the first time, it is always initialized.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Enforce LOD 0 for D3DUSAGE_AUTOGENMIPMAP

For D3DUSAGE_AUTOGENMIPMAP textures, applications can only
lock/copy from/get surface descriptor for/etc the first level.
Thus it makes sense to restrict the LOD to 0, and use only the first
level to generate the sublevels.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Some D3DUSAGE_AUTOGENMIPMAP fixes

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: util_gen_mipmap doesn't need we reset states.

util_gen_mipmap uses pipe->blit, and thus doesn't need
we restore all states after using it.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: D3DUSAGE_AUTOGENMIPMAP is forbidden for volumes

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix NineBaseTexture9_PreLoad

It wasn't uploading the texture when the lod
had changed.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Rewrite Managed texture uploads

That part of the code was quite obscure.
This new implementation tries to make it clearer
by separating the differents parts, and commenting more.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Bound the dirty regions to resource size

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Simplify Surface9 Managed resources implementation

Remove the Surface9 code for dirty rects, used only for Managed
resources. Instead convey the information to the parent texture.

According to documentation, this seems to be the expected behaviour,
and if documentation is wrong there, that's not a problem since it can
only leads to more texture updates in corner cases.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Remove impossible cases with Managed textures

Copying to/from a Managed texture is forbidden.
Rendering to a Managed texture is forbidden.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Encapsulate variables for MANAGED resource

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Rework texture data allocation

Some applications assume the memory for multilevel
textures is allocated per continuous blocks.

This patch implements that behaviour.

v2: cache offsets

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix update_vertex_elements bad rebase

This code was supposed to be removed, but a rebase seems to have
made it stay.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Add debug warning when application uses sw processing

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Rework update_vertex_buffers

Previous code was trying to optimise to call set_vertex_buffers on
big packets, and thus avoids as many calls as possible.

However in practice doing so won't be faster (drivers implement
set_vertex_buffers by a loop over the buffers we want to bind)

When we want to unbind a buffer, we were calling set_vertex_buffers
on a buffer with vtxbuf->buffer = NULL. It works on some drivers,
but not on all of them, because it isn't in Gallium spec.
This patch fixes that.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix computation of const_used_size

Was sometimes too large for PS.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

gallium/svga: Remove useless ARRAY_SIZE declaration

This is already declared in util/macros.h

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

util/macros: Move DIV_ROUND_UP to util/macros.h

Move DIV_ROUND_UP to a shared location accessible everywhere

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix behaviour of D3DUSAGE_QUERY_POSTPIXELSHADER_BLENDING

Ignore D3DUSAGE_QUERY_POSTPIXELSHADER_BLENDING when
D3DUSAGE_RENDERTARGET is not specified.

This behaviour matches windows drivers.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

st/nine: Improve D3DQUERYTYPE_TIMESTAMP

Avoid blocking when retrieving D3DQUERYTYPE_TIMESTAMP result with
NineQuery9_GetData(), when D3DGETDATA_FLUSH is not specified.
This mimics Win behaviour and gives slightly better performance
for some games.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

st/nine: Fix D3DQUERYTYPE_TIMESTAMPFREQ query

D3DQUERYTYPE_TIMESTAMPFREQ is supposed to give the frequency
at which the clock of D3DQUERYTYPE_TIMESTAMP runs.

PIPE_QUERY_TIMESTAMP returns a value in ns, thus the corresponding
frequency is 1000000000.
PIPE_QUERY_TIMESTAMP_DISJOINT returns the frequency at which
PIPE_QUERY_TIMESTAMP value is updated. It isn't always
1000000000.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

st/nine: Change x86 FPU Control word on device creation

As on wined3d and windows, when D3DCREATE_FPU_PRESERVE is not
specified, change the fpu control word to all exceptions masked,
single precision, round to nearest.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>

st/nine: Do not advertise D3DDEVCAPS_TEXTURESYSTEMMEMORY

No major vendor advertises it, and we weren't supporting it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix comment in update_viewport

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Workaround barycentrics issue on some cards

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Clear struct pipe_blit_info before use.

render_condition_enable was uninitialized.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

st/nine: NineDevice9_Clear skip fastpath for bigger depth-buffers

This adds an additional check to make sure the bound depth-buffer doesn't
exceed the rendertarget size when clearing depth and color buffer at once.
D3D9 clears only a rectangle with the same dimensions as the viewport, leaving
other parts of the depth-buffer intact.

This fixes failing WINE test visual.c:depth_buffer_test()

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix wrong assert in nine_shader

The sampler src index was wrong for texldl and texldd

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Handle special LIT case

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

mesa: Fix glGetProgramiv(GL_ACTIVE_ATTRIBUTES).

It's returning random values, because RESOURCE_VAR() is casting
different objects into ir_variable pointers.

This updates _mesa_count_active_attribs to filter the resources with the
same logic used in _mesa_longest_attribute_name_length.

https://bugs.freedesktop.org/show_bug.cgi?id=90207

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

egl: misc fixes for EGL_MESA_image_dma_buf_export

Fix define and a function argument name introduced in commit
8f7338f284cdb1fef64c85e3293d2200d0cc6387

Signed-off-by: Dave Airlie <airlied@redhat.com>

nvc0/ir: flush denorms to zero in non-compute shaders

This will set the FTZ flag (flush denorms to zero) on all opcodes that
can take it.

This resolves issues in Unigine Heaven 4.0 where there were solid-filled
boxes popping up.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

meta: remove unneeded #include colortab.h

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: remove unneeded #include colortab.h

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: remove unused options var in compile_shader()

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

docs: more details about Viewperf 12 medical-01 test issues

nvc0: expose GLSL version 410

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

st/mesa: allow glsl version up to 410, enable ARB_shader_precision

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/va: add h264 decoder level support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/omx/dec: add h264 decoder level support

v2: use sps level idc as level to driver

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

vl: add level idc in sps

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/omx/dec: separate create_video_codec to different codecs

v2: get frame size from port info

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/vdpau: add h264 decoder level support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

gallium/util: get h264 level based on number of max references and resolution

v2: add commments for limitation of max references numbers,
and what the caculation is based

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

r600g,radeonsi: add a driver query returning GPU load

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

r600g,radeonsi: add driver queries for GPU temperature and shader+memory clocks

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

gm107/ir: add lane/vertex count sysvals

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

gk110/ir: add support for writing per-patch and shader outputs

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: color masking works like a blend for some formats

When there is a colormask active that does not cover all the channels,
enable reading in the destination like with a combining blend
operation. This fixes fbo-blending-formats on a3xx.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add support for S8 and Z32F_S8

Enables ARB_depth_buffer_float. There is no sampling support for
interleaved Z32F_S8, so we store the two textures separately, one as
Z32F, the other as S8. As a result, we need a lot of additional logic
for restores and transfers.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add Z32F support

32-bit depth buffers are stored as unorm, and thus need special handling
when moving to and from gmem. They are copied into gmem by writing
depth, and resolved from gmem using a special resolve bit which
apparently float-ifies the data.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno: add fd_transfer to wrap around pipe_transfer

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add support for disabling depth clipping

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965/vs: Remove unnecessary NULL check on generate_code() result.

Code generation is not allowed to fail for any reason - in fact,
fs_generator has no mechanism for failing.  The visitor is responsible
for that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: fix packing support for arrays of doubles

Broke in commit f00c5f85b82efe9535b18dbf97c4591fb28aeae6 when
adding support for multidimensional arrays

Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

i965: Enable ARB_gpu_shader5 on Gen8+.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Fix code emission for imul_high in NIR.

Copy over from brw_fs_visitor.cpp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Fix stride for multiply in macro.

We have to use W/UW type for src1 of the multiply in the MUL/MACH macro,
but in order to read the low 16-bits of each 32-bit integer, we need to
set the appropriate stride.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

Revert "i965/fs: Allow SIMD16 borrow/carry/64-bit multiply on Gen > 7."

This reverts commit 9f5e5bd34d8ba48c851b442fb88f742b1ba6a571.

I have no idea what made me believe these didn't apply to Gen > 7. They
do, and without them we generate bad code that causes failures on Gen 8.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

scons: Support LLVM 3.5 and 3.6 on windows.

llvm/Config/llvm-config.h is parsed instead of llvm/Config/config.h for
detecting LLVM version
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-June/073707.html).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

mesa: fix up GLSL version when computing GL version

In some situations it is convenient for a driver to expose a higher GLSL
version while some extensions are still incomplete. However in that
situation, it would report a GLSL version that was higher than the GL
version. Avoid that situation by limiting the GLSL version to the GL
version.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

softpipe: fix another stencil-as-float issue

Hopefully this is the last one now (for texture X32_S8X24_UINT views).
+4 piglits.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90167

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: the function name appears to have a gl prefix already

Currently we're producing errors like

User error: GL_INVALID_OPERATION in glglDeleteProgramsARB(invalid call)

And noop_warn appears to be called with the full function name. Don't
prepend a gl prefix.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

Fix a few typos

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface().

This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.

i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface().

This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.

i965: Add helper functions to calculate the slice pitch of an array or 3D miptree.

scons: add target osmesa using gallium state tracker.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

radeonsi: set an optimal value for DB_Z_INFO.ZRANGE_PRECISION

Required because of a VI hw bug.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: remove deprecated and useless registers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: remove useless includes

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium/radeon: print winsys info with R600_DEBUG=info

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

winsys/radeon: make radeon_bo_vtbl static

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

glsl: replace while loop with without_array function

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl: support packing of arrays of arrays

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl: add arrays of arrays support to without_array function

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

docs/GL3: started adding support for shader_image_size

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

gallium/hud: add more options to customize HUD panes

Extends the syntax of GALLIUM_HUD environment variable to:
- Add options to set the size and exact location of each pane.
- Add an option to limit the maximum allowed value of the X axis on a
  pane, clamping the graph down to not go above this value.
- Add an option to auto-adjust the value of the Y axis down to the
  highest value still visible on the graph.

v2:
- Make the patch simpler and smaller.
- With dynamic auto-adjusting on, adjust the Y axis once per pane
  update instead of updating once every several seconds.
- No longer mishandle pane height when having more than one graph per
  pane.

i965: Fill out the rest of brw_debug_recompile_sampler_key().

This makes INTEL_DEBUG=perf report shader recompiles due to CMS vs.
UMS/IMS differences and Sandybridge textureGather workarounds.

Previously, we just flagged them as "Something else".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Disassemble sampler message names on Gen5+.

Previously, sampler messages were decoded as

sampler (1, 0, 2, 2) mlen 6 rlen 8              { align1 1H };

I don't know how much time we've collectly wasted trying to read this
format.  I can never recall which number is the surface index, sampler
index, message type, or...whatever that other number is.  Figuring out
the message name from the numerical code is also painful.

Now they decode as:

sampler sample_l SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 8 { align1 1H };

This is easy to read at a glance, and matches the format I used for
render target formats.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/fs: Disallow constant propagation into POW on Gen 6.

Fixes assertion failures in three piglit tests on Gen 6 since commit
0087cf23e.

mesa: add support for exposing up to GL4.2

Add the 4.0/4.1/4.2 extensions lists to compute_version. A couple of
extensions aren't in mesa yet, so those are marked with 0 until they
become supported.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Add missing pixel_x/y to brw_instruction_name().

Forgotten in commit 529064f6.

i965/fs: Don't constant propagate into integer math instructions.

Constant combining won't promote non-floats, so this isn't safe.

Fixes regressions since commit 0087cf23e.

docs: add news item and link release notes for mesa 10.5.4

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

docs: Add sha256 sums for the 10.5.4 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit adb47b5b279b6fd920151aa7926af6ffd2069339)