mesa.git
4 years agoetnaviv: enable texture upload memory throttling
Christian Gmeiner [Fri, 7 Feb 2020 10:24:55 +0000 (11:24 +0100)]
etnaviv: enable texture upload memory throttling

Fixes oom-killer during piglit's streaming-texture-upload on a
SolidRun CuBox-i with 2GB of RAM.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3745>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3745>

4 years agofreedreno/ir3: Fold const only when the type is float
Hyunjun Ko [Thu, 7 Nov 2019 05:32:34 +0000 (05:32 +0000)]
freedreno/ir3: Fold const only when the type is float

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

4 years agofreedreno/ir3: put the conversion back for half const to the right place.
Hyunjun Ko [Thu, 7 Nov 2019 05:28:41 +0000 (05:28 +0000)]
freedreno/ir3: put the conversion back for half const to the right place.

The previous commit leads to match immed values unexpectedly.

This makes constlen for each shader including bvert wrong.
Also fixes atan2 for mediump deqp tests.

Fixes: cbd1f47433b ("freedreno/ir3: convert back to 32-bit values for half constant registers.")
v2: Move conversion up above fabs/fneg modifier handling as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

4 years agofreedreno/ir3: Add cat4 mediump opcodes
Hyunjun Ko [Fri, 1 Nov 2019 08:34:54 +0000 (08:34 +0000)]
freedreno/ir3: Add cat4 mediump opcodes

v2: Reworked to assign half-opcodes in ir3_ra.c (krh).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

4 years agofreedreno/ir3: fold const conversion into consumer
Rob Clark [Thu, 20 Jun 2019 16:31:00 +0000 (16:31 +0000)]
freedreno/ir3: fold const conversion into consumer

A sequence like:

  (nop3)cov.f32f16 hr0.x, c0.x
  mul.f hr4.y, hr1.z, hr0.x

can be turned into:

  mul.f hr4.y, hr1.z, hc0.x

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

4 years agofreedreno/ir3: fix printing half constant registers.
Hyunjun Ko [Fri, 1 Nov 2019 03:10:38 +0000 (03:10 +0000)]
freedreno/ir3: fix printing half constant registers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

4 years agofreedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOV
Kristian H. Kristensen [Fri, 10 Jan 2020 21:59:43 +0000 (13:59 -0800)]
freedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOV

This lets is_same_type_reg() recognize that the dst and src of the
immediate MOV are the same and unblocks fp16 constant propagation.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

4 years agodocs: Mark 20.0-rc2 as done
Dylan Baker [Fri, 7 Feb 2020 17:02:02 +0000 (09:02 -0800)]
docs: Mark 20.0-rc2 as done

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3751>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3751>

4 years agofreedreno: android: fix build of perfcounters.
Martin Fuzzey [Thu, 6 Feb 2020 18:07:16 +0000 (19:07 +0100)]
freedreno: android: fix build of perfcounters.

Some dependencies were missing on android causing a build failure.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>

4 years agofreedreno: android: add a6xx-pack.xml.h generation to android build
Martin Fuzzey [Thu, 6 Feb 2020 18:05:36 +0000 (19:05 +0100)]
freedreno: android: add a6xx-pack.xml.h generation to android build

The generation of a6xx-pack.xml.h was missing in the android build scripts
leading to a build failure.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>

4 years agofreedreno: android: fix build failure on android due to python version
Martin Fuzzey [Thu, 6 Feb 2020 18:08:10 +0000 (19:08 +0100)]
freedreno: android: fix build failure on android due to python version

The freedreno gen_header.py script now only works under python3.
It contains a "print()" call which prints a blank line under python3
but prints "()" under python2.7.

However the Android build currently uses python2.

This leads to incorrect code generation and a later build error.

.../STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno_common.xml.h:163:2: error: expected identifier or '('
()

Fix this by adding MESA_PYTHON3 and using it for the freedreno scripts.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>

4 years agogallium/swr: Fix llvm11 compilation issues
Krzysztof Raszkowski [Fri, 7 Feb 2020 14:02:25 +0000 (15:02 +0100)]
gallium/swr: Fix llvm11 compilation issues

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>

4 years agoVulkan Overlay: Don't try to change the image layout to present twice
Georg Lehmann [Thu, 6 Feb 2020 21:29:42 +0000 (22:29 +0100)]
Vulkan Overlay: Don't try to change the image layout to present twice

The render pass already does the transition.
The pipeline barrier is still needed to transfer the queue family ownership.

Fixes: 320b0f66c274 ("vulkan/overlay: bounce image back to present layout")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3740>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3740>

4 years agoaco: do not use ds_{read,write}2 on GFX6
Samuel Pitoiset [Fri, 7 Feb 2020 11:53:31 +0000 (12:53 +0100)]
aco: do not use ds_{read,write}2 on GFX6

According to LLVM, these instructions have a bounds checking bug.
LLVM only uses them on GFX7+.

This fixes broken geometry in Assassins Creed Origins.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2489
Fixes: 4a553212fa1 ("radv: enable ACO support for GFX6")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3746>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3746>

4 years agointel/vec4: fix valgrind errors with vf_values array
Tapani Pälli [Tue, 4 Feb 2020 12:58:17 +0000 (14:58 +0200)]
intel/vec4: fix valgrind errors with vf_values array

Fixes valgrind errors introduced since commit a8ec4082.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2346
Fixes: a8ec4082 ("nir+vtn: vec8+vec16 support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3691>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3691>

4 years agolima/parser: Change value name in RSW parser
Andreas Baierl [Thu, 6 Feb 2020 10:41:35 +0000 (11:41 +0100)]
lima/parser: Change value name in RSW parser

Second value of SHADER_ADDRESS is the length of the first instruction
in the shader, so give it a better name.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>

4 years agolima/parser: Extend AUX0 findings
Andreas Baierl [Wed, 29 Jan 2020 12:10:26 +0000 (13:10 +0100)]
lima/parser: Extend AUX0 findings

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>

4 years agolima/parser: Fix RSW depth test parsing
Andreas Baierl [Wed, 29 Jan 2020 11:56:10 +0000 (12:56 +0100)]
lima/parser: Fix RSW depth test parsing

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>

4 years agoi965: remove duplicated comment
Leandro Ribeiro [Tue, 22 Oct 2019 00:58:12 +0000 (21:58 -0300)]
i965: remove duplicated comment

Signed-off-by: Leandro Ribeiro <leandrohr@riseup.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2416>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2416>

4 years agoci: Drop turnip opt-in option
Kristian H. Kristensen [Thu, 6 Feb 2020 22:49:57 +0000 (14:49 -0800)]
ci: Drop turnip opt-in option

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3742>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3742>

4 years agollvmpipe: advertise 4 vertex streams
Dave Airlie [Thu, 23 Jan 2020 06:20:20 +0000 (16:20 +1000)]
llvmpipe: advertise 4 vertex streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agodraw: don't emit vertex to streams with no outputs
Dave Airlie [Thu, 23 Jan 2020 07:17:21 +0000 (17:17 +1000)]
draw: don't emit vertex to streams with no outputs

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agodraw: emit multiple streams to streamout.
Dave Airlie [Thu, 23 Jan 2020 06:19:25 +0000 (16:19 +1000)]
draw: emit multiple streams to streamout.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agodraw/gs: track emitted prims + verts per stream.
Dave Airlie [Thu, 23 Jan 2020 06:18:29 +0000 (16:18 +1000)]
draw/gs: track emitted prims + verts per stream.

This adds tracking of the emitted prims/verts per-stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agodraw: change geom shader output to an array of outputs.
Dave Airlie [Thu, 23 Jan 2020 06:17:25 +0000 (16:17 +1000)]
draw: change geom shader output to an array of outputs.

Instead of a single output ptr, pass in one per output stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agogallivm/nir: add support for multiple vertex streams
Dave Airlie [Thu, 23 Jan 2020 06:15:50 +0000 (16:15 +1000)]
gallivm/nir: add support for multiple vertex streams

This adds support to the nir shader build for multiple vertex streams
we store separate stats for each stream, then write them out in the epilogue.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agogallivm/swr: add stream_id to geom epilogue emit
Dave Airlie [Thu, 23 Jan 2020 06:13:24 +0000 (16:13 +1000)]
gallivm/swr: add stream_id to geom epilogue emit

We want to pass a stream in here so we can write out separate
prim/vertex counts for each stream at the end.

This also adds an ignore any stream option so we can stage more code

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agollvmpipe/query: add support for indexed queries
Dave Airlie [Thu, 23 Jan 2020 05:48:46 +0000 (15:48 +1000)]
llvmpipe/query: add support for indexed queries

This adds support for the queries needed for gpu_shader5 vertex streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>

4 years agoci: Bump the GLES CTS version to 3.2.6.1.
Eric Anholt [Thu, 30 Jan 2020 23:53:39 +0000 (15:53 -0800)]
ci: Bump the GLES CTS version to 3.2.6.1.

This brings in the surfaceless fixes so we don't need to check out the
whole repo to cherry pick any more (which was bothering me as I debugged
things late in the painfully slow ARM container build process).

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>

4 years agoci: Disable a bunch of tests on freedreno a630.
Eric Anholt [Thu, 6 Feb 2020 19:00:12 +0000 (11:00 -0800)]
ci: Disable a bunch of tests on freedreno a630.

On a daily basis I've been having to restart people's a630 jobs in the
front couple of pages of /merge_requests due to spurious failures from our
flaky tests, and fielding reports of spurious fails from other developers,
and babysitting my own marge merges that are failing due to our flakes.

Nobody should have to deal with that, especially not non-freedreno
developers, so just scrape the list of flakes reported to #freedreno-ci
for the last month and ban those tests that have failed more than once
until we have a credible fix.

Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>

4 years agoturnip: Drop explicit configure opt-in for turnip
Kristian H. Kristensen [Thu, 6 Feb 2020 21:21:59 +0000 (13:21 -0800)]
turnip: Drop explicit configure opt-in for turnip

We don't need this silly thing anymore. Everthing here is WIP.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3739>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3739>

4 years agou_tile: Skip the packed temporary and just store tiles directly.
Eric Anholt [Tue, 4 Feb 2020 18:59:19 +0000 (10:59 -0800)]
u_tile: Skip the packed temporary and just store tiles directly.

We were generating a packed copy and then memcpying it, but we can just
pack directly to the destination.  Change on glmark2 -b build:use-vbo=true
is modest: 1.06328% +/- 0.994771% (n=84) but does remove the function that
was .6% of CPU time.

I'm not doing the equivalent "get" path at this time because softpipe's
texture cache has some clipping issues that get revealed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3698>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3698>

4 years agobroadcom: Fix implicit declaration of ffs for Android build
Jose Maria Casanova Crespo [Wed, 30 Oct 2019 18:35:09 +0000 (19:35 +0100)]
broadcom: Fix implicit declaration of ffs for Android build

Include util/bitscan.h to ensure ffs is available when there is no
glibc like in Android.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1983
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>

4 years agoaco: gfx10_wave64_bpermute reduce op to print_ir
Rhys Perry [Mon, 3 Feb 2020 19:16:29 +0000 (19:16 +0000)]
aco: gfx10_wave64_bpermute reduce op to print_ir

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>

4 years agoaco: fix gfx10_wave64_bpermute
Rhys Perry [Mon, 3 Feb 2020 17:54:07 +0000 (17:54 +0000)]
aco: fix gfx10_wave64_bpermute

Since 9254fb4fc72, the pass replaced the SCC clobber with the scalar
identity temporary. Just skip most of the temporary setup, since we don't
need it for gfx10_wave64_bpermute.

Although shuffles are disabled on GFX10, Detroit: Become Human seems to
use them anyway.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 9254fb4fc72ed289ffded28ef067b4582973e90c ('aco: don't use a scalar
       temporary for reductions on GFX10')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>

4 years agoCorrectly wait in the fragment stage until all semaphores are signaled
Georg Lehmann [Wed, 5 Feb 2020 18:06:55 +0000 (18:06 +0000)]
Correctly wait in the fragment stage until all semaphores are signaled

This fixes two issues:
- a crash if the application uses more than one semaphore for presenting because the driver expects one stage per semaphore
- the swapchain image could be not ready yet if the semaphores aren't signaled, #946 is possible related

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3718>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3718>

4 years agosvga: Fix banded DMA upload
Thomas Hellstrom [Wed, 5 Feb 2020 06:54:19 +0000 (07:54 +0100)]
svga: Fix banded DMA upload

A previous commit ("winsys/svga: Limit the maximum DMA hardware buffer
size") made banded DMA transfer kick in when transfering gnome-shell
window contents under gnome-shell / wayland. This uncovered a bug where
we assumed that banded DMA transfers always occur to the top (y=0) of the
surface.
Fix this by taking the destination y offset into account.

Cc: 19.2 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Fixes: 287c94ea498 ("Squashed commit of the following:")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3733>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3733>

4 years agoanv: No-op submit and wait calls when no_hw is set
Jason Ekstrand [Thu, 6 Feb 2020 10:31:27 +0000 (04:31 -0600)]
anv: No-op submit and wait calls when no_hw is set

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3734>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3734>

4 years agoanv: set MOCS on push constants
Lionel Landwerlin [Thu, 6 Feb 2020 08:13:36 +0000 (10:13 +0200)]
anv: set MOCS on push constants

v2: Also set MOCS on 3DSTATE_CONSTANT_ALL (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 67d2cb3e9367 ("anv: Add get_push_range_address() helper.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3732>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3732>

4 years agollvmpipe: Bump test timeout to 180 seconds
Michel Dänzer [Wed, 5 Feb 2020 14:39:12 +0000 (15:39 +0100)]
llvmpipe: Bump test timeout to 180 seconds

120 still wasn't always enough for the s390x cross-build job, see e.g.
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/1551685

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3715>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3715>

4 years agointel: Load the driver even if I915_PARAM_REVISION is not found.
Rafael Antognolli [Mon, 19 Aug 2019 19:28:55 +0000 (12:28 -0700)]
intel: Load the driver even if I915_PARAM_REVISION is not found.

This param is only available starting on kernel 4.1. Use a default
value of 0 if it is not found instead.

v2: Update commit message (Lionel)

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Fixes: 96e1c945f2b ("i965: Move device info initialization to common
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>

4 years agoisl: Fix the android build.
Kenneth Graunke [Thu, 6 Feb 2020 04:08:43 +0000 (20:08 -0800)]
isl: Fix the android build.

Fixes: 5bea0cf7795 ("intel/isl: Move iris's pipe-to-isl format function to isl.")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>

4 years agointel/genxml: Drop "reserved" enum
Kenneth Graunke [Thu, 6 Feb 2020 05:05:26 +0000 (21:05 -0800)]
intel/genxml: Drop "reserved" enum

This was adding "#define reserved 2" to genxml includes, which is a
fairly mean lowercase word to redefine.  It ends up breaking the build
on Android, which has __u32 reserved fields in headers.

Defining it also has no purpose.  Just drop it.

Fixes: 5bea0cf7795 ("intel/isl: Move iris's pipe-to-isl format function to isl.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>

4 years agoswr: Fix GCC 4.9 checks.
Vinson Lee [Sat, 1 Feb 2020 09:12:32 +0000 (01:12 -0800)]
swr: Fix GCC 4.9 checks.

Fixes: f0a22956be48 ("swr/rast: _mm*_undefined_* implementations for gcc<4.9")
Fixes: e21fc2c62527 ("swr/rast: non-regex knob fallback code for gcc < 4.9")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
4 years agogallium: let the pipe drivers decide the supported modifiers
James Xiong [Wed, 22 Jan 2020 23:52:25 +0000 (15:52 -0800)]
gallium: let the pipe drivers decide the supported modifiers

fixes: ac0219cc5b ("gallium: dmabuf support for yuv formats that are not natively supported")

Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>

4 years agoiris: handle the failure of converting unsupported yuv formats to isl
James Xiong [Wed, 20 Nov 2019 23:59:00 +0000 (15:59 -0800)]
iris: handle the failure of converting unsupported yuv formats to isl

Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>

4 years agoRevert "egl: put full path to libEGL_mesa.so in GLVND json"
Eric Engestrom [Wed, 5 Feb 2020 22:58:23 +0000 (22:58 +0000)]
Revert "egl: put full path to libEGL_mesa.so in GLVND json"

This reverts commit 0021f7dc307f4852955359adb5ac2b7667e6d4ac.

That commit had 2 issues:
- I missed the `.0` from the filename, causing issues on Debian & Ubuntu
  platforms.
- I didn't think about multilib/multi-arch systems, where we'd now need
  a separate json for each arch as they point to different libs.

Reverting this commit for now, I'll try again later.

Requested-by: Michel Dänzer <michel@daenzer.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2466
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2471
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2480
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3726>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3726>

4 years agomeson: don't bother trying `python2`
Eric Engestrom [Sun, 2 Feb 2020 15:29:08 +0000 (15:29 +0000)]
meson: don't bother trying `python2`

Meson requires `python3`, so we know it's there, no need to fall back to
python2.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3701>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3701>

4 years agoaco/optimizer: Don't combine uniform bool s_and to s_andn2.
Timur Kristóf [Wed, 5 Feb 2020 10:19:06 +0000 (11:19 +0100)]
aco/optimizer: Don't combine uniform bool s_and to s_andn2.

Fixes: 8a32f57fff56b3b94f1b5589feba38016f39427c
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3714>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3714>

4 years agonouveau: Reuse tgsi_get_gl_varying_semantic().
Eric Anholt [Wed, 22 Jan 2020 01:41:34 +0000 (17:41 -0800)]
nouveau: Reuse tgsi_get_gl_varying_semantic().

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>

4 years agonouveau: reuse tgsi_get_gl_frag_result_semantic().
Eric Anholt [Wed, 22 Jan 2020 01:39:03 +0000 (17:39 -0800)]
nouveau: reuse tgsi_get_gl_frag_result_semantic().

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>

4 years agonouveau: Reuse tgsi_get_sysval_semantic().
Eric Anholt [Wed, 22 Jan 2020 01:35:00 +0000 (17:35 -0800)]
nouveau: Reuse tgsi_get_sysval_semantic().

It's now in a place accessible from the nouveau driver.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>

4 years agomesa/st: Move the SYSTEM_VALUE -> TGSI_SEMANTIC map to tgsi_from_mesa.
Eric Anholt [Mon, 13 Jan 2020 23:30:07 +0000 (15:30 -0800)]
mesa/st: Move the SYSTEM_VALUE -> TGSI_SEMANTIC map to tgsi_from_mesa.

This will let us reuse the table from nir-to-tgsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>

4 years agofreedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
Kristian H. Kristensen [Wed, 5 Feb 2020 01:49:35 +0000 (17:49 -0800)]
freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED

This brings back fd6_fill_ubwc_buffer_sizes() to implement
layout_resource_for_modifier for DRM_FORMAT_MOD_QCOM_COMPRESSED.

Fixes: ecd62ff766 "freedreno: Allow UBWC on textures with multiple mipmap levels."
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>

4 years agofreedreno: Add layout_resource_for_modifier screen vfunc
Kristian H. Kristensen [Wed, 5 Feb 2020 01:46:10 +0000 (17:46 -0800)]
freedreno: Add layout_resource_for_modifier screen vfunc

This function is responsible for completing the layout for an imported
resource with the given modifier.  Returns 0 on success or -1 If the
modifier is unsupported, invalid or the input parameters are not
compatible with the modifier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>

4 years agofreedreno: Set up supported modifiers in fd*_resource_screen_init()
Kristian H. Kristensen [Wed, 5 Feb 2020 01:41:27 +0000 (17:41 -0800)]
freedreno: Set up supported modifiers in fd*_resource_screen_init()

Keep the modifier logic together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>

4 years agofreedreno/a6xx: Add fd6_resource_screen_init()
Kristian H. Kristensen [Wed, 5 Feb 2020 01:38:42 +0000 (17:38 -0800)]
freedreno/a6xx: Add fd6_resource_screen_init()

We'll move a few things here in the next commits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>

4 years agoglsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.
Eric Anholt [Fri, 10 Jan 2020 22:09:43 +0000 (14:09 -0800)]
glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.

This means you can directly use format utils on it without having to have
your own GL enum to number-of-components switch statement (or whatever) in
your vulkan backend.

Thanks to imirkin for fixing up the nouveau driver (and a couple of core
details).

This fixes the computed qualifiers for EXT_shader_image_load_store's
non-integer sizeNxM qualifiers, which we don't have tests for.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v3d)
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>

4 years agointel/isl: Move iris's pipe-to-isl format function to isl.
Eric Anholt [Fri, 10 Jan 2020 22:46:37 +0000 (14:46 -0800)]
intel/isl: Move iris's pipe-to-isl format function to isl.

This will get reused in the shader compiler once we switch it over to pipe
formats instead of GL enums.  We can't easily deduplicate i965's
mesa-to-isl mapping because of cases like A32_FLOAT that are mapped
differently.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>

4 years agomesa: Clean up some endianness adapters for shader image formats.
Eric Anholt [Fri, 10 Jan 2020 22:02:51 +0000 (14:02 -0800)]
mesa: Clean up some endianness adapters for shader image formats.

We already had a uint version in formats.h, move the snorm/unorm ones
there, too.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>

4 years agogallium/swr: Fix various asserts and security issues
Jan Zielinski [Wed, 5 Feb 2020 12:57:55 +0000 (13:57 +0100)]
gallium/swr: Fix various asserts and security issues

To improve the robustness of the code, we want to better
detect issues in testing (using asserts) and use more
secure techniques.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3710>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3710>

4 years agopan/midgard: Fix scheduling issue with csel + render target reference
Alyssa Rosenzweig [Mon, 3 Feb 2020 13:19:41 +0000 (08:19 -0500)]
pan/midgard: Fix scheduling issue with csel + render target reference

Fixes dEQP-GLES3.functional.shaders.fragdepth.write.dynamic_conditional_write

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>

4 years agopanfrost: Set the MALI_WRITES_{Z,S} flags when needed
Boris Brezillon [Fri, 31 Jan 2020 09:55:49 +0000 (10:55 +0100)]
panfrost: Set the MALI_WRITES_{Z,S} flags when needed

In order to make Z/S writes from fragment shaders effective, we need
to set the MALI_WRITES_{Z,S} flags when the shader has a
FRAG_RESULT_{DEPTH,STENCIL} output variable.

Now that shaders can change the S value, we can expose the
STENCIL_EXPORT cap.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>

4 years agopanfrost: Add the MALI_WRITES_{Z,S} flags
Boris Brezillon [Fri, 31 Jan 2020 11:37:38 +0000 (12:37 +0100)]
panfrost: Add the MALI_WRITES_{Z,S} flags

We discovered 2 new shader flags used when a fragment shader updates
the depth/stencil value through a ZS writeout. If those flags are not
set, the depth/stencil value stored in the depth/stencil tilebuffer
remain unchanged.

While at it, rename unknown2 into flags_hi and rename flags into
flags_lo.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>

4 years agopanfrost: Z24 variants should be sampled as R32UI
Boris Brezillon [Fri, 31 Jan 2020 09:59:23 +0000 (10:59 +0100)]
panfrost: Z24 variants should be sampled as R32UI

Midgard has no dedicated samplers for Z24S8 and Z24X8 formats, and the
GPU expects the depth to be encoded in an IEEE 32-bit float. Turn all
Z24_UNORM variants into R32UI and let the shader do the conversion
using bfe+fmul instructions.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>

4 years agopan/midgard: Add nir_intrinsic_store_zs_output_pan support
Boris Brezillon [Fri, 31 Jan 2020 09:05:16 +0000 (10:05 +0100)]
pan/midgard: Add nir_intrinsic_store_zs_output_pan support

ZS fragment stores are done like color fragment stores, except it's
using a different RT id (0xFF), the depth and stencil values are stored
in r1.x and r1.y.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
[Fix the scheduling part]

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>

4 years agopan/midgard: Turn Z/S stores into zs_output_pan intrinsics
Boris Brezillon [Fri, 31 Jan 2020 08:34:48 +0000 (09:34 +0100)]
pan/midgard: Turn Z/S stores into zs_output_pan intrinsics

Midgard can't write depth and stencil separately. It has to happen in
a single store operation containing both. Let's add a panfrost specific
intrinsic and turn all depth/stencil stores into a packed depth+stencil
one.

Note that this intrinsic is not yet handled in emit_intrinsic(), but
we'll address that later.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>

4 years agointel/fs: Don't count integer instructions as being possibly coissue
Ian Romanick [Thu, 23 Jan 2020 00:23:14 +0000 (16:23 -0800)]
intel/fs: Don't count integer instructions as being possibly coissue

Integer instructions don't coissue.  Before e64be391dd0
("intel/compiler: generalize the combine constants pass"), this pass
only looked at float sources.  There's no shader-db data in that commit,
so I collected some.  The results are not good:

    Haswell
    total instructions in shared programs: 11898805 -> 11908127 (0.08%)
    instructions in affected programs: 1218680 -> 1228002 (0.76%)
    helped: 2
    HURT: 5171
    helped stats (abs) min: 12 max: 111 x̄: 61.50 x̃: 61
    helped stats (rel) min: 1.59% max: 9.20% x̄: 5.40% x̃: 5.40%
    HURT stats (abs)   min: 1 max: 311 x̄: 1.83 x̃: 1
    HURT stats (rel)   min: 0.02% max: 9.91% x̄: 1.05% x̃: 0.70%
    95% mean confidence interval for instructions value: 1.55 2.05
    95% mean confidence interval for instructions %-change: 1.02% 1.08%
    Instructions are HURT.

    total cycles in shared programs: 221664974 -> 221404750 (-0.12%)
    cycles in affected programs: 120012620 -> 119752396 (-0.22%)
    helped: 3464
    HURT: 3159
    helped stats (abs) min: 1 max: 428160 x̄: 314.55 x̃: 16
    helped stats (rel) min: <.01% max: 57.33% x̄: 3.40% x̃: 1.28%
    HURT stats (abs)   min: 1 max: 87846 x̄: 262.54 x̃: 14
    HURT stats (rel)   min: <.01% max: 85.57% x̄: 3.01% x̃: 0.77%
    95% mean confidence interval for cycles value: -224.23 145.65
    95% mean confidence interval for cycles %-change: -0.50% -0.19%
    Inconclusive result (value mean confidence interval includes 0).

    total spills in shared programs: 9804 -> 10047 (2.48%)
    spills in affected programs: 6869 -> 7112 (3.54%)
    helped: 2
    HURT: 41

    total fills in shared programs: 19863 -> 20319 (2.30%)
    fills in affected programs: 17428 -> 17884 (2.62%)
    helped: 2
    HURT: 41

    LOST:   20
    GAINED: 13

This also prevents regressions in "intel/fs: Promote integer constants
after lowering integer multiplication" (note: that patch will probably
not be committed).  When the passes are reorderd, code like

    mul(8)      acc0<1>D    g9<8,8,1>D  -2078209981D    { align1 1Q };

gets turned into

    mov(1)      g23<1>D     2078209981D                 { align1 WE_all 1N };
    ...
    mul(8)      acc0<1>D    g13<8,8,1>D  -g23<0,1,0>D   { align1 1Q compacted };

It's not 100% clear why, but these produce different results.  Note that
-2078209981 & 0x0ffff = 0x0843, and -(2078209981 & 0x0ffff) =
0xffff0843.  It seems like the upper 16-bits of the negation should be
ignored.

Fixes: e64be391dd0 ("intel/compiler: generalize the combine constants pass")
Cc: Iago Toral Quiroga <itoral@igalia.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
The shaders with spills or fills hurt are the usual suspects.  A couple
compute shaders in Dirt Showdown and a compute shader in Bioshock
Infinite.  On Haswell, a compute shader (that appears twice in
shader-db) from Aztec Ruins was also hurt for spill and fills.

Haswell
total instructions in shared programs: 11573934 -> 11568335 (-0.05%)
instructions in affected programs: 828623 -> 823024 (-0.68%)
helped: 2825
HURT: 6
helped stats (abs) min: 1 max: 134 x̄: 2.16 x̃: 1
helped stats (rel) min: 0.02% max: 9.05% x̄: 0.84% x̃: 0.61%
HURT stats (abs)   min: 1 max: 216 x̄: 81.83 x̃: 56
HURT stats (rel)   min: 0.16% max: 8.65% x̄: 4.21% x̃: 4.68%
95% mean confidence interval for instructions value: -2.31 -1.64
95% mean confidence interval for instructions %-change: -0.85% -0.80%
Instructions are helped.

total cycles in shared programs: 187573593 -> 187004633 (-0.30%)
cycles in affected programs: 82816107 -> 82247147 (-0.69%)
helped: 2186
HURT: 1741
helped stats (abs) min: 1 max: 35230 x̄: 326.96 x̃: 16
helped stats (rel) min: <.01% max: 46.11% x̄: 3.11% x̃: 0.90%
HURT stats (abs)   min: 1 max: 6138 x̄: 83.73 x̃: 16
HURT stats (rel)   min: <.01% max: 104.11% x̄: 2.73% x̃: 0.75%
95% mean confidence interval for cycles value: -197.13 -92.64
95% mean confidence interval for cycles %-change: -0.72% -0.33%
Cycles are helped.

total spills in shared programs: 7870 -> 7743 (-1.61%)
spills in affected programs: 2260 -> 2133 (-5.62%)
helped: 31
HURT: 5

total fills in shared programs: 6320 -> 6263 (-0.90%)
fills in affected programs: 3547 -> 3490 (-1.61%)
helped: 31
HURT: 6

LOST:   9
GAINED: 9

Ivybridge
total instructions in shared programs: 11863372 -> 11859793 (-0.03%)
instructions in affected programs: 757183 -> 753604 (-0.47%)
helped: 2236
HURT: 3
helped stats (abs) min: 1 max: 81 x̄: 1.86 x̃: 1
helped stats (rel) min: 0.03% max: 5.26% x̄: 0.74% x̃: 0.48%
HURT stats (abs)   min: 11 max: 301 x̄: 192.33 x̃: 265
HURT stats (rel)   min: 1.55% max: 10.51% x̄: 6.89% x̃: 8.62%
95% mean confidence interval for instructions value: -2.01 -1.18
95% mean confidence interval for instructions %-change: -0.77% -0.70%
Instructions are helped.

total cycles in shared programs: 178377378 -> 177946087 (-0.24%)
cycles in affected programs: 76261390 -> 75830099 (-0.57%)
helped: 1635
HURT: 1395
helped stats (abs) min: 1 max: 34796 x̄: 333.53 x̃: 16
helped stats (rel) min: <.01% max: 47.15% x̄: 2.82% x̃: 0.64%
HURT stats (abs)   min: 1 max: 4315 x̄: 81.74 x̃: 18
HURT stats (rel)   min: <.01% max: 49.98% x̄: 1.99% x̃: 0.53%
95% mean confidence interval for cycles value: -197.06 -87.62
95% mean confidence interval for cycles %-change: -0.78% -0.43%
Cycles are helped.

total spills in shared programs: 4188 -> 4182 (-0.14%)
spills in affected programs: 1557 -> 1551 (-0.39%)
helped: 30
HURT: 3

total fills in shared programs: 5056 -> 5245 (3.74%)
fills in affected programs: 2708 -> 2897 (6.98%)
helped: 30
HURT: 3

LOST:   5
GAINED: 1

No shader-db changes on any other Intel platform.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544>

4 years agotu: Move vsc_data and vsc_data2 allocation into the device
Connor Abbott [Tue, 28 Jan 2020 16:30:44 +0000 (17:30 +0100)]
tu: Move vsc_data and vsc_data2 allocation into the device

In addition to preparing us for dynamically resizing them, which has to
be controlled by the device, this greatly reduces the memory usage when
allocating large numbers of command buffers, making
dEQP-VK.api.object_management.max_concurrent.command_buffer_primary go
from crash -> pass.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3621>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3621>

4 years agofreedreno: Fix CP_COND_EXEC
Connor Abbott [Tue, 28 Jan 2020 12:27:11 +0000 (13:27 +0100)]
freedreno: Fix CP_COND_EXEC

Noticed while looking at a trace of the Vulkan blob.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>

4 years agofreedreno: Add CP_REG_WRITE documentation
Connor Abbott [Tue, 28 Jan 2020 12:19:52 +0000 (13:19 +0100)]
freedreno: Add CP_REG_WRITE documentation

Document the first DWORD, which at least for the Vulkan blob on a640
isn't always 2.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>

4 years agofreedreno: Fix CP_COND_REG_EXEC bit positions
Connor Abbott [Tue, 28 Jan 2020 12:19:25 +0000 (13:19 +0100)]
freedreno: Fix CP_COND_REG_EXEC bit positions

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>

4 years agogitlab-ci: Build radeonsi & RADV in the ppc64el job
Michel Dänzer [Fri, 31 Jan 2020 15:07:10 +0000 (16:07 +0100)]
gitlab-ci: Build radeonsi & RADV in the ppc64el job

This requires cross-building libdrm for ppc64el.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>

4 years agogitlab-ci: Add ppc64el and s390x cross-build jobs
Michel Dänzer [Thu, 30 Jan 2020 17:21:15 +0000 (18:21 +0100)]
gitlab-ci: Add ppc64el and s390x cross-build jobs

Using LLVM 8 for ppc64el and 7 for s390x (which hits some coroutine
related issues with LLVM 8).

There are some test failures we need to ignore for now. Also, the
timeout needs to be bumped from the default 30s for some tests, because
they can take longer under emulation.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>

4 years agogitlab-ci: Merge ccache and libxml2-utils into main apt-get install
Michel Dänzer [Fri, 31 Jan 2020 15:48:36 +0000 (16:48 +0100)]
gitlab-ci: Merge ccache and libxml2-utils into main apt-get install

The motivation for this is that we want to make use of the meson cross
files in this script, which have the ccache compiler paths.

We need to remove the ccache directory at the end, it would just waste
space in the image for no benefit.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>

4 years agogitlab-ci: Pass -j4 to make
Michel Dänzer [Fri, 31 Jan 2020 16:40:54 +0000 (17:40 +0100)]
gitlab-ci: Pass -j4 to make

Might speed up x86_build docker image build a little.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>

4 years agogitlab-ci: Update to latest ci-templates HEAD
Michel Dänzer [Fri, 31 Jan 2020 15:57:31 +0000 (16:57 +0100)]
gitlab-ci: Update to latest ci-templates HEAD

Among other things, this increases robustness when copying a docker
image from the main Mesa project to a forked project, avoiding spurious
image rebuilds from scratch.

Also drop the comment about .gitlab-ci/lava-gitlab-ci.yml, it doesn't
include the templates anymore.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>

4 years agoradeonsi/ngg: add VGT_FLUSH when enabling fast launch
Pierre-Eric Pelloux-Prayer [Thu, 30 Jan 2020 11:16:46 +0000 (12:16 +0100)]
radeonsi/ngg: add VGT_FLUSH when enabling fast launch

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2418
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2426
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2434
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>

4 years agoutil/disk_cache: check for write() failure in the zstd path
Eric Engestrom [Sun, 2 Feb 2020 17:15:09 +0000 (17:15 +0000)]
util/disk_cache: check for write() failure in the zstd path

CoverityID: 1458074
Fixes: a8d941091f72923561a6 ("util: Use ZSTD for shader cache if possible")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672>

4 years agodri: delete gen-symbol-redefs.py
Eric Engestrom [Sun, 2 Feb 2020 15:11:16 +0000 (15:11 +0000)]
dri: delete gen-symbol-redefs.py

Introduced in ba10d79cca8d93c9f366 but it looks like it was never wired
into anything.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3669>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3669>

4 years agoanv: implement gen12 post sync pipe control workaround
Lionel Landwerlin [Wed, 15 Jan 2020 12:09:26 +0000 (14:09 +0200)]
anv: implement gen12 post sync pipe control workaround

Same as Skylake.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>

4 years agoanv: implement gen9 post sync pipe control workaround
Lionel Landwerlin [Wed, 15 Jan 2020 12:07:29 +0000 (14:07 +0200)]
anv: implement gen9 post sync pipe control workaround

We've been missing this workaround for a while and since it's required
for Gen12, let's implement it for Gen9 first.

v2: Update comment for Gen9.

v3: Fix clearing of bits... (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>

4 years agoiris: implement gen12 post sync pipe control workaround
Lionel Landwerlin [Wed, 15 Jan 2020 12:06:07 +0000 (14:06 +0200)]
iris: implement gen12 post sync pipe control workaround

Like Skylake, Gen12 requires a workaround for PIPE_CONTROLs using a
post-sync operation.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>

4 years agofreedreno: allow ctx->batch to be NULL
Rob Clark [Tue, 4 Feb 2020 21:46:56 +0000 (13:46 -0800)]
freedreno: allow ctx->batch to be NULL

This was mostly true already, now that we use `fd_context_batch()` for
first access to batch in draw/clear/grid paths.  So we can drop the old
code in `batch_flush()` that tried to prevent `ctx->batch` from being
NULL.

Fixes a crash with a large number of tabs in chromium.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700>

4 years agofreedreno: Allow UBWC on textures with multiple mipmap levels.
Eric Anholt [Thu, 21 Nov 2019 23:09:02 +0000 (15:09 -0800)]
freedreno: Allow UBWC on textures with multiple mipmap levels.

This is a backport of Jonathan Marek's UBWC work on turnip to GL.

Performance highlights from our trace set (320 frames sampled)
traces/glmark2/texture-texture-filter=mipmap.rdc:    +9.1% +/-   2.2%
traces/android/trex.rdc:                             +8.7% +/-   0.4%
traces/glmark2/desktop-effect=shadow:windows=4.rdc:  +4.2% +/-   2.5%

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno: Disable UBWC on Z24S8 if not TEXTURE_2D.
Eric Anholt [Thu, 12 Dec 2019 22:30:29 +0000 (14:30 -0800)]
freedreno: Disable UBWC on Z24S8 if not TEXTURE_2D.

Fixes two of our three remaining GLES CTS failures, and avoids more
regressions once we enable UBWC mipmaps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno: Blit all array levels when uncompressing UBWC.
Eric Anholt [Thu, 12 Dec 2019 22:20:49 +0000 (14:20 -0800)]
freedreno: Blit all array levels when uncompressing UBWC.

Fixes regressions in GLES CTS's format_reintepret once we enable UBWC
with mipmaps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno: Swap the whole resource layout in shadowing.
Eric Anholt [Thu, 12 Dec 2019 20:49:12 +0000 (12:49 -0800)]
freedreno: Swap the whole resource layout in shadowing.

Let's not have to worry about whether this unusual code path gets
updated whenever we adjust what is in the layout struct.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno/a6xx: Disable the core layer-size setup.
Eric Anholt [Thu, 12 Dec 2019 00:30:43 +0000 (16:30 -0800)]
freedreno/a6xx: Disable the core layer-size setup.

This was getting in the way of UBWC mipmap handling.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno: Rename the UBWC layer size field and store it as bytes.
Eric Anholt [Mon, 25 Nov 2019 19:49:05 +0000 (11:49 -0800)]
freedreno: Rename the UBWC layer size field and store it as bytes.

This makes the field description match its usage in the code, matches tu's
usage of the field, and avoids storing values in surprising units.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno: Include the layer size in layout debug.
Eric Anholt [Thu, 12 Dec 2019 21:54:43 +0000 (13:54 -0800)]
freedreno: Include the layer size in layout debug.

It's been many of my bugs so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agofreedreno: Move the layout debug under FD_MESA_DEBUG=layout.
Eric Anholt [Thu, 12 Dec 2019 21:48:31 +0000 (13:48 -0800)]
freedreno: Move the layout debug under FD_MESA_DEBUG=layout.

I keep wanting to turn this on while debugging layout stuff, and I
suspect krh and robclark could use it too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>

4 years agoradv: Do not set SX DISABLE bits for RB+ with unused surfaces.
Bas Nieuwenhuizen [Thu, 30 Jan 2020 16:58:55 +0000 (17:58 +0100)]
radv: Do not set SX DISABLE bits for RB+ with unused surfaces.

The extra bits in CB_SHADER_MASK break dual source blending in
SkQP on a Stoney device. However:

- As far as I can tell, some other dual source blend tests are passing
  before and after the change.
- A hacked around skqp passes on my Vega desktop and Raven laptop
- Getting Skqp to give any useful info or to run it outside of Android
  on ChromeOS is proving difficult.

I have confirmed 3 strategies that seem to work:
- The old radv behavior of setting CB_SHADER_MASK to 0xF
- AMDVLK: CB_SHADER_MASK = 0xFF, and the 3 RB+ regs
  are 0.
- radeonsi: CB_SHADER_MASK = 0xFF, but does not set DISABLE
  bits in SX_BLEND_OPT_CONTROL for CB 1-7.

Let us use the radeonsi solution as that solution also seems like the correct
thing to do for holes. I have tested on my Raven laptop that setting the high
surfaces to not disabled and downconvert to 32_R does not imply a performance
penalty.

Fixes: e9316fdfd48 "radv: fix setting CB_SHADER_MASK for dual source blending"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670>

4 years agomesa: implement missing display list functions while switching to the template
Marek Olšák [Wed, 29 Jan 2020 01:18:40 +0000 (20:18 -0500)]
mesa: implement missing display list functions while switching to the template

The vbo_init_tmp.h template tells us which functions are unimplemented.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>

4 years agovbo: move reusable code from vbo_attrib_tmp.h into vbo_util.h
Marek Olšák [Wed, 29 Jan 2020 00:48:50 +0000 (19:48 -0500)]
vbo: move reusable code from vbo_attrib_tmp.h into vbo_util.h

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>

4 years agovbo: use the template for save GLvertexformat initialization
Marek Olšák [Tue, 28 Jan 2020 22:25:40 +0000 (17:25 -0500)]
vbo: use the template for save GLvertexformat initialization

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>

4 years agovbo: use the template for noop GLvertexformat initialization
Marek Olšák [Tue, 28 Jan 2020 22:25:40 +0000 (17:25 -0500)]
vbo: use the template for noop GLvertexformat initialization

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>

4 years agovbo: move GLvertexformat initialization into a template header file for reuse
Marek Olšák [Tue, 28 Jan 2020 22:24:48 +0000 (17:24 -0500)]
vbo: move GLvertexformat initialization into a template header file for reuse

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>

4 years agofreedreno/perfcntrs: fix fd leak
Eric Engestrom [Sun, 2 Feb 2020 17:04:29 +0000 (17:04 +0000)]
freedreno/perfcntrs: fix fd leak

CoverityID: 11105681458071
Fixes: 5a13507164a26fc796f0 ("freedreno/perfcntrs: add fdperf")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671>

4 years agoutil: Drop unpacking from int signed to unsigned and vice versa.
Eric Anholt [Mon, 11 Nov 2019 23:52:53 +0000 (15:52 -0800)]
util: Drop unpacking from int signed to unsigned and vice versa.

After all the previous cleanups, it's clear that the callers only ever
ask for SINT->SINT or UINT->UINT.  Cuts 20k of compiled text from
gallium drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>