Brian Paul [Sat, 7 Mar 2015 20:15:22 +0000 (13:15 -0700)]
mesa: remove register keyword, add const in _mesa_QueryMatrixxOES()
Reviewed-by: Matt Turner <mattst88@gmail.com>
Brian Paul [Sat, 7 Mar 2015 20:15:22 +0000 (13:15 -0700)]
mesa: reindent querymatrix.c
Use 3-space indents, not 4. Move some comments after the case statements.
Acked-by: Matt Turner <mattst88@gmail.com>
Brian Paul [Sat, 7 Mar 2015 20:15:22 +0000 (13:15 -0700)]
mesa: move fpclassify work-arounds into c99_math.h
v2: Use #error in the #else clause, per Jose.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Jose Fonseca [Thu, 12 Mar 2015 09:57:43 +0000 (09:57 +0000)]
gallivm: Prevent double delete on LLVM 3.6
std::unique_ptr takes ownership of MM, and a double delete could ensure
in case of an error, as pointed out by Chris Vine in
https://bugs.freedesktop.org/show_bug.cgi?id=89387
Reviewed-by: Chris Vine <chris@cvine.freeserve.co.uk>
Emil Velikov [Mon, 9 Mar 2015 11:46:07 +0000 (11:46 +0000)]
autogen.sh: pass --force to autoreconf, quote ORIGDIR
By passing --force autoreconf will update all the aux files, which would
otherwise be ignored if one updates autoconf/automake.
Quote the ORIGDIR variable to prevent fall-outs, when its name contains
space.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Fri, 6 Mar 2015 16:54:59 +0000 (16:54 +0000)]
glx: remove support for non-multithreaded platforms
Implicitly required for a while, although commit
9385c592c68 (mapi:
remove u_thread.h) was the one that put the final nail on the
coffin.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Fri, 6 Mar 2015 16:54:58 +0000 (16:54 +0000)]
glx: remove final reference to THREADS
Left over from commit
18db13f5865(mapi: THREADS was always defined,
remove it)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Fri, 6 Mar 2015 16:54:57 +0000 (16:54 +0000)]
configure: require pthreads for POSIX builds
This has been an implicit rule for building mesa for a long time. Let's
make it official and just bail out at configure time. This way we can
cleaning up some of our glx code.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Fri, 6 Mar 2015 16:54:56 +0000 (16:54 +0000)]
egl/main: convert thread management to use c11 threads
Convert the code to use the C11 threads implementation, and nuke the
Windows non-pthreads code-path. The c11/threads_win32.h abstraction
should be better than the current code.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Fri, 6 Mar 2015 16:54:55 +0000 (16:54 +0000)]
egl/main: use c11/threads' mutex directly
Remove the inline wrappers/abstraction layer.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Jason Ekstrand [Tue, 3 Mar 2015 01:59:38 +0000 (17:59 -0800)]
nir/worklist: Don't change the start index when computing the tail index
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Thomas Helland [Sat, 28 Feb 2015 19:32:32 +0000 (20:32 +0100)]
nir: Optimize a + neg(a)
Shader-db i965 instructions:
total instructions in shared programs:
1711180 ->
1711159 (-0.00%)
instructions in affected programs: 825 -> 804 (-2.55%)
helped: 9
HURT: 0
GAINED: 3
LOST: 3
Shader-db NIR instructions:
total instructions in shared programs: 606187 -> 606179 (-0.00%)
instructions in affected programs: 298 -> 290 (-2.68%)
helped: 4
HURT: 0
GAINED: 0
LOST: 0
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Thomas Helland [Sat, 28 Feb 2015 19:32:31 +0000 (20:32 +0100)]
nir: Optimize (a*b)+(a*c) -> a*(b+c)
Shader-db i965 instructions:
total instructions in shared programs:
1715894 ->
1710802 (-0.30%)
instructions in affected programs: 443080 -> 437988 (-1.15%)
helped: 1502
HURT: 13
GAINED: 4
LOST: 4
Shader-db NIR instructions:
total instructions in shared programs: 607710 -> 606187 (-0.25%)
instructions in affected programs: 208285 -> 206762 (-0.73%)
helped: 769
HURT: 8
GAINED: 0
LOST: 0
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Marius Predut [Wed, 11 Mar 2015 09:25:00 +0000 (03:25 -0600)]
vbo: improve the code style by adjust the preprocessing c code directives
Brian Paul review suggestion: there's more macro use here than necessary.
Removed and redefine some #define preprocessing directives.
Removed the directive input parameter 'T' .
No functional changes.
Signed-off-by: Marius Predut <marius.predut@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Sun, 8 Mar 2015 22:46:39 +0000 (16:46 -0600)]
mesa: remove CPU_TO_LE32() for AIX
This is the only remnant of AIX-specific code in Mesa. Probably long
unused.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sun, 8 Mar 2015 22:44:28 +0000 (16:44 -0600)]
mesa: remove #define __volatile
Not actually used anwhere in Mesa.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 7 Mar 2015 20:15:22 +0000 (13:15 -0700)]
mesa: use strdup() instead of _mesa_strdup()
We were already using strdup() in various places in Mesa. Get rid
of the _mesa_strdup() wrapper. All the callers pass a non-NULL
argument so the NULL check isn't needed either.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 7 Mar 2015 20:15:22 +0000 (13:15 -0700)]
st/glx: use strdup() instead of _mesa_strdup()
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 7 Mar 2015 20:15:22 +0000 (13:15 -0700)]
xlib: use strdup() instead of _mesa_strdup()
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Tue, 10 Mar 2015 14:18:27 +0000 (08:18 -0600)]
i915: add parens to silence operator precedence warning
Signed-off-by: Brian Paul <brianp@vmware.com>
Iago Toral Quiroga [Tue, 10 Mar 2015 10:36:43 +0000 (11:36 +0100)]
i965: Fix out-of-bounds accesses into pull_constant_loc array
The piglit test glsl-fs-uniform-array-loop-unroll.shader_test was designed
to do an out of bounds access into an uniform array to make sure that we
handle that situation gracefully inside the driver, however, as Ken describes
in bug 79202, Valgrind reports that this is leading to an out-of-bounds access
in fs_visitor::demote_pull_constants().
Before accessing the pull_constant_loc array we should make sure that
the uniform we are trying to access is valid.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79202
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jordan Justen [Sat, 21 Feb 2015 23:05:22 +0000 (15:05 -0800)]
i965/gen6 gs: Convert brw_imm_ud/brw_imm_d to src_reg
Same idea as this patch, only for gen6_gs_visitor:
commit
49a938a265f5959c9b558995cc658f80acb6eb18
Author: Jordan Justen <jordan.l.justen@intel.com>
Date: Fri Feb 20 12:12:25 2015 -0800
i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data
Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jordan Justen [Sat, 21 Feb 2015 23:00:28 +0000 (15:00 -0800)]
i965/fs: Use unsigned for CS/VS atomics pixel mask immediate data
brw_imm_ud(0xffff) should have been converted to fs_reg(0xffffu) to
make sure the uint32_t fs_reg constructor was matched.
commit
49a938a265f5959c9b558995cc658f80acb6eb18
Author: Jordan Justen <jordan.l.justen@intel.com>
Date: Fri Feb 20 12:12:25 2015 -0800
i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jordan Justen [Sun, 29 Jun 2014 19:06:33 +0000 (12:06 -0700)]
i965/gen8: Don't allocate hiz miptree structure
We now skip allocating a hiz miptree for gen8. Instead, we calculate
the required hiz buffer parameters and allocate a bo directly.
v2:
* Update hz_height calculation as suggested by Topi
v3:
* Bail if we failed to create the bo (Ben)
v4:
* CEILING => DIV_ROUND_UP
* Make sure mt->logical_depth0 being 0 would not cause trouble
* Fail if Y tiling is not returned
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jordan Justen [Sun, 29 Jun 2014 19:06:33 +0000 (12:06 -0700)]
i965/gen7: Don't allocate hiz miptree structure
We now skip allocating a hiz miptree for gen7. Instead, we calculate
the required hiz buffer parameters and allocate a bo directly.
v2:
* Update hz_height calculation as suggested by Topi
v3:
* Bail if we failed to create the bo (Ben)
v4:
* CEILING => DIV_ROUND_UP
* Make sure mt->logical_depth0 being 0 would not cause trouble
* Fail if Y tiling is not returned
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jordan Justen [Sun, 29 Jun 2014 19:06:33 +0000 (12:06 -0700)]
i965/gen8: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from
intel_miptree_aux_buffer. This will allow us to switch over to not
allocating a miptree.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jordan Justen [Sun, 29 Jun 2014 19:06:33 +0000 (12:06 -0700)]
i965/gen7: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from
intel_miptree_aux_buffer. This will allow us to switch over to not
allocating a miptree.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jordan Justen [Sun, 29 Jun 2014 18:55:26 +0000 (11:55 -0700)]
i965/hiz: Start to separate miptree out from hiz buffers
Today we allocate a miptree's for the hiz buffer. We needed this in
the past because we would point the hardware at offsets of the hiz
buffer. Since the hiz format is not documented, this is not a good
idea.
Since moving to support layered rendering on Gen7+, we no longer point
at an offset into the buffer on Gen7+.
Therefore, to support hiz on Gen7+, we don't need a full miptree
structure allocated.
This patch starts to create a new auxiliary buffer structure
(intel_miptree_aux_buffer) that can be a more simplistic miptree
side-band buffer associated with a miptree. (For example, to serve the
needs of the hiz buffer.)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Dave Airlie [Tue, 10 Mar 2015 06:45:18 +0000 (16:45 +1000)]
mesa/scissor: fix typos in debug names
Just noticed this when working on virgl.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Sun, 8 Mar 2015 16:18:07 +0000 (17:18 +0100)]
nvc0: fix wrong max value for driver queries
The maximum value of a Gallium HUD's panel is automatically adjusted
when the current value is greater than the max. If we set the
pipe_query_driver_info::max_value to UINT64_MAX, the maximum value is
never adjusted and this results in a flat line instead of a pretty curve
which is correctly scaled.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Vinson Lee [Sat, 7 Mar 2015 06:08:00 +0000 (22:08 -0800)]
i965: Silence GCC maybe-uninitialized warning.
brw_shader.cpp: In function ‘bool brw_saturate_immediate(brw_reg_type, brw_reg*)’:
brw_shader.cpp:618:31: warning: ‘sat_imm.brw_saturate_immediate(brw_reg_type, brw_reg*)::<anonymous union>::ud’ may be used uninitialized in this function [-Wmaybe-uninitialized]
reg->dw1.ud = sat_imm.ud;
^
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Vinson Lee [Sat, 7 Mar 2015 05:52:31 +0000 (21:52 -0800)]
i915: Fix GCC unused-but-set-variable warning in release build.
i915_fragprog.c: In function ‘i915ValidateFragmentProgram’:
i915_fragprog.c:1453:11: warning: variable ‘k’ set but not used [-Wunused-but-set-variable]
int k;
^
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Vinson Lee [Sat, 7 Mar 2015 22:07:10 +0000 (14:07 -0800)]
Add macro for unused function attribute.
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Ben Widawsky [Sat, 7 Mar 2015 01:31:00 +0000 (17:31 -0800)]
meta: Plug memory leak
It looks like this has existed since
commit
f5a477ab76b6e0b268387699cd2253a43db0dfae
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Mon Dec 16 11:54:08 2013 -0800
meta: Refactor shader generation code out of mipmap generation path
Valgrind was complaining on fbo-generatemipmap-formats
v2: Instead, do the allocation after the early return block (v2)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 27 Feb 2015 01:45:49 +0000 (17:45 -0800)]
i965/fs: Don't issue FB writes for bound but unwritten color targets.
We used to loop over all color attachments, and emit FB writes for each
one, even if the shader didn't write to a corresponding output variable.
Those color attachments would be filled with garbage (undefined values).
Football Manager binds a framebuffer with 4 color attachments, but draws
to it using a shader that only writes to gl_FragData[0..2]. This meant
that color attachment 3 would be filled with garbage, resulting in
rendering artifacts. Now we skip writing to it, fixing rendering.
Writes to gl_FragColor initialize outputs[0..nr_color_regions-1] to
GRFs, while writes to gl_FragData[i] initialize outputs[i].
Thanks to Jason Ekstrand for tracking this down.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86747
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 27 Feb 2015 06:55:54 +0000 (22:55 -0800)]
i965/fs: Make emit_shader_time_end() insert before EOT.
Previously, we emitted the shader-time epilogue from emit_fb_writes(),
during the middle of looping through color regions (or emit_urb_writes
for the VS). This is duplicated several times and rather awkward.
I need to fix a bug in our FB write handling, and it will be a lot
easier if we move emit_shader_time_end() out of there.
Now, we simply emit FB writes/URB writes, and subsequently have
emit_shader_time_end() insert instructions before the final SEND with
EOT. Not only is this simpler, it's actually a slight improvement:
we now include the MOVs to set up the final FB write payload in our
shader-time measurements.
Note that INTEL_DEBUG=shader_time only exists on Gen7+, and uses
send-from-GRF. (In the past, we might have hit trouble where both
attempt to use MRFs for messages; that's not a problem now.)
v2: Rebase on v3 of the previous patch and other shader_time fixes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> [v1]
Acked-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 27 Feb 2015 07:51:27 +0000 (23:51 -0800)]
i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.
This makes another part of the INTEL_DEBUG=shader_time code emittable
at arbitrary locations, rather than just at the end of the instruction
stream.
v2: Don't lose smear! Caught by Topi Pohjolainen.
v3: Don't set smear on the destination of the MOV. Thanks Topi!
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 27 Feb 2015 06:49:04 +0000 (22:49 -0800)]
i965/fs: Make emit_shader_time_write return rather than emit.
Instead of emit_shader_time_write, we now do emit(SHADER_TIME_ADD(...)).
The advantage is that we can also insert a shader time write at an
arbitrary location in the instruction stream, rather than being
restricted to emitting at the end.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Sun, 8 Mar 2015 08:13:41 +0000 (00:13 -0800)]
i965/fs: Set smear on shader_time diff register.
The ADD(diff, diff, fs_reg(-2u)) instruction reads diff, which is a
width 1 register. We need to read it as <0,1,0> with a subreg of 0,
which is what smear accomplishes.
Fixes assertion:
brw_eu_emit.c:285: validate_reg: Assertion `hstride == 0' failed.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Sun, 8 Mar 2015 07:01:07 +0000 (23:01 -0800)]
i965/fs: Set force_writemask_all on shader_time instructions.
These computations don't have anything to do with the currently
executing channels, so they should use force_writemask_all.
This fixes assert failures.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Alexandre Demers [Wed, 25 Feb 2015 06:50:49 +0000 (01:50 -0500)]
r600g: Use R600_MAX_VIEWPORTS instead of 16
Lets define R600_MAX_VIEWPORTS instead of using 16 here and there
in the code when looping through viewports and scissors. It is
easier to understand what this number represents.
v2: Missed a case where R600_MAX_VIEWPORTS should have been used.
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Ian Romanick [Thu, 5 Mar 2015 19:26:53 +0000 (11:26 -0800)]
i915: Remove unused IS_GEN2 macro
Inspired by Damien's recent libdrm changes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Thu, 5 Mar 2015 18:55:32 +0000 (10:55 -0800)]
i915: Remove (mostly) unused IS_915 macro
Inspired by Damien's recent libdrm changes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Thu, 5 Mar 2015 18:47:56 +0000 (10:47 -0800)]
i915: Remove (mostly) unused IS_PNV, IS_PNVG, and IS_PNVGM macros
Inspired by Damien's recent libdrm changes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Thu, 5 Mar 2015 18:27:04 +0000 (10:27 -0800)]
i915: Remove IS_9XX macro
Since the i915 / i965 split, IS_9XX just means IS_GEN3. Inspired by
Damien's recent libdrm changes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Thu, 5 Mar 2015 18:24:57 +0000 (10:24 -0800)]
i915: Remove unused IS_MOBILE macro
Inspired by Damien's recent libdrm changes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Sat, 28 Feb 2015 02:43:00 +0000 (18:43 -0800)]
i965: Don't write past the end of the application supplied buffer
Both the AMD and Intel APIs provide a dataSize parameter, and this
function would merrily ignore it. Neither API specifies what to do when
the buffer isn't big enough. I take the easy route of writing all the
complete bits of data that will fit. With more complete specs, we could
probably do something different.
I noticed this while looking into an unused parameter warning. The
warning was actually useful!
brw_performance_monitor.c: In function 'brw_get_perf_monitor_result':
brw_performance_monitor.c:1261:37: warning: unused parameter 'data_size' [-Wunused-parameter]
GLsizei data_size,
^
v2: Fix checks to include offset in the calculation. Noticed by Jan.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Ian Romanick [Sat, 28 Feb 2015 02:42:03 +0000 (18:42 -0800)]
i965: Silence unused parameter warning
All dd functions take a gl_context as the first parameter. Instead of
removing it, just silence the warning.
brw_performance_monitor.c: In function 'brw_new_perf_monitor':
brw_performance_monitor.c:1354:41: warning: unused parameter 'ctx' [-Wunused-parameter]
brw_new_perf_monitor(struct gl_context *ctx)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Sat, 28 Feb 2015 02:26:11 +0000 (18:26 -0800)]
i965: Silence many 'static' is not at beginning of declaration warnings
What a useful warning. #ThanksGCC
brw_performance_monitor.c:153:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_counter gen5_raw_chaps_counters[] = {
^
brw_performance_monitor.c:185:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static int gen5_oa_snapshot_layout[] =
^
brw_performance_monitor.c:221:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_group gen5_groups[] = {
^
brw_performance_monitor.c:240:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_counter gen6_raw_oa_counters[] = {
^
brw_performance_monitor.c:281:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static int gen6_oa_snapshot_layout[] =
^
brw_performance_monitor.c:317:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_counter gen6_statistics_counters[] = {
^
brw_performance_monitor.c:332:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static int gen6_statistics_register_addresses[] = {
^
brw_performance_monitor.c:346:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_group gen6_groups[] = {
^
brw_performance_monitor.c:356:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_counter gen7_raw_oa_counters[] = {
^
brw_performance_monitor.c:402:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static int gen7_oa_snapshot_layout[] =
^
brw_performance_monitor.c:470:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_counter gen7_statistics_counters[] = {
^
brw_performance_monitor.c:493:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static int gen7_statistics_register_addresses[] = {
^
brw_performance_monitor.c:515:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
const static struct gl_perf_monitor_group gen7_groups[] = {
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Sat, 28 Feb 2015 02:19:33 +0000 (18:19 -0800)]
i965/fs: Silence unused parameter warning
I don't this opt_cmod_propagation_local ever used the fs_visitor.
brw_fs_cmod_propagation.cpp:52:40: warning: unused parameter 'v' [-Wunused-parameter]
opt_cmod_propagation_local(fs_visitor *v, bblock_t *block)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Sat, 28 Feb 2015 02:06:25 +0000 (18:06 -0800)]
i965/fs: Silence unused parameter warning
Unused since
b18fd23.
brw_fs.cpp:2878:44: warning: unused parameter 'dispatch_width' [-Wunused-parameter]
clear_deps_for_inst_src(fs_inst *inst, int dispatch_width, bool *deps,
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Sat, 28 Feb 2015 00:43:13 +0000 (16:43 -0800)]
i965/fs: Silence unused parameter warning
brw_fs_visitor.cpp:2162:56: warning: unused parameter 'offset_components' [-Wunused-parameter]
fs_reg offset_value, unsigned offset_components,
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Laura Ekstrand [Fri, 27 Feb 2015 22:54:00 +0000 (14:54 -0800)]
main: Add entry point for TextureBufferRange.
v2: Review by Martin Peres
- Get rid of difficult-to-follow code copied and pasted from
the original TexBufferRange
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 22:46:02 +0000 (14:46 -0800)]
main: Add check_texture_buffer_target.
Creates a shared function to ensure that texture buffer target is
GL_TEXTURE_BUFFER. Helps to clean up the Tex[ture]Buffer[Range] functions.
v2: Review from Anuj Phogat
- Split rebase of Tex[ture]Buffer[Range]
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 22:45:40 +0000 (14:45 -0800)]
main: Add check_texture_buffer_range.
Creates a shared function that TexBufferRange and TextureBufferRange can use
to check the buffer range. This cleans up TexBufferRange considerably.
v2: Review from Anuj Phogat
- Split rebase of Tex[ture]Buffer[Range]
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 22:34:27 +0000 (14:34 -0800)]
main: Cosmetic changes for Texture Buffers.
Adds a useful comment and some whitespace. Fixes an error message.
v2: Review from Anuj Phogat
- Split rebase of Tex[ture]Buffer[Range]
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 22:31:29 +0000 (14:31 -0800)]
main: Refactor _mesa_texture_buffer_range.
Changes how the caller is identified in error messages, moves a check for
ARB_texture_buffer_object from the entry points to the shared code in
_mesa_texture_buffer_range, and removes an unused argument (GLenum target).
v2: Review from Anuj Phogat
- Split rebase of Tex[ture]Buffer[Range]
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 22:07:50 +0000 (14:07 -0800)]
main: Use _mesa_lookup_bufferobj_err to simplify Tex[ture]Buffer[Range].
v2: Review from Anuj Phogat
- Split rebase of Tex[ture]Buffer[Range]
- Closing curly brace on the same line as else
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Sat, 10 Jan 2015 00:16:48 +0000 (16:16 -0800)]
main: Add utility function _mesa_lookup_bufferobj_err.
This function is exposed to mesa driver internals so that texture buffer
objects and array objects can use it.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Tue, 6 Jan 2015 22:05:41 +0000 (14:05 -0800)]
main: Checking for cube completeness in GetCompressedTextureImage.
v2: Review from Anuj Phogat
- Remove redundant copies of the cube map block comment
- Replace redundant "if (!texImage) return;" statements with
assert(texImage)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Tue, 6 Jan 2015 23:27:32 +0000 (15:27 -0800)]
main: Add TEXTURE_CUBE_MAP support for glCompressedTextureSubImage3D.
v2: Review from Anuj Phogat
- Remove redundant copies of the cube map block comment
- Replace redundant "if (!texImage) return;" statements with
assert(texImage)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 19:14:48 +0000 (11:14 -0800)]
main: assert(texImage) in ARB_DSA texture cube map functions.
ARB_direct_state_access functions that deal with texture cube
maps need to make sure that texture images are not NULL before operating on
them. In the following cases, the error check functions already throw an
error if texImage == NULL, so an assert can be raised instead.
v2: Review from Anuj Phogat
- Replace redundant "if (!texImage) return;" statements with
assert(texImage)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 19:09:17 +0000 (11:09 -0800)]
main: Remove redundant copy of cube map block comment in GetTextureImage.
The comment describing why ARB_direct_state_access texture cube map functions
use _mesa_cube_level_complete is very long. To save room in the files,
readers are now referred to one central comment on texturesubimage in
teximage.c.
v2: Review from Anuj Phogat
- Remove redundant copies of the cube map block comment
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 19:03:18 +0000 (11:03 -0800)]
main: Remove redundant NumLayers checks.
ARB_direct_state_access texture functions that operate on cube maps no longer
need to verify that cube map texture objects contain six texture images
because _mesa_cube_level_complete now does that for them.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Laura Ekstrand [Wed, 4 Mar 2015 18:49:55 +0000 (10:49 -0800)]
main: _mesa_cube_level_complete checks NumLayers.
_mesa_cube_level_complete now verifies that a cube map texture object actually
has six texture images before proceeding.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Marek Olšák [Mon, 9 Mar 2015 20:20:03 +0000 (21:20 +0100)]
r300g: fix sRGB->sRGB blits
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Marek Olšák [Tue, 24 Feb 2015 22:15:59 +0000 (23:15 +0100)]
r300g: fix a crash when resolving into an sRGB texture
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Marek Olšák [Mon, 9 Mar 2015 19:01:26 +0000 (20:01 +0100)]
r300g: use memset for clearing the shader key
Marek Olšák [Mon, 9 Mar 2015 19:05:48 +0000 (20:05 +0100)]
r300g: remove the broken SNORM->UNORM shader lowering pass
Not used anymore.
Marek Olšák [Mon, 9 Mar 2015 19:04:04 +0000 (20:04 +0100)]
r300g: fix RGTC1 and LATC1 SNORM formats
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Stefan Dösinger [Mon, 9 Mar 2015 15:15:13 +0000 (16:15 +0100)]
r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)
This fixes the GL_COMPRESSED_RED_RGTC1 part of piglit's rgtc-teximage-01
test as well as the precision part of Wine's 3dc format test (fd.o bug
89156).
The Z component seems to contain a lower precision version of the
result, probably a temporary value from the decompression computation.
The Y and W component contain different data that depends on the input
values as well, but I could not make sense of them (Not that I tried
very hard).
GL_COMPRESSED_SIGNED_RED_RGTC1 still seems to have precision problems in
piglit, and both formats are affected by a compiler bug if they're
sampled by the shader with a swizzle other than .xyzw. Wine uses .xxxx,
which returns random garbage.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89156
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Tom Stellard [Fri, 27 Feb 2015 02:27:27 +0000 (21:27 -0500)]
radeonsi: Add additional information to shader dumps
This adds SGPR count, VGPR count, shader size, LDS size, and scratch
usage to shader dumps.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tom Stellard [Fri, 6 Mar 2015 14:53:00 +0000 (14:53 +0000)]
radeonsi/compute: Use value from compiler for COMPUTE_PGM_RSRC1.FLOAT_MODE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tom Stellard [Thu, 5 Mar 2015 14:30:57 +0000 (14:30 +0000)]
clover: Return the minimum required value for CL_DEVICE_SINGLE_FP_CONFIG v2
This means dropping CL_FP_DENORM from the current return value.
v2:
- Add comments about minimum values for OpenCL 1.2.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Ilia Mirkin [Sat, 7 Mar 2015 23:25:54 +0000 (18:25 -0500)]
freedreno/ir3: get the # of miplevels from getinfo
This fixes ARB_texture_query_levels to actually return the desired
value.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sat, 7 Mar 2015 22:41:47 +0000 (17:41 -0500)]
freedreno/ir3: fix array count returned by TXQ
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Tue, 3 Mar 2015 02:22:27 +0000 (21:22 -0500)]
freedreno: move fb state copy after checking for size change
Fixes: 1f3ca56b ("freedreno: use util_copy_framebuffer_state()")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Kenneth Graunke [Thu, 19 Feb 2015 09:19:13 +0000 (01:19 -0800)]
nir: Make the printer include nir_variable::location too.
Being able to see both location and driver_location can be useful when
debugging IO mistakes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Iago Toral Quiroga [Thu, 5 Mar 2015 08:43:38 +0000 (09:43 +0100)]
i965/fs: Implement SIMD16 dual source blending.
From the SNB PRM, volume 4, part 1, page 193:
"The dual source render target messages only have SIMD8 forms due to
maximum message length limitations. SIMD16 pixel shaders must send two of
these messages to cover all of the pixels. Each message contains two colors
(4 channels each) for each pixel in the message payload."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82831
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Fri, 6 Mar 2015 09:24:30 +0000 (01:24 -0800)]
nir: Only do gl_FrontFacing workaround in glsl_to_nir for the FS.
Vertex shaders can have shader inputs where location happens to be
VARYING_SLOT_FACE. Without predicating this on the shader stage,
we suddenly end up with load_front_face intrinsics in vertex shaders,
which is nonsensical.
Fixes spec/arb_vertex_buffer_object/pos-array when using NIR for VS.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Fri, 6 Mar 2015 09:22:49 +0000 (01:22 -0800)]
nir: Plumb the shader stage into glsl_to_nir().
The next commit needs to know the shader stage in glsl_to_nir().
To facilitate that, we pass the gl_shader rather than the raw exec_list
of instructions. This has both the exec_list and the stage.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Fri, 6 Mar 2015 09:17:22 +0000 (01:17 -0800)]
nir: Add native_integers to nir_shader_compiler_options.
glsl_to_nir, tgsi_to_nir, and prog_to_nir all want to know whether the
driver supports native integers. Presumably other passes may as well.
Adding this to nir_shader_compiler_options is an easy way to provide
that information, as it's accessible via nir_shader::options.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Fri, 6 Mar 2015 08:43:28 +0000 (00:43 -0800)]
nir: Try to make sense of the nir_shader_compiler_options code.
The code in glsl_to_nir is entirely dead, as we translate from GLSL to
NIR at link time, when there isn't a _mesa_glsl_parse_state to pass,
so every caller passes NULL.
glsl_to_nir seems like the wrong place to try and create the shader
compiler options structure anyway - tgsi_to_nir, prog_to_nir, and other
translators all would have to duplicate that code. The driver should
set this up once with whatever settings it wants, and pass it in.
Eric also added a NirOptions field to ctx->Const.ShaderCompilerOptions[]
and left a comment saying: "The memory for the options is expected to be
kept in a single static copy by the driver." This suggests the plan was
to do exactly that. That pointer was not marked const, however, and the
dead code used a mix of static structures and ralloced ones.
This patch deletes the dead code in glsl_to_nir, instead making it take
the shader compiler options as a mandatory argument. It creates an
(empty) options struct in the i965 driver, and makes NirOptions point
to that. It marks the pointer const so that we can actually do so
without generating "discards const qualifier" compiler warnings.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Fri, 6 Mar 2015 08:26:25 +0000 (00:26 -0800)]
nir: Delete nir_shader::user_structures and num_user_structures.
Nothing actually uses these, and the only caller of glsl_to_nir()
(brw_fs_nir.cpp) always passes NULL for the _mesa_glsl_parse_state
pointer, meaning they'll always be NULL and 0, respectively.
Just delete them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Fri, 6 Mar 2015 07:18:36 +0000 (23:18 -0800)]
glsl: Mark array access when copying to a temporary for the ?: operator.
Piglit's spec/glsl-1.20/compiler/structure-and-array-operations/
array-selection.vert test contains the following code:
gl_Position = (pick_from_a_or_b ? a : b)[i];
where "a" and "b" are uniform vec4[2] variables.
ast_to_hir creates a temporary vec4[2] variable, conditional_tmp, and
generates an if-block to copy one or the other:
(declare (temporary) (array vec4 2) conditional_tmp)
(if (var_ref pick_from_a_or_b)
((assign () (var_ref conditional_tmp) (var_ref a)))
((assign () (var_ref conditional_tmp) (var_ref b))))
However, we failed to update max_array_access for "a" and "b", so it
remained 0 - here, the whole array is being accessed. At link time,
update_array_sizes() used this bogus information to change the types
of "a" and "b" to vec4[1]. We then had assignments from a vec4[1] to
a vec4[2], which is highly illegal.
This tripped assertions in nir_split_var_copies with scalar VS.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 6 Mar 2015 04:39:49 +0000 (20:39 -0800)]
i965/nir: Resolve source modifiers on Gen8+ logic operations.
On Gen8+, AND/OR/XOR/NOT don't support the abs() source modifier, and
negate changes meaning to bitwise-not (~, not -). This isn't what NIR
expects, so we should resolve the source modifers via a MOV.
+30 Piglits (fs-op-bit{and,or,xor}-not-abs-*).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Dave Airlie [Sun, 8 Mar 2015 23:51:27 +0000 (09:51 +1000)]
st/mesa: drop unused texture function
This has no users.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 4 Mar 2015 22:19:23 +0000 (08:19 +1000)]
mesa/st: remove unused TexData
this isn't hooked up to anything at all from what I can see.
Seems like a left over from commit
5d67d4fbebb(st/mesa: remove
st_TexImage(), use core Mesa code instead).
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Rob Clark [Sun, 8 Mar 2015 17:38:51 +0000 (13:38 -0400)]
freedreno: replace glsl130 debug flag with glsl120
Now that relative-dst works, we should never fall back to the old
compiler. (Which is almost true, other than a couple edge case sched
fails in piglit).
So replace glsl130 flag to force GLSL 130 and integers on a3xx/a4xx with
a glsl120 flag to force GLSL 120 and !integers.
If this commit breaks any game/app/etc use FD_MESA_DEBUG=glsl120 as a
workaround and please let me know.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 29 Jan 2015 20:55:41 +0000 (15:55 -0500)]
gallium/docs: add some freedreno compiler docs
Enable the 'sphinx.ext.graphviz' extension, and add in a section for
driver specific docs, with freedreno compiler docs beneath. The
goal is for more complete compiler docs, and hopefully some docs about
other parts of the driver (such as how tiling works, etc).
Note that there is also a Distribution -> Drivers section. Although
that appears to be simply just a list of drivers. Not sure if that
should move under the 'Drivers' section or left alone. I did add a
one-line section for freedreno in the existing Distribution -> Drivers
section.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 23 Jan 2015 20:04:46 +0000 (15:04 -0500)]
freedreno/ir3: relative dst
To simplify RA, assign arrays that are written to first. Since enough
dependency information is in the graph to preserve order of reads and
writes of array, so all SSA names for the array collapse into one, just
assign the entire thing by array-id.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 4 Feb 2015 18:41:42 +0000 (13:41 -0500)]
freedreno/ir3: split out array_fanin() helper
We'll need this too for relative dst..
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 4 Feb 2015 21:07:44 +0000 (16:07 -0500)]
freedreno/ir3: drop deref nodes
The meta-deref instruction doesn't really do what we need for relative
destination. Instead, since each instruction can reference at most a
single address value, track the dependency on the address register via
instr->address. This lets us express the dependency regardless of
whether it is used for dst and/or src.
The foreach_ssa_src{_n} iterator macros now also iterates the address
register so, at least in SSA form, the address register behaves as an
additional virtual src to the instruction. Which is pretty much what
we want, as far as scheduling/etc.
TODO:
For now, the foreach_src{_n} iterators are unchanged. We could wrap
the address in an ir3_register and make the foreach_src_{_n} iterators
behave the same way. But that seems unnecessary at this point, since
we mainly care about the address dependency when in SSA form.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 2 Feb 2015 17:54:25 +0000 (12:54 -0500)]
freedreno/ir3: helpful iterator macros
I remembered that we are using c99.. which makes some sugary iterator
macros easier. So introduce iterator macros to iterate all src
registers and all SSA src instructions. The _n variants also return
the src #, since there are a handful of places that need this.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 1 Feb 2015 18:04:09 +0000 (13:04 -0500)]
freedreno/ir3: fix register usage calculations
For cat1 instructions, use reg() as well for relative src, to ensure
proper accounting of register usage. Also, for relative instructions,
use reg->size rather than reg->wrmask to determine the number of
components read/written.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 3 Feb 2015 20:53:35 +0000 (15:53 -0500)]
freedreno/ir3: couple tweaks for cmdline compiler
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 23 Jan 2015 20:03:51 +0000 (15:03 -0500)]
freedreno/ir3: split up ssa_dst
And a couple other trivial renames, to prepare for relative dst.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 10 Feb 2015 09:42:32 +0000 (04:42 -0500)]
freedreno/ir3: fix failed assert in grouping
Turns out there are scenarios where we need to insert mov's in "front"
of an input. Triggered by shaders like:
VERT
DCL IN[0]
DCL IN[1]
DCL OUT[0], POSITION
DCL OUT[1], GENERIC[9]
DCL SAMP[0]
DCL TEMP[0], LOCAL
0: MOV TEMP[0].xy, IN[1].xyyy
1: MOV TEMP[0].w, IN[1].wwww
2: TXF TEMP[0], TEMP[0], SAMP[0], 1D_ARRAY
3: MOV OUT[1], TEMP[0]
4: MOV OUT[0], IN[0]
5: END
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Jon TURNEY [Thu, 5 Mar 2015 15:29:32 +0000 (15:29 +0000)]
c99_alloca.h: Also use <alloca.h> for cygwin
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Brian Paul <brianp@vmware.com>
Vinson Lee [Wed, 4 Mar 2015 02:54:48 +0000 (18:54 -0800)]
i915: Fix GCC unused-variable warning in release build.
i915_debug_fp.c: In function ‘i915_disassemble_program’:
i915_debug_fp.c:302:11: warning: unused variable ‘size’ [-Wunused-variable]
GLuint size = program[0] & 0x1ff;
^
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>